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[mirror_ubuntu-artful-kernel.git] / drivers / media / platform / exynos4-is / media-dev.c
CommitLineData
d3953223
SN
1/*
2 * S5P/EXYNOS4 SoC series camera host interface media device driver
3 *
52917bcb
SN
4 * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
5 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
d3953223
SN
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published
9 * by the Free Software Foundation, either version 2 of the License,
10 * or (at your option) any later version.
11 */
12
13#include <linux/bug.h>
14#include <linux/device.h>
15#include <linux/errno.h>
16#include <linux/i2c.h>
17#include <linux/kernel.h>
18#include <linux/list.h>
19#include <linux/module.h>
e2985a26
SN
20#include <linux/of.h>
21#include <linux/of_platform.h>
22#include <linux/of_device.h>
d3953223
SN
23#include <linux/platform_device.h>
24#include <linux/pm_runtime.h>
25#include <linux/types.h>
26#include <linux/slab.h>
131b6c61 27#include <media/v4l2-ctrls.h>
e2985a26 28#include <media/v4l2-of.h>
d3953223 29#include <media/media-device.h>
b9ee31e6 30#include <media/s5p_fimc.h>
d3953223 31
56fa1a6a 32#include "media-dev.h"
d3953223 33#include "fimc-core.h"
e781bbe3 34#include "fimc-is.h"
0f735f52 35#include "fimc-lite.h"
d3953223
SN
36#include "mipi-csis.h"
37
38static int __fimc_md_set_camclk(struct fimc_md *fmd,
4c8f0629 39 struct fimc_source_info *si,
d3953223 40 bool on);
52917bcb
SN
41
42/* Set up image sensor subdev -> FIMC capture node notifications. */
43static void __setup_sensor_notification(struct fimc_md *fmd,
44 struct v4l2_subdev *sensor,
45 struct v4l2_subdev *fimc_sd)
46{
47 struct fimc_source_info *src_inf;
48 struct fimc_sensor_info *md_si;
49 unsigned long flags;
50
51 src_inf = v4l2_get_subdev_hostdata(sensor);
52 if (!src_inf || WARN_ON(fmd == NULL))
53 return;
54
55 md_si = source_to_sensor_info(src_inf);
56 spin_lock_irqsave(&fmd->slock, flags);
57 md_si->host = v4l2_get_subdevdata(fimc_sd);
58 spin_unlock_irqrestore(&fmd->slock, flags);
59}
60
d3953223
SN
61/**
62 * fimc_pipeline_prepare - update pipeline information with subdevice pointers
39bb6df6 63 * @me: media entity terminating the pipeline
d3953223
SN
64 *
65 * Caller holds the graph mutex.
66 */
b9ee31e6 67static void fimc_pipeline_prepare(struct fimc_pipeline *p,
403dfbec 68 struct media_entity *me)
d3953223 69{
52917bcb 70 struct fimc_md *fmd = entity_to_fimc_mdev(me);
d3953223 71 struct v4l2_subdev *sd;
52917bcb 72 struct v4l2_subdev *sensor = NULL;
0f735f52 73 int i;
d3953223 74
0f735f52
SN
75 for (i = 0; i < IDX_MAX; i++)
76 p->subdevs[i] = NULL;
d3953223 77
0f735f52 78 while (1) {
39bb6df6
SN
79 struct media_pad *pad = NULL;
80
81 /* Find remote source pad */
82 for (i = 0; i < me->num_pads; i++) {
83 struct media_pad *spad = &me->pads[i];
84 if (!(spad->flags & MEDIA_PAD_FL_SINK))
85 continue;
1bddf1b3 86 pad = media_entity_remote_pad(spad);
39bb6df6
SN
87 if (pad)
88 break;
89 }
0f735f52 90
0f735f52
SN
91 if (pad == NULL ||
92 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
93 break;
0f735f52
SN
94 sd = media_entity_to_v4l2_subdev(pad->entity);
95
96 switch (sd->grp_id) {
588c87be 97 case GRP_ID_SENSOR:
52917bcb
SN
98 sensor = sd;
99 /* fall through */
100 case GRP_ID_FIMC_IS_SENSOR:
0f735f52
SN
101 p->subdevs[IDX_SENSOR] = sd;
102 break;
588c87be 103 case GRP_ID_CSIS:
0f735f52
SN
104 p->subdevs[IDX_CSIS] = sd;
105 break;
588c87be 106 case GRP_ID_FLITE:
4af81310
SN
107 p->subdevs[IDX_FLITE] = sd;
108 break;
588c87be 109 case GRP_ID_FIMC:
52917bcb 110 p->subdevs[IDX_FIMC] = sd;
0f735f52 111 break;
e781bbe3
SN
112 case GRP_ID_FIMC_IS:
113 p->subdevs[IDX_IS_ISP] = sd;
114 break;
0f735f52 115 default:
e781bbe3 116 break;
0f735f52 117 }
39bb6df6
SN
118 me = &sd->entity;
119 if (me->num_pads == 1)
120 break;
d3953223 121 }
52917bcb
SN
122
123 if (sensor && p->subdevs[IDX_FIMC])
124 __setup_sensor_notification(fmd, sensor, p->subdevs[IDX_FIMC]);
d3953223
SN
125}
126
127/**
128 * __subdev_set_power - change power state of a single subdev
129 * @sd: subdevice to change power state for
130 * @on: 1 to enable power or 0 to disable
131 *
132 * Return result of s_power subdev operation or -ENXIO if sd argument
133 * is NULL. Return 0 if the subdevice does not implement s_power.
134 */
135static int __subdev_set_power(struct v4l2_subdev *sd, int on)
136{
137 int *use_count;
138 int ret;
139
140 if (sd == NULL)
141 return -ENXIO;
142
143 use_count = &sd->entity.use_count;
144 if (on && (*use_count)++ > 0)
145 return 0;
146 else if (!on && (*use_count == 0 || --(*use_count) > 0))
147 return 0;
148 ret = v4l2_subdev_call(sd, core, s_power, on);
149
150 return ret != -ENOIOCTLCMD ? ret : 0;
151}
152
153/**
154 * fimc_pipeline_s_power - change power state of all pipeline subdevs
155 * @fimc: fimc device terminating the pipeline
0f735f52 156 * @state: true to power on, false to power off
d3953223 157 *
0f735f52 158 * Needs to be called with the graph mutex held.
d3953223 159 */
f8bca4f5 160static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on)
d3953223 161{
f8bca4f5
SN
162 static const u8 seq[2][IDX_MAX - 1] = {
163 { IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE },
164 { IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP },
165 };
166 int i, ret = 0;
d3953223 167
0f735f52 168 if (p->subdevs[IDX_SENSOR] == NULL)
d3953223
SN
169 return -ENXIO;
170
f8bca4f5
SN
171 for (i = 0; i < IDX_MAX - 1; i++) {
172 unsigned int idx = seq[on][i];
173
174 ret = __subdev_set_power(p->subdevs[idx], on);
175
0f735f52 176
0f735f52 177 if (ret < 0 && ret != -ENXIO)
f8bca4f5 178 goto error;
d3953223 179 }
0f735f52 180 return 0;
f8bca4f5
SN
181error:
182 for (; i >= 0; i--) {
183 unsigned int idx = seq[on][i];
184 __subdev_set_power(p->subdevs[idx], !on);
185 }
186 return ret;
d3953223
SN
187}
188
189/**
b9ee31e6
SN
190 * __fimc_pipeline_open - update the pipeline information, enable power
191 * of all pipeline subdevs and the sensor clock
d3953223 192 * @me: media entity to start graph walk with
056f4f30 193 * @prepare: true to walk the current pipeline and acquire all subdevs
d3953223 194 *
740ad921 195 * Called with the graph mutex held.
d3953223 196 */
403dfbec 197static int __fimc_pipeline_open(struct exynos_media_pipeline *ep,
056f4f30 198 struct media_entity *me, bool prepare)
d3953223 199{
056f4f30 200 struct fimc_md *fmd = entity_to_fimc_mdev(me);
403dfbec 201 struct fimc_pipeline *p = to_fimc_pipeline(ep);
056f4f30 202 struct v4l2_subdev *sd;
d3953223
SN
203 int ret;
204
056f4f30
SN
205 if (WARN_ON(p == NULL || me == NULL))
206 return -EINVAL;
207
208 if (prepare)
0f735f52
SN
209 fimc_pipeline_prepare(p, me);
210
056f4f30
SN
211 sd = p->subdevs[IDX_SENSOR];
212 if (sd == NULL)
d3953223 213 return -EINVAL;
0f735f52 214
056f4f30
SN
215 /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
216 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
217 ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
218 if (ret < 0)
219 return ret;
220 }
221 ret = fimc_md_set_camclk(sd, true);
222 if (ret < 0)
223 goto err_wbclk;
224
225 ret = fimc_pipeline_s_power(p, 1);
226 if (!ret)
227 return 0;
0f735f52 228
056f4f30
SN
229 fimc_md_set_camclk(sd, false);
230
231err_wbclk:
232 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
233 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
234
235 return ret;
d3953223
SN
236}
237
d3953223 238/**
b9ee31e6 239 * __fimc_pipeline_close - disable the sensor clock and pipeline power
d3953223
SN
240 * @fimc: fimc device terminating the pipeline
241 *
740ad921 242 * Disable power of all subdevs and turn the external sensor clock off.
d3953223 243 */
403dfbec 244static int __fimc_pipeline_close(struct exynos_media_pipeline *ep)
d3953223 245{
403dfbec 246 struct fimc_pipeline *p = to_fimc_pipeline(ep);
056f4f30
SN
247 struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL;
248 struct fimc_md *fmd;
36da6fcd 249 int ret;
740ad921 250
36da6fcd
SN
251 if (sd == NULL) {
252 pr_warn("%s(): No sensor subdev\n", __func__);
253 return 0;
d3953223 254 }
056f4f30 255
36da6fcd
SN
256 ret = fimc_pipeline_s_power(p, 0);
257 fimc_md_set_camclk(sd, false);
258
056f4f30
SN
259 fmd = entity_to_fimc_mdev(&sd->entity);
260
261 /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
262 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
263 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
264
d3953223
SN
265 return ret == -ENXIO ? 0 : ret;
266}
267
d3953223 268/**
8d274e7c 269 * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs
0f735f52 270 * @pipeline: video pipeline structure
8d274e7c 271 * @on: passed as the s_stream() callback argument
d3953223 272 */
403dfbec 273static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on)
d3953223 274{
8d274e7c
SN
275 static const u8 seq[2][IDX_MAX] = {
276 { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE },
277 { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP },
278 };
403dfbec 279 struct fimc_pipeline *p = to_fimc_pipeline(ep);
8d274e7c 280 int i, ret = 0;
d3953223 281
0f735f52 282 if (p->subdevs[IDX_SENSOR] == NULL)
d3953223
SN
283 return -ENODEV;
284
0f735f52 285 for (i = 0; i < IDX_MAX; i++) {
8d274e7c 286 unsigned int idx = seq[on][i];
0f735f52
SN
287
288 ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on);
289
290 if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
8d274e7c 291 goto error;
0f735f52 292 }
0f735f52 293 return 0;
8d274e7c
SN
294error:
295 for (; i >= 0; i--) {
296 unsigned int idx = seq[on][i];
297 v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on);
298 }
299 return ret;
d3953223 300}
b9ee31e6
SN
301
302/* Media pipeline operations for the FIMC/FIMC-LITE video device driver */
403dfbec 303static const struct exynos_media_pipeline_ops fimc_pipeline_ops = {
740ad921
SN
304 .open = __fimc_pipeline_open,
305 .close = __fimc_pipeline_close,
306 .set_stream = __fimc_pipeline_s_stream,
b9ee31e6 307};
d3953223 308
403dfbec
SN
309static struct exynos_media_pipeline *fimc_md_pipeline_create(
310 struct fimc_md *fmd)
311{
312 struct fimc_pipeline *p;
313
314 p = kzalloc(sizeof(*p), GFP_KERNEL);
315 if (!p)
316 return NULL;
317
318 list_add_tail(&p->list, &fmd->pipelines);
319
320 p->ep.ops = &fimc_pipeline_ops;
321 return &p->ep;
322}
323
324static void fimc_md_pipelines_free(struct fimc_md *fmd)
325{
326 while (!list_empty(&fmd->pipelines)) {
327 struct fimc_pipeline *p;
328
329 p = list_entry(fmd->pipelines.next, typeof(*p), list);
330 list_del(&p->list);
331 kfree(p);
332 }
333}
334
d3953223
SN
335/*
336 * Sensor subdevice helper functions
337 */
338static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd,
4c8f0629 339 struct fimc_source_info *si)
d3953223
SN
340{
341 struct i2c_adapter *adapter;
342 struct v4l2_subdev *sd = NULL;
343
4c8f0629 344 if (!si || !fmd)
d3953223 345 return NULL;
88fa8311
SN
346 /*
347 * If FIMC bus type is not Writeback FIFO assume it is same
348 * as sensor_bus_type.
349 */
4c8f0629 350 si->fimc_bus_type = si->sensor_bus_type;
d3953223 351
4c8f0629 352 adapter = i2c_get_adapter(si->i2c_bus_num);
ecd9acbf
SN
353 if (!adapter) {
354 v4l2_warn(&fmd->v4l2_dev,
355 "Failed to get I2C adapter %d, deferring probe\n",
4c8f0629 356 si->i2c_bus_num);
ecd9acbf
SN
357 return ERR_PTR(-EPROBE_DEFER);
358 }
d3953223 359 sd = v4l2_i2c_new_subdev_board(&fmd->v4l2_dev, adapter,
4c8f0629 360 si->board_info, NULL);
d3953223 361 if (IS_ERR_OR_NULL(sd)) {
7acde02a 362 i2c_put_adapter(adapter);
ecd9acbf
SN
363 v4l2_warn(&fmd->v4l2_dev,
364 "Failed to acquire subdev %s, deferring probe\n",
4c8f0629 365 si->board_info->type);
ecd9acbf 366 return ERR_PTR(-EPROBE_DEFER);
d3953223 367 }
4c8f0629 368 v4l2_set_subdev_hostdata(sd, si);
588c87be 369 sd->grp_id = GRP_ID_SENSOR;
d3953223
SN
370
371 v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice %s\n",
2b13f7d4 372 sd->name);
d3953223
SN
373 return sd;
374}
375
376static void fimc_md_unregister_sensor(struct v4l2_subdev *sd)
377{
378 struct i2c_client *client = v4l2_get_subdevdata(sd);
7acde02a 379 struct i2c_adapter *adapter;
d3953223
SN
380
381 if (!client)
382 return;
e781bbe3 383
d3953223 384 v4l2_device_unregister_subdev(sd);
2b13f7d4
SN
385
386 if (!client->dev.of_node) {
387 adapter = client->adapter;
388 i2c_unregister_device(client);
389 if (adapter)
390 i2c_put_adapter(adapter);
391 }
d3953223
SN
392}
393
e2985a26 394#ifdef CONFIG_OF
2b13f7d4
SN
395/* Register I2C client subdev associated with @node. */
396static int fimc_md_of_add_sensor(struct fimc_md *fmd,
397 struct device_node *node, int index)
398{
399 struct fimc_sensor_info *si;
400 struct i2c_client *client;
401 struct v4l2_subdev *sd;
402 int ret;
403
404 if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor)))
405 return -EINVAL;
406 si = &fmd->sensor[index];
407
408 client = of_find_i2c_device_by_node(node);
409 if (!client)
410 return -EPROBE_DEFER;
411
412 device_lock(&client->dev);
413
c7110f37
LPC
414 if (!client->dev.driver ||
415 !try_module_get(client->dev.driver->owner)) {
2b13f7d4
SN
416 ret = -EPROBE_DEFER;
417 v4l2_info(&fmd->v4l2_dev, "No driver found for %s\n",
418 node->full_name);
419 goto dev_put;
420 }
421
422 /* Enable sensor's master clock */
4c8f0629 423 ret = __fimc_md_set_camclk(fmd, &si->pdata, true);
2b13f7d4
SN
424 if (ret < 0)
425 goto mod_put;
426 sd = i2c_get_clientdata(client);
427
428 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
4c8f0629 429 __fimc_md_set_camclk(fmd, &si->pdata, false);
2b13f7d4
SN
430 if (ret < 0)
431 goto mod_put;
432
4c8f0629 433 v4l2_set_subdev_hostdata(sd, &si->pdata);
e781bbe3
SN
434 if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
435 sd->grp_id = GRP_ID_FIMC_IS_SENSOR;
436 else
437 sd->grp_id = GRP_ID_SENSOR;
438
2b13f7d4
SN
439 si->subdev = sd;
440 v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n",
441 sd->name, fmd->num_sensors);
442 fmd->num_sensors++;
443
444mod_put:
c7110f37 445 module_put(client->dev.driver->owner);
2b13f7d4
SN
446dev_put:
447 device_unlock(&client->dev);
448 put_device(&client->dev);
449 return ret;
450}
451
452/* Parse port node and register as a sub-device any sensor specified there. */
453static int fimc_md_parse_port_node(struct fimc_md *fmd,
454 struct device_node *port,
455 unsigned int index)
456{
457 struct device_node *rem, *ep, *np;
458 struct fimc_source_info *pd;
459 struct v4l2_of_endpoint endpoint;
460 int ret;
461 u32 val;
462
463 pd = &fmd->sensor[index].pdata;
464
465 /* Assume here a port node can have only one endpoint node. */
466 ep = of_get_next_child(port, NULL);
467 if (!ep)
468 return 0;
469
470 v4l2_of_parse_endpoint(ep, &endpoint);
471 if (WARN_ON(endpoint.port == 0) || index >= FIMC_MAX_SENSORS)
472 return -EINVAL;
473
474 pd->mux_id = (endpoint.port - 1) & 0x1;
475
476 rem = v4l2_of_get_remote_port_parent(ep);
477 of_node_put(ep);
478 if (rem == NULL) {
479 v4l2_info(&fmd->v4l2_dev, "Remote device at %s not found\n",
480 ep->full_name);
481 return 0;
482 }
483 if (!of_property_read_u32(rem, "samsung,camclk-out", &val))
484 pd->clk_id = val;
485
486 if (!of_property_read_u32(rem, "clock-frequency", &val))
487 pd->clk_frequency = val;
488
489 if (pd->clk_frequency == 0) {
490 v4l2_err(&fmd->v4l2_dev, "Wrong clock frequency at node %s\n",
491 rem->full_name);
492 of_node_put(rem);
493 return -EINVAL;
494 }
495
496 if (fimc_input_is_parallel(endpoint.port)) {
497 if (endpoint.bus_type == V4L2_MBUS_PARALLEL)
498 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601;
499 else
500 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656;
501 pd->flags = endpoint.bus.parallel.flags;
502 } else if (fimc_input_is_mipi_csi(endpoint.port)) {
503 /*
504 * MIPI CSI-2: only input mux selection and
505 * the sensor's clock frequency is needed.
506 */
507 pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2;
508 } else {
509 v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %s\n",
510 endpoint.port, rem->full_name);
511 }
512 /*
513 * For FIMC-IS handled sensors, that are placed under i2c-isp device
514 * node, FIMC is connected to the FIMC-IS through its ISP Writeback
515 * input. Sensors are attached to the FIMC-LITE hostdata interface
516 * directly or through MIPI-CSIS, depending on the external media bus
517 * used. This needs to be handled in a more reliable way, not by just
518 * checking parent's node name.
519 */
520 np = of_get_parent(rem);
521
522 if (np && !of_node_cmp(np->name, "i2c-isp"))
523 pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
524 else
525 pd->fimc_bus_type = pd->sensor_bus_type;
526
527 ret = fimc_md_of_add_sensor(fmd, rem, index);
528 of_node_put(rem);
529
530 return ret;
531}
532
533/* Register all SoC external sub-devices */
534static int fimc_md_of_sensors_register(struct fimc_md *fmd,
535 struct device_node *np)
536{
537 struct device_node *parent = fmd->pdev->dev.of_node;
538 struct device_node *node, *ports;
539 int index = 0;
540 int ret;
541
542 /* Attach sensors linked to MIPI CSI-2 receivers */
543 for_each_available_child_of_node(parent, node) {
544 struct device_node *port;
545
546 if (of_node_cmp(node->name, "csis"))
547 continue;
548 /* The csis node can have only port subnode. */
549 port = of_get_next_child(node, NULL);
550 if (!port)
551 continue;
552
553 ret = fimc_md_parse_port_node(fmd, port, index);
554 if (ret < 0)
555 return ret;
556 index++;
557 }
558
559 /* Attach sensors listed in the parallel-ports node */
560 ports = of_get_child_by_name(parent, "parallel-ports");
561 if (!ports)
562 return 0;
563
564 for_each_child_of_node(ports, node) {
565 ret = fimc_md_parse_port_node(fmd, node, index);
566 if (ret < 0)
567 break;
568 index++;
569 }
570
571 return 0;
572}
573
e2985a26
SN
574static int __of_get_csis_id(struct device_node *np)
575{
576 u32 reg = 0;
577
578 np = of_get_child_by_name(np, "port");
579 if (!np)
580 return -EINVAL;
581 of_property_read_u32(np, "reg", &reg);
582 return reg - FIMC_INPUT_MIPI_CSI2_0;
583}
584#else
2b13f7d4 585#define fimc_md_of_sensors_register(fmd, np) (-ENOSYS)
e2985a26
SN
586#define __of_get_csis_id(np) (-ENOSYS)
587#endif
588
d3953223
SN
589static int fimc_md_register_sensor_entities(struct fimc_md *fmd)
590{
591 struct s5p_platform_fimc *pdata = fmd->pdev->dev.platform_data;
2b13f7d4 592 struct device_node *of_node = fmd->pdev->dev.of_node;
2b13f7d4
SN
593 int num_clients = 0;
594 int ret, i;
d3953223
SN
595
596 /*
597 * Runtime resume one of the FIMC entities to make sure
598 * the sclk_cam clocks are not globally disabled.
599 */
3e20c345 600 if (!fmd->pmf)
d3953223 601 return -ENXIO;
2b13f7d4 602
3e20c345 603 ret = pm_runtime_get_sync(fmd->pmf);
d3953223
SN
604 if (ret < 0)
605 return ret;
606
2b13f7d4
SN
607 if (of_node) {
608 fmd->num_sensors = 0;
609 ret = fimc_md_of_sensors_register(fmd, of_node);
610 } else if (pdata) {
611 WARN_ON(pdata->num_clients > ARRAY_SIZE(fmd->sensor));
612 num_clients = min_t(u32, pdata->num_clients,
613 ARRAY_SIZE(fmd->sensor));
614 fmd->num_sensors = num_clients;
d3953223 615
2b13f7d4 616 for (i = 0; i < num_clients; i++) {
4c8f0629 617 struct fimc_sensor_info *si = &fmd->sensor[i];
2b13f7d4 618 struct v4l2_subdev *sd;
ecd9acbf 619
4c8f0629
SN
620 si->pdata = pdata->source_info[i];
621 ret = __fimc_md_set_camclk(fmd, &si->pdata, true);
2b13f7d4
SN
622 if (ret)
623 break;
4c8f0629
SN
624 sd = fimc_md_register_sensor(fmd, &si->pdata);
625 ret = __fimc_md_set_camclk(fmd, &si->pdata, false);
2b13f7d4
SN
626
627 if (IS_ERR(sd)) {
4c8f0629 628 si->subdev = NULL;
2b13f7d4
SN
629 ret = PTR_ERR(sd);
630 break;
631 }
4c8f0629 632 si->subdev = sd;
2b13f7d4
SN
633 if (ret)
634 break;
ecd9acbf 635 }
d3953223 636 }
2b13f7d4 637
3e20c345 638 pm_runtime_put(fmd->pmf);
d3953223
SN
639 return ret;
640}
641
642/*
7b43a6f3 643 * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration.
d3953223 644 */
7b43a6f3
SN
645
646static int register_fimc_lite_entity(struct fimc_md *fmd,
647 struct fimc_lite *fimc_lite)
d3953223 648{
8163ec0b 649 struct v4l2_subdev *sd;
403dfbec 650 struct exynos_media_pipeline *ep;
afd7348c 651 int ret;
4af81310 652
7b43a6f3
SN
653 if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS ||
654 fmd->fimc_lite[fimc_lite->index]))
655 return -EBUSY;
d3953223 656
7b43a6f3
SN
657 sd = &fimc_lite->subdev;
658 sd->grp_id = GRP_ID_FLITE;
403dfbec
SN
659
660 ep = fimc_md_pipeline_create(fmd);
661 if (!ep)
662 return -ENOMEM;
663
664 v4l2_set_subdev_hostdata(sd, ep);
693f5c40
SN
665
666 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
7b43a6f3
SN
667 if (!ret)
668 fmd->fimc_lite[fimc_lite->index] = fimc_lite;
669 else
670 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n",
671 fimc_lite->index);
672 return ret;
d3953223
SN
673}
674
7b43a6f3 675static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc)
4af81310 676{
7b43a6f3 677 struct v4l2_subdev *sd;
403dfbec 678 struct exynos_media_pipeline *ep;
4af81310
SN
679 int ret;
680
7b43a6f3
SN
681 if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id]))
682 return -EBUSY;
4af81310 683
7b43a6f3
SN
684 sd = &fimc->vid_cap.subdev;
685 sd->grp_id = GRP_ID_FIMC;
403dfbec
SN
686
687 ep = fimc_md_pipeline_create(fmd);
688 if (!ep)
689 return -ENOMEM;
690
691 v4l2_set_subdev_hostdata(sd, ep);
4af81310 692
7b43a6f3
SN
693 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
694 if (!ret) {
3e20c345
SN
695 if (!fmd->pmf && fimc->pdev)
696 fmd->pmf = &fimc->pdev->dev;
7b43a6f3
SN
697 fmd->fimc[fimc->id] = fimc;
698 fimc->vid_cap.user_subdev_api = fmd->user_subdev_api;
699 } else {
700 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n",
701 fimc->id, ret);
4af81310 702 }
7b43a6f3 703 return ret;
4af81310
SN
704}
705
7b43a6f3
SN
706static int register_csis_entity(struct fimc_md *fmd,
707 struct platform_device *pdev,
708 struct v4l2_subdev *sd)
d3953223 709{
7b43a6f3 710 struct device_node *node = pdev->dev.of_node;
d3953223
SN
711 int id, ret;
712
e2985a26 713 id = node ? __of_get_csis_id(node) : max(0, pdev->id);
7b43a6f3 714
e2985a26
SN
715 if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES))
716 return -ENOENT;
7b43a6f3 717
e2985a26
SN
718 if (WARN_ON(fmd->csis[id].sd))
719 return -EBUSY;
d3953223 720
588c87be 721 sd->grp_id = GRP_ID_CSIS;
d3953223 722 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
afd7348c
SN
723 if (!ret)
724 fmd->csis[id].sd = sd;
725 else
d3953223 726 v4l2_err(&fmd->v4l2_dev,
7b43a6f3 727 "Failed to register MIPI-CSIS.%d (%d)\n", id, ret);
d3953223
SN
728 return ret;
729}
730
e781bbe3
SN
731static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is)
732{
733 struct v4l2_subdev *sd = &is->isp.subdev;
734 int ret;
735
736 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
737 if (ret) {
738 v4l2_err(&fmd->v4l2_dev,
739 "Failed to register FIMC-ISP (%d)\n", ret);
740 return ret;
741 }
742
743 fmd->fimc_is = is;
744 return 0;
745}
746
7b43a6f3
SN
747static int fimc_md_register_platform_entity(struct fimc_md *fmd,
748 struct platform_device *pdev,
749 int plat_entity)
d3953223 750{
7b43a6f3
SN
751 struct device *dev = &pdev->dev;
752 int ret = -EPROBE_DEFER;
753 void *drvdata;
754
755 /* Lock to ensure dev->driver won't change. */
756 device_lock(dev);
757
758 if (!dev->driver || !try_module_get(dev->driver->owner))
759 goto dev_unlock;
760
761 drvdata = dev_get_drvdata(dev);
f58c91ce 762 /* Some subdev didn't probe successfully id drvdata is NULL */
7b43a6f3
SN
763 if (drvdata) {
764 switch (plat_entity) {
765 case IDX_FIMC:
766 ret = register_fimc_entity(fmd, drvdata);
767 break;
768 case IDX_FLITE:
769 ret = register_fimc_lite_entity(fmd, drvdata);
ecd9acbf 770 break;
7b43a6f3
SN
771 case IDX_CSIS:
772 ret = register_csis_entity(fmd, pdev, drvdata);
773 break;
e781bbe3
SN
774 case IDX_IS_ISP:
775 ret = register_fimc_is_entity(fmd, drvdata);
776 break;
7b43a6f3
SN
777 default:
778 ret = -ENODEV;
ecd9acbf
SN
779 }
780 }
d3953223 781
7b43a6f3
SN
782 module_put(dev->driver->owner);
783dev_unlock:
784 device_unlock(dev);
785 if (ret == -EPROBE_DEFER)
786 dev_info(&fmd->pdev->dev, "deferring %s device registration\n",
787 dev_name(dev));
788 else if (ret < 0)
789 dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n",
790 dev_name(dev), ret);
791 return ret;
792}
793
794static int fimc_md_pdev_match(struct device *dev, void *data)
795{
796 struct platform_device *pdev = to_platform_device(dev);
797 int plat_entity = -1;
798 int ret;
799 char *p;
800
801 if (!get_device(dev))
802 return -ENODEV;
803
804 if (!strcmp(pdev->name, CSIS_DRIVER_NAME)) {
805 plat_entity = IDX_CSIS;
7b43a6f3
SN
806 } else {
807 p = strstr(pdev->name, "fimc");
808 if (p && *(p + 4) == 0)
809 plat_entity = IDX_FIMC;
ecd9acbf
SN
810 }
811
7b43a6f3
SN
812 if (plat_entity >= 0)
813 ret = fimc_md_register_platform_entity(data, pdev,
814 plat_entity);
815 put_device(dev);
816 return 0;
d3953223
SN
817}
818
e2985a26
SN
819/* Register FIMC, FIMC-LITE and CSIS media entities */
820#ifdef CONFIG_OF
821static int fimc_md_register_of_platform_entities(struct fimc_md *fmd,
822 struct device_node *parent)
823{
824 struct device_node *node;
825 int ret = 0;
826
827 for_each_available_child_of_node(parent, node) {
828 struct platform_device *pdev;
829 int plat_entity = -1;
830
831 pdev = of_find_device_by_node(node);
832 if (!pdev)
833 continue;
834
835 /* If driver of any entity isn't ready try all again later. */
836 if (!strcmp(node->name, CSIS_OF_NODE_NAME))
837 plat_entity = IDX_CSIS;
e781bbe3
SN
838 else if (!strcmp(node->name, FIMC_IS_OF_NODE_NAME))
839 plat_entity = IDX_IS_ISP;
e2985a26
SN
840 else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME))
841 plat_entity = IDX_FLITE;
842 else if (!strcmp(node->name, FIMC_OF_NODE_NAME) &&
843 !of_property_read_bool(node, "samsung,lcd-wb"))
844 plat_entity = IDX_FIMC;
845
846 if (plat_entity >= 0)
847 ret = fimc_md_register_platform_entity(fmd, pdev,
848 plat_entity);
849 put_device(&pdev->dev);
850 if (ret < 0)
851 break;
852 }
853
854 return ret;
855}
856#else
857#define fimc_md_register_of_platform_entities(fmd, node) (-ENOSYS)
858#endif
859
d3953223
SN
860static void fimc_md_unregister_entities(struct fimc_md *fmd)
861{
862 int i;
863
864 for (i = 0; i < FIMC_MAX_DEVS; i++) {
403dfbec
SN
865 struct fimc_dev *dev = fmd->fimc[i];
866 if (dev == NULL)
d3953223 867 continue;
403dfbec
SN
868 v4l2_device_unregister_subdev(&dev->vid_cap.subdev);
869 dev->vid_cap.ve.pipe = NULL;
d3953223
SN
870 fmd->fimc[i] = NULL;
871 }
4af81310 872 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
403dfbec
SN
873 struct fimc_lite *dev = fmd->fimc_lite[i];
874 if (dev == NULL)
4af81310 875 continue;
403dfbec
SN
876 v4l2_device_unregister_subdev(&dev->subdev);
877 dev->ve.pipe = NULL;
4af81310
SN
878 fmd->fimc_lite[i] = NULL;
879 }
d3953223
SN
880 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
881 if (fmd->csis[i].sd == NULL)
882 continue;
883 v4l2_device_unregister_subdev(fmd->csis[i].sd);
884 fmd->csis[i].sd = NULL;
885 }
886 for (i = 0; i < fmd->num_sensors; i++) {
887 if (fmd->sensor[i].subdev == NULL)
888 continue;
889 fimc_md_unregister_sensor(fmd->sensor[i].subdev);
890 fmd->sensor[i].subdev = NULL;
891 }
e41a35cb
SN
892
893 if (fmd->fimc_is)
894 v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev);
895
7b43a6f3 896 v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n");
d3953223
SN
897}
898
d3953223
SN
899/**
900 * __fimc_md_create_fimc_links - create links to all FIMC entities
901 * @fmd: fimc media device
902 * @source: the source entity to create links to all fimc entities from
903 * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null
904 * @pad: the source entity pad index
d0da3c35 905 * @link_mask: bitmask of the fimc devices for which link should be enabled
d3953223 906 */
4af81310
SN
907static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd,
908 struct media_entity *source,
909 struct v4l2_subdev *sensor,
d0da3c35 910 int pad, int link_mask)
d3953223 911{
4c8f0629 912 struct fimc_source_info *si = NULL;
d3953223 913 struct media_entity *sink;
4af81310 914 unsigned int flags = 0;
f998bb7b 915 int i, ret = 0;
d3953223 916
f998bb7b
SN
917 if (sensor) {
918 si = v4l2_get_subdev_hostdata(sensor);
919 /* Skip direct FIMC links in the logical FIMC-IS sensor path */
4c8f0629 920 if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
f998bb7b
SN
921 ret = 1;
922 }
923
924 for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) {
d3953223 925 if (!fmd->fimc[i])
4af81310 926 continue;
d3953223
SN
927 /*
928 * Some FIMC variants are not fitted with camera capture
929 * interface. Skip creating a link from sensor for those.
930 */
4af81310 931 if (!fmd->fimc[i]->variant->has_cam_if)
d3953223
SN
932 continue;
933
d0da3c35 934 flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0;
4af81310 935
693f5c40 936 sink = &fmd->fimc[i]->vid_cap.subdev.entity;
237e0265 937 ret = media_entity_create_link(source, pad, sink,
88fa8311 938 FIMC_SD_PAD_SINK_CAM, flags);
d3953223
SN
939 if (ret)
940 return ret;
941
237e0265
SN
942 /* Notify FIMC capture subdev entity */
943 ret = media_entity_call(sink, link_setup, &sink->pads[0],
944 &source->pads[pad], flags);
945 if (ret)
946 break;
947
542fb082 948 v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n",
d3953223 949 source->name, flags ? '=' : '-', sink->name);
d3953223 950 }
4af81310
SN
951
952 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
953 if (!fmd->fimc_lite[i])
954 continue;
955
4af81310
SN
956 sink = &fmd->fimc_lite[i]->subdev.entity;
957 ret = media_entity_create_link(source, pad, sink,
f998bb7b 958 FLITE_SD_PAD_SINK, 0);
4af81310
SN
959 if (ret)
960 return ret;
961
962 /* Notify FIMC-LITE subdev entity */
963 ret = media_entity_call(sink, link_setup, &sink->pads[0],
f998bb7b 964 &source->pads[pad], 0);
4af81310
SN
965 if (ret)
966 break;
967
f998bb7b
SN
968 v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n",
969 source->name, sink->name);
4af81310 970 }
d3953223
SN
971 return 0;
972}
973
4af81310
SN
974/* Create links from FIMC-LITE source pads to other entities */
975static int __fimc_md_create_flite_source_links(struct fimc_md *fmd)
976{
977 struct media_entity *source, *sink;
a26860bd 978 int i, ret = 0;
4af81310
SN
979
980 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
981 struct fimc_lite *fimc = fmd->fimc_lite[i];
f998bb7b 982
4af81310
SN
983 if (fimc == NULL)
984 continue;
f998bb7b 985
4af81310 986 source = &fimc->subdev.entity;
bc7584b0 987 sink = &fimc->ve.vdev.entity;
4af81310 988 /* FIMC-LITE's subdev and video node */
6319d6a0 989 ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_DMA,
f998bb7b
SN
990 sink, 0, 0);
991 if (ret)
992 break;
993 /* Link from FIMC-LITE to IS-ISP subdev */
994 sink = &fmd->fimc_is->isp.subdev.entity;
995 ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_ISP,
996 sink, 0, 0);
4af81310
SN
997 if (ret)
998 break;
f998bb7b
SN
999 }
1000
1001 return ret;
1002}
1003
1004/* Create FIMC-IS links */
1005static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd)
1006{
1007 struct media_entity *source, *sink;
1008 int i, ret;
1009
1010 source = &fmd->fimc_is->isp.subdev.entity;
1011
1012 for (i = 0; i < FIMC_MAX_DEVS; i++) {
1013 if (fmd->fimc[i] == NULL)
1014 continue;
1015
1016 /* Link from IS-ISP subdev to FIMC */
1017 sink = &fmd->fimc[i]->vid_cap.subdev.entity;
1018 ret = media_entity_create_link(source, FIMC_ISP_SD_PAD_SRC_FIFO,
1019 sink, FIMC_SD_PAD_SINK_FIFO, 0);
1020 if (ret)
1021 return ret;
4af81310
SN
1022 }
1023
1024 return ret;
1025}
1026
d3953223
SN
1027/**
1028 * fimc_md_create_links - create default links between registered entities
1029 *
1030 * Parallel interface sensor entities are connected directly to FIMC capture
1031 * entities. The sensors using MIPI CSIS bus are connected through immutable
1032 * link with CSI receiver entity specified by mux_id. Any registered CSIS
1033 * entity has a link to each registered FIMC capture entity. Enabled links
1034 * are created by default between each subsequent registered sensor and
1035 * subsequent FIMC capture entity. The number of default active links is
1036 * determined by the number of available sensors or FIMC entities,
1037 * whichever is less.
1038 */
1039static int fimc_md_create_links(struct fimc_md *fmd)
1040{
a8697ec8 1041 struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL };
d3953223 1042 struct v4l2_subdev *sensor, *csis;
56bc911a 1043 struct fimc_source_info *pdata;
237e0265 1044 struct media_entity *source, *sink;
d0da3c35
SN
1045 int i, pad, fimc_id = 0, ret = 0;
1046 u32 flags, link_mask = 0;
d3953223
SN
1047
1048 for (i = 0; i < fmd->num_sensors; i++) {
1049 if (fmd->sensor[i].subdev == NULL)
1050 continue;
1051
1052 sensor = fmd->sensor[i].subdev;
4c8f0629
SN
1053 pdata = v4l2_get_subdev_hostdata(sensor);
1054 if (!pdata)
d3953223
SN
1055 continue;
1056
1057 source = NULL;
d3953223 1058
56bc911a
SN
1059 switch (pdata->sensor_bus_type) {
1060 case FIMC_BUS_TYPE_MIPI_CSI2:
d3953223
SN
1061 if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES,
1062 "Wrong CSI channel id: %d\n", pdata->mux_id))
1063 return -EINVAL;
1064
1065 csis = fmd->csis[pdata->mux_id].sd;
1066 if (WARN(csis == NULL,
1067 "MIPI-CSI interface specified "
1068 "but s5p-csis module is not loaded!\n"))
d12392ec 1069 return -EINVAL;
d3953223 1070
1c9f5bd7
AH
1071 pad = sensor->entity.num_pads - 1;
1072 ret = media_entity_create_link(&sensor->entity, pad,
d3953223
SN
1073 &csis->entity, CSIS_PAD_SINK,
1074 MEDIA_LNK_FL_IMMUTABLE |
1075 MEDIA_LNK_FL_ENABLED);
1076 if (ret)
1077 return ret;
1078
969e877c 1079 v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n",
d3953223
SN
1080 sensor->entity.name, csis->entity.name);
1081
4af81310 1082 source = NULL;
5d33ee92 1083 csi_sensors[pdata->mux_id] = sensor;
d3953223
SN
1084 break;
1085
56bc911a 1086 case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656:
d3953223
SN
1087 source = &sensor->entity;
1088 pad = 0;
1089 break;
1090
1091 default:
1092 v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n",
56bc911a 1093 pdata->sensor_bus_type);
d3953223
SN
1094 return -EINVAL;
1095 }
1096 if (source == NULL)
1097 continue;
1098
d0da3c35 1099 link_mask = 1 << fimc_id++;
4af81310 1100 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 1101 pad, link_mask);
4af81310
SN
1102 }
1103
a8697ec8 1104 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
4af81310
SN
1105 if (fmd->csis[i].sd == NULL)
1106 continue;
f998bb7b 1107
4af81310
SN
1108 source = &fmd->csis[i].sd->entity;
1109 pad = CSIS_PAD_SOURCE;
5d33ee92 1110 sensor = csi_sensors[i];
4af81310 1111
d0da3c35 1112 link_mask = 1 << fimc_id++;
5d33ee92 1113 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 1114 pad, link_mask);
d3953223 1115 }
4af81310 1116
237e0265
SN
1117 /* Create immutable links between each FIMC's subdev and video node */
1118 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
1119 for (i = 0; i < FIMC_MAX_DEVS; i++) {
1120 if (!fmd->fimc[i])
1121 continue;
f998bb7b 1122
693f5c40 1123 source = &fmd->fimc[i]->vid_cap.subdev.entity;
bc7584b0 1124 sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity;
f998bb7b 1125
237e0265
SN
1126 ret = media_entity_create_link(source, FIMC_SD_PAD_SOURCE,
1127 sink, 0, flags);
1128 if (ret)
1129 break;
1130 }
1131
f998bb7b
SN
1132 ret = __fimc_md_create_flite_source_links(fmd);
1133 if (ret < 0)
1134 return ret;
1135
1136 if (fmd->use_isp)
1137 ret = __fimc_md_create_fimc_is_links(fmd);
1138
1139 return ret;
d3953223
SN
1140}
1141
1142/*
056f4f30 1143 * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management.
d3953223 1144 */
0e23cbbe
SN
1145static void fimc_md_put_clocks(struct fimc_md *fmd)
1146{
1147 int i = FIMC_MAX_CAMCLKS;
1148
1149 while (--i >= 0) {
1150 if (IS_ERR(fmd->camclk[i].clock))
1151 continue;
0e23cbbe
SN
1152 clk_put(fmd->camclk[i].clock);
1153 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1154 }
056f4f30
SN
1155
1156 /* Writeback (PIXELASYNCMx) clocks */
1157 for (i = 0; i < FIMC_MAX_WBCLKS; i++) {
1158 if (IS_ERR(fmd->wbclk[i]))
1159 continue;
1160 clk_put(fmd->wbclk[i]);
1161 fmd->wbclk[i] = ERR_PTR(-EINVAL);
1162 }
0e23cbbe
SN
1163}
1164
d3953223
SN
1165static int fimc_md_get_clocks(struct fimc_md *fmd)
1166{
0e23cbbe 1167 struct device *dev = NULL;
d3953223
SN
1168 char clk_name[32];
1169 struct clk *clock;
044c372a 1170 int i, ret = 0;
0e23cbbe
SN
1171
1172 for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
1173 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1174
1175 if (fmd->pdev->dev.of_node)
1176 dev = &fmd->pdev->dev;
d3953223
SN
1177
1178 for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
1179 snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
0e23cbbe
SN
1180 clock = clk_get(dev, clk_name);
1181
dc3ae328 1182 if (IS_ERR(clock)) {
0e23cbbe
SN
1183 dev_err(&fmd->pdev->dev, "Failed to get clock: %s\n",
1184 clk_name);
1185 ret = PTR_ERR(clock);
1186 break;
1187 }
d3953223
SN
1188 fmd->camclk[i].clock = clock;
1189 }
0e23cbbe
SN
1190 if (ret)
1191 fimc_md_put_clocks(fmd);
d3953223 1192
056f4f30
SN
1193 if (!fmd->use_isp)
1194 return 0;
1195 /*
1196 * For now get only PIXELASYNCM1 clock (Writeback B/ISP),
1197 * leave PIXELASYNCM0 out for the LCD Writeback driver.
1198 */
1199 fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL);
1200
1201 for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
1202 snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
1203 clock = clk_get(dev, clk_name);
1204 if (IS_ERR(clock)) {
1205 v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
1206 clk_name);
1207 ret = PTR_ERR(clock);
1208 break;
1209 }
1210 fmd->wbclk[i] = clock;
1211 }
1212 if (ret)
1213 fimc_md_put_clocks(fmd);
1214
0e23cbbe 1215 return ret;
d3953223
SN
1216}
1217
1218static int __fimc_md_set_camclk(struct fimc_md *fmd,
4c8f0629 1219 struct fimc_source_info *si,
e3fc82e8 1220 bool on)
d3953223 1221{
d3953223
SN
1222 struct fimc_camclk_info *camclk;
1223 int ret = 0;
1224
4c8f0629 1225 if (WARN_ON(si->clk_id >= FIMC_MAX_CAMCLKS) || !fmd || !fmd->pmf)
d3953223
SN
1226 return -EINVAL;
1227
4c8f0629 1228 camclk = &fmd->camclk[si->clk_id];
d3953223 1229
e3fc82e8 1230 dbg("camclk %d, f: %lu, use_count: %d, on: %d",
4c8f0629 1231 si->clk_id, si->clk_frequency, camclk->use_count, on);
d3953223
SN
1232
1233 if (on) {
1234 if (camclk->use_count > 0 &&
4c8f0629 1235 camclk->frequency != si->clk_frequency)
d3953223
SN
1236 return -EINVAL;
1237
1238 if (camclk->use_count++ == 0) {
4c8f0629
SN
1239 clk_set_rate(camclk->clock, si->clk_frequency);
1240 camclk->frequency = si->clk_frequency;
3e20c345
SN
1241 ret = pm_runtime_get_sync(fmd->pmf);
1242 if (ret < 0)
1243 return ret;
044c372a 1244 ret = clk_prepare_enable(camclk->clock);
4c8f0629 1245 dbg("Enabled camclk %d: f: %lu", si->clk_id,
e3fc82e8 1246 clk_get_rate(camclk->clock));
d3953223 1247 }
d3953223
SN
1248 return ret;
1249 }
1250
1251 if (WARN_ON(camclk->use_count == 0))
1252 return 0;
1253
1254 if (--camclk->use_count == 0) {
044c372a 1255 clk_disable_unprepare(camclk->clock);
3e20c345 1256 pm_runtime_put(fmd->pmf);
4c8f0629 1257 dbg("Disabled camclk %d", si->clk_id);
d3953223
SN
1258 }
1259 return ret;
1260}
1261
1262/**
1263 * fimc_md_set_camclk - peripheral sensor clock setup
1264 * @sd: sensor subdev to configure sclk_cam clock for
1265 * @on: 1 to enable or 0 to disable the clock
1266 *
1267 * There are 2 separate clock outputs available in the SoC for external
1268 * image processors. These clocks are shared between all registered FIMC
1269 * devices to which sensors can be attached, either directly or through
1270 * the MIPI CSI receiver. The clock is allowed here to be used by
1271 * multiple sensors concurrently if they use same frequency.
d3953223
SN
1272 * This function should only be called when the graph mutex is held.
1273 */
1274int fimc_md_set_camclk(struct v4l2_subdev *sd, bool on)
1275{
4c8f0629 1276 struct fimc_source_info *si = v4l2_get_subdev_hostdata(sd);
d3953223
SN
1277 struct fimc_md *fmd = entity_to_fimc_mdev(&sd->entity);
1278
4c8f0629 1279 return __fimc_md_set_camclk(fmd, si, on);
d3953223
SN
1280}
1281
d3775fa7 1282static int __fimc_md_modify_pipeline(struct media_entity *entity, bool enable)
d3953223 1283{
403dfbec 1284 struct exynos_video_entity *ve;
d3775fa7 1285 struct fimc_pipeline *p;
403dfbec 1286 struct video_device *vdev;
d3775fa7 1287 int ret;
d3953223 1288
d3775fa7
SN
1289 vdev = media_entity_to_video_device(entity);
1290 if (vdev->entity.use_count == 0)
d3953223
SN
1291 return 0;
1292
403dfbec 1293 ve = vdev_to_exynos_video_entity(vdev);
d3775fa7
SN
1294 p = to_fimc_pipeline(ve->pipe);
1295 /*
1296 * Nothing to do if we are disabling the pipeline, some link
1297 * has been disconnected and p->subdevs array is cleared now.
1298 */
1299 if (!enable && p->subdevs[IDX_SENSOR] == NULL)
1300 return 0;
403dfbec 1301
d3775fa7
SN
1302 if (enable)
1303 ret = __fimc_pipeline_open(ve->pipe, entity, true);
1304 else
1305 ret = __fimc_pipeline_close(ve->pipe);
131b6c61 1306
d3775fa7
SN
1307 if (ret == 0 && !enable)
1308 memset(p->subdevs, 0, sizeof(p->subdevs));
1309
1310 return ret;
1311}
1312
1313/* Locking: called with entity->parent->graph_mutex mutex held. */
1314static int __fimc_md_modify_pipelines(struct media_entity *entity, bool enable)
1315{
1316 struct media_entity *entity_err = entity;
1317 struct media_entity_graph graph;
1318 int ret;
1319
1320 /*
1321 * Walk current graph and call the pipeline open/close routine for each
1322 * opened video node that belongs to the graph of entities connected
1323 * through active links. This is needed as we cannot power on/off the
1324 * subdevs in random order.
1325 */
1326 media_entity_graph_walk_start(&graph, entity);
1327
1328 while ((entity = media_entity_graph_walk_next(&graph))) {
1329 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
1330 continue;
1331
1332 ret = __fimc_md_modify_pipeline(entity, enable);
1333
1334 if (ret < 0)
1335 goto err;
1336 }
1337
1338 return 0;
1339 err:
1340 media_entity_graph_walk_start(&graph, entity_err);
1341
1342 while ((entity_err = media_entity_graph_walk_next(&graph))) {
1343 if (media_entity_type(entity_err) != MEDIA_ENT_T_DEVNODE)
1344 continue;
1345
1346 __fimc_md_modify_pipeline(entity_err, !enable);
1347
1348 if (entity_err == entity)
1349 break;
1350 }
1351
1352 return ret;
1353}
1354
1355static int fimc_md_link_notify(struct media_link *link, unsigned int flags,
1356 unsigned int notification)
1357{
1358 struct media_entity *sink = link->sink->entity;
1359 int ret = 0;
1360
1361 /* Before link disconnection */
1362 if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) {
1363 if (!(flags & MEDIA_LNK_FL_ENABLED))
1364 ret = __fimc_md_modify_pipelines(sink, false);
1365 else
1366 ; /* TODO: Link state change validation */
1367 /* After link activation */
1368 } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH &&
1369 (link->flags & MEDIA_LNK_FL_ENABLED)) {
1370 ret = __fimc_md_modify_pipelines(sink, true);
d3953223 1371 }
740ad921 1372
d3775fa7 1373 return ret ? -EPIPE : 0;
d3953223
SN
1374}
1375
1376static ssize_t fimc_md_sysfs_show(struct device *dev,
1377 struct device_attribute *attr, char *buf)
1378{
1379 struct platform_device *pdev = to_platform_device(dev);
1380 struct fimc_md *fmd = platform_get_drvdata(pdev);
1381
1382 if (fmd->user_subdev_api)
1383 return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE);
1384
1385 return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE);
1386}
1387
1388static ssize_t fimc_md_sysfs_store(struct device *dev,
1389 struct device_attribute *attr,
1390 const char *buf, size_t count)
1391{
1392 struct platform_device *pdev = to_platform_device(dev);
1393 struct fimc_md *fmd = platform_get_drvdata(pdev);
1394 bool subdev_api;
1395 int i;
1396
1397 if (!strcmp(buf, "vid-dev\n"))
1398 subdev_api = false;
1399 else if (!strcmp(buf, "sub-dev\n"))
1400 subdev_api = true;
1401 else
1402 return count;
1403
1404 fmd->user_subdev_api = subdev_api;
1405 for (i = 0; i < FIMC_MAX_DEVS; i++)
1406 if (fmd->fimc[i])
1407 fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api;
1408 return count;
1409}
1410/*
1411 * This device attribute is to select video pipeline configuration method.
1412 * There are following valid values:
1413 * vid-dev - for V4L2 video node API only, subdevice will be configured
1414 * by the host driver.
1415 * sub-dev - for media controller API, subdevs must be configured in user
1416 * space before starting streaming.
1417 */
1418static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO,
1419 fimc_md_sysfs_show, fimc_md_sysfs_store);
1420
4163851f
SN
1421static int fimc_md_get_pinctrl(struct fimc_md *fmd)
1422{
1423 struct device *dev = &fmd->pdev->dev;
1424 struct fimc_pinctrl *pctl = &fmd->pinctl;
1425
1426 pctl->pinctrl = devm_pinctrl_get(dev);
1427 if (IS_ERR(pctl->pinctrl))
1428 return PTR_ERR(pctl->pinctrl);
1429
1430 pctl->state_default = pinctrl_lookup_state(pctl->pinctrl,
1431 PINCTRL_STATE_DEFAULT);
1432 if (IS_ERR(pctl->state_default))
1433 return PTR_ERR(pctl->state_default);
1434
1435 pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl,
1436 PINCTRL_STATE_IDLE);
1437 return 0;
1438}
1439
ecd9acbf 1440static int fimc_md_probe(struct platform_device *pdev)
d3953223 1441{
e2985a26 1442 struct device *dev = &pdev->dev;
d3953223
SN
1443 struct v4l2_device *v4l2_dev;
1444 struct fimc_md *fmd;
1445 int ret;
1446
e2985a26 1447 fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL);
d3953223
SN
1448 if (!fmd)
1449 return -ENOMEM;
1450
1451 spin_lock_init(&fmd->slock);
1452 fmd->pdev = pdev;
403dfbec 1453 INIT_LIST_HEAD(&fmd->pipelines);
d3953223
SN
1454
1455 strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC",
1456 sizeof(fmd->media_dev.model));
1457 fmd->media_dev.link_notify = fimc_md_link_notify;
e2985a26 1458 fmd->media_dev.dev = dev;
d3953223
SN
1459
1460 v4l2_dev = &fmd->v4l2_dev;
1461 v4l2_dev->mdev = &fmd->media_dev;
e1d72f4d 1462 v4l2_dev->notify = fimc_sensor_notify;
e2985a26 1463 strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name));
d3953223 1464
e781bbe3
SN
1465 fmd->use_isp = fimc_md_is_isp_available(dev->of_node);
1466
e2985a26 1467 ret = v4l2_device_register(dev, &fmd->v4l2_dev);
d3953223
SN
1468 if (ret < 0) {
1469 v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret);
6d91a51a 1470 return ret;
d3953223
SN
1471 }
1472 ret = media_device_register(&fmd->media_dev);
1473 if (ret < 0) {
1474 v4l2_err(v4l2_dev, "Failed to register media device: %d\n", ret);
693f5c40 1475 goto err_md;
d3953223
SN
1476 }
1477 ret = fimc_md_get_clocks(fmd);
1478 if (ret)
693f5c40 1479 goto err_clk;
d3953223 1480
e2985a26 1481 fmd->user_subdev_api = (dev->of_node != NULL);
693f5c40
SN
1482
1483 /* Protect the media graph while we're registering entities */
1484 mutex_lock(&fmd->media_dev.graph_mutex);
1485
4163851f
SN
1486 ret = fimc_md_get_pinctrl(fmd);
1487 if (ret < 0) {
1488 if (ret != EPROBE_DEFER)
1489 dev_err(dev, "Failed to get pinctrl: %d\n", ret);
1490 goto err_unlock;
1491 }
1492
e2985a26
SN
1493 if (dev->of_node)
1494 ret = fimc_md_register_of_platform_entities(fmd, dev->of_node);
1495 else
1496 ret = bus_for_each_dev(&platform_bus_type, NULL, fmd,
1497 fimc_md_pdev_match);
d3953223 1498 if (ret)
693f5c40 1499 goto err_unlock;
d3953223 1500
2b13f7d4 1501 if (dev->platform_data || dev->of_node) {
5cbf6f16
SN
1502 ret = fimc_md_register_sensor_entities(fmd);
1503 if (ret)
693f5c40 1504 goto err_unlock;
5cbf6f16 1505 }
e2985a26 1506
d3953223
SN
1507 ret = fimc_md_create_links(fmd);
1508 if (ret)
693f5c40 1509 goto err_unlock;
d3953223
SN
1510 ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev);
1511 if (ret)
693f5c40 1512 goto err_unlock;
d3953223
SN
1513
1514 ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode);
693f5c40
SN
1515 if (ret)
1516 goto err_unlock;
1517
1518 platform_set_drvdata(pdev, fmd);
1519 mutex_unlock(&fmd->media_dev.graph_mutex);
1520 return 0;
1521
1522err_unlock:
1523 mutex_unlock(&fmd->media_dev.graph_mutex);
1524err_clk:
d3953223
SN
1525 fimc_md_put_clocks(fmd);
1526 fimc_md_unregister_entities(fmd);
d2b903b4 1527 media_device_unregister(&fmd->media_dev);
693f5c40 1528err_md:
d3953223 1529 v4l2_device_unregister(&fmd->v4l2_dev);
d3953223
SN
1530 return ret;
1531}
1532
4c62e976 1533static int fimc_md_remove(struct platform_device *pdev)
d3953223
SN
1534{
1535 struct fimc_md *fmd = platform_get_drvdata(pdev);
1536
1537 if (!fmd)
1538 return 0;
b74bee15
SN
1539
1540 v4l2_device_unregister(&fmd->v4l2_dev);
d3953223
SN
1541 device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
1542 fimc_md_unregister_entities(fmd);
403dfbec 1543 fimc_md_pipelines_free(fmd);
d3953223
SN
1544 media_device_unregister(&fmd->media_dev);
1545 fimc_md_put_clocks(fmd);
d3953223
SN
1546 return 0;
1547}
1548
e2985a26
SN
1549static struct platform_device_id fimc_driver_ids[] __always_unused = {
1550 { .name = "s5p-fimc-md" },
1551 { },
1552};
1553MODULE_DEVICE_TABLE(platform, fimc_driver_ids);
1554
1555static const struct of_device_id fimc_md_of_match[] = {
1556 { .compatible = "samsung,fimc" },
1557 { },
1558};
1559MODULE_DEVICE_TABLE(of, fimc_md_of_match);
1560
d3953223
SN
1561static struct platform_driver fimc_md_driver = {
1562 .probe = fimc_md_probe,
4c62e976 1563 .remove = fimc_md_remove,
d3953223 1564 .driver = {
e2985a26
SN
1565 .of_match_table = of_match_ptr(fimc_md_of_match),
1566 .name = "s5p-fimc-md",
1567 .owner = THIS_MODULE,
d3953223
SN
1568 }
1569};
1570
7e566be2 1571static int __init fimc_md_init(void)
d3953223
SN
1572{
1573 int ret;
ecd9acbf 1574
d3953223
SN
1575 request_module("s5p-csis");
1576 ret = fimc_register_driver();
1577 if (ret)
1578 return ret;
ecd9acbf 1579
d3953223
SN
1580 return platform_driver_register(&fimc_md_driver);
1581}
7e566be2
SK
1582
1583static void __exit fimc_md_exit(void)
d3953223
SN
1584{
1585 platform_driver_unregister(&fimc_md_driver);
1586 fimc_unregister_driver();
1587}
1588
1589module_init(fimc_md_init);
1590module_exit(fimc_md_exit);
1591
1592MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
1593MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver");
1594MODULE_LICENSE("GPL");
1595MODULE_VERSION("2.0.1");