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Merge branches 'for-4.11/upstream-fixes', 'for-4.12/accutouch', 'for-4.12/cp2112...
[mirror_ubuntu-artful-kernel.git] / drivers / media / platform / exynos4-is / media-dev.c
CommitLineData
d3953223
SN
1/*
2 * S5P/EXYNOS4 SoC series camera host interface media device driver
3 *
52917bcb
SN
4 * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
5 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
d3953223
SN
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published
9 * by the Free Software Foundation, either version 2 of the License,
10 * or (at your option) any later version.
11 */
12
13#include <linux/bug.h>
d3f5e0c5
SN
14#include <linux/clk.h>
15#include <linux/clk-provider.h>
d3953223
SN
16#include <linux/device.h>
17#include <linux/errno.h>
18#include <linux/i2c.h>
19#include <linux/kernel.h>
20#include <linux/list.h>
21#include <linux/module.h>
e2985a26
SN
22#include <linux/of.h>
23#include <linux/of_platform.h>
24#include <linux/of_device.h>
fd9fdb78 25#include <linux/of_graph.h>
d3953223
SN
26#include <linux/platform_device.h>
27#include <linux/pm_runtime.h>
28#include <linux/types.h>
29#include <linux/slab.h>
fa91f105 30#include <media/v4l2-async.h>
131b6c61 31#include <media/v4l2-ctrls.h>
e2985a26 32#include <media/v4l2-of.h>
d3953223 33#include <media/media-device.h>
d647f0b7 34#include <media/drv-intf/exynos-fimc.h>
d3953223 35
56fa1a6a 36#include "media-dev.h"
d3953223 37#include "fimc-core.h"
e781bbe3 38#include "fimc-is.h"
0f735f52 39#include "fimc-lite.h"
d3953223
SN
40#include "mipi-csis.h"
41
52917bcb
SN
42/* Set up image sensor subdev -> FIMC capture node notifications. */
43static void __setup_sensor_notification(struct fimc_md *fmd,
44 struct v4l2_subdev *sensor,
45 struct v4l2_subdev *fimc_sd)
46{
47 struct fimc_source_info *src_inf;
48 struct fimc_sensor_info *md_si;
49 unsigned long flags;
50
51 src_inf = v4l2_get_subdev_hostdata(sensor);
52 if (!src_inf || WARN_ON(fmd == NULL))
53 return;
54
55 md_si = source_to_sensor_info(src_inf);
56 spin_lock_irqsave(&fmd->slock, flags);
57 md_si->host = v4l2_get_subdevdata(fimc_sd);
58 spin_unlock_irqrestore(&fmd->slock, flags);
59}
60
d3953223
SN
61/**
62 * fimc_pipeline_prepare - update pipeline information with subdevice pointers
39bb6df6 63 * @me: media entity terminating the pipeline
d3953223
SN
64 *
65 * Caller holds the graph mutex.
66 */
b9ee31e6 67static void fimc_pipeline_prepare(struct fimc_pipeline *p,
403dfbec 68 struct media_entity *me)
d3953223 69{
52917bcb 70 struct fimc_md *fmd = entity_to_fimc_mdev(me);
d3953223 71 struct v4l2_subdev *sd;
52917bcb 72 struct v4l2_subdev *sensor = NULL;
0f735f52 73 int i;
d3953223 74
0f735f52
SN
75 for (i = 0; i < IDX_MAX; i++)
76 p->subdevs[i] = NULL;
d3953223 77
0f735f52 78 while (1) {
39bb6df6
SN
79 struct media_pad *pad = NULL;
80
81 /* Find remote source pad */
82 for (i = 0; i < me->num_pads; i++) {
83 struct media_pad *spad = &me->pads[i];
84 if (!(spad->flags & MEDIA_PAD_FL_SINK))
85 continue;
1bddf1b3 86 pad = media_entity_remote_pad(spad);
39bb6df6
SN
87 if (pad)
88 break;
89 }
0f735f52 90
3efdf62c 91 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
0f735f52 92 break;
0f735f52
SN
93 sd = media_entity_to_v4l2_subdev(pad->entity);
94
95 switch (sd->grp_id) {
588c87be 96 case GRP_ID_SENSOR:
52917bcb
SN
97 sensor = sd;
98 /* fall through */
99 case GRP_ID_FIMC_IS_SENSOR:
0f735f52
SN
100 p->subdevs[IDX_SENSOR] = sd;
101 break;
588c87be 102 case GRP_ID_CSIS:
0f735f52
SN
103 p->subdevs[IDX_CSIS] = sd;
104 break;
588c87be 105 case GRP_ID_FLITE:
4af81310
SN
106 p->subdevs[IDX_FLITE] = sd;
107 break;
588c87be 108 case GRP_ID_FIMC:
52917bcb 109 p->subdevs[IDX_FIMC] = sd;
0f735f52 110 break;
e781bbe3
SN
111 case GRP_ID_FIMC_IS:
112 p->subdevs[IDX_IS_ISP] = sd;
113 break;
0f735f52 114 default:
e781bbe3 115 break;
0f735f52 116 }
39bb6df6
SN
117 me = &sd->entity;
118 if (me->num_pads == 1)
119 break;
d3953223 120 }
52917bcb
SN
121
122 if (sensor && p->subdevs[IDX_FIMC])
123 __setup_sensor_notification(fmd, sensor, p->subdevs[IDX_FIMC]);
d3953223
SN
124}
125
126/**
127 * __subdev_set_power - change power state of a single subdev
128 * @sd: subdevice to change power state for
129 * @on: 1 to enable power or 0 to disable
130 *
131 * Return result of s_power subdev operation or -ENXIO if sd argument
132 * is NULL. Return 0 if the subdevice does not implement s_power.
133 */
134static int __subdev_set_power(struct v4l2_subdev *sd, int on)
135{
136 int *use_count;
137 int ret;
138
139 if (sd == NULL)
140 return -ENXIO;
141
142 use_count = &sd->entity.use_count;
143 if (on && (*use_count)++ > 0)
144 return 0;
145 else if (!on && (*use_count == 0 || --(*use_count) > 0))
146 return 0;
147 ret = v4l2_subdev_call(sd, core, s_power, on);
148
149 return ret != -ENOIOCTLCMD ? ret : 0;
150}
151
152/**
153 * fimc_pipeline_s_power - change power state of all pipeline subdevs
154 * @fimc: fimc device terminating the pipeline
0f735f52 155 * @state: true to power on, false to power off
d3953223 156 *
0f735f52 157 * Needs to be called with the graph mutex held.
d3953223 158 */
f8bca4f5 159static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on)
d3953223 160{
f8bca4f5
SN
161 static const u8 seq[2][IDX_MAX - 1] = {
162 { IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE },
163 { IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP },
164 };
165 int i, ret = 0;
d3953223 166
0f735f52 167 if (p->subdevs[IDX_SENSOR] == NULL)
d3953223
SN
168 return -ENXIO;
169
f8bca4f5
SN
170 for (i = 0; i < IDX_MAX - 1; i++) {
171 unsigned int idx = seq[on][i];
172
173 ret = __subdev_set_power(p->subdevs[idx], on);
174
0f735f52 175
0f735f52 176 if (ret < 0 && ret != -ENXIO)
f8bca4f5 177 goto error;
d3953223 178 }
0f735f52 179 return 0;
f8bca4f5
SN
180error:
181 for (; i >= 0; i--) {
182 unsigned int idx = seq[on][i];
183 __subdev_set_power(p->subdevs[idx], !on);
184 }
185 return ret;
d3953223
SN
186}
187
76775776
JA
188/**
189 * __fimc_pipeline_enable - enable power of all pipeline subdevs
190 * and the sensor clock
191 * @ep: video pipeline structure
192 * @fmd: fimc media device
193 *
194 * Called with the graph mutex held.
195 */
196static int __fimc_pipeline_enable(struct exynos_media_pipeline *ep,
197 struct fimc_md *fmd)
198{
199 struct fimc_pipeline *p = to_fimc_pipeline(ep);
200 int ret;
201
202 /* Enable PXLASYNC clock if this pipeline includes FIMC-IS */
203 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
204 ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
205 if (ret < 0)
206 return ret;
207 }
208
209 ret = fimc_pipeline_s_power(p, 1);
210 if (!ret)
211 return 0;
212
213 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
214 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
215
216 return ret;
217}
218
d3953223 219/**
b9ee31e6
SN
220 * __fimc_pipeline_open - update the pipeline information, enable power
221 * of all pipeline subdevs and the sensor clock
d3953223 222 * @me: media entity to start graph walk with
056f4f30 223 * @prepare: true to walk the current pipeline and acquire all subdevs
d3953223 224 *
740ad921 225 * Called with the graph mutex held.
d3953223 226 */
403dfbec 227static int __fimc_pipeline_open(struct exynos_media_pipeline *ep,
056f4f30 228 struct media_entity *me, bool prepare)
d3953223 229{
056f4f30 230 struct fimc_md *fmd = entity_to_fimc_mdev(me);
403dfbec 231 struct fimc_pipeline *p = to_fimc_pipeline(ep);
056f4f30 232 struct v4l2_subdev *sd;
d3953223 233
056f4f30
SN
234 if (WARN_ON(p == NULL || me == NULL))
235 return -EINVAL;
236
237 if (prepare)
0f735f52
SN
238 fimc_pipeline_prepare(p, me);
239
056f4f30 240 sd = p->subdevs[IDX_SENSOR];
76775776
JA
241 if (sd == NULL) {
242 pr_warn("%s(): No sensor subdev\n", __func__);
243 /*
244 * Pipeline open cannot fail so as to make it possible
245 * for the user space to configure the pipeline.
246 */
056f4f30 247 return 0;
76775776 248 }
0f735f52 249
76775776 250 return __fimc_pipeline_enable(ep, fmd);
d3953223
SN
251}
252
d3953223 253/**
b9ee31e6 254 * __fimc_pipeline_close - disable the sensor clock and pipeline power
d3953223
SN
255 * @fimc: fimc device terminating the pipeline
256 *
740ad921 257 * Disable power of all subdevs and turn the external sensor clock off.
d3953223 258 */
403dfbec 259static int __fimc_pipeline_close(struct exynos_media_pipeline *ep)
d3953223 260{
403dfbec 261 struct fimc_pipeline *p = to_fimc_pipeline(ep);
056f4f30
SN
262 struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL;
263 struct fimc_md *fmd;
36da6fcd 264 int ret;
740ad921 265
36da6fcd
SN
266 if (sd == NULL) {
267 pr_warn("%s(): No sensor subdev\n", __func__);
268 return 0;
d3953223 269 }
056f4f30 270
36da6fcd 271 ret = fimc_pipeline_s_power(p, 0);
36da6fcd 272
056f4f30
SN
273 fmd = entity_to_fimc_mdev(&sd->entity);
274
275 /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
276 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
277 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
278
d3953223
SN
279 return ret == -ENXIO ? 0 : ret;
280}
281
d3953223 282/**
8d274e7c 283 * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs
0f735f52 284 * @pipeline: video pipeline structure
8d274e7c 285 * @on: passed as the s_stream() callback argument
d3953223 286 */
403dfbec 287static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on)
d3953223 288{
8d274e7c
SN
289 static const u8 seq[2][IDX_MAX] = {
290 { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE },
291 { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP },
292 };
403dfbec 293 struct fimc_pipeline *p = to_fimc_pipeline(ep);
76775776
JA
294 struct fimc_md *fmd = entity_to_fimc_mdev(&p->subdevs[IDX_CSIS]->entity);
295 enum fimc_subdev_index sd_id;
8d274e7c 296 int i, ret = 0;
d3953223 297
76775776
JA
298 if (p->subdevs[IDX_SENSOR] == NULL) {
299 if (!fmd->user_subdev_api) {
300 /*
301 * Sensor must be already discovered if we
302 * aren't in the user_subdev_api mode
303 */
304 return -ENODEV;
305 }
306
307 /* Get pipeline sink entity */
308 if (p->subdevs[IDX_FIMC])
309 sd_id = IDX_FIMC;
310 else if (p->subdevs[IDX_IS_ISP])
311 sd_id = IDX_IS_ISP;
312 else if (p->subdevs[IDX_FLITE])
313 sd_id = IDX_FLITE;
314 else
315 return -ENODEV;
316
317 /*
318 * Sensor could have been linked between open and STREAMON -
319 * check if this is the case.
320 */
321 fimc_pipeline_prepare(p, &p->subdevs[sd_id]->entity);
322
323 if (p->subdevs[IDX_SENSOR] == NULL)
324 return -ENODEV;
325
326 ret = __fimc_pipeline_enable(ep, fmd);
327 if (ret < 0)
328 return ret;
329
330 }
d3953223 331
0f735f52 332 for (i = 0; i < IDX_MAX; i++) {
8d274e7c 333 unsigned int idx = seq[on][i];
0f735f52
SN
334
335 ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on);
336
337 if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
8d274e7c 338 goto error;
0f735f52 339 }
76775776 340
0f735f52 341 return 0;
8d274e7c 342error:
76775776 343 fimc_pipeline_s_power(p, !on);
8d274e7c
SN
344 for (; i >= 0; i--) {
345 unsigned int idx = seq[on][i];
346 v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on);
347 }
348 return ret;
d3953223 349}
b9ee31e6
SN
350
351/* Media pipeline operations for the FIMC/FIMC-LITE video device driver */
403dfbec 352static const struct exynos_media_pipeline_ops fimc_pipeline_ops = {
740ad921
SN
353 .open = __fimc_pipeline_open,
354 .close = __fimc_pipeline_close,
355 .set_stream = __fimc_pipeline_s_stream,
b9ee31e6 356};
d3953223 357
403dfbec
SN
358static struct exynos_media_pipeline *fimc_md_pipeline_create(
359 struct fimc_md *fmd)
360{
361 struct fimc_pipeline *p;
362
363 p = kzalloc(sizeof(*p), GFP_KERNEL);
364 if (!p)
365 return NULL;
366
367 list_add_tail(&p->list, &fmd->pipelines);
368
369 p->ep.ops = &fimc_pipeline_ops;
370 return &p->ep;
371}
372
373static void fimc_md_pipelines_free(struct fimc_md *fmd)
374{
375 while (!list_empty(&fmd->pipelines)) {
376 struct fimc_pipeline *p;
377
378 p = list_entry(fmd->pipelines.next, typeof(*p), list);
379 list_del(&p->list);
380 kfree(p);
381 }
382}
383
2b13f7d4
SN
384/* Parse port node and register as a sub-device any sensor specified there. */
385static int fimc_md_parse_port_node(struct fimc_md *fmd,
386 struct device_node *port,
387 unsigned int index)
388{
49b2f4c5 389 struct fimc_source_info *pd = &fmd->sensor[index].pdata;
2b13f7d4 390 struct device_node *rem, *ep, *np;
2b13f7d4 391 struct v4l2_of_endpoint endpoint;
234eab84 392 int ret;
2b13f7d4
SN
393
394 /* Assume here a port node can have only one endpoint node. */
395 ep = of_get_next_child(port, NULL);
396 if (!ep)
397 return 0;
398
234eab84
JMC
399 ret = v4l2_of_parse_endpoint(ep, &endpoint);
400 if (ret) {
401 of_node_put(ep);
402 return ret;
403 }
404
2b2d1d40
CJ
405 if (WARN_ON(endpoint.base.port == 0) || index >= FIMC_MAX_SENSORS) {
406 of_node_put(ep);
2b13f7d4 407 return -EINVAL;
2b2d1d40 408 }
2b13f7d4 409
f2a575f6 410 pd->mux_id = (endpoint.base.port - 1) & 0x1;
2b13f7d4 411
fd9fdb78 412 rem = of_graph_get_remote_port_parent(ep);
2b13f7d4
SN
413 of_node_put(ep);
414 if (rem == NULL) {
415 v4l2_info(&fmd->v4l2_dev, "Remote device at %s not found\n",
416 ep->full_name);
417 return 0;
418 }
2b13f7d4 419
f2a575f6 420 if (fimc_input_is_parallel(endpoint.base.port)) {
2b13f7d4
SN
421 if (endpoint.bus_type == V4L2_MBUS_PARALLEL)
422 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601;
423 else
424 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656;
425 pd->flags = endpoint.bus.parallel.flags;
f2a575f6 426 } else if (fimc_input_is_mipi_csi(endpoint.base.port)) {
2b13f7d4
SN
427 /*
428 * MIPI CSI-2: only input mux selection and
429 * the sensor's clock frequency is needed.
430 */
431 pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2;
432 } else {
433 v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %s\n",
f2a575f6 434 endpoint.base.port, rem->full_name);
2b13f7d4
SN
435 }
436 /*
437 * For FIMC-IS handled sensors, that are placed under i2c-isp device
438 * node, FIMC is connected to the FIMC-IS through its ISP Writeback
439 * input. Sensors are attached to the FIMC-LITE hostdata interface
440 * directly or through MIPI-CSIS, depending on the external media bus
441 * used. This needs to be handled in a more reliable way, not by just
442 * checking parent's node name.
443 */
444 np = of_get_parent(rem);
445
446 if (np && !of_node_cmp(np->name, "i2c-isp"))
447 pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
448 else
449 pd->fimc_bus_type = pd->sensor_bus_type;
450
7e8da343
KK
451 if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor))) {
452 of_node_put(rem);
fa91f105 453 return -EINVAL;
7e8da343 454 }
2b13f7d4 455
fa91f105
SN
456 fmd->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_OF;
457 fmd->sensor[index].asd.match.of.node = rem;
458 fmd->async_subdevs[index] = &fmd->sensor[index].asd;
459
460 fmd->num_sensors++;
461
462 of_node_put(rem);
463 return 0;
2b13f7d4
SN
464}
465
466/* Register all SoC external sub-devices */
49b2f4c5 467static int fimc_md_register_sensor_entities(struct fimc_md *fmd)
2b13f7d4
SN
468{
469 struct device_node *parent = fmd->pdev->dev.of_node;
470 struct device_node *node, *ports;
471 int index = 0;
472 int ret;
473
49b2f4c5
SN
474 /*
475 * Runtime resume one of the FIMC entities to make sure
476 * the sclk_cam clocks are not globally disabled.
477 */
478 if (!fmd->pmf)
479 return -ENXIO;
480
481 ret = pm_runtime_get_sync(fmd->pmf);
482 if (ret < 0)
483 return ret;
484
485 fmd->num_sensors = 0;
486
2b13f7d4
SN
487 /* Attach sensors linked to MIPI CSI-2 receivers */
488 for_each_available_child_of_node(parent, node) {
489 struct device_node *port;
490
491 if (of_node_cmp(node->name, "csis"))
492 continue;
493 /* The csis node can have only port subnode. */
494 port = of_get_next_child(node, NULL);
495 if (!port)
496 continue;
497
498 ret = fimc_md_parse_port_node(fmd, port, index);
458a3952
AKC
499 if (ret < 0) {
500 of_node_put(node);
49b2f4c5 501 goto rpm_put;
458a3952 502 }
2b13f7d4
SN
503 index++;
504 }
505
506 /* Attach sensors listed in the parallel-ports node */
507 ports = of_get_child_by_name(parent, "parallel-ports");
508 if (!ports)
49b2f4c5 509 goto rpm_put;
2b13f7d4
SN
510
511 for_each_child_of_node(ports, node) {
512 ret = fimc_md_parse_port_node(fmd, node, index);
458a3952
AKC
513 if (ret < 0) {
514 of_node_put(node);
2b13f7d4 515 break;
458a3952 516 }
2b13f7d4
SN
517 index++;
518 }
49b2f4c5
SN
519rpm_put:
520 pm_runtime_put(fmd->pmf);
521 return ret;
2b13f7d4
SN
522}
523
e2985a26
SN
524static int __of_get_csis_id(struct device_node *np)
525{
526 u32 reg = 0;
527
528 np = of_get_child_by_name(np, "port");
529 if (!np)
530 return -EINVAL;
531 of_property_read_u32(np, "reg", &reg);
532 return reg - FIMC_INPUT_MIPI_CSI2_0;
533}
d3953223
SN
534
535/*
7b43a6f3 536 * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration.
d3953223 537 */
7b43a6f3
SN
538static int register_fimc_lite_entity(struct fimc_md *fmd,
539 struct fimc_lite *fimc_lite)
d3953223 540{
8163ec0b 541 struct v4l2_subdev *sd;
403dfbec 542 struct exynos_media_pipeline *ep;
afd7348c 543 int ret;
4af81310 544
7b43a6f3
SN
545 if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS ||
546 fmd->fimc_lite[fimc_lite->index]))
547 return -EBUSY;
d3953223 548
7b43a6f3
SN
549 sd = &fimc_lite->subdev;
550 sd->grp_id = GRP_ID_FLITE;
403dfbec
SN
551
552 ep = fimc_md_pipeline_create(fmd);
553 if (!ep)
554 return -ENOMEM;
555
556 v4l2_set_subdev_hostdata(sd, ep);
693f5c40
SN
557
558 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
7b43a6f3
SN
559 if (!ret)
560 fmd->fimc_lite[fimc_lite->index] = fimc_lite;
561 else
562 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n",
563 fimc_lite->index);
564 return ret;
d3953223
SN
565}
566
7b43a6f3 567static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc)
4af81310 568{
7b43a6f3 569 struct v4l2_subdev *sd;
403dfbec 570 struct exynos_media_pipeline *ep;
4af81310
SN
571 int ret;
572
7b43a6f3
SN
573 if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id]))
574 return -EBUSY;
4af81310 575
7b43a6f3
SN
576 sd = &fimc->vid_cap.subdev;
577 sd->grp_id = GRP_ID_FIMC;
403dfbec
SN
578
579 ep = fimc_md_pipeline_create(fmd);
580 if (!ep)
581 return -ENOMEM;
582
583 v4l2_set_subdev_hostdata(sd, ep);
4af81310 584
7b43a6f3
SN
585 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
586 if (!ret) {
3e20c345
SN
587 if (!fmd->pmf && fimc->pdev)
588 fmd->pmf = &fimc->pdev->dev;
7b43a6f3
SN
589 fmd->fimc[fimc->id] = fimc;
590 fimc->vid_cap.user_subdev_api = fmd->user_subdev_api;
591 } else {
592 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n",
593 fimc->id, ret);
4af81310 594 }
7b43a6f3 595 return ret;
4af81310
SN
596}
597
7b43a6f3
SN
598static int register_csis_entity(struct fimc_md *fmd,
599 struct platform_device *pdev,
600 struct v4l2_subdev *sd)
d3953223 601{
7b43a6f3 602 struct device_node *node = pdev->dev.of_node;
d3953223
SN
603 int id, ret;
604
e2985a26 605 id = node ? __of_get_csis_id(node) : max(0, pdev->id);
7b43a6f3 606
e2985a26
SN
607 if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES))
608 return -ENOENT;
7b43a6f3 609
e2985a26
SN
610 if (WARN_ON(fmd->csis[id].sd))
611 return -EBUSY;
d3953223 612
588c87be 613 sd->grp_id = GRP_ID_CSIS;
d3953223 614 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
afd7348c
SN
615 if (!ret)
616 fmd->csis[id].sd = sd;
617 else
d3953223 618 v4l2_err(&fmd->v4l2_dev,
7b43a6f3 619 "Failed to register MIPI-CSIS.%d (%d)\n", id, ret);
d3953223
SN
620 return ret;
621}
622
e781bbe3
SN
623static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is)
624{
625 struct v4l2_subdev *sd = &is->isp.subdev;
34947b8a 626 struct exynos_media_pipeline *ep;
e781bbe3
SN
627 int ret;
628
34947b8a
SN
629 /* Allocate pipeline object for the ISP capture video node. */
630 ep = fimc_md_pipeline_create(fmd);
631 if (!ep)
632 return -ENOMEM;
633
634 v4l2_set_subdev_hostdata(sd, ep);
635
e781bbe3
SN
636 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
637 if (ret) {
638 v4l2_err(&fmd->v4l2_dev,
639 "Failed to register FIMC-ISP (%d)\n", ret);
640 return ret;
641 }
642
643 fmd->fimc_is = is;
644 return 0;
645}
646
7b43a6f3
SN
647static int fimc_md_register_platform_entity(struct fimc_md *fmd,
648 struct platform_device *pdev,
649 int plat_entity)
d3953223 650{
7b43a6f3
SN
651 struct device *dev = &pdev->dev;
652 int ret = -EPROBE_DEFER;
653 void *drvdata;
654
655 /* Lock to ensure dev->driver won't change. */
656 device_lock(dev);
657
658 if (!dev->driver || !try_module_get(dev->driver->owner))
659 goto dev_unlock;
660
661 drvdata = dev_get_drvdata(dev);
f58c91ce 662 /* Some subdev didn't probe successfully id drvdata is NULL */
7b43a6f3
SN
663 if (drvdata) {
664 switch (plat_entity) {
665 case IDX_FIMC:
666 ret = register_fimc_entity(fmd, drvdata);
667 break;
668 case IDX_FLITE:
669 ret = register_fimc_lite_entity(fmd, drvdata);
ecd9acbf 670 break;
7b43a6f3
SN
671 case IDX_CSIS:
672 ret = register_csis_entity(fmd, pdev, drvdata);
673 break;
e781bbe3
SN
674 case IDX_IS_ISP:
675 ret = register_fimc_is_entity(fmd, drvdata);
676 break;
7b43a6f3
SN
677 default:
678 ret = -ENODEV;
ecd9acbf
SN
679 }
680 }
d3953223 681
7b43a6f3
SN
682 module_put(dev->driver->owner);
683dev_unlock:
684 device_unlock(dev);
685 if (ret == -EPROBE_DEFER)
686 dev_info(&fmd->pdev->dev, "deferring %s device registration\n",
687 dev_name(dev));
688 else if (ret < 0)
689 dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n",
690 dev_name(dev), ret);
691 return ret;
692}
693
e2985a26 694/* Register FIMC, FIMC-LITE and CSIS media entities */
49b2f4c5
SN
695static int fimc_md_register_platform_entities(struct fimc_md *fmd,
696 struct device_node *parent)
e2985a26
SN
697{
698 struct device_node *node;
699 int ret = 0;
700
701 for_each_available_child_of_node(parent, node) {
702 struct platform_device *pdev;
703 int plat_entity = -1;
704
705 pdev = of_find_device_by_node(node);
706 if (!pdev)
707 continue;
708
709 /* If driver of any entity isn't ready try all again later. */
710 if (!strcmp(node->name, CSIS_OF_NODE_NAME))
711 plat_entity = IDX_CSIS;
e781bbe3
SN
712 else if (!strcmp(node->name, FIMC_IS_OF_NODE_NAME))
713 plat_entity = IDX_IS_ISP;
e2985a26
SN
714 else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME))
715 plat_entity = IDX_FLITE;
716 else if (!strcmp(node->name, FIMC_OF_NODE_NAME) &&
717 !of_property_read_bool(node, "samsung,lcd-wb"))
718 plat_entity = IDX_FIMC;
719
720 if (plat_entity >= 0)
721 ret = fimc_md_register_platform_entity(fmd, pdev,
722 plat_entity);
723 put_device(&pdev->dev);
458a3952
AKC
724 if (ret < 0) {
725 of_node_put(node);
e2985a26 726 break;
458a3952 727 }
e2985a26
SN
728 }
729
730 return ret;
731}
e2985a26 732
d3953223
SN
733static void fimc_md_unregister_entities(struct fimc_md *fmd)
734{
735 int i;
736
737 for (i = 0; i < FIMC_MAX_DEVS; i++) {
403dfbec
SN
738 struct fimc_dev *dev = fmd->fimc[i];
739 if (dev == NULL)
d3953223 740 continue;
403dfbec
SN
741 v4l2_device_unregister_subdev(&dev->vid_cap.subdev);
742 dev->vid_cap.ve.pipe = NULL;
d3953223
SN
743 fmd->fimc[i] = NULL;
744 }
4af81310 745 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
403dfbec
SN
746 struct fimc_lite *dev = fmd->fimc_lite[i];
747 if (dev == NULL)
4af81310 748 continue;
403dfbec
SN
749 v4l2_device_unregister_subdev(&dev->subdev);
750 dev->ve.pipe = NULL;
4af81310
SN
751 fmd->fimc_lite[i] = NULL;
752 }
d3953223
SN
753 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
754 if (fmd->csis[i].sd == NULL)
755 continue;
756 v4l2_device_unregister_subdev(fmd->csis[i].sd);
757 fmd->csis[i].sd = NULL;
758 }
e41a35cb
SN
759
760 if (fmd->fimc_is)
761 v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev);
762
7b43a6f3 763 v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n");
d3953223
SN
764}
765
d3953223
SN
766/**
767 * __fimc_md_create_fimc_links - create links to all FIMC entities
768 * @fmd: fimc media device
769 * @source: the source entity to create links to all fimc entities from
770 * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null
771 * @pad: the source entity pad index
d0da3c35 772 * @link_mask: bitmask of the fimc devices for which link should be enabled
d3953223 773 */
4af81310
SN
774static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd,
775 struct media_entity *source,
776 struct v4l2_subdev *sensor,
d0da3c35 777 int pad, int link_mask)
d3953223 778{
4c8f0629 779 struct fimc_source_info *si = NULL;
d3953223 780 struct media_entity *sink;
4af81310 781 unsigned int flags = 0;
f998bb7b 782 int i, ret = 0;
d3953223 783
f998bb7b
SN
784 if (sensor) {
785 si = v4l2_get_subdev_hostdata(sensor);
786 /* Skip direct FIMC links in the logical FIMC-IS sensor path */
4c8f0629 787 if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
f998bb7b
SN
788 ret = 1;
789 }
790
791 for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) {
d3953223 792 if (!fmd->fimc[i])
4af81310 793 continue;
d3953223
SN
794 /*
795 * Some FIMC variants are not fitted with camera capture
796 * interface. Skip creating a link from sensor for those.
797 */
4af81310 798 if (!fmd->fimc[i]->variant->has_cam_if)
d3953223
SN
799 continue;
800
d0da3c35 801 flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0;
4af81310 802
693f5c40 803 sink = &fmd->fimc[i]->vid_cap.subdev.entity;
8df00a15 804 ret = media_create_pad_link(source, pad, sink,
88fa8311 805 FIMC_SD_PAD_SINK_CAM, flags);
d3953223
SN
806 if (ret)
807 return ret;
808
237e0265
SN
809 /* Notify FIMC capture subdev entity */
810 ret = media_entity_call(sink, link_setup, &sink->pads[0],
811 &source->pads[pad], flags);
812 if (ret)
813 break;
814
542fb082 815 v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n",
d3953223 816 source->name, flags ? '=' : '-', sink->name);
d3953223 817 }
4af81310
SN
818
819 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
820 if (!fmd->fimc_lite[i])
821 continue;
822
4af81310 823 sink = &fmd->fimc_lite[i]->subdev.entity;
8df00a15 824 ret = media_create_pad_link(source, pad, sink,
f998bb7b 825 FLITE_SD_PAD_SINK, 0);
4af81310
SN
826 if (ret)
827 return ret;
828
829 /* Notify FIMC-LITE subdev entity */
830 ret = media_entity_call(sink, link_setup, &sink->pads[0],
f998bb7b 831 &source->pads[pad], 0);
4af81310
SN
832 if (ret)
833 break;
834
f998bb7b
SN
835 v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n",
836 source->name, sink->name);
4af81310 837 }
d3953223
SN
838 return 0;
839}
840
4af81310
SN
841/* Create links from FIMC-LITE source pads to other entities */
842static int __fimc_md_create_flite_source_links(struct fimc_md *fmd)
843{
844 struct media_entity *source, *sink;
a26860bd 845 int i, ret = 0;
4af81310
SN
846
847 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
848 struct fimc_lite *fimc = fmd->fimc_lite[i];
f998bb7b 849
4af81310
SN
850 if (fimc == NULL)
851 continue;
f998bb7b 852
4af81310 853 source = &fimc->subdev.entity;
bc7584b0 854 sink = &fimc->ve.vdev.entity;
4af81310 855 /* FIMC-LITE's subdev and video node */
8df00a15 856 ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_DMA,
f998bb7b
SN
857 sink, 0, 0);
858 if (ret)
859 break;
860 /* Link from FIMC-LITE to IS-ISP subdev */
861 sink = &fmd->fimc_is->isp.subdev.entity;
8df00a15 862 ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_ISP,
f998bb7b 863 sink, 0, 0);
4af81310
SN
864 if (ret)
865 break;
f998bb7b
SN
866 }
867
868 return ret;
869}
870
871/* Create FIMC-IS links */
872static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd)
873{
34947b8a 874 struct fimc_isp *isp = &fmd->fimc_is->isp;
f998bb7b
SN
875 struct media_entity *source, *sink;
876 int i, ret;
877
34947b8a 878 source = &isp->subdev.entity;
f998bb7b
SN
879
880 for (i = 0; i < FIMC_MAX_DEVS; i++) {
881 if (fmd->fimc[i] == NULL)
882 continue;
883
34947b8a 884 /* Link from FIMC-IS-ISP subdev to FIMC */
f998bb7b 885 sink = &fmd->fimc[i]->vid_cap.subdev.entity;
8df00a15 886 ret = media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_FIFO,
f998bb7b
SN
887 sink, FIMC_SD_PAD_SINK_FIFO, 0);
888 if (ret)
889 return ret;
4af81310
SN
890 }
891
34947b8a
SN
892 /* Link from FIMC-IS-ISP subdev to fimc-is-isp.capture video node */
893 sink = &isp->video_capture.ve.vdev.entity;
894
895 /* Skip this link if the fimc-is-isp video node driver isn't built-in */
896 if (sink->num_pads == 0)
897 return 0;
898
8df00a15 899 return media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_DMA,
34947b8a 900 sink, 0, 0);
4af81310
SN
901}
902
d3953223
SN
903/**
904 * fimc_md_create_links - create default links between registered entities
905 *
906 * Parallel interface sensor entities are connected directly to FIMC capture
907 * entities. The sensors using MIPI CSIS bus are connected through immutable
908 * link with CSI receiver entity specified by mux_id. Any registered CSIS
909 * entity has a link to each registered FIMC capture entity. Enabled links
910 * are created by default between each subsequent registered sensor and
911 * subsequent FIMC capture entity. The number of default active links is
912 * determined by the number of available sensors or FIMC entities,
913 * whichever is less.
914 */
915static int fimc_md_create_links(struct fimc_md *fmd)
916{
a8697ec8 917 struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL };
d3953223 918 struct v4l2_subdev *sensor, *csis;
56bc911a 919 struct fimc_source_info *pdata;
237e0265 920 struct media_entity *source, *sink;
d0da3c35
SN
921 int i, pad, fimc_id = 0, ret = 0;
922 u32 flags, link_mask = 0;
d3953223
SN
923
924 for (i = 0; i < fmd->num_sensors; i++) {
925 if (fmd->sensor[i].subdev == NULL)
926 continue;
927
928 sensor = fmd->sensor[i].subdev;
4c8f0629
SN
929 pdata = v4l2_get_subdev_hostdata(sensor);
930 if (!pdata)
d3953223
SN
931 continue;
932
933 source = NULL;
d3953223 934
56bc911a
SN
935 switch (pdata->sensor_bus_type) {
936 case FIMC_BUS_TYPE_MIPI_CSI2:
d3953223
SN
937 if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES,
938 "Wrong CSI channel id: %d\n", pdata->mux_id))
939 return -EINVAL;
940
941 csis = fmd->csis[pdata->mux_id].sd;
942 if (WARN(csis == NULL,
57425dc7 943 "MIPI-CSI interface specified but s5p-csis module is not loaded!\n"))
d12392ec 944 return -EINVAL;
d3953223 945
1c9f5bd7 946 pad = sensor->entity.num_pads - 1;
8df00a15 947 ret = media_create_pad_link(&sensor->entity, pad,
d3953223
SN
948 &csis->entity, CSIS_PAD_SINK,
949 MEDIA_LNK_FL_IMMUTABLE |
950 MEDIA_LNK_FL_ENABLED);
951 if (ret)
952 return ret;
953
969e877c 954 v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n",
d3953223
SN
955 sensor->entity.name, csis->entity.name);
956
4af81310 957 source = NULL;
5d33ee92 958 csi_sensors[pdata->mux_id] = sensor;
d3953223
SN
959 break;
960
56bc911a 961 case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656:
d3953223
SN
962 source = &sensor->entity;
963 pad = 0;
964 break;
965
966 default:
967 v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n",
56bc911a 968 pdata->sensor_bus_type);
d3953223
SN
969 return -EINVAL;
970 }
971 if (source == NULL)
972 continue;
973
d0da3c35 974 link_mask = 1 << fimc_id++;
4af81310 975 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 976 pad, link_mask);
4af81310
SN
977 }
978
a8697ec8 979 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
4af81310
SN
980 if (fmd->csis[i].sd == NULL)
981 continue;
f998bb7b 982
4af81310
SN
983 source = &fmd->csis[i].sd->entity;
984 pad = CSIS_PAD_SOURCE;
5d33ee92 985 sensor = csi_sensors[i];
4af81310 986
d0da3c35 987 link_mask = 1 << fimc_id++;
5d33ee92 988 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 989 pad, link_mask);
d3953223 990 }
4af81310 991
237e0265
SN
992 /* Create immutable links between each FIMC's subdev and video node */
993 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
994 for (i = 0; i < FIMC_MAX_DEVS; i++) {
995 if (!fmd->fimc[i])
996 continue;
f998bb7b 997
693f5c40 998 source = &fmd->fimc[i]->vid_cap.subdev.entity;
bc7584b0 999 sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity;
f998bb7b 1000
8df00a15 1001 ret = media_create_pad_link(source, FIMC_SD_PAD_SOURCE,
237e0265
SN
1002 sink, 0, flags);
1003 if (ret)
1004 break;
1005 }
1006
f998bb7b
SN
1007 ret = __fimc_md_create_flite_source_links(fmd);
1008 if (ret < 0)
1009 return ret;
1010
1011 if (fmd->use_isp)
1012 ret = __fimc_md_create_fimc_is_links(fmd);
1013
1014 return ret;
d3953223
SN
1015}
1016
1017/*
056f4f30 1018 * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management.
d3953223 1019 */
0e23cbbe
SN
1020static void fimc_md_put_clocks(struct fimc_md *fmd)
1021{
1022 int i = FIMC_MAX_CAMCLKS;
1023
1024 while (--i >= 0) {
1025 if (IS_ERR(fmd->camclk[i].clock))
1026 continue;
0e23cbbe
SN
1027 clk_put(fmd->camclk[i].clock);
1028 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1029 }
056f4f30
SN
1030
1031 /* Writeback (PIXELASYNCMx) clocks */
1032 for (i = 0; i < FIMC_MAX_WBCLKS; i++) {
1033 if (IS_ERR(fmd->wbclk[i]))
1034 continue;
1035 clk_put(fmd->wbclk[i]);
1036 fmd->wbclk[i] = ERR_PTR(-EINVAL);
1037 }
0e23cbbe
SN
1038}
1039
d3953223
SN
1040static int fimc_md_get_clocks(struct fimc_md *fmd)
1041{
49b2f4c5 1042 struct device *dev = &fmd->pdev->dev;
d3953223
SN
1043 char clk_name[32];
1044 struct clk *clock;
044c372a 1045 int i, ret = 0;
0e23cbbe
SN
1046
1047 for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
1048 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1049
d3953223
SN
1050 for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
1051 snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
0e23cbbe
SN
1052 clock = clk_get(dev, clk_name);
1053
dc3ae328 1054 if (IS_ERR(clock)) {
49b2f4c5 1055 dev_err(dev, "Failed to get clock: %s\n", clk_name);
0e23cbbe
SN
1056 ret = PTR_ERR(clock);
1057 break;
1058 }
d3953223
SN
1059 fmd->camclk[i].clock = clock;
1060 }
0e23cbbe
SN
1061 if (ret)
1062 fimc_md_put_clocks(fmd);
d3953223 1063
056f4f30
SN
1064 if (!fmd->use_isp)
1065 return 0;
1066 /*
1067 * For now get only PIXELASYNCM1 clock (Writeback B/ISP),
1068 * leave PIXELASYNCM0 out for the LCD Writeback driver.
1069 */
1070 fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL);
1071
1072 for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
1073 snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
1074 clock = clk_get(dev, clk_name);
1075 if (IS_ERR(clock)) {
1076 v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
1077 clk_name);
1078 ret = PTR_ERR(clock);
1079 break;
1080 }
1081 fmd->wbclk[i] = clock;
1082 }
1083 if (ret)
1084 fimc_md_put_clocks(fmd);
1085
0e23cbbe 1086 return ret;
d3953223
SN
1087}
1088
d3775fa7 1089static int __fimc_md_modify_pipeline(struct media_entity *entity, bool enable)
d3953223 1090{
403dfbec 1091 struct exynos_video_entity *ve;
d3775fa7 1092 struct fimc_pipeline *p;
403dfbec 1093 struct video_device *vdev;
d3775fa7 1094 int ret;
d3953223 1095
d3775fa7
SN
1096 vdev = media_entity_to_video_device(entity);
1097 if (vdev->entity.use_count == 0)
d3953223
SN
1098 return 0;
1099
403dfbec 1100 ve = vdev_to_exynos_video_entity(vdev);
d3775fa7
SN
1101 p = to_fimc_pipeline(ve->pipe);
1102 /*
1103 * Nothing to do if we are disabling the pipeline, some link
1104 * has been disconnected and p->subdevs array is cleared now.
1105 */
1106 if (!enable && p->subdevs[IDX_SENSOR] == NULL)
1107 return 0;
403dfbec 1108
d3775fa7
SN
1109 if (enable)
1110 ret = __fimc_pipeline_open(ve->pipe, entity, true);
1111 else
1112 ret = __fimc_pipeline_close(ve->pipe);
131b6c61 1113
d3775fa7
SN
1114 if (ret == 0 && !enable)
1115 memset(p->subdevs, 0, sizeof(p->subdevs));
1116
1117 return ret;
1118}
1119
d10c9894 1120/* Locking: called with entity->graph_obj.mdev->graph_mutex mutex held. */
fd7e5309 1121static int __fimc_md_modify_pipelines(struct media_entity *entity, bool enable,
20b85227 1122 struct media_graph *graph)
d3775fa7
SN
1123{
1124 struct media_entity *entity_err = entity;
d3775fa7
SN
1125 int ret;
1126
1127 /*
1128 * Walk current graph and call the pipeline open/close routine for each
1129 * opened video node that belongs to the graph of entities connected
1130 * through active links. This is needed as we cannot power on/off the
1131 * subdevs in random order.
1132 */
20b85227 1133 media_graph_walk_start(graph, entity);
d3775fa7 1134
20b85227 1135 while ((entity = media_graph_walk_next(graph))) {
45b46879 1136 if (!is_media_entity_v4l2_video_device(entity))
d3775fa7
SN
1137 continue;
1138
1139 ret = __fimc_md_modify_pipeline(entity, enable);
1140
1141 if (ret < 0)
1142 goto err;
1143 }
1144
1145 return 0;
d3775fa7 1146
fd7e5309 1147err:
20b85227 1148 media_graph_walk_start(graph, entity_err);
fd7e5309 1149
20b85227 1150 while ((entity_err = media_graph_walk_next(graph))) {
45b46879 1151 if (!is_media_entity_v4l2_video_device(entity_err))
d3775fa7
SN
1152 continue;
1153
1154 __fimc_md_modify_pipeline(entity_err, !enable);
1155
1156 if (entity_err == entity)
1157 break;
1158 }
1159
1160 return ret;
1161}
1162
1163static int fimc_md_link_notify(struct media_link *link, unsigned int flags,
1164 unsigned int notification)
1165{
20b85227 1166 struct media_graph *graph =
fd7e5309
SA
1167 &container_of(link->graph_obj.mdev, struct fimc_md,
1168 media_dev)->link_setup_graph;
d3775fa7
SN
1169 struct media_entity *sink = link->sink->entity;
1170 int ret = 0;
1171
1172 /* Before link disconnection */
1173 if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) {
20b85227 1174 ret = media_graph_walk_init(graph,
fd7e5309
SA
1175 link->graph_obj.mdev);
1176 if (ret)
1177 return ret;
d3775fa7 1178 if (!(flags & MEDIA_LNK_FL_ENABLED))
fd7e5309 1179 ret = __fimc_md_modify_pipelines(sink, false, graph);
cdf58a6f 1180#if 0
d3775fa7 1181 else
cdf58a6f
MCC
1182 /* TODO: Link state change validation */
1183#endif
d3775fa7 1184 /* After link activation */
fd7e5309
SA
1185 } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH) {
1186 if (link->flags & MEDIA_LNK_FL_ENABLED)
1187 ret = __fimc_md_modify_pipelines(sink, true, graph);
20b85227 1188 media_graph_walk_cleanup(graph);
d3953223 1189 }
740ad921 1190
d3775fa7 1191 return ret ? -EPIPE : 0;
d3953223
SN
1192}
1193
68429f50
LP
1194static const struct media_device_ops fimc_md_ops = {
1195 .link_notify = fimc_md_link_notify,
1196};
1197
d3953223
SN
1198static ssize_t fimc_md_sysfs_show(struct device *dev,
1199 struct device_attribute *attr, char *buf)
1200{
1201 struct platform_device *pdev = to_platform_device(dev);
1202 struct fimc_md *fmd = platform_get_drvdata(pdev);
1203
1204 if (fmd->user_subdev_api)
1205 return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE);
1206
1207 return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE);
1208}
1209
1210static ssize_t fimc_md_sysfs_store(struct device *dev,
1211 struct device_attribute *attr,
1212 const char *buf, size_t count)
1213{
1214 struct platform_device *pdev = to_platform_device(dev);
1215 struct fimc_md *fmd = platform_get_drvdata(pdev);
1216 bool subdev_api;
1217 int i;
1218
1219 if (!strcmp(buf, "vid-dev\n"))
1220 subdev_api = false;
1221 else if (!strcmp(buf, "sub-dev\n"))
1222 subdev_api = true;
1223 else
1224 return count;
1225
1226 fmd->user_subdev_api = subdev_api;
1227 for (i = 0; i < FIMC_MAX_DEVS; i++)
1228 if (fmd->fimc[i])
1229 fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api;
1230 return count;
1231}
1232/*
1233 * This device attribute is to select video pipeline configuration method.
1234 * There are following valid values:
1235 * vid-dev - for V4L2 video node API only, subdevice will be configured
1236 * by the host driver.
1237 * sub-dev - for media controller API, subdevs must be configured in user
1238 * space before starting streaming.
1239 */
1240static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO,
1241 fimc_md_sysfs_show, fimc_md_sysfs_store);
1242
4163851f
SN
1243static int fimc_md_get_pinctrl(struct fimc_md *fmd)
1244{
1245 struct device *dev = &fmd->pdev->dev;
1246 struct fimc_pinctrl *pctl = &fmd->pinctl;
1247
1248 pctl->pinctrl = devm_pinctrl_get(dev);
1249 if (IS_ERR(pctl->pinctrl))
1250 return PTR_ERR(pctl->pinctrl);
1251
1252 pctl->state_default = pinctrl_lookup_state(pctl->pinctrl,
1253 PINCTRL_STATE_DEFAULT);
1254 if (IS_ERR(pctl->state_default))
1255 return PTR_ERR(pctl->state_default);
1256
1257 pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl,
1258 PINCTRL_STATE_IDLE);
1259 return 0;
1260}
1261
d3f5e0c5
SN
1262static int cam_clk_prepare(struct clk_hw *hw)
1263{
1264 struct cam_clk *camclk = to_cam_clk(hw);
1265 int ret;
1266
1267 if (camclk->fmd->pmf == NULL)
1268 return -ENODEV;
1269
1270 ret = pm_runtime_get_sync(camclk->fmd->pmf);
1271 return ret < 0 ? ret : 0;
1272}
1273
1274static void cam_clk_unprepare(struct clk_hw *hw)
1275{
1276 struct cam_clk *camclk = to_cam_clk(hw);
1277
1278 if (camclk->fmd->pmf == NULL)
1279 return;
1280
1281 pm_runtime_put_sync(camclk->fmd->pmf);
1282}
1283
1284static const struct clk_ops cam_clk_ops = {
1285 .prepare = cam_clk_prepare,
1286 .unprepare = cam_clk_unprepare,
1287};
1288
1289static void fimc_md_unregister_clk_provider(struct fimc_md *fmd)
1290{
1291 struct cam_clk_provider *cp = &fmd->clk_provider;
1292 unsigned int i;
1293
1294 if (cp->of_node)
1295 of_clk_del_provider(cp->of_node);
1296
1297 for (i = 0; i < cp->num_clocks; i++)
1298 clk_unregister(cp->clks[i]);
1299}
1300
1301static int fimc_md_register_clk_provider(struct fimc_md *fmd)
1302{
1303 struct cam_clk_provider *cp = &fmd->clk_provider;
1304 struct device *dev = &fmd->pdev->dev;
1305 int i, ret;
1306
1307 for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
1308 struct cam_clk *camclk = &cp->camclk[i];
1309 struct clk_init_data init;
1310 const char *p_name;
1311
1312 ret = of_property_read_string_index(dev->of_node,
1313 "clock-output-names", i, &init.name);
1314 if (ret < 0)
1315 break;
1316
1317 p_name = __clk_get_name(fmd->camclk[i].clock);
1318
1319 /* It's safe since clk_register() will duplicate the string. */
1320 init.parent_names = &p_name;
1321 init.num_parents = 1;
1322 init.ops = &cam_clk_ops;
1323 init.flags = CLK_SET_RATE_PARENT;
1324 camclk->hw.init = &init;
1325 camclk->fmd = fmd;
1326
1327 cp->clks[i] = clk_register(NULL, &camclk->hw);
1328 if (IS_ERR(cp->clks[i])) {
1329 dev_err(dev, "failed to register clock: %s (%ld)\n",
1330 init.name, PTR_ERR(cp->clks[i]));
1331 ret = PTR_ERR(cp->clks[i]);
1332 goto err;
1333 }
1334 cp->num_clocks++;
1335 }
1336
1337 if (cp->num_clocks == 0) {
1338 dev_warn(dev, "clk provider not registered\n");
1339 return 0;
1340 }
1341
1342 cp->clk_data.clks = cp->clks;
1343 cp->clk_data.clk_num = cp->num_clocks;
1344 cp->of_node = dev->of_node;
1345 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1346 &cp->clk_data);
1347 if (ret == 0)
1348 return 0;
1349err:
1350 fimc_md_unregister_clk_provider(fmd);
1351 return ret;
1352}
d3f5e0c5 1353
fa91f105
SN
1354static int subdev_notifier_bound(struct v4l2_async_notifier *notifier,
1355 struct v4l2_subdev *subdev,
1356 struct v4l2_async_subdev *asd)
1357{
1358 struct fimc_md *fmd = notifier_to_fimc_md(notifier);
1359 struct fimc_sensor_info *si = NULL;
1360 int i;
1361
1362 /* Find platform data for this sensor subdev */
1363 for (i = 0; i < ARRAY_SIZE(fmd->sensor); i++)
1364 if (fmd->sensor[i].asd.match.of.node == subdev->dev->of_node)
1365 si = &fmd->sensor[i];
1366
1367 if (si == NULL)
1368 return -EINVAL;
1369
1370 v4l2_set_subdev_hostdata(subdev, &si->pdata);
1371
1372 if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
1373 subdev->grp_id = GRP_ID_FIMC_IS_SENSOR;
1374 else
1375 subdev->grp_id = GRP_ID_SENSOR;
1376
1377 si->subdev = subdev;
1378
1379 v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n",
1380 subdev->name, fmd->num_sensors);
1381
1382 fmd->num_sensors++;
1383
1384 return 0;
1385}
1386
1387static int subdev_notifier_complete(struct v4l2_async_notifier *notifier)
1388{
1389 struct fimc_md *fmd = notifier_to_fimc_md(notifier);
1390 int ret;
1391
1392 mutex_lock(&fmd->media_dev.graph_mutex);
1393
1394 ret = fimc_md_create_links(fmd);
1395 if (ret < 0)
1396 goto unlock;
1397
1398 ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev);
1399unlock:
1400 mutex_unlock(&fmd->media_dev.graph_mutex);
9832e155
JMC
1401 if (ret < 0)
1402 return ret;
1403
1404 return media_device_register(&fmd->media_dev);
fa91f105
SN
1405}
1406
ecd9acbf 1407static int fimc_md_probe(struct platform_device *pdev)
d3953223 1408{
e2985a26 1409 struct device *dev = &pdev->dev;
d3953223
SN
1410 struct v4l2_device *v4l2_dev;
1411 struct fimc_md *fmd;
1412 int ret;
1413
e2985a26 1414 fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL);
d3953223
SN
1415 if (!fmd)
1416 return -ENOMEM;
1417
1418 spin_lock_init(&fmd->slock);
403dfbec 1419 INIT_LIST_HEAD(&fmd->pipelines);
49b2f4c5 1420 fmd->pdev = pdev;
d3953223
SN
1421
1422 strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC",
1423 sizeof(fmd->media_dev.model));
68429f50 1424 fmd->media_dev.ops = &fimc_md_ops;
e2985a26 1425 fmd->media_dev.dev = dev;
d3953223
SN
1426
1427 v4l2_dev = &fmd->v4l2_dev;
1428 v4l2_dev->mdev = &fmd->media_dev;
e1d72f4d 1429 v4l2_dev->notify = fimc_sensor_notify;
e2985a26 1430 strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name));
d3953223 1431
e781bbe3 1432 fmd->use_isp = fimc_md_is_isp_available(dev->of_node);
49b2f4c5 1433 fmd->user_subdev_api = true;
e781bbe3 1434
2e7508e4
MCC
1435 media_device_init(&fmd->media_dev);
1436
e2985a26 1437 ret = v4l2_device_register(dev, &fmd->v4l2_dev);
d3953223
SN
1438 if (ret < 0) {
1439 v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret);
6d91a51a 1440 return ret;
d3953223 1441 }
d3f5e0c5 1442
d3953223
SN
1443 ret = fimc_md_get_clocks(fmd);
1444 if (ret)
fa91f105 1445 goto err_md;
d3953223 1446
4163851f
SN
1447 ret = fimc_md_get_pinctrl(fmd);
1448 if (ret < 0) {
1449 if (ret != EPROBE_DEFER)
1450 dev_err(dev, "Failed to get pinctrl: %d\n", ret);
fa91f105 1451 goto err_clk;
4163851f
SN
1452 }
1453
fa91f105
SN
1454 platform_set_drvdata(pdev, fmd);
1455
49b2f4c5 1456 ret = fimc_md_register_platform_entities(fmd, dev->of_node);
243d4c02 1457 if (ret)
fa91f105 1458 goto err_clk;
d3953223 1459
49b2f4c5 1460 ret = fimc_md_register_sensor_entities(fmd);
243d4c02 1461 if (ret)
49b2f4c5 1462 goto err_m_ent;
d3953223
SN
1463
1464 ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode);
693f5c40 1465 if (ret)
fa91f105
SN
1466 goto err_m_ent;
1467 /*
1468 * FIMC platform devices need to be registered before the sclk_cam
1469 * clocks provider, as one of these devices needs to be activated
1470 * to enable the clock.
1471 */
1472 ret = fimc_md_register_clk_provider(fmd);
1473 if (ret < 0) {
1474 v4l2_err(v4l2_dev, "clock provider registration failed\n");
1475 goto err_attr;
1476 }
1477
1478 if (fmd->num_sensors > 0) {
1479 fmd->subdev_notifier.subdevs = fmd->async_subdevs;
1480 fmd->subdev_notifier.num_subdevs = fmd->num_sensors;
1481 fmd->subdev_notifier.bound = subdev_notifier_bound;
1482 fmd->subdev_notifier.complete = subdev_notifier_complete;
1483 fmd->num_sensors = 0;
1484
1485 ret = v4l2_async_notifier_register(&fmd->v4l2_dev,
1486 &fmd->subdev_notifier);
1487 if (ret)
1488 goto err_clk_p;
1489 }
693f5c40 1490
693f5c40
SN
1491 return 0;
1492
fa91f105
SN
1493err_clk_p:
1494 fimc_md_unregister_clk_provider(fmd);
1495err_attr:
1496 device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
693f5c40 1497err_clk:
d3953223 1498 fimc_md_put_clocks(fmd);
fa91f105 1499err_m_ent:
d3953223 1500 fimc_md_unregister_entities(fmd);
693f5c40 1501err_md:
9832e155 1502 media_device_cleanup(&fmd->media_dev);
d3953223 1503 v4l2_device_unregister(&fmd->v4l2_dev);
d3953223
SN
1504 return ret;
1505}
1506
4c62e976 1507static int fimc_md_remove(struct platform_device *pdev)
d3953223
SN
1508{
1509 struct fimc_md *fmd = platform_get_drvdata(pdev);
1510
1511 if (!fmd)
1512 return 0;
b74bee15 1513
d3f5e0c5 1514 fimc_md_unregister_clk_provider(fmd);
fa91f105
SN
1515 v4l2_async_notifier_unregister(&fmd->subdev_notifier);
1516
b74bee15 1517 v4l2_device_unregister(&fmd->v4l2_dev);
d3953223
SN
1518 device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
1519 fimc_md_unregister_entities(fmd);
403dfbec 1520 fimc_md_pipelines_free(fmd);
d3953223 1521 media_device_unregister(&fmd->media_dev);
9832e155 1522 media_device_cleanup(&fmd->media_dev);
d3953223 1523 fimc_md_put_clocks(fmd);
fa91f105 1524
d3953223
SN
1525 return 0;
1526}
1527
c42639d8 1528static const struct platform_device_id fimc_driver_ids[] __always_unused = {
e2985a26
SN
1529 { .name = "s5p-fimc-md" },
1530 { },
1531};
1532MODULE_DEVICE_TABLE(platform, fimc_driver_ids);
1533
1534static const struct of_device_id fimc_md_of_match[] = {
1535 { .compatible = "samsung,fimc" },
1536 { },
1537};
1538MODULE_DEVICE_TABLE(of, fimc_md_of_match);
1539
d3953223
SN
1540static struct platform_driver fimc_md_driver = {
1541 .probe = fimc_md_probe,
4c62e976 1542 .remove = fimc_md_remove,
d3953223 1543 .driver = {
e2985a26
SN
1544 .of_match_table = of_match_ptr(fimc_md_of_match),
1545 .name = "s5p-fimc-md",
d3953223
SN
1546 }
1547};
1548
7e566be2 1549static int __init fimc_md_init(void)
d3953223
SN
1550{
1551 int ret;
ecd9acbf 1552
d3953223
SN
1553 request_module("s5p-csis");
1554 ret = fimc_register_driver();
1555 if (ret)
1556 return ret;
ecd9acbf 1557
d3953223
SN
1558 return platform_driver_register(&fimc_md_driver);
1559}
7e566be2
SK
1560
1561static void __exit fimc_md_exit(void)
d3953223
SN
1562{
1563 platform_driver_unregister(&fimc_md_driver);
1564 fimc_unregister_driver();
1565}
1566
1567module_init(fimc_md_init);
1568module_exit(fimc_md_exit);
1569
1570MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
1571MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver");
1572MODULE_LICENSE("GPL");
1573MODULE_VERSION("2.0.1");