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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
d3953223 SN |
2 | /* |
3 | * S5P/EXYNOS4 SoC series camera host interface media device driver | |
4 | * | |
52917bcb SN |
5 | * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd. |
6 | * Author: Sylwester Nawrocki <s.nawrocki@samsung.com> | |
d3953223 SN |
7 | */ |
8 | ||
9 | #include <linux/bug.h> | |
d3f5e0c5 SN |
10 | #include <linux/clk.h> |
11 | #include <linux/clk-provider.h> | |
d3953223 SN |
12 | #include <linux/device.h> |
13 | #include <linux/errno.h> | |
14 | #include <linux/i2c.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/module.h> | |
e2985a26 SN |
18 | #include <linux/of.h> |
19 | #include <linux/of_platform.h> | |
20 | #include <linux/of_device.h> | |
fd9fdb78 | 21 | #include <linux/of_graph.h> |
d3953223 SN |
22 | #include <linux/platform_device.h> |
23 | #include <linux/pm_runtime.h> | |
24 | #include <linux/types.h> | |
25 | #include <linux/slab.h> | |
fa91f105 | 26 | #include <media/v4l2-async.h> |
131b6c61 | 27 | #include <media/v4l2-ctrls.h> |
859969b3 | 28 | #include <media/v4l2-fwnode.h> |
d3953223 | 29 | #include <media/media-device.h> |
d647f0b7 | 30 | #include <media/drv-intf/exynos-fimc.h> |
d3953223 | 31 | |
56fa1a6a | 32 | #include "media-dev.h" |
d3953223 | 33 | #include "fimc-core.h" |
e781bbe3 | 34 | #include "fimc-is.h" |
0f735f52 | 35 | #include "fimc-lite.h" |
d3953223 SN |
36 | #include "mipi-csis.h" |
37 | ||
52917bcb SN |
38 | /* Set up image sensor subdev -> FIMC capture node notifications. */ |
39 | static void __setup_sensor_notification(struct fimc_md *fmd, | |
40 | struct v4l2_subdev *sensor, | |
41 | struct v4l2_subdev *fimc_sd) | |
42 | { | |
43 | struct fimc_source_info *src_inf; | |
44 | struct fimc_sensor_info *md_si; | |
45 | unsigned long flags; | |
46 | ||
47 | src_inf = v4l2_get_subdev_hostdata(sensor); | |
48 | if (!src_inf || WARN_ON(fmd == NULL)) | |
49 | return; | |
50 | ||
51 | md_si = source_to_sensor_info(src_inf); | |
52 | spin_lock_irqsave(&fmd->slock, flags); | |
53 | md_si->host = v4l2_get_subdevdata(fimc_sd); | |
54 | spin_unlock_irqrestore(&fmd->slock, flags); | |
55 | } | |
56 | ||
d3953223 SN |
57 | /** |
58 | * fimc_pipeline_prepare - update pipeline information with subdevice pointers | |
3b060ba0 | 59 | * @p: fimc pipeline |
39bb6df6 | 60 | * @me: media entity terminating the pipeline |
d3953223 SN |
61 | * |
62 | * Caller holds the graph mutex. | |
63 | */ | |
b9ee31e6 | 64 | static void fimc_pipeline_prepare(struct fimc_pipeline *p, |
403dfbec | 65 | struct media_entity *me) |
d3953223 | 66 | { |
52917bcb | 67 | struct fimc_md *fmd = entity_to_fimc_mdev(me); |
d3953223 | 68 | struct v4l2_subdev *sd; |
52917bcb | 69 | struct v4l2_subdev *sensor = NULL; |
0f735f52 | 70 | int i; |
d3953223 | 71 | |
0f735f52 SN |
72 | for (i = 0; i < IDX_MAX; i++) |
73 | p->subdevs[i] = NULL; | |
d3953223 | 74 | |
0f735f52 | 75 | while (1) { |
39bb6df6 SN |
76 | struct media_pad *pad = NULL; |
77 | ||
78 | /* Find remote source pad */ | |
79 | for (i = 0; i < me->num_pads; i++) { | |
80 | struct media_pad *spad = &me->pads[i]; | |
81 | if (!(spad->flags & MEDIA_PAD_FL_SINK)) | |
82 | continue; | |
1bddf1b3 | 83 | pad = media_entity_remote_pad(spad); |
39bb6df6 SN |
84 | if (pad) |
85 | break; | |
86 | } | |
0f735f52 | 87 | |
3efdf62c | 88 | if (!pad || !is_media_entity_v4l2_subdev(pad->entity)) |
0f735f52 | 89 | break; |
0f735f52 SN |
90 | sd = media_entity_to_v4l2_subdev(pad->entity); |
91 | ||
92 | switch (sd->grp_id) { | |
588c87be | 93 | case GRP_ID_SENSOR: |
52917bcb SN |
94 | sensor = sd; |
95 | /* fall through */ | |
96 | case GRP_ID_FIMC_IS_SENSOR: | |
0f735f52 SN |
97 | p->subdevs[IDX_SENSOR] = sd; |
98 | break; | |
588c87be | 99 | case GRP_ID_CSIS: |
0f735f52 SN |
100 | p->subdevs[IDX_CSIS] = sd; |
101 | break; | |
588c87be | 102 | case GRP_ID_FLITE: |
4af81310 SN |
103 | p->subdevs[IDX_FLITE] = sd; |
104 | break; | |
588c87be | 105 | case GRP_ID_FIMC: |
52917bcb | 106 | p->subdevs[IDX_FIMC] = sd; |
0f735f52 | 107 | break; |
e781bbe3 SN |
108 | case GRP_ID_FIMC_IS: |
109 | p->subdevs[IDX_IS_ISP] = sd; | |
110 | break; | |
0f735f52 | 111 | default: |
e781bbe3 | 112 | break; |
0f735f52 | 113 | } |
39bb6df6 SN |
114 | me = &sd->entity; |
115 | if (me->num_pads == 1) | |
116 | break; | |
d3953223 | 117 | } |
52917bcb SN |
118 | |
119 | if (sensor && p->subdevs[IDX_FIMC]) | |
120 | __setup_sensor_notification(fmd, sensor, p->subdevs[IDX_FIMC]); | |
d3953223 SN |
121 | } |
122 | ||
123 | /** | |
124 | * __subdev_set_power - change power state of a single subdev | |
125 | * @sd: subdevice to change power state for | |
126 | * @on: 1 to enable power or 0 to disable | |
127 | * | |
128 | * Return result of s_power subdev operation or -ENXIO if sd argument | |
129 | * is NULL. Return 0 if the subdevice does not implement s_power. | |
130 | */ | |
131 | static int __subdev_set_power(struct v4l2_subdev *sd, int on) | |
132 | { | |
133 | int *use_count; | |
134 | int ret; | |
135 | ||
136 | if (sd == NULL) | |
137 | return -ENXIO; | |
138 | ||
139 | use_count = &sd->entity.use_count; | |
140 | if (on && (*use_count)++ > 0) | |
141 | return 0; | |
142 | else if (!on && (*use_count == 0 || --(*use_count) > 0)) | |
143 | return 0; | |
144 | ret = v4l2_subdev_call(sd, core, s_power, on); | |
145 | ||
146 | return ret != -ENOIOCTLCMD ? ret : 0; | |
147 | } | |
148 | ||
149 | /** | |
150 | * fimc_pipeline_s_power - change power state of all pipeline subdevs | |
3b060ba0 MCC |
151 | * @p: fimc device terminating the pipeline |
152 | * @on: true to power on, false to power off | |
d3953223 | 153 | * |
0f735f52 | 154 | * Needs to be called with the graph mutex held. |
d3953223 | 155 | */ |
f8bca4f5 | 156 | static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on) |
d3953223 | 157 | { |
f8bca4f5 SN |
158 | static const u8 seq[2][IDX_MAX - 1] = { |
159 | { IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE }, | |
160 | { IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP }, | |
161 | }; | |
162 | int i, ret = 0; | |
d3953223 | 163 | |
0f735f52 | 164 | if (p->subdevs[IDX_SENSOR] == NULL) |
d3953223 SN |
165 | return -ENXIO; |
166 | ||
f8bca4f5 SN |
167 | for (i = 0; i < IDX_MAX - 1; i++) { |
168 | unsigned int idx = seq[on][i]; | |
169 | ||
170 | ret = __subdev_set_power(p->subdevs[idx], on); | |
171 | ||
0f735f52 | 172 | |
0f735f52 | 173 | if (ret < 0 && ret != -ENXIO) |
f8bca4f5 | 174 | goto error; |
d3953223 | 175 | } |
0f735f52 | 176 | return 0; |
f8bca4f5 SN |
177 | error: |
178 | for (; i >= 0; i--) { | |
179 | unsigned int idx = seq[on][i]; | |
180 | __subdev_set_power(p->subdevs[idx], !on); | |
181 | } | |
182 | return ret; | |
d3953223 SN |
183 | } |
184 | ||
76775776 JA |
185 | /** |
186 | * __fimc_pipeline_enable - enable power of all pipeline subdevs | |
187 | * and the sensor clock | |
188 | * @ep: video pipeline structure | |
189 | * @fmd: fimc media device | |
190 | * | |
191 | * Called with the graph mutex held. | |
192 | */ | |
193 | static int __fimc_pipeline_enable(struct exynos_media_pipeline *ep, | |
194 | struct fimc_md *fmd) | |
195 | { | |
196 | struct fimc_pipeline *p = to_fimc_pipeline(ep); | |
197 | int ret; | |
198 | ||
199 | /* Enable PXLASYNC clock if this pipeline includes FIMC-IS */ | |
200 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) { | |
201 | ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]); | |
202 | if (ret < 0) | |
203 | return ret; | |
204 | } | |
205 | ||
206 | ret = fimc_pipeline_s_power(p, 1); | |
207 | if (!ret) | |
208 | return 0; | |
209 | ||
210 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) | |
211 | clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); | |
212 | ||
213 | return ret; | |
214 | } | |
215 | ||
d3953223 | 216 | /** |
b9ee31e6 SN |
217 | * __fimc_pipeline_open - update the pipeline information, enable power |
218 | * of all pipeline subdevs and the sensor clock | |
3b060ba0 | 219 | * @ep: fimc device terminating the pipeline |
d3953223 | 220 | * @me: media entity to start graph walk with |
056f4f30 | 221 | * @prepare: true to walk the current pipeline and acquire all subdevs |
d3953223 | 222 | * |
740ad921 | 223 | * Called with the graph mutex held. |
d3953223 | 224 | */ |
403dfbec | 225 | static int __fimc_pipeline_open(struct exynos_media_pipeline *ep, |
056f4f30 | 226 | struct media_entity *me, bool prepare) |
d3953223 | 227 | { |
056f4f30 | 228 | struct fimc_md *fmd = entity_to_fimc_mdev(me); |
403dfbec | 229 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
056f4f30 | 230 | struct v4l2_subdev *sd; |
d3953223 | 231 | |
056f4f30 SN |
232 | if (WARN_ON(p == NULL || me == NULL)) |
233 | return -EINVAL; | |
234 | ||
235 | if (prepare) | |
0f735f52 SN |
236 | fimc_pipeline_prepare(p, me); |
237 | ||
056f4f30 | 238 | sd = p->subdevs[IDX_SENSOR]; |
76775776 JA |
239 | if (sd == NULL) { |
240 | pr_warn("%s(): No sensor subdev\n", __func__); | |
241 | /* | |
242 | * Pipeline open cannot fail so as to make it possible | |
243 | * for the user space to configure the pipeline. | |
244 | */ | |
056f4f30 | 245 | return 0; |
76775776 | 246 | } |
0f735f52 | 247 | |
76775776 | 248 | return __fimc_pipeline_enable(ep, fmd); |
d3953223 SN |
249 | } |
250 | ||
d3953223 | 251 | /** |
b9ee31e6 | 252 | * __fimc_pipeline_close - disable the sensor clock and pipeline power |
3b060ba0 | 253 | * @ep: fimc device terminating the pipeline |
d3953223 | 254 | * |
740ad921 | 255 | * Disable power of all subdevs and turn the external sensor clock off. |
d3953223 | 256 | */ |
403dfbec | 257 | static int __fimc_pipeline_close(struct exynos_media_pipeline *ep) |
d3953223 | 258 | { |
403dfbec | 259 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
056f4f30 SN |
260 | struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL; |
261 | struct fimc_md *fmd; | |
36da6fcd | 262 | int ret; |
740ad921 | 263 | |
36da6fcd SN |
264 | if (sd == NULL) { |
265 | pr_warn("%s(): No sensor subdev\n", __func__); | |
266 | return 0; | |
d3953223 | 267 | } |
056f4f30 | 268 | |
36da6fcd | 269 | ret = fimc_pipeline_s_power(p, 0); |
36da6fcd | 270 | |
056f4f30 SN |
271 | fmd = entity_to_fimc_mdev(&sd->entity); |
272 | ||
273 | /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */ | |
274 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) | |
275 | clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); | |
276 | ||
d3953223 SN |
277 | return ret == -ENXIO ? 0 : ret; |
278 | } | |
279 | ||
d3953223 | 280 | /** |
8d274e7c | 281 | * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs |
3b060ba0 | 282 | * @ep: video pipeline structure |
8d274e7c | 283 | * @on: passed as the s_stream() callback argument |
d3953223 | 284 | */ |
403dfbec | 285 | static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on) |
d3953223 | 286 | { |
8d274e7c SN |
287 | static const u8 seq[2][IDX_MAX] = { |
288 | { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE }, | |
289 | { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP }, | |
290 | }; | |
403dfbec | 291 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
76775776 JA |
292 | struct fimc_md *fmd = entity_to_fimc_mdev(&p->subdevs[IDX_CSIS]->entity); |
293 | enum fimc_subdev_index sd_id; | |
8d274e7c | 294 | int i, ret = 0; |
d3953223 | 295 | |
76775776 JA |
296 | if (p->subdevs[IDX_SENSOR] == NULL) { |
297 | if (!fmd->user_subdev_api) { | |
298 | /* | |
299 | * Sensor must be already discovered if we | |
300 | * aren't in the user_subdev_api mode | |
301 | */ | |
302 | return -ENODEV; | |
303 | } | |
304 | ||
305 | /* Get pipeline sink entity */ | |
306 | if (p->subdevs[IDX_FIMC]) | |
307 | sd_id = IDX_FIMC; | |
308 | else if (p->subdevs[IDX_IS_ISP]) | |
309 | sd_id = IDX_IS_ISP; | |
310 | else if (p->subdevs[IDX_FLITE]) | |
311 | sd_id = IDX_FLITE; | |
312 | else | |
313 | return -ENODEV; | |
314 | ||
315 | /* | |
316 | * Sensor could have been linked between open and STREAMON - | |
317 | * check if this is the case. | |
318 | */ | |
319 | fimc_pipeline_prepare(p, &p->subdevs[sd_id]->entity); | |
320 | ||
321 | if (p->subdevs[IDX_SENSOR] == NULL) | |
322 | return -ENODEV; | |
323 | ||
324 | ret = __fimc_pipeline_enable(ep, fmd); | |
325 | if (ret < 0) | |
326 | return ret; | |
327 | ||
328 | } | |
d3953223 | 329 | |
0f735f52 | 330 | for (i = 0; i < IDX_MAX; i++) { |
8d274e7c | 331 | unsigned int idx = seq[on][i]; |
0f735f52 SN |
332 | |
333 | ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on); | |
334 | ||
335 | if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) | |
8d274e7c | 336 | goto error; |
0f735f52 | 337 | } |
76775776 | 338 | |
0f735f52 | 339 | return 0; |
8d274e7c | 340 | error: |
76775776 | 341 | fimc_pipeline_s_power(p, !on); |
8d274e7c SN |
342 | for (; i >= 0; i--) { |
343 | unsigned int idx = seq[on][i]; | |
344 | v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on); | |
345 | } | |
346 | return ret; | |
d3953223 | 347 | } |
b9ee31e6 SN |
348 | |
349 | /* Media pipeline operations for the FIMC/FIMC-LITE video device driver */ | |
403dfbec | 350 | static const struct exynos_media_pipeline_ops fimc_pipeline_ops = { |
740ad921 SN |
351 | .open = __fimc_pipeline_open, |
352 | .close = __fimc_pipeline_close, | |
353 | .set_stream = __fimc_pipeline_s_stream, | |
b9ee31e6 | 354 | }; |
d3953223 | 355 | |
403dfbec SN |
356 | static struct exynos_media_pipeline *fimc_md_pipeline_create( |
357 | struct fimc_md *fmd) | |
358 | { | |
359 | struct fimc_pipeline *p; | |
360 | ||
361 | p = kzalloc(sizeof(*p), GFP_KERNEL); | |
362 | if (!p) | |
363 | return NULL; | |
364 | ||
365 | list_add_tail(&p->list, &fmd->pipelines); | |
366 | ||
367 | p->ep.ops = &fimc_pipeline_ops; | |
368 | return &p->ep; | |
369 | } | |
370 | ||
371 | static void fimc_md_pipelines_free(struct fimc_md *fmd) | |
372 | { | |
373 | while (!list_empty(&fmd->pipelines)) { | |
374 | struct fimc_pipeline *p; | |
375 | ||
376 | p = list_entry(fmd->pipelines.next, typeof(*p), list); | |
377 | list_del(&p->list); | |
378 | kfree(p); | |
379 | } | |
380 | } | |
381 | ||
2b13f7d4 SN |
382 | /* Parse port node and register as a sub-device any sensor specified there. */ |
383 | static int fimc_md_parse_port_node(struct fimc_md *fmd, | |
384 | struct device_node *port, | |
385 | unsigned int index) | |
386 | { | |
49b2f4c5 | 387 | struct fimc_source_info *pd = &fmd->sensor[index].pdata; |
2b13f7d4 | 388 | struct device_node *rem, *ep, *np; |
60359a28 | 389 | struct v4l2_fwnode_endpoint endpoint = { .bus_type = 0 }; |
234eab84 | 390 | int ret; |
2b13f7d4 SN |
391 | |
392 | /* Assume here a port node can have only one endpoint node. */ | |
393 | ep = of_get_next_child(port, NULL); | |
394 | if (!ep) | |
395 | return 0; | |
396 | ||
859969b3 | 397 | ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &endpoint); |
234eab84 JMC |
398 | if (ret) { |
399 | of_node_put(ep); | |
400 | return ret; | |
401 | } | |
402 | ||
2b2d1d40 CJ |
403 | if (WARN_ON(endpoint.base.port == 0) || index >= FIMC_MAX_SENSORS) { |
404 | of_node_put(ep); | |
2b13f7d4 | 405 | return -EINVAL; |
2b2d1d40 | 406 | } |
2b13f7d4 | 407 | |
f2a575f6 | 408 | pd->mux_id = (endpoint.base.port - 1) & 0x1; |
2b13f7d4 | 409 | |
fd9fdb78 | 410 | rem = of_graph_get_remote_port_parent(ep); |
2b13f7d4 SN |
411 | of_node_put(ep); |
412 | if (rem == NULL) { | |
68d9c47b RH |
413 | v4l2_info(&fmd->v4l2_dev, "Remote device at %pOF not found\n", |
414 | ep); | |
2b13f7d4 SN |
415 | return 0; |
416 | } | |
2b13f7d4 | 417 | |
f2a575f6 | 418 | if (fimc_input_is_parallel(endpoint.base.port)) { |
2b13f7d4 SN |
419 | if (endpoint.bus_type == V4L2_MBUS_PARALLEL) |
420 | pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601; | |
421 | else | |
422 | pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656; | |
423 | pd->flags = endpoint.bus.parallel.flags; | |
f2a575f6 | 424 | } else if (fimc_input_is_mipi_csi(endpoint.base.port)) { |
2b13f7d4 SN |
425 | /* |
426 | * MIPI CSI-2: only input mux selection and | |
427 | * the sensor's clock frequency is needed. | |
428 | */ | |
429 | pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2; | |
430 | } else { | |
68d9c47b RH |
431 | v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %pOF\n", |
432 | endpoint.base.port, rem); | |
2b13f7d4 SN |
433 | } |
434 | /* | |
435 | * For FIMC-IS handled sensors, that are placed under i2c-isp device | |
436 | * node, FIMC is connected to the FIMC-IS through its ISP Writeback | |
437 | * input. Sensors are attached to the FIMC-LITE hostdata interface | |
438 | * directly or through MIPI-CSIS, depending on the external media bus | |
439 | * used. This needs to be handled in a more reliable way, not by just | |
440 | * checking parent's node name. | |
441 | */ | |
442 | np = of_get_parent(rem); | |
443 | ||
2fc6e404 | 444 | if (of_node_name_eq(np, "i2c-isp")) |
2b13f7d4 SN |
445 | pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK; |
446 | else | |
447 | pd->fimc_bus_type = pd->sensor_bus_type; | |
448 | ||
7e8da343 KK |
449 | if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor))) { |
450 | of_node_put(rem); | |
fa91f105 | 451 | return -EINVAL; |
7e8da343 | 452 | } |
2b13f7d4 | 453 | |
859969b3 | 454 | fmd->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_FWNODE; |
4e48afec | 455 | fmd->sensor[index].asd.match.fwnode = of_fwnode_handle(rem); |
d079f94c SL |
456 | |
457 | ret = v4l2_async_notifier_add_subdev(&fmd->subdev_notifier, | |
458 | &fmd->sensor[index].asd); | |
459 | if (ret) { | |
460 | of_node_put(rem); | |
461 | return ret; | |
462 | } | |
fa91f105 SN |
463 | |
464 | fmd->num_sensors++; | |
465 | ||
fa91f105 | 466 | return 0; |
2b13f7d4 SN |
467 | } |
468 | ||
469 | /* Register all SoC external sub-devices */ | |
49b2f4c5 | 470 | static int fimc_md_register_sensor_entities(struct fimc_md *fmd) |
2b13f7d4 SN |
471 | { |
472 | struct device_node *parent = fmd->pdev->dev.of_node; | |
473 | struct device_node *node, *ports; | |
474 | int index = 0; | |
475 | int ret; | |
476 | ||
49b2f4c5 SN |
477 | /* |
478 | * Runtime resume one of the FIMC entities to make sure | |
479 | * the sclk_cam clocks are not globally disabled. | |
480 | */ | |
481 | if (!fmd->pmf) | |
482 | return -ENXIO; | |
483 | ||
484 | ret = pm_runtime_get_sync(fmd->pmf); | |
485 | if (ret < 0) | |
486 | return ret; | |
487 | ||
488 | fmd->num_sensors = 0; | |
489 | ||
2b13f7d4 SN |
490 | /* Attach sensors linked to MIPI CSI-2 receivers */ |
491 | for_each_available_child_of_node(parent, node) { | |
492 | struct device_node *port; | |
493 | ||
2fc6e404 | 494 | if (!of_node_name_eq(node, "csis")) |
2b13f7d4 SN |
495 | continue; |
496 | /* The csis node can have only port subnode. */ | |
497 | port = of_get_next_child(node, NULL); | |
498 | if (!port) | |
499 | continue; | |
500 | ||
501 | ret = fimc_md_parse_port_node(fmd, port, index); | |
458a3952 AKC |
502 | if (ret < 0) { |
503 | of_node_put(node); | |
d079f94c | 504 | goto cleanup; |
458a3952 | 505 | } |
2b13f7d4 SN |
506 | index++; |
507 | } | |
508 | ||
509 | /* Attach sensors listed in the parallel-ports node */ | |
510 | ports = of_get_child_by_name(parent, "parallel-ports"); | |
511 | if (!ports) | |
49b2f4c5 | 512 | goto rpm_put; |
2b13f7d4 SN |
513 | |
514 | for_each_child_of_node(ports, node) { | |
515 | ret = fimc_md_parse_port_node(fmd, node, index); | |
458a3952 AKC |
516 | if (ret < 0) { |
517 | of_node_put(node); | |
d079f94c | 518 | goto cleanup; |
458a3952 | 519 | } |
2b13f7d4 SN |
520 | index++; |
521 | } | |
d079f94c | 522 | |
49b2f4c5 | 523 | rpm_put: |
d079f94c SL |
524 | pm_runtime_put(fmd->pmf); |
525 | return 0; | |
526 | ||
527 | cleanup: | |
528 | v4l2_async_notifier_cleanup(&fmd->subdev_notifier); | |
49b2f4c5 SN |
529 | pm_runtime_put(fmd->pmf); |
530 | return ret; | |
2b13f7d4 SN |
531 | } |
532 | ||
e2985a26 SN |
533 | static int __of_get_csis_id(struct device_node *np) |
534 | { | |
535 | u32 reg = 0; | |
536 | ||
537 | np = of_get_child_by_name(np, "port"); | |
538 | if (!np) | |
539 | return -EINVAL; | |
540 | of_property_read_u32(np, "reg", ®); | |
541 | return reg - FIMC_INPUT_MIPI_CSI2_0; | |
542 | } | |
d3953223 SN |
543 | |
544 | /* | |
7b43a6f3 | 545 | * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration. |
d3953223 | 546 | */ |
7b43a6f3 SN |
547 | static int register_fimc_lite_entity(struct fimc_md *fmd, |
548 | struct fimc_lite *fimc_lite) | |
d3953223 | 549 | { |
8163ec0b | 550 | struct v4l2_subdev *sd; |
403dfbec | 551 | struct exynos_media_pipeline *ep; |
afd7348c | 552 | int ret; |
4af81310 | 553 | |
7b43a6f3 SN |
554 | if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS || |
555 | fmd->fimc_lite[fimc_lite->index])) | |
556 | return -EBUSY; | |
d3953223 | 557 | |
7b43a6f3 SN |
558 | sd = &fimc_lite->subdev; |
559 | sd->grp_id = GRP_ID_FLITE; | |
403dfbec SN |
560 | |
561 | ep = fimc_md_pipeline_create(fmd); | |
562 | if (!ep) | |
563 | return -ENOMEM; | |
564 | ||
565 | v4l2_set_subdev_hostdata(sd, ep); | |
693f5c40 SN |
566 | |
567 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); | |
7b43a6f3 SN |
568 | if (!ret) |
569 | fmd->fimc_lite[fimc_lite->index] = fimc_lite; | |
570 | else | |
571 | v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n", | |
572 | fimc_lite->index); | |
573 | return ret; | |
d3953223 SN |
574 | } |
575 | ||
7b43a6f3 | 576 | static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc) |
4af81310 | 577 | { |
7b43a6f3 | 578 | struct v4l2_subdev *sd; |
403dfbec | 579 | struct exynos_media_pipeline *ep; |
4af81310 SN |
580 | int ret; |
581 | ||
7b43a6f3 SN |
582 | if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id])) |
583 | return -EBUSY; | |
4af81310 | 584 | |
7b43a6f3 SN |
585 | sd = &fimc->vid_cap.subdev; |
586 | sd->grp_id = GRP_ID_FIMC; | |
403dfbec SN |
587 | |
588 | ep = fimc_md_pipeline_create(fmd); | |
589 | if (!ep) | |
590 | return -ENOMEM; | |
591 | ||
592 | v4l2_set_subdev_hostdata(sd, ep); | |
4af81310 | 593 | |
7b43a6f3 SN |
594 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
595 | if (!ret) { | |
3e20c345 SN |
596 | if (!fmd->pmf && fimc->pdev) |
597 | fmd->pmf = &fimc->pdev->dev; | |
7b43a6f3 SN |
598 | fmd->fimc[fimc->id] = fimc; |
599 | fimc->vid_cap.user_subdev_api = fmd->user_subdev_api; | |
600 | } else { | |
601 | v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n", | |
602 | fimc->id, ret); | |
4af81310 | 603 | } |
7b43a6f3 | 604 | return ret; |
4af81310 SN |
605 | } |
606 | ||
7b43a6f3 SN |
607 | static int register_csis_entity(struct fimc_md *fmd, |
608 | struct platform_device *pdev, | |
609 | struct v4l2_subdev *sd) | |
d3953223 | 610 | { |
7b43a6f3 | 611 | struct device_node *node = pdev->dev.of_node; |
d3953223 SN |
612 | int id, ret; |
613 | ||
e2985a26 | 614 | id = node ? __of_get_csis_id(node) : max(0, pdev->id); |
7b43a6f3 | 615 | |
e2985a26 SN |
616 | if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES)) |
617 | return -ENOENT; | |
7b43a6f3 | 618 | |
e2985a26 SN |
619 | if (WARN_ON(fmd->csis[id].sd)) |
620 | return -EBUSY; | |
d3953223 | 621 | |
588c87be | 622 | sd->grp_id = GRP_ID_CSIS; |
d3953223 | 623 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
afd7348c SN |
624 | if (!ret) |
625 | fmd->csis[id].sd = sd; | |
626 | else | |
d3953223 | 627 | v4l2_err(&fmd->v4l2_dev, |
7b43a6f3 | 628 | "Failed to register MIPI-CSIS.%d (%d)\n", id, ret); |
d3953223 SN |
629 | return ret; |
630 | } | |
631 | ||
e781bbe3 SN |
632 | static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is) |
633 | { | |
634 | struct v4l2_subdev *sd = &is->isp.subdev; | |
34947b8a | 635 | struct exynos_media_pipeline *ep; |
e781bbe3 SN |
636 | int ret; |
637 | ||
34947b8a SN |
638 | /* Allocate pipeline object for the ISP capture video node. */ |
639 | ep = fimc_md_pipeline_create(fmd); | |
640 | if (!ep) | |
641 | return -ENOMEM; | |
642 | ||
643 | v4l2_set_subdev_hostdata(sd, ep); | |
644 | ||
e781bbe3 SN |
645 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
646 | if (ret) { | |
647 | v4l2_err(&fmd->v4l2_dev, | |
648 | "Failed to register FIMC-ISP (%d)\n", ret); | |
649 | return ret; | |
650 | } | |
651 | ||
652 | fmd->fimc_is = is; | |
653 | return 0; | |
654 | } | |
655 | ||
7b43a6f3 SN |
656 | static int fimc_md_register_platform_entity(struct fimc_md *fmd, |
657 | struct platform_device *pdev, | |
658 | int plat_entity) | |
d3953223 | 659 | { |
7b43a6f3 SN |
660 | struct device *dev = &pdev->dev; |
661 | int ret = -EPROBE_DEFER; | |
662 | void *drvdata; | |
663 | ||
664 | /* Lock to ensure dev->driver won't change. */ | |
665 | device_lock(dev); | |
666 | ||
667 | if (!dev->driver || !try_module_get(dev->driver->owner)) | |
668 | goto dev_unlock; | |
669 | ||
670 | drvdata = dev_get_drvdata(dev); | |
f58c91ce | 671 | /* Some subdev didn't probe successfully id drvdata is NULL */ |
7b43a6f3 SN |
672 | if (drvdata) { |
673 | switch (plat_entity) { | |
674 | case IDX_FIMC: | |
675 | ret = register_fimc_entity(fmd, drvdata); | |
676 | break; | |
677 | case IDX_FLITE: | |
678 | ret = register_fimc_lite_entity(fmd, drvdata); | |
ecd9acbf | 679 | break; |
7b43a6f3 SN |
680 | case IDX_CSIS: |
681 | ret = register_csis_entity(fmd, pdev, drvdata); | |
682 | break; | |
e781bbe3 SN |
683 | case IDX_IS_ISP: |
684 | ret = register_fimc_is_entity(fmd, drvdata); | |
685 | break; | |
7b43a6f3 SN |
686 | default: |
687 | ret = -ENODEV; | |
ecd9acbf SN |
688 | } |
689 | } | |
d3953223 | 690 | |
7b43a6f3 SN |
691 | module_put(dev->driver->owner); |
692 | dev_unlock: | |
693 | device_unlock(dev); | |
694 | if (ret == -EPROBE_DEFER) | |
695 | dev_info(&fmd->pdev->dev, "deferring %s device registration\n", | |
696 | dev_name(dev)); | |
697 | else if (ret < 0) | |
698 | dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n", | |
699 | dev_name(dev), ret); | |
700 | return ret; | |
701 | } | |
702 | ||
e2985a26 | 703 | /* Register FIMC, FIMC-LITE and CSIS media entities */ |
49b2f4c5 SN |
704 | static int fimc_md_register_platform_entities(struct fimc_md *fmd, |
705 | struct device_node *parent) | |
e2985a26 SN |
706 | { |
707 | struct device_node *node; | |
708 | int ret = 0; | |
709 | ||
710 | for_each_available_child_of_node(parent, node) { | |
711 | struct platform_device *pdev; | |
712 | int plat_entity = -1; | |
713 | ||
714 | pdev = of_find_device_by_node(node); | |
715 | if (!pdev) | |
716 | continue; | |
717 | ||
718 | /* If driver of any entity isn't ready try all again later. */ | |
2fc6e404 | 719 | if (of_node_name_eq(node, CSIS_OF_NODE_NAME)) |
e2985a26 | 720 | plat_entity = IDX_CSIS; |
2fc6e404 | 721 | else if (of_node_name_eq(node, FIMC_IS_OF_NODE_NAME)) |
e781bbe3 | 722 | plat_entity = IDX_IS_ISP; |
2fc6e404 | 723 | else if (of_node_name_eq(node, FIMC_LITE_OF_NODE_NAME)) |
e2985a26 | 724 | plat_entity = IDX_FLITE; |
2fc6e404 | 725 | else if (of_node_name_eq(node, FIMC_OF_NODE_NAME) && |
e2985a26 SN |
726 | !of_property_read_bool(node, "samsung,lcd-wb")) |
727 | plat_entity = IDX_FIMC; | |
728 | ||
729 | if (plat_entity >= 0) | |
730 | ret = fimc_md_register_platform_entity(fmd, pdev, | |
731 | plat_entity); | |
732 | put_device(&pdev->dev); | |
458a3952 AKC |
733 | if (ret < 0) { |
734 | of_node_put(node); | |
e2985a26 | 735 | break; |
458a3952 | 736 | } |
e2985a26 SN |
737 | } |
738 | ||
739 | return ret; | |
740 | } | |
e2985a26 | 741 | |
d3953223 SN |
742 | static void fimc_md_unregister_entities(struct fimc_md *fmd) |
743 | { | |
744 | int i; | |
745 | ||
746 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
403dfbec SN |
747 | struct fimc_dev *dev = fmd->fimc[i]; |
748 | if (dev == NULL) | |
d3953223 | 749 | continue; |
403dfbec SN |
750 | v4l2_device_unregister_subdev(&dev->vid_cap.subdev); |
751 | dev->vid_cap.ve.pipe = NULL; | |
d3953223 SN |
752 | fmd->fimc[i] = NULL; |
753 | } | |
4af81310 | 754 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { |
403dfbec SN |
755 | struct fimc_lite *dev = fmd->fimc_lite[i]; |
756 | if (dev == NULL) | |
4af81310 | 757 | continue; |
403dfbec SN |
758 | v4l2_device_unregister_subdev(&dev->subdev); |
759 | dev->ve.pipe = NULL; | |
4af81310 SN |
760 | fmd->fimc_lite[i] = NULL; |
761 | } | |
d3953223 SN |
762 | for (i = 0; i < CSIS_MAX_ENTITIES; i++) { |
763 | if (fmd->csis[i].sd == NULL) | |
764 | continue; | |
765 | v4l2_device_unregister_subdev(fmd->csis[i].sd); | |
766 | fmd->csis[i].sd = NULL; | |
767 | } | |
e41a35cb SN |
768 | |
769 | if (fmd->fimc_is) | |
770 | v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev); | |
771 | ||
7b43a6f3 | 772 | v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n"); |
d3953223 SN |
773 | } |
774 | ||
d3953223 SN |
775 | /** |
776 | * __fimc_md_create_fimc_links - create links to all FIMC entities | |
777 | * @fmd: fimc media device | |
778 | * @source: the source entity to create links to all fimc entities from | |
779 | * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null | |
780 | * @pad: the source entity pad index | |
d0da3c35 | 781 | * @link_mask: bitmask of the fimc devices for which link should be enabled |
d3953223 | 782 | */ |
4af81310 SN |
783 | static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd, |
784 | struct media_entity *source, | |
785 | struct v4l2_subdev *sensor, | |
d0da3c35 | 786 | int pad, int link_mask) |
d3953223 | 787 | { |
4c8f0629 | 788 | struct fimc_source_info *si = NULL; |
d3953223 | 789 | struct media_entity *sink; |
4af81310 | 790 | unsigned int flags = 0; |
f998bb7b | 791 | int i, ret = 0; |
d3953223 | 792 | |
f998bb7b SN |
793 | if (sensor) { |
794 | si = v4l2_get_subdev_hostdata(sensor); | |
795 | /* Skip direct FIMC links in the logical FIMC-IS sensor path */ | |
4c8f0629 | 796 | if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) |
f998bb7b SN |
797 | ret = 1; |
798 | } | |
799 | ||
800 | for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) { | |
d3953223 | 801 | if (!fmd->fimc[i]) |
4af81310 | 802 | continue; |
d3953223 SN |
803 | /* |
804 | * Some FIMC variants are not fitted with camera capture | |
805 | * interface. Skip creating a link from sensor for those. | |
806 | */ | |
4af81310 | 807 | if (!fmd->fimc[i]->variant->has_cam_if) |
d3953223 SN |
808 | continue; |
809 | ||
d0da3c35 | 810 | flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0; |
4af81310 | 811 | |
693f5c40 | 812 | sink = &fmd->fimc[i]->vid_cap.subdev.entity; |
8df00a15 | 813 | ret = media_create_pad_link(source, pad, sink, |
88fa8311 | 814 | FIMC_SD_PAD_SINK_CAM, flags); |
d3953223 SN |
815 | if (ret) |
816 | return ret; | |
817 | ||
237e0265 SN |
818 | /* Notify FIMC capture subdev entity */ |
819 | ret = media_entity_call(sink, link_setup, &sink->pads[0], | |
820 | &source->pads[pad], flags); | |
821 | if (ret) | |
822 | break; | |
823 | ||
542fb082 | 824 | v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n", |
d3953223 | 825 | source->name, flags ? '=' : '-', sink->name); |
d3953223 | 826 | } |
4af81310 SN |
827 | |
828 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { | |
829 | if (!fmd->fimc_lite[i]) | |
830 | continue; | |
831 | ||
4af81310 | 832 | sink = &fmd->fimc_lite[i]->subdev.entity; |
8df00a15 | 833 | ret = media_create_pad_link(source, pad, sink, |
f998bb7b | 834 | FLITE_SD_PAD_SINK, 0); |
4af81310 SN |
835 | if (ret) |
836 | return ret; | |
837 | ||
838 | /* Notify FIMC-LITE subdev entity */ | |
839 | ret = media_entity_call(sink, link_setup, &sink->pads[0], | |
f998bb7b | 840 | &source->pads[pad], 0); |
4af81310 SN |
841 | if (ret) |
842 | break; | |
843 | ||
f998bb7b SN |
844 | v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n", |
845 | source->name, sink->name); | |
4af81310 | 846 | } |
d3953223 SN |
847 | return 0; |
848 | } | |
849 | ||
4af81310 SN |
850 | /* Create links from FIMC-LITE source pads to other entities */ |
851 | static int __fimc_md_create_flite_source_links(struct fimc_md *fmd) | |
852 | { | |
853 | struct media_entity *source, *sink; | |
a26860bd | 854 | int i, ret = 0; |
4af81310 SN |
855 | |
856 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { | |
857 | struct fimc_lite *fimc = fmd->fimc_lite[i]; | |
f998bb7b | 858 | |
4af81310 SN |
859 | if (fimc == NULL) |
860 | continue; | |
f998bb7b | 861 | |
4af81310 | 862 | source = &fimc->subdev.entity; |
bc7584b0 | 863 | sink = &fimc->ve.vdev.entity; |
4af81310 | 864 | /* FIMC-LITE's subdev and video node */ |
8df00a15 | 865 | ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_DMA, |
f998bb7b SN |
866 | sink, 0, 0); |
867 | if (ret) | |
868 | break; | |
869 | /* Link from FIMC-LITE to IS-ISP subdev */ | |
870 | sink = &fmd->fimc_is->isp.subdev.entity; | |
8df00a15 | 871 | ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_ISP, |
f998bb7b | 872 | sink, 0, 0); |
4af81310 SN |
873 | if (ret) |
874 | break; | |
f998bb7b SN |
875 | } |
876 | ||
877 | return ret; | |
878 | } | |
879 | ||
880 | /* Create FIMC-IS links */ | |
881 | static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd) | |
882 | { | |
34947b8a | 883 | struct fimc_isp *isp = &fmd->fimc_is->isp; |
f998bb7b SN |
884 | struct media_entity *source, *sink; |
885 | int i, ret; | |
886 | ||
34947b8a | 887 | source = &isp->subdev.entity; |
f998bb7b SN |
888 | |
889 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
890 | if (fmd->fimc[i] == NULL) | |
891 | continue; | |
892 | ||
34947b8a | 893 | /* Link from FIMC-IS-ISP subdev to FIMC */ |
f998bb7b | 894 | sink = &fmd->fimc[i]->vid_cap.subdev.entity; |
8df00a15 | 895 | ret = media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_FIFO, |
f998bb7b SN |
896 | sink, FIMC_SD_PAD_SINK_FIFO, 0); |
897 | if (ret) | |
898 | return ret; | |
4af81310 SN |
899 | } |
900 | ||
34947b8a SN |
901 | /* Link from FIMC-IS-ISP subdev to fimc-is-isp.capture video node */ |
902 | sink = &isp->video_capture.ve.vdev.entity; | |
903 | ||
904 | /* Skip this link if the fimc-is-isp video node driver isn't built-in */ | |
905 | if (sink->num_pads == 0) | |
906 | return 0; | |
907 | ||
8df00a15 | 908 | return media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_DMA, |
34947b8a | 909 | sink, 0, 0); |
4af81310 SN |
910 | } |
911 | ||
d3953223 SN |
912 | /** |
913 | * fimc_md_create_links - create default links between registered entities | |
3b060ba0 | 914 | * @fmd: fimc media device |
d3953223 SN |
915 | * |
916 | * Parallel interface sensor entities are connected directly to FIMC capture | |
917 | * entities. The sensors using MIPI CSIS bus are connected through immutable | |
918 | * link with CSI receiver entity specified by mux_id. Any registered CSIS | |
919 | * entity has a link to each registered FIMC capture entity. Enabled links | |
920 | * are created by default between each subsequent registered sensor and | |
921 | * subsequent FIMC capture entity. The number of default active links is | |
922 | * determined by the number of available sensors or FIMC entities, | |
923 | * whichever is less. | |
924 | */ | |
925 | static int fimc_md_create_links(struct fimc_md *fmd) | |
926 | { | |
a8697ec8 | 927 | struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL }; |
d3953223 | 928 | struct v4l2_subdev *sensor, *csis; |
56bc911a | 929 | struct fimc_source_info *pdata; |
237e0265 | 930 | struct media_entity *source, *sink; |
d0da3c35 SN |
931 | int i, pad, fimc_id = 0, ret = 0; |
932 | u32 flags, link_mask = 0; | |
d3953223 SN |
933 | |
934 | for (i = 0; i < fmd->num_sensors; i++) { | |
935 | if (fmd->sensor[i].subdev == NULL) | |
936 | continue; | |
937 | ||
938 | sensor = fmd->sensor[i].subdev; | |
4c8f0629 SN |
939 | pdata = v4l2_get_subdev_hostdata(sensor); |
940 | if (!pdata) | |
d3953223 SN |
941 | continue; |
942 | ||
943 | source = NULL; | |
d3953223 | 944 | |
56bc911a SN |
945 | switch (pdata->sensor_bus_type) { |
946 | case FIMC_BUS_TYPE_MIPI_CSI2: | |
d3953223 SN |
947 | if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES, |
948 | "Wrong CSI channel id: %d\n", pdata->mux_id)) | |
949 | return -EINVAL; | |
950 | ||
951 | csis = fmd->csis[pdata->mux_id].sd; | |
952 | if (WARN(csis == NULL, | |
57425dc7 | 953 | "MIPI-CSI interface specified but s5p-csis module is not loaded!\n")) |
d12392ec | 954 | return -EINVAL; |
d3953223 | 955 | |
1c9f5bd7 | 956 | pad = sensor->entity.num_pads - 1; |
8df00a15 | 957 | ret = media_create_pad_link(&sensor->entity, pad, |
d3953223 SN |
958 | &csis->entity, CSIS_PAD_SINK, |
959 | MEDIA_LNK_FL_IMMUTABLE | | |
960 | MEDIA_LNK_FL_ENABLED); | |
961 | if (ret) | |
962 | return ret; | |
963 | ||
969e877c | 964 | v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n", |
d3953223 SN |
965 | sensor->entity.name, csis->entity.name); |
966 | ||
4af81310 | 967 | source = NULL; |
5d33ee92 | 968 | csi_sensors[pdata->mux_id] = sensor; |
d3953223 SN |
969 | break; |
970 | ||
56bc911a | 971 | case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656: |
d3953223 SN |
972 | source = &sensor->entity; |
973 | pad = 0; | |
974 | break; | |
975 | ||
976 | default: | |
977 | v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n", | |
56bc911a | 978 | pdata->sensor_bus_type); |
d3953223 SN |
979 | return -EINVAL; |
980 | } | |
981 | if (source == NULL) | |
982 | continue; | |
983 | ||
d0da3c35 | 984 | link_mask = 1 << fimc_id++; |
4af81310 | 985 | ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor, |
d0da3c35 | 986 | pad, link_mask); |
4af81310 SN |
987 | } |
988 | ||
a8697ec8 | 989 | for (i = 0; i < CSIS_MAX_ENTITIES; i++) { |
4af81310 SN |
990 | if (fmd->csis[i].sd == NULL) |
991 | continue; | |
f998bb7b | 992 | |
4af81310 SN |
993 | source = &fmd->csis[i].sd->entity; |
994 | pad = CSIS_PAD_SOURCE; | |
5d33ee92 | 995 | sensor = csi_sensors[i]; |
4af81310 | 996 | |
d0da3c35 | 997 | link_mask = 1 << fimc_id++; |
5d33ee92 | 998 | ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor, |
d0da3c35 | 999 | pad, link_mask); |
d3953223 | 1000 | } |
4af81310 | 1001 | |
237e0265 SN |
1002 | /* Create immutable links between each FIMC's subdev and video node */ |
1003 | flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED; | |
1004 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
1005 | if (!fmd->fimc[i]) | |
1006 | continue; | |
f998bb7b | 1007 | |
693f5c40 | 1008 | source = &fmd->fimc[i]->vid_cap.subdev.entity; |
bc7584b0 | 1009 | sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity; |
f998bb7b | 1010 | |
8df00a15 | 1011 | ret = media_create_pad_link(source, FIMC_SD_PAD_SOURCE, |
237e0265 SN |
1012 | sink, 0, flags); |
1013 | if (ret) | |
1014 | break; | |
1015 | } | |
1016 | ||
f998bb7b SN |
1017 | ret = __fimc_md_create_flite_source_links(fmd); |
1018 | if (ret < 0) | |
1019 | return ret; | |
1020 | ||
1021 | if (fmd->use_isp) | |
1022 | ret = __fimc_md_create_fimc_is_links(fmd); | |
1023 | ||
1024 | return ret; | |
d3953223 SN |
1025 | } |
1026 | ||
1027 | /* | |
056f4f30 | 1028 | * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management. |
d3953223 | 1029 | */ |
0e23cbbe SN |
1030 | static void fimc_md_put_clocks(struct fimc_md *fmd) |
1031 | { | |
1032 | int i = FIMC_MAX_CAMCLKS; | |
1033 | ||
1034 | while (--i >= 0) { | |
1035 | if (IS_ERR(fmd->camclk[i].clock)) | |
1036 | continue; | |
0e23cbbe SN |
1037 | clk_put(fmd->camclk[i].clock); |
1038 | fmd->camclk[i].clock = ERR_PTR(-EINVAL); | |
1039 | } | |
056f4f30 SN |
1040 | |
1041 | /* Writeback (PIXELASYNCMx) clocks */ | |
1042 | for (i = 0; i < FIMC_MAX_WBCLKS; i++) { | |
1043 | if (IS_ERR(fmd->wbclk[i])) | |
1044 | continue; | |
1045 | clk_put(fmd->wbclk[i]); | |
1046 | fmd->wbclk[i] = ERR_PTR(-EINVAL); | |
1047 | } | |
0e23cbbe SN |
1048 | } |
1049 | ||
d3953223 SN |
1050 | static int fimc_md_get_clocks(struct fimc_md *fmd) |
1051 | { | |
49b2f4c5 | 1052 | struct device *dev = &fmd->pdev->dev; |
d3953223 SN |
1053 | char clk_name[32]; |
1054 | struct clk *clock; | |
044c372a | 1055 | int i, ret = 0; |
0e23cbbe SN |
1056 | |
1057 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) | |
1058 | fmd->camclk[i].clock = ERR_PTR(-EINVAL); | |
1059 | ||
d3953223 SN |
1060 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) { |
1061 | snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i); | |
0e23cbbe SN |
1062 | clock = clk_get(dev, clk_name); |
1063 | ||
dc3ae328 | 1064 | if (IS_ERR(clock)) { |
49b2f4c5 | 1065 | dev_err(dev, "Failed to get clock: %s\n", clk_name); |
0e23cbbe SN |
1066 | ret = PTR_ERR(clock); |
1067 | break; | |
1068 | } | |
d3953223 SN |
1069 | fmd->camclk[i].clock = clock; |
1070 | } | |
0e23cbbe SN |
1071 | if (ret) |
1072 | fimc_md_put_clocks(fmd); | |
d3953223 | 1073 | |
056f4f30 SN |
1074 | if (!fmd->use_isp) |
1075 | return 0; | |
1076 | /* | |
1077 | * For now get only PIXELASYNCM1 clock (Writeback B/ISP), | |
1078 | * leave PIXELASYNCM0 out for the LCD Writeback driver. | |
1079 | */ | |
1080 | fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL); | |
1081 | ||
1082 | for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) { | |
1083 | snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i); | |
1084 | clock = clk_get(dev, clk_name); | |
1085 | if (IS_ERR(clock)) { | |
1086 | v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n", | |
1087 | clk_name); | |
1088 | ret = PTR_ERR(clock); | |
1089 | break; | |
1090 | } | |
1091 | fmd->wbclk[i] = clock; | |
1092 | } | |
1093 | if (ret) | |
1094 | fimc_md_put_clocks(fmd); | |
1095 | ||
0e23cbbe | 1096 | return ret; |
d3953223 SN |
1097 | } |
1098 | ||
d3775fa7 | 1099 | static int __fimc_md_modify_pipeline(struct media_entity *entity, bool enable) |
d3953223 | 1100 | { |
403dfbec | 1101 | struct exynos_video_entity *ve; |
d3775fa7 | 1102 | struct fimc_pipeline *p; |
403dfbec | 1103 | struct video_device *vdev; |
d3775fa7 | 1104 | int ret; |
d3953223 | 1105 | |
d3775fa7 SN |
1106 | vdev = media_entity_to_video_device(entity); |
1107 | if (vdev->entity.use_count == 0) | |
d3953223 SN |
1108 | return 0; |
1109 | ||
403dfbec | 1110 | ve = vdev_to_exynos_video_entity(vdev); |
d3775fa7 SN |
1111 | p = to_fimc_pipeline(ve->pipe); |
1112 | /* | |
1113 | * Nothing to do if we are disabling the pipeline, some link | |
1114 | * has been disconnected and p->subdevs array is cleared now. | |
1115 | */ | |
1116 | if (!enable && p->subdevs[IDX_SENSOR] == NULL) | |
1117 | return 0; | |
403dfbec | 1118 | |
d3775fa7 SN |
1119 | if (enable) |
1120 | ret = __fimc_pipeline_open(ve->pipe, entity, true); | |
1121 | else | |
1122 | ret = __fimc_pipeline_close(ve->pipe); | |
131b6c61 | 1123 | |
d3775fa7 SN |
1124 | if (ret == 0 && !enable) |
1125 | memset(p->subdevs, 0, sizeof(p->subdevs)); | |
1126 | ||
1127 | return ret; | |
1128 | } | |
1129 | ||
d10c9894 | 1130 | /* Locking: called with entity->graph_obj.mdev->graph_mutex mutex held. */ |
fd7e5309 | 1131 | static int __fimc_md_modify_pipelines(struct media_entity *entity, bool enable, |
20b85227 | 1132 | struct media_graph *graph) |
d3775fa7 SN |
1133 | { |
1134 | struct media_entity *entity_err = entity; | |
d3775fa7 SN |
1135 | int ret; |
1136 | ||
1137 | /* | |
1138 | * Walk current graph and call the pipeline open/close routine for each | |
1139 | * opened video node that belongs to the graph of entities connected | |
1140 | * through active links. This is needed as we cannot power on/off the | |
1141 | * subdevs in random order. | |
1142 | */ | |
20b85227 | 1143 | media_graph_walk_start(graph, entity); |
d3775fa7 | 1144 | |
20b85227 | 1145 | while ((entity = media_graph_walk_next(graph))) { |
45b46879 | 1146 | if (!is_media_entity_v4l2_video_device(entity)) |
d3775fa7 SN |
1147 | continue; |
1148 | ||
1149 | ret = __fimc_md_modify_pipeline(entity, enable); | |
1150 | ||
1151 | if (ret < 0) | |
1152 | goto err; | |
1153 | } | |
1154 | ||
1155 | return 0; | |
d3775fa7 | 1156 | |
fd7e5309 | 1157 | err: |
20b85227 | 1158 | media_graph_walk_start(graph, entity_err); |
fd7e5309 | 1159 | |
20b85227 | 1160 | while ((entity_err = media_graph_walk_next(graph))) { |
45b46879 | 1161 | if (!is_media_entity_v4l2_video_device(entity_err)) |
d3775fa7 SN |
1162 | continue; |
1163 | ||
1164 | __fimc_md_modify_pipeline(entity_err, !enable); | |
1165 | ||
1166 | if (entity_err == entity) | |
1167 | break; | |
1168 | } | |
1169 | ||
1170 | return ret; | |
1171 | } | |
1172 | ||
1173 | static int fimc_md_link_notify(struct media_link *link, unsigned int flags, | |
1174 | unsigned int notification) | |
1175 | { | |
20b85227 | 1176 | struct media_graph *graph = |
fd7e5309 SA |
1177 | &container_of(link->graph_obj.mdev, struct fimc_md, |
1178 | media_dev)->link_setup_graph; | |
d3775fa7 SN |
1179 | struct media_entity *sink = link->sink->entity; |
1180 | int ret = 0; | |
1181 | ||
1182 | /* Before link disconnection */ | |
1183 | if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) { | |
20b85227 | 1184 | ret = media_graph_walk_init(graph, |
fd7e5309 SA |
1185 | link->graph_obj.mdev); |
1186 | if (ret) | |
1187 | return ret; | |
d3775fa7 | 1188 | if (!(flags & MEDIA_LNK_FL_ENABLED)) |
fd7e5309 | 1189 | ret = __fimc_md_modify_pipelines(sink, false, graph); |
cdf58a6f | 1190 | #if 0 |
d3775fa7 | 1191 | else |
cdf58a6f MCC |
1192 | /* TODO: Link state change validation */ |
1193 | #endif | |
d3775fa7 | 1194 | /* After link activation */ |
fd7e5309 SA |
1195 | } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH) { |
1196 | if (link->flags & MEDIA_LNK_FL_ENABLED) | |
1197 | ret = __fimc_md_modify_pipelines(sink, true, graph); | |
20b85227 | 1198 | media_graph_walk_cleanup(graph); |
d3953223 | 1199 | } |
740ad921 | 1200 | |
d3775fa7 | 1201 | return ret ? -EPIPE : 0; |
d3953223 SN |
1202 | } |
1203 | ||
68429f50 LP |
1204 | static const struct media_device_ops fimc_md_ops = { |
1205 | .link_notify = fimc_md_link_notify, | |
1206 | }; | |
1207 | ||
d3953223 SN |
1208 | static ssize_t fimc_md_sysfs_show(struct device *dev, |
1209 | struct device_attribute *attr, char *buf) | |
1210 | { | |
24733943 | 1211 | struct fimc_md *fmd = dev_get_drvdata(dev); |
d3953223 SN |
1212 | |
1213 | if (fmd->user_subdev_api) | |
c0decac1 | 1214 | return strscpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE); |
d3953223 | 1215 | |
c0decac1 | 1216 | return strscpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE); |
d3953223 SN |
1217 | } |
1218 | ||
1219 | static ssize_t fimc_md_sysfs_store(struct device *dev, | |
1220 | struct device_attribute *attr, | |
1221 | const char *buf, size_t count) | |
1222 | { | |
24733943 | 1223 | struct fimc_md *fmd = dev_get_drvdata(dev); |
d3953223 SN |
1224 | bool subdev_api; |
1225 | int i; | |
1226 | ||
1227 | if (!strcmp(buf, "vid-dev\n")) | |
1228 | subdev_api = false; | |
1229 | else if (!strcmp(buf, "sub-dev\n")) | |
1230 | subdev_api = true; | |
1231 | else | |
1232 | return count; | |
1233 | ||
1234 | fmd->user_subdev_api = subdev_api; | |
1235 | for (i = 0; i < FIMC_MAX_DEVS; i++) | |
1236 | if (fmd->fimc[i]) | |
1237 | fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api; | |
1238 | return count; | |
1239 | } | |
1240 | /* | |
1241 | * This device attribute is to select video pipeline configuration method. | |
1242 | * There are following valid values: | |
1243 | * vid-dev - for V4L2 video node API only, subdevice will be configured | |
1244 | * by the host driver. | |
1245 | * sub-dev - for media controller API, subdevs must be configured in user | |
1246 | * space before starting streaming. | |
1247 | */ | |
1248 | static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO, | |
1249 | fimc_md_sysfs_show, fimc_md_sysfs_store); | |
1250 | ||
4163851f SN |
1251 | static int fimc_md_get_pinctrl(struct fimc_md *fmd) |
1252 | { | |
1253 | struct device *dev = &fmd->pdev->dev; | |
1254 | struct fimc_pinctrl *pctl = &fmd->pinctl; | |
1255 | ||
1256 | pctl->pinctrl = devm_pinctrl_get(dev); | |
1257 | if (IS_ERR(pctl->pinctrl)) | |
1258 | return PTR_ERR(pctl->pinctrl); | |
1259 | ||
1260 | pctl->state_default = pinctrl_lookup_state(pctl->pinctrl, | |
1261 | PINCTRL_STATE_DEFAULT); | |
1262 | if (IS_ERR(pctl->state_default)) | |
1263 | return PTR_ERR(pctl->state_default); | |
1264 | ||
1265 | pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl, | |
1266 | PINCTRL_STATE_IDLE); | |
1267 | return 0; | |
1268 | } | |
1269 | ||
d3f5e0c5 SN |
1270 | static int cam_clk_prepare(struct clk_hw *hw) |
1271 | { | |
1272 | struct cam_clk *camclk = to_cam_clk(hw); | |
1273 | int ret; | |
1274 | ||
1275 | if (camclk->fmd->pmf == NULL) | |
1276 | return -ENODEV; | |
1277 | ||
1278 | ret = pm_runtime_get_sync(camclk->fmd->pmf); | |
1279 | return ret < 0 ? ret : 0; | |
1280 | } | |
1281 | ||
1282 | static void cam_clk_unprepare(struct clk_hw *hw) | |
1283 | { | |
1284 | struct cam_clk *camclk = to_cam_clk(hw); | |
1285 | ||
1286 | if (camclk->fmd->pmf == NULL) | |
1287 | return; | |
1288 | ||
1289 | pm_runtime_put_sync(camclk->fmd->pmf); | |
1290 | } | |
1291 | ||
1292 | static const struct clk_ops cam_clk_ops = { | |
1293 | .prepare = cam_clk_prepare, | |
1294 | .unprepare = cam_clk_unprepare, | |
1295 | }; | |
1296 | ||
1297 | static void fimc_md_unregister_clk_provider(struct fimc_md *fmd) | |
1298 | { | |
1299 | struct cam_clk_provider *cp = &fmd->clk_provider; | |
1300 | unsigned int i; | |
1301 | ||
1302 | if (cp->of_node) | |
1303 | of_clk_del_provider(cp->of_node); | |
1304 | ||
1305 | for (i = 0; i < cp->num_clocks; i++) | |
1306 | clk_unregister(cp->clks[i]); | |
1307 | } | |
1308 | ||
1309 | static int fimc_md_register_clk_provider(struct fimc_md *fmd) | |
1310 | { | |
1311 | struct cam_clk_provider *cp = &fmd->clk_provider; | |
1312 | struct device *dev = &fmd->pdev->dev; | |
1313 | int i, ret; | |
1314 | ||
1315 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) { | |
1316 | struct cam_clk *camclk = &cp->camclk[i]; | |
1317 | struct clk_init_data init; | |
1318 | const char *p_name; | |
1319 | ||
1320 | ret = of_property_read_string_index(dev->of_node, | |
1321 | "clock-output-names", i, &init.name); | |
1322 | if (ret < 0) | |
1323 | break; | |
1324 | ||
1325 | p_name = __clk_get_name(fmd->camclk[i].clock); | |
1326 | ||
1327 | /* It's safe since clk_register() will duplicate the string. */ | |
1328 | init.parent_names = &p_name; | |
1329 | init.num_parents = 1; | |
1330 | init.ops = &cam_clk_ops; | |
1331 | init.flags = CLK_SET_RATE_PARENT; | |
1332 | camclk->hw.init = &init; | |
1333 | camclk->fmd = fmd; | |
1334 | ||
1335 | cp->clks[i] = clk_register(NULL, &camclk->hw); | |
1336 | if (IS_ERR(cp->clks[i])) { | |
1337 | dev_err(dev, "failed to register clock: %s (%ld)\n", | |
1338 | init.name, PTR_ERR(cp->clks[i])); | |
1339 | ret = PTR_ERR(cp->clks[i]); | |
1340 | goto err; | |
1341 | } | |
1342 | cp->num_clocks++; | |
1343 | } | |
1344 | ||
1345 | if (cp->num_clocks == 0) { | |
1346 | dev_warn(dev, "clk provider not registered\n"); | |
1347 | return 0; | |
1348 | } | |
1349 | ||
1350 | cp->clk_data.clks = cp->clks; | |
1351 | cp->clk_data.clk_num = cp->num_clocks; | |
1352 | cp->of_node = dev->of_node; | |
1353 | ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, | |
1354 | &cp->clk_data); | |
1355 | if (ret == 0) | |
1356 | return 0; | |
1357 | err: | |
1358 | fimc_md_unregister_clk_provider(fmd); | |
1359 | return ret; | |
1360 | } | |
d3f5e0c5 | 1361 | |
fa91f105 SN |
1362 | static int subdev_notifier_bound(struct v4l2_async_notifier *notifier, |
1363 | struct v4l2_subdev *subdev, | |
1364 | struct v4l2_async_subdev *asd) | |
1365 | { | |
1366 | struct fimc_md *fmd = notifier_to_fimc_md(notifier); | |
1367 | struct fimc_sensor_info *si = NULL; | |
1368 | int i; | |
1369 | ||
1370 | /* Find platform data for this sensor subdev */ | |
1371 | for (i = 0; i < ARRAY_SIZE(fmd->sensor); i++) | |
4e48afec | 1372 | if (fmd->sensor[i].asd.match.fwnode == |
859969b3 | 1373 | of_fwnode_handle(subdev->dev->of_node)) |
fa91f105 SN |
1374 | si = &fmd->sensor[i]; |
1375 | ||
1376 | if (si == NULL) | |
1377 | return -EINVAL; | |
1378 | ||
1379 | v4l2_set_subdev_hostdata(subdev, &si->pdata); | |
1380 | ||
1381 | if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) | |
1382 | subdev->grp_id = GRP_ID_FIMC_IS_SENSOR; | |
1383 | else | |
1384 | subdev->grp_id = GRP_ID_SENSOR; | |
1385 | ||
1386 | si->subdev = subdev; | |
1387 | ||
1388 | v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n", | |
1389 | subdev->name, fmd->num_sensors); | |
1390 | ||
1391 | fmd->num_sensors++; | |
1392 | ||
1393 | return 0; | |
1394 | } | |
1395 | ||
1396 | static int subdev_notifier_complete(struct v4l2_async_notifier *notifier) | |
1397 | { | |
1398 | struct fimc_md *fmd = notifier_to_fimc_md(notifier); | |
1399 | int ret; | |
1400 | ||
1401 | mutex_lock(&fmd->media_dev.graph_mutex); | |
1402 | ||
1403 | ret = fimc_md_create_links(fmd); | |
1404 | if (ret < 0) | |
1405 | goto unlock; | |
1406 | ||
1407 | ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev); | |
1408 | unlock: | |
1409 | mutex_unlock(&fmd->media_dev.graph_mutex); | |
9832e155 JMC |
1410 | if (ret < 0) |
1411 | return ret; | |
1412 | ||
1413 | return media_device_register(&fmd->media_dev); | |
fa91f105 SN |
1414 | } |
1415 | ||
b6ee3f0d LP |
1416 | static const struct v4l2_async_notifier_operations subdev_notifier_ops = { |
1417 | .bound = subdev_notifier_bound, | |
1418 | .complete = subdev_notifier_complete, | |
1419 | }; | |
1420 | ||
ecd9acbf | 1421 | static int fimc_md_probe(struct platform_device *pdev) |
d3953223 | 1422 | { |
e2985a26 | 1423 | struct device *dev = &pdev->dev; |
d3953223 SN |
1424 | struct v4l2_device *v4l2_dev; |
1425 | struct fimc_md *fmd; | |
1426 | int ret; | |
1427 | ||
e2985a26 | 1428 | fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL); |
d3953223 SN |
1429 | if (!fmd) |
1430 | return -ENOMEM; | |
1431 | ||
1432 | spin_lock_init(&fmd->slock); | |
403dfbec | 1433 | INIT_LIST_HEAD(&fmd->pipelines); |
49b2f4c5 | 1434 | fmd->pdev = pdev; |
d3953223 | 1435 | |
c0decac1 | 1436 | strscpy(fmd->media_dev.model, "SAMSUNG S5P FIMC", |
d3953223 | 1437 | sizeof(fmd->media_dev.model)); |
68429f50 | 1438 | fmd->media_dev.ops = &fimc_md_ops; |
e2985a26 | 1439 | fmd->media_dev.dev = dev; |
d3953223 SN |
1440 | |
1441 | v4l2_dev = &fmd->v4l2_dev; | |
1442 | v4l2_dev->mdev = &fmd->media_dev; | |
e1d72f4d | 1443 | v4l2_dev->notify = fimc_sensor_notify; |
c0decac1 | 1444 | strscpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name)); |
d3953223 | 1445 | |
e781bbe3 | 1446 | fmd->use_isp = fimc_md_is_isp_available(dev->of_node); |
49b2f4c5 | 1447 | fmd->user_subdev_api = true; |
e781bbe3 | 1448 | |
2e7508e4 MCC |
1449 | media_device_init(&fmd->media_dev); |
1450 | ||
e2985a26 | 1451 | ret = v4l2_device_register(dev, &fmd->v4l2_dev); |
d3953223 SN |
1452 | if (ret < 0) { |
1453 | v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret); | |
6d91a51a | 1454 | return ret; |
d3953223 | 1455 | } |
d3f5e0c5 | 1456 | |
d3953223 SN |
1457 | ret = fimc_md_get_clocks(fmd); |
1458 | if (ret) | |
fa91f105 | 1459 | goto err_md; |
d3953223 | 1460 | |
4163851f SN |
1461 | ret = fimc_md_get_pinctrl(fmd); |
1462 | if (ret < 0) { | |
1463 | if (ret != EPROBE_DEFER) | |
1464 | dev_err(dev, "Failed to get pinctrl: %d\n", ret); | |
fa91f105 | 1465 | goto err_clk; |
4163851f SN |
1466 | } |
1467 | ||
fa91f105 SN |
1468 | platform_set_drvdata(pdev, fmd); |
1469 | ||
d079f94c SL |
1470 | v4l2_async_notifier_init(&fmd->subdev_notifier); |
1471 | ||
49b2f4c5 | 1472 | ret = fimc_md_register_platform_entities(fmd, dev->of_node); |
243d4c02 | 1473 | if (ret) |
fa91f105 | 1474 | goto err_clk; |
d3953223 | 1475 | |
49b2f4c5 | 1476 | ret = fimc_md_register_sensor_entities(fmd); |
243d4c02 | 1477 | if (ret) |
49b2f4c5 | 1478 | goto err_m_ent; |
d3953223 SN |
1479 | |
1480 | ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode); | |
693f5c40 | 1481 | if (ret) |
d079f94c | 1482 | goto err_cleanup; |
fa91f105 SN |
1483 | /* |
1484 | * FIMC platform devices need to be registered before the sclk_cam | |
1485 | * clocks provider, as one of these devices needs to be activated | |
1486 | * to enable the clock. | |
1487 | */ | |
1488 | ret = fimc_md_register_clk_provider(fmd); | |
1489 | if (ret < 0) { | |
1490 | v4l2_err(v4l2_dev, "clock provider registration failed\n"); | |
1491 | goto err_attr; | |
1492 | } | |
1493 | ||
1494 | if (fmd->num_sensors > 0) { | |
b6ee3f0d | 1495 | fmd->subdev_notifier.ops = &subdev_notifier_ops; |
fa91f105 SN |
1496 | fmd->num_sensors = 0; |
1497 | ||
1498 | ret = v4l2_async_notifier_register(&fmd->v4l2_dev, | |
1499 | &fmd->subdev_notifier); | |
1500 | if (ret) | |
1501 | goto err_clk_p; | |
1502 | } | |
693f5c40 | 1503 | |
693f5c40 SN |
1504 | return 0; |
1505 | ||
fa91f105 SN |
1506 | err_clk_p: |
1507 | fimc_md_unregister_clk_provider(fmd); | |
1508 | err_attr: | |
1509 | device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode); | |
d079f94c SL |
1510 | err_cleanup: |
1511 | v4l2_async_notifier_cleanup(&fmd->subdev_notifier); | |
fa91f105 | 1512 | err_m_ent: |
d3953223 | 1513 | fimc_md_unregister_entities(fmd); |
d079f94c SL |
1514 | err_clk: |
1515 | fimc_md_put_clocks(fmd); | |
693f5c40 | 1516 | err_md: |
9832e155 | 1517 | media_device_cleanup(&fmd->media_dev); |
d3953223 | 1518 | v4l2_device_unregister(&fmd->v4l2_dev); |
d3953223 SN |
1519 | return ret; |
1520 | } | |
1521 | ||
4c62e976 | 1522 | static int fimc_md_remove(struct platform_device *pdev) |
d3953223 SN |
1523 | { |
1524 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1525 | ||
1526 | if (!fmd) | |
1527 | return 0; | |
b74bee15 | 1528 | |
d3f5e0c5 | 1529 | fimc_md_unregister_clk_provider(fmd); |
fa91f105 | 1530 | v4l2_async_notifier_unregister(&fmd->subdev_notifier); |
d079f94c | 1531 | v4l2_async_notifier_cleanup(&fmd->subdev_notifier); |
fa91f105 | 1532 | |
b74bee15 | 1533 | v4l2_device_unregister(&fmd->v4l2_dev); |
d3953223 SN |
1534 | device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode); |
1535 | fimc_md_unregister_entities(fmd); | |
403dfbec | 1536 | fimc_md_pipelines_free(fmd); |
d3953223 | 1537 | media_device_unregister(&fmd->media_dev); |
9832e155 | 1538 | media_device_cleanup(&fmd->media_dev); |
d3953223 | 1539 | fimc_md_put_clocks(fmd); |
fa91f105 | 1540 | |
d3953223 SN |
1541 | return 0; |
1542 | } | |
1543 | ||
c42639d8 | 1544 | static const struct platform_device_id fimc_driver_ids[] __always_unused = { |
e2985a26 SN |
1545 | { .name = "s5p-fimc-md" }, |
1546 | { }, | |
1547 | }; | |
1548 | MODULE_DEVICE_TABLE(platform, fimc_driver_ids); | |
1549 | ||
1550 | static const struct of_device_id fimc_md_of_match[] = { | |
1551 | { .compatible = "samsung,fimc" }, | |
1552 | { }, | |
1553 | }; | |
1554 | MODULE_DEVICE_TABLE(of, fimc_md_of_match); | |
1555 | ||
d3953223 SN |
1556 | static struct platform_driver fimc_md_driver = { |
1557 | .probe = fimc_md_probe, | |
4c62e976 | 1558 | .remove = fimc_md_remove, |
d3953223 | 1559 | .driver = { |
e2985a26 SN |
1560 | .of_match_table = of_match_ptr(fimc_md_of_match), |
1561 | .name = "s5p-fimc-md", | |
d3953223 SN |
1562 | } |
1563 | }; | |
1564 | ||
7e566be2 | 1565 | static int __init fimc_md_init(void) |
d3953223 SN |
1566 | { |
1567 | int ret; | |
ecd9acbf | 1568 | |
d3953223 SN |
1569 | request_module("s5p-csis"); |
1570 | ret = fimc_register_driver(); | |
1571 | if (ret) | |
1572 | return ret; | |
ecd9acbf | 1573 | |
d3953223 SN |
1574 | return platform_driver_register(&fimc_md_driver); |
1575 | } | |
7e566be2 SK |
1576 | |
1577 | static void __exit fimc_md_exit(void) | |
d3953223 SN |
1578 | { |
1579 | platform_driver_unregister(&fimc_md_driver); | |
1580 | fimc_unregister_driver(); | |
1581 | } | |
1582 | ||
1583 | module_init(fimc_md_init); | |
1584 | module_exit(fimc_md_exit); | |
1585 | ||
1586 | MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>"); | |
1587 | MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver"); | |
1588 | MODULE_LICENSE("GPL"); | |
1589 | MODULE_VERSION("2.0.1"); |