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Commit | Line | Data |
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d3953223 SN |
1 | /* |
2 | * S5P/EXYNOS4 SoC series camera host interface media device driver | |
3 | * | |
52917bcb SN |
4 | * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd. |
5 | * Author: Sylwester Nawrocki <s.nawrocki@samsung.com> | |
d3953223 SN |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published | |
9 | * by the Free Software Foundation, either version 2 of the License, | |
10 | * or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #include <linux/bug.h> | |
14 | #include <linux/device.h> | |
15 | #include <linux/errno.h> | |
16 | #include <linux/i2c.h> | |
17 | #include <linux/kernel.h> | |
18 | #include <linux/list.h> | |
19 | #include <linux/module.h> | |
e2985a26 SN |
20 | #include <linux/of.h> |
21 | #include <linux/of_platform.h> | |
22 | #include <linux/of_device.h> | |
23 | #include <linux/of_i2c.h> | |
d3953223 SN |
24 | #include <linux/platform_device.h> |
25 | #include <linux/pm_runtime.h> | |
26 | #include <linux/types.h> | |
27 | #include <linux/slab.h> | |
131b6c61 | 28 | #include <media/v4l2-ctrls.h> |
e2985a26 | 29 | #include <media/v4l2-of.h> |
d3953223 | 30 | #include <media/media-device.h> |
b9ee31e6 | 31 | #include <media/s5p_fimc.h> |
d3953223 | 32 | |
56fa1a6a | 33 | #include "media-dev.h" |
d3953223 | 34 | #include "fimc-core.h" |
e781bbe3 | 35 | #include "fimc-is.h" |
0f735f52 | 36 | #include "fimc-lite.h" |
d3953223 SN |
37 | #include "mipi-csis.h" |
38 | ||
39 | static int __fimc_md_set_camclk(struct fimc_md *fmd, | |
4c8f0629 | 40 | struct fimc_source_info *si, |
d3953223 | 41 | bool on); |
52917bcb SN |
42 | |
43 | /* Set up image sensor subdev -> FIMC capture node notifications. */ | |
44 | static void __setup_sensor_notification(struct fimc_md *fmd, | |
45 | struct v4l2_subdev *sensor, | |
46 | struct v4l2_subdev *fimc_sd) | |
47 | { | |
48 | struct fimc_source_info *src_inf; | |
49 | struct fimc_sensor_info *md_si; | |
50 | unsigned long flags; | |
51 | ||
52 | src_inf = v4l2_get_subdev_hostdata(sensor); | |
53 | if (!src_inf || WARN_ON(fmd == NULL)) | |
54 | return; | |
55 | ||
56 | md_si = source_to_sensor_info(src_inf); | |
57 | spin_lock_irqsave(&fmd->slock, flags); | |
58 | md_si->host = v4l2_get_subdevdata(fimc_sd); | |
59 | spin_unlock_irqrestore(&fmd->slock, flags); | |
60 | } | |
61 | ||
d3953223 SN |
62 | /** |
63 | * fimc_pipeline_prepare - update pipeline information with subdevice pointers | |
39bb6df6 | 64 | * @me: media entity terminating the pipeline |
d3953223 SN |
65 | * |
66 | * Caller holds the graph mutex. | |
67 | */ | |
b9ee31e6 | 68 | static void fimc_pipeline_prepare(struct fimc_pipeline *p, |
403dfbec | 69 | struct media_entity *me) |
d3953223 | 70 | { |
52917bcb | 71 | struct fimc_md *fmd = entity_to_fimc_mdev(me); |
d3953223 | 72 | struct v4l2_subdev *sd; |
52917bcb | 73 | struct v4l2_subdev *sensor = NULL; |
0f735f52 | 74 | int i; |
d3953223 | 75 | |
0f735f52 SN |
76 | for (i = 0; i < IDX_MAX; i++) |
77 | p->subdevs[i] = NULL; | |
d3953223 | 78 | |
0f735f52 | 79 | while (1) { |
39bb6df6 SN |
80 | struct media_pad *pad = NULL; |
81 | ||
82 | /* Find remote source pad */ | |
83 | for (i = 0; i < me->num_pads; i++) { | |
84 | struct media_pad *spad = &me->pads[i]; | |
85 | if (!(spad->flags & MEDIA_PAD_FL_SINK)) | |
86 | continue; | |
1bddf1b3 | 87 | pad = media_entity_remote_pad(spad); |
39bb6df6 SN |
88 | if (pad) |
89 | break; | |
90 | } | |
0f735f52 | 91 | |
0f735f52 SN |
92 | if (pad == NULL || |
93 | media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV) | |
94 | break; | |
0f735f52 SN |
95 | sd = media_entity_to_v4l2_subdev(pad->entity); |
96 | ||
97 | switch (sd->grp_id) { | |
588c87be | 98 | case GRP_ID_SENSOR: |
52917bcb SN |
99 | sensor = sd; |
100 | /* fall through */ | |
101 | case GRP_ID_FIMC_IS_SENSOR: | |
0f735f52 SN |
102 | p->subdevs[IDX_SENSOR] = sd; |
103 | break; | |
588c87be | 104 | case GRP_ID_CSIS: |
0f735f52 SN |
105 | p->subdevs[IDX_CSIS] = sd; |
106 | break; | |
588c87be | 107 | case GRP_ID_FLITE: |
4af81310 SN |
108 | p->subdevs[IDX_FLITE] = sd; |
109 | break; | |
588c87be | 110 | case GRP_ID_FIMC: |
52917bcb | 111 | p->subdevs[IDX_FIMC] = sd; |
0f735f52 | 112 | break; |
e781bbe3 SN |
113 | case GRP_ID_FIMC_IS: |
114 | p->subdevs[IDX_IS_ISP] = sd; | |
115 | break; | |
0f735f52 | 116 | default: |
e781bbe3 | 117 | break; |
0f735f52 | 118 | } |
39bb6df6 SN |
119 | me = &sd->entity; |
120 | if (me->num_pads == 1) | |
121 | break; | |
d3953223 | 122 | } |
52917bcb SN |
123 | |
124 | if (sensor && p->subdevs[IDX_FIMC]) | |
125 | __setup_sensor_notification(fmd, sensor, p->subdevs[IDX_FIMC]); | |
d3953223 SN |
126 | } |
127 | ||
128 | /** | |
129 | * __subdev_set_power - change power state of a single subdev | |
130 | * @sd: subdevice to change power state for | |
131 | * @on: 1 to enable power or 0 to disable | |
132 | * | |
133 | * Return result of s_power subdev operation or -ENXIO if sd argument | |
134 | * is NULL. Return 0 if the subdevice does not implement s_power. | |
135 | */ | |
136 | static int __subdev_set_power(struct v4l2_subdev *sd, int on) | |
137 | { | |
138 | int *use_count; | |
139 | int ret; | |
140 | ||
141 | if (sd == NULL) | |
142 | return -ENXIO; | |
143 | ||
144 | use_count = &sd->entity.use_count; | |
145 | if (on && (*use_count)++ > 0) | |
146 | return 0; | |
147 | else if (!on && (*use_count == 0 || --(*use_count) > 0)) | |
148 | return 0; | |
149 | ret = v4l2_subdev_call(sd, core, s_power, on); | |
150 | ||
151 | return ret != -ENOIOCTLCMD ? ret : 0; | |
152 | } | |
153 | ||
154 | /** | |
155 | * fimc_pipeline_s_power - change power state of all pipeline subdevs | |
156 | * @fimc: fimc device terminating the pipeline | |
0f735f52 | 157 | * @state: true to power on, false to power off |
d3953223 | 158 | * |
0f735f52 | 159 | * Needs to be called with the graph mutex held. |
d3953223 | 160 | */ |
f8bca4f5 | 161 | static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on) |
d3953223 | 162 | { |
f8bca4f5 SN |
163 | static const u8 seq[2][IDX_MAX - 1] = { |
164 | { IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE }, | |
165 | { IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP }, | |
166 | }; | |
167 | int i, ret = 0; | |
d3953223 | 168 | |
0f735f52 | 169 | if (p->subdevs[IDX_SENSOR] == NULL) |
d3953223 SN |
170 | return -ENXIO; |
171 | ||
f8bca4f5 SN |
172 | for (i = 0; i < IDX_MAX - 1; i++) { |
173 | unsigned int idx = seq[on][i]; | |
174 | ||
175 | ret = __subdev_set_power(p->subdevs[idx], on); | |
176 | ||
0f735f52 | 177 | |
0f735f52 | 178 | if (ret < 0 && ret != -ENXIO) |
f8bca4f5 | 179 | goto error; |
d3953223 | 180 | } |
0f735f52 | 181 | return 0; |
f8bca4f5 SN |
182 | error: |
183 | for (; i >= 0; i--) { | |
184 | unsigned int idx = seq[on][i]; | |
185 | __subdev_set_power(p->subdevs[idx], !on); | |
186 | } | |
187 | return ret; | |
d3953223 SN |
188 | } |
189 | ||
190 | /** | |
b9ee31e6 SN |
191 | * __fimc_pipeline_open - update the pipeline information, enable power |
192 | * of all pipeline subdevs and the sensor clock | |
d3953223 | 193 | * @me: media entity to start graph walk with |
056f4f30 | 194 | * @prepare: true to walk the current pipeline and acquire all subdevs |
d3953223 | 195 | * |
740ad921 | 196 | * Called with the graph mutex held. |
d3953223 | 197 | */ |
403dfbec | 198 | static int __fimc_pipeline_open(struct exynos_media_pipeline *ep, |
056f4f30 | 199 | struct media_entity *me, bool prepare) |
d3953223 | 200 | { |
056f4f30 | 201 | struct fimc_md *fmd = entity_to_fimc_mdev(me); |
403dfbec | 202 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
056f4f30 | 203 | struct v4l2_subdev *sd; |
d3953223 SN |
204 | int ret; |
205 | ||
056f4f30 SN |
206 | if (WARN_ON(p == NULL || me == NULL)) |
207 | return -EINVAL; | |
208 | ||
209 | if (prepare) | |
0f735f52 SN |
210 | fimc_pipeline_prepare(p, me); |
211 | ||
056f4f30 SN |
212 | sd = p->subdevs[IDX_SENSOR]; |
213 | if (sd == NULL) | |
d3953223 | 214 | return -EINVAL; |
0f735f52 | 215 | |
056f4f30 SN |
216 | /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */ |
217 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) { | |
218 | ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]); | |
219 | if (ret < 0) | |
220 | return ret; | |
221 | } | |
222 | ret = fimc_md_set_camclk(sd, true); | |
223 | if (ret < 0) | |
224 | goto err_wbclk; | |
225 | ||
226 | ret = fimc_pipeline_s_power(p, 1); | |
227 | if (!ret) | |
228 | return 0; | |
0f735f52 | 229 | |
056f4f30 SN |
230 | fimc_md_set_camclk(sd, false); |
231 | ||
232 | err_wbclk: | |
233 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) | |
234 | clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); | |
235 | ||
236 | return ret; | |
d3953223 SN |
237 | } |
238 | ||
d3953223 | 239 | /** |
b9ee31e6 | 240 | * __fimc_pipeline_close - disable the sensor clock and pipeline power |
d3953223 SN |
241 | * @fimc: fimc device terminating the pipeline |
242 | * | |
740ad921 | 243 | * Disable power of all subdevs and turn the external sensor clock off. |
d3953223 | 244 | */ |
403dfbec | 245 | static int __fimc_pipeline_close(struct exynos_media_pipeline *ep) |
d3953223 | 246 | { |
403dfbec | 247 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
056f4f30 SN |
248 | struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL; |
249 | struct fimc_md *fmd; | |
36da6fcd | 250 | int ret; |
740ad921 | 251 | |
36da6fcd SN |
252 | if (sd == NULL) { |
253 | pr_warn("%s(): No sensor subdev\n", __func__); | |
254 | return 0; | |
d3953223 | 255 | } |
056f4f30 | 256 | |
36da6fcd SN |
257 | ret = fimc_pipeline_s_power(p, 0); |
258 | fimc_md_set_camclk(sd, false); | |
259 | ||
056f4f30 SN |
260 | fmd = entity_to_fimc_mdev(&sd->entity); |
261 | ||
262 | /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */ | |
263 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) | |
264 | clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); | |
265 | ||
d3953223 SN |
266 | return ret == -ENXIO ? 0 : ret; |
267 | } | |
268 | ||
d3953223 | 269 | /** |
8d274e7c | 270 | * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs |
0f735f52 | 271 | * @pipeline: video pipeline structure |
8d274e7c | 272 | * @on: passed as the s_stream() callback argument |
d3953223 | 273 | */ |
403dfbec | 274 | static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on) |
d3953223 | 275 | { |
8d274e7c SN |
276 | static const u8 seq[2][IDX_MAX] = { |
277 | { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE }, | |
278 | { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP }, | |
279 | }; | |
403dfbec | 280 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
8d274e7c | 281 | int i, ret = 0; |
d3953223 | 282 | |
0f735f52 | 283 | if (p->subdevs[IDX_SENSOR] == NULL) |
d3953223 SN |
284 | return -ENODEV; |
285 | ||
0f735f52 | 286 | for (i = 0; i < IDX_MAX; i++) { |
8d274e7c | 287 | unsigned int idx = seq[on][i]; |
0f735f52 SN |
288 | |
289 | ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on); | |
290 | ||
291 | if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) | |
8d274e7c | 292 | goto error; |
0f735f52 | 293 | } |
0f735f52 | 294 | return 0; |
8d274e7c SN |
295 | error: |
296 | for (; i >= 0; i--) { | |
297 | unsigned int idx = seq[on][i]; | |
298 | v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on); | |
299 | } | |
300 | return ret; | |
d3953223 | 301 | } |
b9ee31e6 SN |
302 | |
303 | /* Media pipeline operations for the FIMC/FIMC-LITE video device driver */ | |
403dfbec | 304 | static const struct exynos_media_pipeline_ops fimc_pipeline_ops = { |
740ad921 SN |
305 | .open = __fimc_pipeline_open, |
306 | .close = __fimc_pipeline_close, | |
307 | .set_stream = __fimc_pipeline_s_stream, | |
b9ee31e6 | 308 | }; |
d3953223 | 309 | |
403dfbec SN |
310 | static struct exynos_media_pipeline *fimc_md_pipeline_create( |
311 | struct fimc_md *fmd) | |
312 | { | |
313 | struct fimc_pipeline *p; | |
314 | ||
315 | p = kzalloc(sizeof(*p), GFP_KERNEL); | |
316 | if (!p) | |
317 | return NULL; | |
318 | ||
319 | list_add_tail(&p->list, &fmd->pipelines); | |
320 | ||
321 | p->ep.ops = &fimc_pipeline_ops; | |
322 | return &p->ep; | |
323 | } | |
324 | ||
325 | static void fimc_md_pipelines_free(struct fimc_md *fmd) | |
326 | { | |
327 | while (!list_empty(&fmd->pipelines)) { | |
328 | struct fimc_pipeline *p; | |
329 | ||
330 | p = list_entry(fmd->pipelines.next, typeof(*p), list); | |
331 | list_del(&p->list); | |
332 | kfree(p); | |
333 | } | |
334 | } | |
335 | ||
d3953223 SN |
336 | /* |
337 | * Sensor subdevice helper functions | |
338 | */ | |
339 | static struct v4l2_subdev *fimc_md_register_sensor(struct fimc_md *fmd, | |
4c8f0629 | 340 | struct fimc_source_info *si) |
d3953223 SN |
341 | { |
342 | struct i2c_adapter *adapter; | |
343 | struct v4l2_subdev *sd = NULL; | |
344 | ||
4c8f0629 | 345 | if (!si || !fmd) |
d3953223 | 346 | return NULL; |
88fa8311 SN |
347 | /* |
348 | * If FIMC bus type is not Writeback FIFO assume it is same | |
349 | * as sensor_bus_type. | |
350 | */ | |
4c8f0629 | 351 | si->fimc_bus_type = si->sensor_bus_type; |
d3953223 | 352 | |
4c8f0629 | 353 | adapter = i2c_get_adapter(si->i2c_bus_num); |
ecd9acbf SN |
354 | if (!adapter) { |
355 | v4l2_warn(&fmd->v4l2_dev, | |
356 | "Failed to get I2C adapter %d, deferring probe\n", | |
4c8f0629 | 357 | si->i2c_bus_num); |
ecd9acbf SN |
358 | return ERR_PTR(-EPROBE_DEFER); |
359 | } | |
d3953223 | 360 | sd = v4l2_i2c_new_subdev_board(&fmd->v4l2_dev, adapter, |
4c8f0629 | 361 | si->board_info, NULL); |
d3953223 | 362 | if (IS_ERR_OR_NULL(sd)) { |
7acde02a | 363 | i2c_put_adapter(adapter); |
ecd9acbf SN |
364 | v4l2_warn(&fmd->v4l2_dev, |
365 | "Failed to acquire subdev %s, deferring probe\n", | |
4c8f0629 | 366 | si->board_info->type); |
ecd9acbf | 367 | return ERR_PTR(-EPROBE_DEFER); |
d3953223 | 368 | } |
4c8f0629 | 369 | v4l2_set_subdev_hostdata(sd, si); |
588c87be | 370 | sd->grp_id = GRP_ID_SENSOR; |
d3953223 SN |
371 | |
372 | v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice %s\n", | |
2b13f7d4 | 373 | sd->name); |
d3953223 SN |
374 | return sd; |
375 | } | |
376 | ||
377 | static void fimc_md_unregister_sensor(struct v4l2_subdev *sd) | |
378 | { | |
379 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
7acde02a | 380 | struct i2c_adapter *adapter; |
d3953223 SN |
381 | |
382 | if (!client) | |
383 | return; | |
e781bbe3 | 384 | |
d3953223 | 385 | v4l2_device_unregister_subdev(sd); |
2b13f7d4 SN |
386 | |
387 | if (!client->dev.of_node) { | |
388 | adapter = client->adapter; | |
389 | i2c_unregister_device(client); | |
390 | if (adapter) | |
391 | i2c_put_adapter(adapter); | |
392 | } | |
d3953223 SN |
393 | } |
394 | ||
e2985a26 | 395 | #ifdef CONFIG_OF |
2b13f7d4 SN |
396 | /* Register I2C client subdev associated with @node. */ |
397 | static int fimc_md_of_add_sensor(struct fimc_md *fmd, | |
398 | struct device_node *node, int index) | |
399 | { | |
400 | struct fimc_sensor_info *si; | |
401 | struct i2c_client *client; | |
402 | struct v4l2_subdev *sd; | |
403 | int ret; | |
404 | ||
405 | if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor))) | |
406 | return -EINVAL; | |
407 | si = &fmd->sensor[index]; | |
408 | ||
409 | client = of_find_i2c_device_by_node(node); | |
410 | if (!client) | |
411 | return -EPROBE_DEFER; | |
412 | ||
413 | device_lock(&client->dev); | |
414 | ||
415 | if (!client->driver || | |
416 | !try_module_get(client->driver->driver.owner)) { | |
417 | ret = -EPROBE_DEFER; | |
418 | v4l2_info(&fmd->v4l2_dev, "No driver found for %s\n", | |
419 | node->full_name); | |
420 | goto dev_put; | |
421 | } | |
422 | ||
423 | /* Enable sensor's master clock */ | |
4c8f0629 | 424 | ret = __fimc_md_set_camclk(fmd, &si->pdata, true); |
2b13f7d4 SN |
425 | if (ret < 0) |
426 | goto mod_put; | |
427 | sd = i2c_get_clientdata(client); | |
428 | ||
429 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); | |
4c8f0629 | 430 | __fimc_md_set_camclk(fmd, &si->pdata, false); |
2b13f7d4 SN |
431 | if (ret < 0) |
432 | goto mod_put; | |
433 | ||
4c8f0629 | 434 | v4l2_set_subdev_hostdata(sd, &si->pdata); |
e781bbe3 SN |
435 | if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) |
436 | sd->grp_id = GRP_ID_FIMC_IS_SENSOR; | |
437 | else | |
438 | sd->grp_id = GRP_ID_SENSOR; | |
439 | ||
2b13f7d4 SN |
440 | si->subdev = sd; |
441 | v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n", | |
442 | sd->name, fmd->num_sensors); | |
443 | fmd->num_sensors++; | |
444 | ||
445 | mod_put: | |
446 | module_put(client->driver->driver.owner); | |
447 | dev_put: | |
448 | device_unlock(&client->dev); | |
449 | put_device(&client->dev); | |
450 | return ret; | |
451 | } | |
452 | ||
453 | /* Parse port node and register as a sub-device any sensor specified there. */ | |
454 | static int fimc_md_parse_port_node(struct fimc_md *fmd, | |
455 | struct device_node *port, | |
456 | unsigned int index) | |
457 | { | |
458 | struct device_node *rem, *ep, *np; | |
459 | struct fimc_source_info *pd; | |
460 | struct v4l2_of_endpoint endpoint; | |
461 | int ret; | |
462 | u32 val; | |
463 | ||
464 | pd = &fmd->sensor[index].pdata; | |
465 | ||
466 | /* Assume here a port node can have only one endpoint node. */ | |
467 | ep = of_get_next_child(port, NULL); | |
468 | if (!ep) | |
469 | return 0; | |
470 | ||
471 | v4l2_of_parse_endpoint(ep, &endpoint); | |
472 | if (WARN_ON(endpoint.port == 0) || index >= FIMC_MAX_SENSORS) | |
473 | return -EINVAL; | |
474 | ||
475 | pd->mux_id = (endpoint.port - 1) & 0x1; | |
476 | ||
477 | rem = v4l2_of_get_remote_port_parent(ep); | |
478 | of_node_put(ep); | |
479 | if (rem == NULL) { | |
480 | v4l2_info(&fmd->v4l2_dev, "Remote device at %s not found\n", | |
481 | ep->full_name); | |
482 | return 0; | |
483 | } | |
484 | if (!of_property_read_u32(rem, "samsung,camclk-out", &val)) | |
485 | pd->clk_id = val; | |
486 | ||
487 | if (!of_property_read_u32(rem, "clock-frequency", &val)) | |
488 | pd->clk_frequency = val; | |
489 | ||
490 | if (pd->clk_frequency == 0) { | |
491 | v4l2_err(&fmd->v4l2_dev, "Wrong clock frequency at node %s\n", | |
492 | rem->full_name); | |
493 | of_node_put(rem); | |
494 | return -EINVAL; | |
495 | } | |
496 | ||
497 | if (fimc_input_is_parallel(endpoint.port)) { | |
498 | if (endpoint.bus_type == V4L2_MBUS_PARALLEL) | |
499 | pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601; | |
500 | else | |
501 | pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656; | |
502 | pd->flags = endpoint.bus.parallel.flags; | |
503 | } else if (fimc_input_is_mipi_csi(endpoint.port)) { | |
504 | /* | |
505 | * MIPI CSI-2: only input mux selection and | |
506 | * the sensor's clock frequency is needed. | |
507 | */ | |
508 | pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2; | |
509 | } else { | |
510 | v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %s\n", | |
511 | endpoint.port, rem->full_name); | |
512 | } | |
513 | /* | |
514 | * For FIMC-IS handled sensors, that are placed under i2c-isp device | |
515 | * node, FIMC is connected to the FIMC-IS through its ISP Writeback | |
516 | * input. Sensors are attached to the FIMC-LITE hostdata interface | |
517 | * directly or through MIPI-CSIS, depending on the external media bus | |
518 | * used. This needs to be handled in a more reliable way, not by just | |
519 | * checking parent's node name. | |
520 | */ | |
521 | np = of_get_parent(rem); | |
522 | ||
523 | if (np && !of_node_cmp(np->name, "i2c-isp")) | |
524 | pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK; | |
525 | else | |
526 | pd->fimc_bus_type = pd->sensor_bus_type; | |
527 | ||
528 | ret = fimc_md_of_add_sensor(fmd, rem, index); | |
529 | of_node_put(rem); | |
530 | ||
531 | return ret; | |
532 | } | |
533 | ||
534 | /* Register all SoC external sub-devices */ | |
535 | static int fimc_md_of_sensors_register(struct fimc_md *fmd, | |
536 | struct device_node *np) | |
537 | { | |
538 | struct device_node *parent = fmd->pdev->dev.of_node; | |
539 | struct device_node *node, *ports; | |
540 | int index = 0; | |
541 | int ret; | |
542 | ||
543 | /* Attach sensors linked to MIPI CSI-2 receivers */ | |
544 | for_each_available_child_of_node(parent, node) { | |
545 | struct device_node *port; | |
546 | ||
547 | if (of_node_cmp(node->name, "csis")) | |
548 | continue; | |
549 | /* The csis node can have only port subnode. */ | |
550 | port = of_get_next_child(node, NULL); | |
551 | if (!port) | |
552 | continue; | |
553 | ||
554 | ret = fimc_md_parse_port_node(fmd, port, index); | |
555 | if (ret < 0) | |
556 | return ret; | |
557 | index++; | |
558 | } | |
559 | ||
560 | /* Attach sensors listed in the parallel-ports node */ | |
561 | ports = of_get_child_by_name(parent, "parallel-ports"); | |
562 | if (!ports) | |
563 | return 0; | |
564 | ||
565 | for_each_child_of_node(ports, node) { | |
566 | ret = fimc_md_parse_port_node(fmd, node, index); | |
567 | if (ret < 0) | |
568 | break; | |
569 | index++; | |
570 | } | |
571 | ||
572 | return 0; | |
573 | } | |
574 | ||
e2985a26 SN |
575 | static int __of_get_csis_id(struct device_node *np) |
576 | { | |
577 | u32 reg = 0; | |
578 | ||
579 | np = of_get_child_by_name(np, "port"); | |
580 | if (!np) | |
581 | return -EINVAL; | |
582 | of_property_read_u32(np, "reg", ®); | |
583 | return reg - FIMC_INPUT_MIPI_CSI2_0; | |
584 | } | |
585 | #else | |
2b13f7d4 | 586 | #define fimc_md_of_sensors_register(fmd, np) (-ENOSYS) |
e2985a26 SN |
587 | #define __of_get_csis_id(np) (-ENOSYS) |
588 | #endif | |
589 | ||
d3953223 SN |
590 | static int fimc_md_register_sensor_entities(struct fimc_md *fmd) |
591 | { | |
592 | struct s5p_platform_fimc *pdata = fmd->pdev->dev.platform_data; | |
2b13f7d4 | 593 | struct device_node *of_node = fmd->pdev->dev.of_node; |
2b13f7d4 SN |
594 | int num_clients = 0; |
595 | int ret, i; | |
d3953223 SN |
596 | |
597 | /* | |
598 | * Runtime resume one of the FIMC entities to make sure | |
599 | * the sclk_cam clocks are not globally disabled. | |
600 | */ | |
3e20c345 | 601 | if (!fmd->pmf) |
d3953223 | 602 | return -ENXIO; |
2b13f7d4 | 603 | |
3e20c345 | 604 | ret = pm_runtime_get_sync(fmd->pmf); |
d3953223 SN |
605 | if (ret < 0) |
606 | return ret; | |
607 | ||
2b13f7d4 SN |
608 | if (of_node) { |
609 | fmd->num_sensors = 0; | |
610 | ret = fimc_md_of_sensors_register(fmd, of_node); | |
611 | } else if (pdata) { | |
612 | WARN_ON(pdata->num_clients > ARRAY_SIZE(fmd->sensor)); | |
613 | num_clients = min_t(u32, pdata->num_clients, | |
614 | ARRAY_SIZE(fmd->sensor)); | |
615 | fmd->num_sensors = num_clients; | |
d3953223 | 616 | |
2b13f7d4 | 617 | for (i = 0; i < num_clients; i++) { |
4c8f0629 | 618 | struct fimc_sensor_info *si = &fmd->sensor[i]; |
2b13f7d4 | 619 | struct v4l2_subdev *sd; |
ecd9acbf | 620 | |
4c8f0629 SN |
621 | si->pdata = pdata->source_info[i]; |
622 | ret = __fimc_md_set_camclk(fmd, &si->pdata, true); | |
2b13f7d4 SN |
623 | if (ret) |
624 | break; | |
4c8f0629 SN |
625 | sd = fimc_md_register_sensor(fmd, &si->pdata); |
626 | ret = __fimc_md_set_camclk(fmd, &si->pdata, false); | |
2b13f7d4 SN |
627 | |
628 | if (IS_ERR(sd)) { | |
4c8f0629 | 629 | si->subdev = NULL; |
2b13f7d4 SN |
630 | ret = PTR_ERR(sd); |
631 | break; | |
632 | } | |
4c8f0629 | 633 | si->subdev = sd; |
2b13f7d4 SN |
634 | if (ret) |
635 | break; | |
ecd9acbf | 636 | } |
d3953223 | 637 | } |
2b13f7d4 | 638 | |
3e20c345 | 639 | pm_runtime_put(fmd->pmf); |
d3953223 SN |
640 | return ret; |
641 | } | |
642 | ||
643 | /* | |
7b43a6f3 | 644 | * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration. |
d3953223 | 645 | */ |
7b43a6f3 SN |
646 | |
647 | static int register_fimc_lite_entity(struct fimc_md *fmd, | |
648 | struct fimc_lite *fimc_lite) | |
d3953223 | 649 | { |
8163ec0b | 650 | struct v4l2_subdev *sd; |
403dfbec | 651 | struct exynos_media_pipeline *ep; |
afd7348c | 652 | int ret; |
4af81310 | 653 | |
7b43a6f3 SN |
654 | if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS || |
655 | fmd->fimc_lite[fimc_lite->index])) | |
656 | return -EBUSY; | |
d3953223 | 657 | |
7b43a6f3 SN |
658 | sd = &fimc_lite->subdev; |
659 | sd->grp_id = GRP_ID_FLITE; | |
403dfbec SN |
660 | |
661 | ep = fimc_md_pipeline_create(fmd); | |
662 | if (!ep) | |
663 | return -ENOMEM; | |
664 | ||
665 | v4l2_set_subdev_hostdata(sd, ep); | |
693f5c40 SN |
666 | |
667 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); | |
7b43a6f3 SN |
668 | if (!ret) |
669 | fmd->fimc_lite[fimc_lite->index] = fimc_lite; | |
670 | else | |
671 | v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n", | |
672 | fimc_lite->index); | |
673 | return ret; | |
d3953223 SN |
674 | } |
675 | ||
7b43a6f3 | 676 | static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc) |
4af81310 | 677 | { |
7b43a6f3 | 678 | struct v4l2_subdev *sd; |
403dfbec | 679 | struct exynos_media_pipeline *ep; |
4af81310 SN |
680 | int ret; |
681 | ||
7b43a6f3 SN |
682 | if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id])) |
683 | return -EBUSY; | |
4af81310 | 684 | |
7b43a6f3 SN |
685 | sd = &fimc->vid_cap.subdev; |
686 | sd->grp_id = GRP_ID_FIMC; | |
403dfbec SN |
687 | |
688 | ep = fimc_md_pipeline_create(fmd); | |
689 | if (!ep) | |
690 | return -ENOMEM; | |
691 | ||
692 | v4l2_set_subdev_hostdata(sd, ep); | |
4af81310 | 693 | |
7b43a6f3 SN |
694 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
695 | if (!ret) { | |
3e20c345 SN |
696 | if (!fmd->pmf && fimc->pdev) |
697 | fmd->pmf = &fimc->pdev->dev; | |
7b43a6f3 SN |
698 | fmd->fimc[fimc->id] = fimc; |
699 | fimc->vid_cap.user_subdev_api = fmd->user_subdev_api; | |
700 | } else { | |
701 | v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n", | |
702 | fimc->id, ret); | |
4af81310 | 703 | } |
7b43a6f3 | 704 | return ret; |
4af81310 SN |
705 | } |
706 | ||
7b43a6f3 SN |
707 | static int register_csis_entity(struct fimc_md *fmd, |
708 | struct platform_device *pdev, | |
709 | struct v4l2_subdev *sd) | |
d3953223 | 710 | { |
7b43a6f3 | 711 | struct device_node *node = pdev->dev.of_node; |
d3953223 SN |
712 | int id, ret; |
713 | ||
e2985a26 | 714 | id = node ? __of_get_csis_id(node) : max(0, pdev->id); |
7b43a6f3 | 715 | |
e2985a26 SN |
716 | if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES)) |
717 | return -ENOENT; | |
7b43a6f3 | 718 | |
e2985a26 SN |
719 | if (WARN_ON(fmd->csis[id].sd)) |
720 | return -EBUSY; | |
d3953223 | 721 | |
588c87be | 722 | sd->grp_id = GRP_ID_CSIS; |
d3953223 | 723 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
afd7348c SN |
724 | if (!ret) |
725 | fmd->csis[id].sd = sd; | |
726 | else | |
d3953223 | 727 | v4l2_err(&fmd->v4l2_dev, |
7b43a6f3 | 728 | "Failed to register MIPI-CSIS.%d (%d)\n", id, ret); |
d3953223 SN |
729 | return ret; |
730 | } | |
731 | ||
e781bbe3 SN |
732 | static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is) |
733 | { | |
734 | struct v4l2_subdev *sd = &is->isp.subdev; | |
735 | int ret; | |
736 | ||
737 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); | |
738 | if (ret) { | |
739 | v4l2_err(&fmd->v4l2_dev, | |
740 | "Failed to register FIMC-ISP (%d)\n", ret); | |
741 | return ret; | |
742 | } | |
743 | ||
744 | fmd->fimc_is = is; | |
745 | return 0; | |
746 | } | |
747 | ||
7b43a6f3 SN |
748 | static int fimc_md_register_platform_entity(struct fimc_md *fmd, |
749 | struct platform_device *pdev, | |
750 | int plat_entity) | |
d3953223 | 751 | { |
7b43a6f3 SN |
752 | struct device *dev = &pdev->dev; |
753 | int ret = -EPROBE_DEFER; | |
754 | void *drvdata; | |
755 | ||
756 | /* Lock to ensure dev->driver won't change. */ | |
757 | device_lock(dev); | |
758 | ||
759 | if (!dev->driver || !try_module_get(dev->driver->owner)) | |
760 | goto dev_unlock; | |
761 | ||
762 | drvdata = dev_get_drvdata(dev); | |
763 | /* Some subdev didn't probe succesfully id drvdata is NULL */ | |
764 | if (drvdata) { | |
765 | switch (plat_entity) { | |
766 | case IDX_FIMC: | |
767 | ret = register_fimc_entity(fmd, drvdata); | |
768 | break; | |
769 | case IDX_FLITE: | |
770 | ret = register_fimc_lite_entity(fmd, drvdata); | |
ecd9acbf | 771 | break; |
7b43a6f3 SN |
772 | case IDX_CSIS: |
773 | ret = register_csis_entity(fmd, pdev, drvdata); | |
774 | break; | |
e781bbe3 SN |
775 | case IDX_IS_ISP: |
776 | ret = register_fimc_is_entity(fmd, drvdata); | |
777 | break; | |
7b43a6f3 SN |
778 | default: |
779 | ret = -ENODEV; | |
ecd9acbf SN |
780 | } |
781 | } | |
d3953223 | 782 | |
7b43a6f3 SN |
783 | module_put(dev->driver->owner); |
784 | dev_unlock: | |
785 | device_unlock(dev); | |
786 | if (ret == -EPROBE_DEFER) | |
787 | dev_info(&fmd->pdev->dev, "deferring %s device registration\n", | |
788 | dev_name(dev)); | |
789 | else if (ret < 0) | |
790 | dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n", | |
791 | dev_name(dev), ret); | |
792 | return ret; | |
793 | } | |
794 | ||
795 | static int fimc_md_pdev_match(struct device *dev, void *data) | |
796 | { | |
797 | struct platform_device *pdev = to_platform_device(dev); | |
798 | int plat_entity = -1; | |
799 | int ret; | |
800 | char *p; | |
801 | ||
802 | if (!get_device(dev)) | |
803 | return -ENODEV; | |
804 | ||
805 | if (!strcmp(pdev->name, CSIS_DRIVER_NAME)) { | |
806 | plat_entity = IDX_CSIS; | |
7b43a6f3 SN |
807 | } else { |
808 | p = strstr(pdev->name, "fimc"); | |
809 | if (p && *(p + 4) == 0) | |
810 | plat_entity = IDX_FIMC; | |
ecd9acbf SN |
811 | } |
812 | ||
7b43a6f3 SN |
813 | if (plat_entity >= 0) |
814 | ret = fimc_md_register_platform_entity(data, pdev, | |
815 | plat_entity); | |
816 | put_device(dev); | |
817 | return 0; | |
d3953223 SN |
818 | } |
819 | ||
e2985a26 SN |
820 | /* Register FIMC, FIMC-LITE and CSIS media entities */ |
821 | #ifdef CONFIG_OF | |
822 | static int fimc_md_register_of_platform_entities(struct fimc_md *fmd, | |
823 | struct device_node *parent) | |
824 | { | |
825 | struct device_node *node; | |
826 | int ret = 0; | |
827 | ||
828 | for_each_available_child_of_node(parent, node) { | |
829 | struct platform_device *pdev; | |
830 | int plat_entity = -1; | |
831 | ||
832 | pdev = of_find_device_by_node(node); | |
833 | if (!pdev) | |
834 | continue; | |
835 | ||
836 | /* If driver of any entity isn't ready try all again later. */ | |
837 | if (!strcmp(node->name, CSIS_OF_NODE_NAME)) | |
838 | plat_entity = IDX_CSIS; | |
e781bbe3 SN |
839 | else if (!strcmp(node->name, FIMC_IS_OF_NODE_NAME)) |
840 | plat_entity = IDX_IS_ISP; | |
e2985a26 SN |
841 | else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME)) |
842 | plat_entity = IDX_FLITE; | |
843 | else if (!strcmp(node->name, FIMC_OF_NODE_NAME) && | |
844 | !of_property_read_bool(node, "samsung,lcd-wb")) | |
845 | plat_entity = IDX_FIMC; | |
846 | ||
847 | if (plat_entity >= 0) | |
848 | ret = fimc_md_register_platform_entity(fmd, pdev, | |
849 | plat_entity); | |
850 | put_device(&pdev->dev); | |
851 | if (ret < 0) | |
852 | break; | |
853 | } | |
854 | ||
855 | return ret; | |
856 | } | |
857 | #else | |
858 | #define fimc_md_register_of_platform_entities(fmd, node) (-ENOSYS) | |
859 | #endif | |
860 | ||
d3953223 SN |
861 | static void fimc_md_unregister_entities(struct fimc_md *fmd) |
862 | { | |
863 | int i; | |
864 | ||
865 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
403dfbec SN |
866 | struct fimc_dev *dev = fmd->fimc[i]; |
867 | if (dev == NULL) | |
d3953223 | 868 | continue; |
403dfbec SN |
869 | v4l2_device_unregister_subdev(&dev->vid_cap.subdev); |
870 | dev->vid_cap.ve.pipe = NULL; | |
d3953223 SN |
871 | fmd->fimc[i] = NULL; |
872 | } | |
4af81310 | 873 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { |
403dfbec SN |
874 | struct fimc_lite *dev = fmd->fimc_lite[i]; |
875 | if (dev == NULL) | |
4af81310 | 876 | continue; |
403dfbec SN |
877 | v4l2_device_unregister_subdev(&dev->subdev); |
878 | dev->ve.pipe = NULL; | |
4af81310 SN |
879 | fmd->fimc_lite[i] = NULL; |
880 | } | |
d3953223 SN |
881 | for (i = 0; i < CSIS_MAX_ENTITIES; i++) { |
882 | if (fmd->csis[i].sd == NULL) | |
883 | continue; | |
884 | v4l2_device_unregister_subdev(fmd->csis[i].sd); | |
885 | fmd->csis[i].sd = NULL; | |
886 | } | |
887 | for (i = 0; i < fmd->num_sensors; i++) { | |
888 | if (fmd->sensor[i].subdev == NULL) | |
889 | continue; | |
890 | fimc_md_unregister_sensor(fmd->sensor[i].subdev); | |
891 | fmd->sensor[i].subdev = NULL; | |
892 | } | |
e41a35cb SN |
893 | |
894 | if (fmd->fimc_is) | |
895 | v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev); | |
896 | ||
7b43a6f3 | 897 | v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n"); |
d3953223 SN |
898 | } |
899 | ||
d3953223 SN |
900 | /** |
901 | * __fimc_md_create_fimc_links - create links to all FIMC entities | |
902 | * @fmd: fimc media device | |
903 | * @source: the source entity to create links to all fimc entities from | |
904 | * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null | |
905 | * @pad: the source entity pad index | |
d0da3c35 | 906 | * @link_mask: bitmask of the fimc devices for which link should be enabled |
d3953223 | 907 | */ |
4af81310 SN |
908 | static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd, |
909 | struct media_entity *source, | |
910 | struct v4l2_subdev *sensor, | |
d0da3c35 | 911 | int pad, int link_mask) |
d3953223 | 912 | { |
4c8f0629 | 913 | struct fimc_source_info *si = NULL; |
d3953223 | 914 | struct media_entity *sink; |
4af81310 | 915 | unsigned int flags = 0; |
f998bb7b | 916 | int i, ret = 0; |
d3953223 | 917 | |
f998bb7b SN |
918 | if (sensor) { |
919 | si = v4l2_get_subdev_hostdata(sensor); | |
920 | /* Skip direct FIMC links in the logical FIMC-IS sensor path */ | |
4c8f0629 | 921 | if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) |
f998bb7b SN |
922 | ret = 1; |
923 | } | |
924 | ||
925 | for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) { | |
d3953223 | 926 | if (!fmd->fimc[i]) |
4af81310 | 927 | continue; |
d3953223 SN |
928 | /* |
929 | * Some FIMC variants are not fitted with camera capture | |
930 | * interface. Skip creating a link from sensor for those. | |
931 | */ | |
4af81310 | 932 | if (!fmd->fimc[i]->variant->has_cam_if) |
d3953223 SN |
933 | continue; |
934 | ||
d0da3c35 | 935 | flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0; |
4af81310 | 936 | |
693f5c40 | 937 | sink = &fmd->fimc[i]->vid_cap.subdev.entity; |
237e0265 | 938 | ret = media_entity_create_link(source, pad, sink, |
88fa8311 | 939 | FIMC_SD_PAD_SINK_CAM, flags); |
d3953223 SN |
940 | if (ret) |
941 | return ret; | |
942 | ||
237e0265 SN |
943 | /* Notify FIMC capture subdev entity */ |
944 | ret = media_entity_call(sink, link_setup, &sink->pads[0], | |
945 | &source->pads[pad], flags); | |
946 | if (ret) | |
947 | break; | |
948 | ||
542fb082 | 949 | v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n", |
d3953223 | 950 | source->name, flags ? '=' : '-', sink->name); |
d3953223 | 951 | } |
4af81310 SN |
952 | |
953 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { | |
954 | if (!fmd->fimc_lite[i]) | |
955 | continue; | |
956 | ||
4af81310 SN |
957 | sink = &fmd->fimc_lite[i]->subdev.entity; |
958 | ret = media_entity_create_link(source, pad, sink, | |
f998bb7b | 959 | FLITE_SD_PAD_SINK, 0); |
4af81310 SN |
960 | if (ret) |
961 | return ret; | |
962 | ||
963 | /* Notify FIMC-LITE subdev entity */ | |
964 | ret = media_entity_call(sink, link_setup, &sink->pads[0], | |
f998bb7b | 965 | &source->pads[pad], 0); |
4af81310 SN |
966 | if (ret) |
967 | break; | |
968 | ||
f998bb7b SN |
969 | v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n", |
970 | source->name, sink->name); | |
4af81310 | 971 | } |
d3953223 SN |
972 | return 0; |
973 | } | |
974 | ||
4af81310 SN |
975 | /* Create links from FIMC-LITE source pads to other entities */ |
976 | static int __fimc_md_create_flite_source_links(struct fimc_md *fmd) | |
977 | { | |
978 | struct media_entity *source, *sink; | |
a26860bd | 979 | int i, ret = 0; |
4af81310 SN |
980 | |
981 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { | |
982 | struct fimc_lite *fimc = fmd->fimc_lite[i]; | |
f998bb7b | 983 | |
4af81310 SN |
984 | if (fimc == NULL) |
985 | continue; | |
f998bb7b | 986 | |
4af81310 | 987 | source = &fimc->subdev.entity; |
bc7584b0 | 988 | sink = &fimc->ve.vdev.entity; |
4af81310 | 989 | /* FIMC-LITE's subdev and video node */ |
6319d6a0 | 990 | ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_DMA, |
f998bb7b SN |
991 | sink, 0, 0); |
992 | if (ret) | |
993 | break; | |
994 | /* Link from FIMC-LITE to IS-ISP subdev */ | |
995 | sink = &fmd->fimc_is->isp.subdev.entity; | |
996 | ret = media_entity_create_link(source, FLITE_SD_PAD_SOURCE_ISP, | |
997 | sink, 0, 0); | |
4af81310 SN |
998 | if (ret) |
999 | break; | |
f998bb7b SN |
1000 | } |
1001 | ||
1002 | return ret; | |
1003 | } | |
1004 | ||
1005 | /* Create FIMC-IS links */ | |
1006 | static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd) | |
1007 | { | |
1008 | struct media_entity *source, *sink; | |
1009 | int i, ret; | |
1010 | ||
1011 | source = &fmd->fimc_is->isp.subdev.entity; | |
1012 | ||
1013 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
1014 | if (fmd->fimc[i] == NULL) | |
1015 | continue; | |
1016 | ||
1017 | /* Link from IS-ISP subdev to FIMC */ | |
1018 | sink = &fmd->fimc[i]->vid_cap.subdev.entity; | |
1019 | ret = media_entity_create_link(source, FIMC_ISP_SD_PAD_SRC_FIFO, | |
1020 | sink, FIMC_SD_PAD_SINK_FIFO, 0); | |
1021 | if (ret) | |
1022 | return ret; | |
4af81310 SN |
1023 | } |
1024 | ||
1025 | return ret; | |
1026 | } | |
1027 | ||
d3953223 SN |
1028 | /** |
1029 | * fimc_md_create_links - create default links between registered entities | |
1030 | * | |
1031 | * Parallel interface sensor entities are connected directly to FIMC capture | |
1032 | * entities. The sensors using MIPI CSIS bus are connected through immutable | |
1033 | * link with CSI receiver entity specified by mux_id. Any registered CSIS | |
1034 | * entity has a link to each registered FIMC capture entity. Enabled links | |
1035 | * are created by default between each subsequent registered sensor and | |
1036 | * subsequent FIMC capture entity. The number of default active links is | |
1037 | * determined by the number of available sensors or FIMC entities, | |
1038 | * whichever is less. | |
1039 | */ | |
1040 | static int fimc_md_create_links(struct fimc_md *fmd) | |
1041 | { | |
a8697ec8 | 1042 | struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL }; |
d3953223 | 1043 | struct v4l2_subdev *sensor, *csis; |
56bc911a | 1044 | struct fimc_source_info *pdata; |
237e0265 | 1045 | struct media_entity *source, *sink; |
d0da3c35 SN |
1046 | int i, pad, fimc_id = 0, ret = 0; |
1047 | u32 flags, link_mask = 0; | |
d3953223 SN |
1048 | |
1049 | for (i = 0; i < fmd->num_sensors; i++) { | |
1050 | if (fmd->sensor[i].subdev == NULL) | |
1051 | continue; | |
1052 | ||
1053 | sensor = fmd->sensor[i].subdev; | |
4c8f0629 SN |
1054 | pdata = v4l2_get_subdev_hostdata(sensor); |
1055 | if (!pdata) | |
d3953223 SN |
1056 | continue; |
1057 | ||
1058 | source = NULL; | |
d3953223 | 1059 | |
56bc911a SN |
1060 | switch (pdata->sensor_bus_type) { |
1061 | case FIMC_BUS_TYPE_MIPI_CSI2: | |
d3953223 SN |
1062 | if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES, |
1063 | "Wrong CSI channel id: %d\n", pdata->mux_id)) | |
1064 | return -EINVAL; | |
1065 | ||
1066 | csis = fmd->csis[pdata->mux_id].sd; | |
1067 | if (WARN(csis == NULL, | |
1068 | "MIPI-CSI interface specified " | |
1069 | "but s5p-csis module is not loaded!\n")) | |
d12392ec | 1070 | return -EINVAL; |
d3953223 | 1071 | |
1c9f5bd7 AH |
1072 | pad = sensor->entity.num_pads - 1; |
1073 | ret = media_entity_create_link(&sensor->entity, pad, | |
d3953223 SN |
1074 | &csis->entity, CSIS_PAD_SINK, |
1075 | MEDIA_LNK_FL_IMMUTABLE | | |
1076 | MEDIA_LNK_FL_ENABLED); | |
1077 | if (ret) | |
1078 | return ret; | |
1079 | ||
969e877c | 1080 | v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n", |
d3953223 SN |
1081 | sensor->entity.name, csis->entity.name); |
1082 | ||
4af81310 | 1083 | source = NULL; |
5d33ee92 | 1084 | csi_sensors[pdata->mux_id] = sensor; |
d3953223 SN |
1085 | break; |
1086 | ||
56bc911a | 1087 | case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656: |
d3953223 SN |
1088 | source = &sensor->entity; |
1089 | pad = 0; | |
1090 | break; | |
1091 | ||
1092 | default: | |
1093 | v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n", | |
56bc911a | 1094 | pdata->sensor_bus_type); |
d3953223 SN |
1095 | return -EINVAL; |
1096 | } | |
1097 | if (source == NULL) | |
1098 | continue; | |
1099 | ||
d0da3c35 | 1100 | link_mask = 1 << fimc_id++; |
4af81310 | 1101 | ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor, |
d0da3c35 | 1102 | pad, link_mask); |
4af81310 SN |
1103 | } |
1104 | ||
a8697ec8 | 1105 | for (i = 0; i < CSIS_MAX_ENTITIES; i++) { |
4af81310 SN |
1106 | if (fmd->csis[i].sd == NULL) |
1107 | continue; | |
f998bb7b | 1108 | |
4af81310 SN |
1109 | source = &fmd->csis[i].sd->entity; |
1110 | pad = CSIS_PAD_SOURCE; | |
5d33ee92 | 1111 | sensor = csi_sensors[i]; |
4af81310 | 1112 | |
d0da3c35 | 1113 | link_mask = 1 << fimc_id++; |
5d33ee92 | 1114 | ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor, |
d0da3c35 | 1115 | pad, link_mask); |
d3953223 | 1116 | } |
4af81310 | 1117 | |
237e0265 SN |
1118 | /* Create immutable links between each FIMC's subdev and video node */ |
1119 | flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED; | |
1120 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
1121 | if (!fmd->fimc[i]) | |
1122 | continue; | |
f998bb7b | 1123 | |
693f5c40 | 1124 | source = &fmd->fimc[i]->vid_cap.subdev.entity; |
bc7584b0 | 1125 | sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity; |
f998bb7b | 1126 | |
237e0265 SN |
1127 | ret = media_entity_create_link(source, FIMC_SD_PAD_SOURCE, |
1128 | sink, 0, flags); | |
1129 | if (ret) | |
1130 | break; | |
1131 | } | |
1132 | ||
f998bb7b SN |
1133 | ret = __fimc_md_create_flite_source_links(fmd); |
1134 | if (ret < 0) | |
1135 | return ret; | |
1136 | ||
1137 | if (fmd->use_isp) | |
1138 | ret = __fimc_md_create_fimc_is_links(fmd); | |
1139 | ||
1140 | return ret; | |
d3953223 SN |
1141 | } |
1142 | ||
1143 | /* | |
056f4f30 | 1144 | * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management. |
d3953223 | 1145 | */ |
0e23cbbe SN |
1146 | static void fimc_md_put_clocks(struct fimc_md *fmd) |
1147 | { | |
1148 | int i = FIMC_MAX_CAMCLKS; | |
1149 | ||
1150 | while (--i >= 0) { | |
1151 | if (IS_ERR(fmd->camclk[i].clock)) | |
1152 | continue; | |
1153 | clk_unprepare(fmd->camclk[i].clock); | |
1154 | clk_put(fmd->camclk[i].clock); | |
1155 | fmd->camclk[i].clock = ERR_PTR(-EINVAL); | |
1156 | } | |
056f4f30 SN |
1157 | |
1158 | /* Writeback (PIXELASYNCMx) clocks */ | |
1159 | for (i = 0; i < FIMC_MAX_WBCLKS; i++) { | |
1160 | if (IS_ERR(fmd->wbclk[i])) | |
1161 | continue; | |
1162 | clk_put(fmd->wbclk[i]); | |
1163 | fmd->wbclk[i] = ERR_PTR(-EINVAL); | |
1164 | } | |
0e23cbbe SN |
1165 | } |
1166 | ||
d3953223 SN |
1167 | static int fimc_md_get_clocks(struct fimc_md *fmd) |
1168 | { | |
0e23cbbe | 1169 | struct device *dev = NULL; |
d3953223 SN |
1170 | char clk_name[32]; |
1171 | struct clk *clock; | |
0e23cbbe SN |
1172 | int ret, i; |
1173 | ||
1174 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) | |
1175 | fmd->camclk[i].clock = ERR_PTR(-EINVAL); | |
1176 | ||
1177 | if (fmd->pdev->dev.of_node) | |
1178 | dev = &fmd->pdev->dev; | |
d3953223 SN |
1179 | |
1180 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) { | |
1181 | snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i); | |
0e23cbbe SN |
1182 | clock = clk_get(dev, clk_name); |
1183 | ||
dc3ae328 | 1184 | if (IS_ERR(clock)) { |
0e23cbbe SN |
1185 | dev_err(&fmd->pdev->dev, "Failed to get clock: %s\n", |
1186 | clk_name); | |
1187 | ret = PTR_ERR(clock); | |
1188 | break; | |
1189 | } | |
1190 | ret = clk_prepare(clock); | |
1191 | if (ret < 0) { | |
1192 | clk_put(clock); | |
1193 | fmd->camclk[i].clock = ERR_PTR(-EINVAL); | |
1194 | break; | |
d3953223 SN |
1195 | } |
1196 | fmd->camclk[i].clock = clock; | |
1197 | } | |
0e23cbbe SN |
1198 | if (ret) |
1199 | fimc_md_put_clocks(fmd); | |
d3953223 | 1200 | |
056f4f30 SN |
1201 | if (!fmd->use_isp) |
1202 | return 0; | |
1203 | /* | |
1204 | * For now get only PIXELASYNCM1 clock (Writeback B/ISP), | |
1205 | * leave PIXELASYNCM0 out for the LCD Writeback driver. | |
1206 | */ | |
1207 | fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL); | |
1208 | ||
1209 | for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) { | |
1210 | snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i); | |
1211 | clock = clk_get(dev, clk_name); | |
1212 | if (IS_ERR(clock)) { | |
1213 | v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n", | |
1214 | clk_name); | |
1215 | ret = PTR_ERR(clock); | |
1216 | break; | |
1217 | } | |
1218 | fmd->wbclk[i] = clock; | |
1219 | } | |
1220 | if (ret) | |
1221 | fimc_md_put_clocks(fmd); | |
1222 | ||
0e23cbbe | 1223 | return ret; |
d3953223 SN |
1224 | } |
1225 | ||
1226 | static int __fimc_md_set_camclk(struct fimc_md *fmd, | |
4c8f0629 | 1227 | struct fimc_source_info *si, |
e3fc82e8 | 1228 | bool on) |
d3953223 | 1229 | { |
d3953223 SN |
1230 | struct fimc_camclk_info *camclk; |
1231 | int ret = 0; | |
1232 | ||
4c8f0629 | 1233 | if (WARN_ON(si->clk_id >= FIMC_MAX_CAMCLKS) || !fmd || !fmd->pmf) |
d3953223 SN |
1234 | return -EINVAL; |
1235 | ||
4c8f0629 | 1236 | camclk = &fmd->camclk[si->clk_id]; |
d3953223 | 1237 | |
e3fc82e8 | 1238 | dbg("camclk %d, f: %lu, use_count: %d, on: %d", |
4c8f0629 | 1239 | si->clk_id, si->clk_frequency, camclk->use_count, on); |
d3953223 SN |
1240 | |
1241 | if (on) { | |
1242 | if (camclk->use_count > 0 && | |
4c8f0629 | 1243 | camclk->frequency != si->clk_frequency) |
d3953223 SN |
1244 | return -EINVAL; |
1245 | ||
1246 | if (camclk->use_count++ == 0) { | |
4c8f0629 SN |
1247 | clk_set_rate(camclk->clock, si->clk_frequency); |
1248 | camclk->frequency = si->clk_frequency; | |
3e20c345 SN |
1249 | ret = pm_runtime_get_sync(fmd->pmf); |
1250 | if (ret < 0) | |
1251 | return ret; | |
d3953223 | 1252 | ret = clk_enable(camclk->clock); |
4c8f0629 | 1253 | dbg("Enabled camclk %d: f: %lu", si->clk_id, |
e3fc82e8 | 1254 | clk_get_rate(camclk->clock)); |
d3953223 | 1255 | } |
d3953223 SN |
1256 | return ret; |
1257 | } | |
1258 | ||
1259 | if (WARN_ON(camclk->use_count == 0)) | |
1260 | return 0; | |
1261 | ||
1262 | if (--camclk->use_count == 0) { | |
1263 | clk_disable(camclk->clock); | |
3e20c345 | 1264 | pm_runtime_put(fmd->pmf); |
4c8f0629 | 1265 | dbg("Disabled camclk %d", si->clk_id); |
d3953223 SN |
1266 | } |
1267 | return ret; | |
1268 | } | |
1269 | ||
1270 | /** | |
1271 | * fimc_md_set_camclk - peripheral sensor clock setup | |
1272 | * @sd: sensor subdev to configure sclk_cam clock for | |
1273 | * @on: 1 to enable or 0 to disable the clock | |
1274 | * | |
1275 | * There are 2 separate clock outputs available in the SoC for external | |
1276 | * image processors. These clocks are shared between all registered FIMC | |
1277 | * devices to which sensors can be attached, either directly or through | |
1278 | * the MIPI CSI receiver. The clock is allowed here to be used by | |
1279 | * multiple sensors concurrently if they use same frequency. | |
d3953223 SN |
1280 | * This function should only be called when the graph mutex is held. |
1281 | */ | |
1282 | int fimc_md_set_camclk(struct v4l2_subdev *sd, bool on) | |
1283 | { | |
4c8f0629 | 1284 | struct fimc_source_info *si = v4l2_get_subdev_hostdata(sd); |
d3953223 SN |
1285 | struct fimc_md *fmd = entity_to_fimc_mdev(&sd->entity); |
1286 | ||
4c8f0629 | 1287 | return __fimc_md_set_camclk(fmd, si, on); |
d3953223 SN |
1288 | } |
1289 | ||
813f5c0a SN |
1290 | static int fimc_md_link_notify(struct media_link *link, u32 flags, |
1291 | unsigned int notification) | |
d3953223 | 1292 | { |
813f5c0a | 1293 | struct media_entity *sink = link->sink->entity; |
403dfbec SN |
1294 | struct exynos_video_entity *ve; |
1295 | struct video_device *vdev; | |
0f735f52 | 1296 | struct fimc_pipeline *pipeline; |
8c6ecdd7 | 1297 | int i, ret = 0; |
d3953223 | 1298 | |
813f5c0a SN |
1299 | if (media_entity_type(sink) != MEDIA_ENT_T_DEVNODE_V4L || |
1300 | notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) | |
d3953223 SN |
1301 | return 0; |
1302 | ||
813f5c0a | 1303 | vdev = media_entity_to_video_device(sink); |
403dfbec SN |
1304 | ve = vdev_to_exynos_video_entity(vdev); |
1305 | pipeline = to_fimc_pipeline(ve->pipe); | |
1306 | ||
813f5c0a SN |
1307 | if (!(link->flags & MEDIA_LNK_FL_ENABLED) && pipeline->subdevs[IDX_SENSOR]) { |
1308 | if (sink->use_count > 0) | |
403dfbec | 1309 | ret = __fimc_pipeline_close(ve->pipe); |
131b6c61 | 1310 | |
740ad921 SN |
1311 | for (i = 0; i < IDX_MAX; i++) |
1312 | pipeline->subdevs[i] = NULL; | |
813f5c0a | 1313 | } else if (sink->use_count > 0) { |
8c6ecdd7 SN |
1314 | /* |
1315 | * Link activation. Enable power of pipeline elements only if | |
1316 | * the pipeline is already in use, i.e. its video node is open. | |
1317 | * Recreate the controls destroyed during the link deactivation. | |
1318 | */ | |
813f5c0a | 1319 | ret = __fimc_pipeline_open(ve->pipe, sink, true); |
d3953223 | 1320 | } |
740ad921 | 1321 | |
d3953223 SN |
1322 | return ret ? -EPIPE : ret; |
1323 | } | |
1324 | ||
1325 | static ssize_t fimc_md_sysfs_show(struct device *dev, | |
1326 | struct device_attribute *attr, char *buf) | |
1327 | { | |
1328 | struct platform_device *pdev = to_platform_device(dev); | |
1329 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1330 | ||
1331 | if (fmd->user_subdev_api) | |
1332 | return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE); | |
1333 | ||
1334 | return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE); | |
1335 | } | |
1336 | ||
1337 | static ssize_t fimc_md_sysfs_store(struct device *dev, | |
1338 | struct device_attribute *attr, | |
1339 | const char *buf, size_t count) | |
1340 | { | |
1341 | struct platform_device *pdev = to_platform_device(dev); | |
1342 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1343 | bool subdev_api; | |
1344 | int i; | |
1345 | ||
1346 | if (!strcmp(buf, "vid-dev\n")) | |
1347 | subdev_api = false; | |
1348 | else if (!strcmp(buf, "sub-dev\n")) | |
1349 | subdev_api = true; | |
1350 | else | |
1351 | return count; | |
1352 | ||
1353 | fmd->user_subdev_api = subdev_api; | |
1354 | for (i = 0; i < FIMC_MAX_DEVS; i++) | |
1355 | if (fmd->fimc[i]) | |
1356 | fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api; | |
1357 | return count; | |
1358 | } | |
1359 | /* | |
1360 | * This device attribute is to select video pipeline configuration method. | |
1361 | * There are following valid values: | |
1362 | * vid-dev - for V4L2 video node API only, subdevice will be configured | |
1363 | * by the host driver. | |
1364 | * sub-dev - for media controller API, subdevs must be configured in user | |
1365 | * space before starting streaming. | |
1366 | */ | |
1367 | static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO, | |
1368 | fimc_md_sysfs_show, fimc_md_sysfs_store); | |
1369 | ||
4163851f SN |
1370 | static int fimc_md_get_pinctrl(struct fimc_md *fmd) |
1371 | { | |
1372 | struct device *dev = &fmd->pdev->dev; | |
1373 | struct fimc_pinctrl *pctl = &fmd->pinctl; | |
1374 | ||
1375 | pctl->pinctrl = devm_pinctrl_get(dev); | |
1376 | if (IS_ERR(pctl->pinctrl)) | |
1377 | return PTR_ERR(pctl->pinctrl); | |
1378 | ||
1379 | pctl->state_default = pinctrl_lookup_state(pctl->pinctrl, | |
1380 | PINCTRL_STATE_DEFAULT); | |
1381 | if (IS_ERR(pctl->state_default)) | |
1382 | return PTR_ERR(pctl->state_default); | |
1383 | ||
1384 | pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl, | |
1385 | PINCTRL_STATE_IDLE); | |
1386 | return 0; | |
1387 | } | |
1388 | ||
ecd9acbf | 1389 | static int fimc_md_probe(struct platform_device *pdev) |
d3953223 | 1390 | { |
e2985a26 | 1391 | struct device *dev = &pdev->dev; |
d3953223 SN |
1392 | struct v4l2_device *v4l2_dev; |
1393 | struct fimc_md *fmd; | |
1394 | int ret; | |
1395 | ||
e2985a26 | 1396 | fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL); |
d3953223 SN |
1397 | if (!fmd) |
1398 | return -ENOMEM; | |
1399 | ||
1400 | spin_lock_init(&fmd->slock); | |
1401 | fmd->pdev = pdev; | |
403dfbec | 1402 | INIT_LIST_HEAD(&fmd->pipelines); |
d3953223 SN |
1403 | |
1404 | strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC", | |
1405 | sizeof(fmd->media_dev.model)); | |
1406 | fmd->media_dev.link_notify = fimc_md_link_notify; | |
e2985a26 | 1407 | fmd->media_dev.dev = dev; |
d3953223 SN |
1408 | |
1409 | v4l2_dev = &fmd->v4l2_dev; | |
1410 | v4l2_dev->mdev = &fmd->media_dev; | |
e1d72f4d | 1411 | v4l2_dev->notify = fimc_sensor_notify; |
e2985a26 | 1412 | strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name)); |
d3953223 | 1413 | |
e781bbe3 SN |
1414 | fmd->use_isp = fimc_md_is_isp_available(dev->of_node); |
1415 | ||
e2985a26 | 1416 | ret = v4l2_device_register(dev, &fmd->v4l2_dev); |
d3953223 SN |
1417 | if (ret < 0) { |
1418 | v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret); | |
6d91a51a | 1419 | return ret; |
d3953223 SN |
1420 | } |
1421 | ret = media_device_register(&fmd->media_dev); | |
1422 | if (ret < 0) { | |
1423 | v4l2_err(v4l2_dev, "Failed to register media device: %d\n", ret); | |
693f5c40 | 1424 | goto err_md; |
d3953223 SN |
1425 | } |
1426 | ret = fimc_md_get_clocks(fmd); | |
1427 | if (ret) | |
693f5c40 | 1428 | goto err_clk; |
d3953223 | 1429 | |
e2985a26 | 1430 | fmd->user_subdev_api = (dev->of_node != NULL); |
693f5c40 SN |
1431 | |
1432 | /* Protect the media graph while we're registering entities */ | |
1433 | mutex_lock(&fmd->media_dev.graph_mutex); | |
1434 | ||
4163851f SN |
1435 | ret = fimc_md_get_pinctrl(fmd); |
1436 | if (ret < 0) { | |
1437 | if (ret != EPROBE_DEFER) | |
1438 | dev_err(dev, "Failed to get pinctrl: %d\n", ret); | |
1439 | goto err_unlock; | |
1440 | } | |
1441 | ||
e2985a26 SN |
1442 | if (dev->of_node) |
1443 | ret = fimc_md_register_of_platform_entities(fmd, dev->of_node); | |
1444 | else | |
1445 | ret = bus_for_each_dev(&platform_bus_type, NULL, fmd, | |
1446 | fimc_md_pdev_match); | |
d3953223 | 1447 | if (ret) |
693f5c40 | 1448 | goto err_unlock; |
d3953223 | 1449 | |
2b13f7d4 | 1450 | if (dev->platform_data || dev->of_node) { |
5cbf6f16 SN |
1451 | ret = fimc_md_register_sensor_entities(fmd); |
1452 | if (ret) | |
693f5c40 | 1453 | goto err_unlock; |
5cbf6f16 | 1454 | } |
e2985a26 | 1455 | |
d3953223 SN |
1456 | ret = fimc_md_create_links(fmd); |
1457 | if (ret) | |
693f5c40 | 1458 | goto err_unlock; |
d3953223 SN |
1459 | ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev); |
1460 | if (ret) | |
693f5c40 | 1461 | goto err_unlock; |
d3953223 SN |
1462 | |
1463 | ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode); | |
693f5c40 SN |
1464 | if (ret) |
1465 | goto err_unlock; | |
1466 | ||
1467 | platform_set_drvdata(pdev, fmd); | |
1468 | mutex_unlock(&fmd->media_dev.graph_mutex); | |
1469 | return 0; | |
1470 | ||
1471 | err_unlock: | |
1472 | mutex_unlock(&fmd->media_dev.graph_mutex); | |
1473 | err_clk: | |
d3953223 SN |
1474 | media_device_unregister(&fmd->media_dev); |
1475 | fimc_md_put_clocks(fmd); | |
1476 | fimc_md_unregister_entities(fmd); | |
693f5c40 | 1477 | err_md: |
d3953223 | 1478 | v4l2_device_unregister(&fmd->v4l2_dev); |
d3953223 SN |
1479 | return ret; |
1480 | } | |
1481 | ||
4c62e976 | 1482 | static int fimc_md_remove(struct platform_device *pdev) |
d3953223 SN |
1483 | { |
1484 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1485 | ||
1486 | if (!fmd) | |
1487 | return 0; | |
1488 | device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode); | |
1489 | fimc_md_unregister_entities(fmd); | |
403dfbec | 1490 | fimc_md_pipelines_free(fmd); |
d3953223 SN |
1491 | media_device_unregister(&fmd->media_dev); |
1492 | fimc_md_put_clocks(fmd); | |
d3953223 SN |
1493 | return 0; |
1494 | } | |
1495 | ||
e2985a26 SN |
1496 | static struct platform_device_id fimc_driver_ids[] __always_unused = { |
1497 | { .name = "s5p-fimc-md" }, | |
1498 | { }, | |
1499 | }; | |
1500 | MODULE_DEVICE_TABLE(platform, fimc_driver_ids); | |
1501 | ||
1502 | static const struct of_device_id fimc_md_of_match[] = { | |
1503 | { .compatible = "samsung,fimc" }, | |
1504 | { }, | |
1505 | }; | |
1506 | MODULE_DEVICE_TABLE(of, fimc_md_of_match); | |
1507 | ||
d3953223 SN |
1508 | static struct platform_driver fimc_md_driver = { |
1509 | .probe = fimc_md_probe, | |
4c62e976 | 1510 | .remove = fimc_md_remove, |
d3953223 | 1511 | .driver = { |
e2985a26 SN |
1512 | .of_match_table = of_match_ptr(fimc_md_of_match), |
1513 | .name = "s5p-fimc-md", | |
1514 | .owner = THIS_MODULE, | |
d3953223 SN |
1515 | } |
1516 | }; | |
1517 | ||
7e566be2 | 1518 | static int __init fimc_md_init(void) |
d3953223 SN |
1519 | { |
1520 | int ret; | |
ecd9acbf | 1521 | |
d3953223 SN |
1522 | request_module("s5p-csis"); |
1523 | ret = fimc_register_driver(); | |
1524 | if (ret) | |
1525 | return ret; | |
ecd9acbf | 1526 | |
d3953223 SN |
1527 | return platform_driver_register(&fimc_md_driver); |
1528 | } | |
7e566be2 SK |
1529 | |
1530 | static void __exit fimc_md_exit(void) | |
d3953223 SN |
1531 | { |
1532 | platform_driver_unregister(&fimc_md_driver); | |
1533 | fimc_unregister_driver(); | |
1534 | } | |
1535 | ||
1536 | module_init(fimc_md_init); | |
1537 | module_exit(fimc_md_exit); | |
1538 | ||
1539 | MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>"); | |
1540 | MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver"); | |
1541 | MODULE_LICENSE("GPL"); | |
1542 | MODULE_VERSION("2.0.1"); |