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Commit | Line | Data |
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d3953223 SN |
1 | /* |
2 | * S5P/EXYNOS4 SoC series camera host interface media device driver | |
3 | * | |
52917bcb SN |
4 | * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd. |
5 | * Author: Sylwester Nawrocki <s.nawrocki@samsung.com> | |
d3953223 SN |
6 | * |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published | |
9 | * by the Free Software Foundation, either version 2 of the License, | |
10 | * or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #include <linux/bug.h> | |
d3f5e0c5 SN |
14 | #include <linux/clk.h> |
15 | #include <linux/clk-provider.h> | |
d3953223 SN |
16 | #include <linux/device.h> |
17 | #include <linux/errno.h> | |
18 | #include <linux/i2c.h> | |
19 | #include <linux/kernel.h> | |
20 | #include <linux/list.h> | |
21 | #include <linux/module.h> | |
e2985a26 SN |
22 | #include <linux/of.h> |
23 | #include <linux/of_platform.h> | |
24 | #include <linux/of_device.h> | |
fd9fdb78 | 25 | #include <linux/of_graph.h> |
d3953223 SN |
26 | #include <linux/platform_device.h> |
27 | #include <linux/pm_runtime.h> | |
28 | #include <linux/types.h> | |
29 | #include <linux/slab.h> | |
fa91f105 | 30 | #include <media/v4l2-async.h> |
131b6c61 | 31 | #include <media/v4l2-ctrls.h> |
e2985a26 | 32 | #include <media/v4l2-of.h> |
d3953223 | 33 | #include <media/media-device.h> |
d647f0b7 | 34 | #include <media/drv-intf/exynos-fimc.h> |
d3953223 | 35 | |
56fa1a6a | 36 | #include "media-dev.h" |
d3953223 | 37 | #include "fimc-core.h" |
e781bbe3 | 38 | #include "fimc-is.h" |
0f735f52 | 39 | #include "fimc-lite.h" |
d3953223 SN |
40 | #include "mipi-csis.h" |
41 | ||
52917bcb SN |
42 | /* Set up image sensor subdev -> FIMC capture node notifications. */ |
43 | static void __setup_sensor_notification(struct fimc_md *fmd, | |
44 | struct v4l2_subdev *sensor, | |
45 | struct v4l2_subdev *fimc_sd) | |
46 | { | |
47 | struct fimc_source_info *src_inf; | |
48 | struct fimc_sensor_info *md_si; | |
49 | unsigned long flags; | |
50 | ||
51 | src_inf = v4l2_get_subdev_hostdata(sensor); | |
52 | if (!src_inf || WARN_ON(fmd == NULL)) | |
53 | return; | |
54 | ||
55 | md_si = source_to_sensor_info(src_inf); | |
56 | spin_lock_irqsave(&fmd->slock, flags); | |
57 | md_si->host = v4l2_get_subdevdata(fimc_sd); | |
58 | spin_unlock_irqrestore(&fmd->slock, flags); | |
59 | } | |
60 | ||
d3953223 SN |
61 | /** |
62 | * fimc_pipeline_prepare - update pipeline information with subdevice pointers | |
39bb6df6 | 63 | * @me: media entity terminating the pipeline |
d3953223 SN |
64 | * |
65 | * Caller holds the graph mutex. | |
66 | */ | |
b9ee31e6 | 67 | static void fimc_pipeline_prepare(struct fimc_pipeline *p, |
403dfbec | 68 | struct media_entity *me) |
d3953223 | 69 | { |
52917bcb | 70 | struct fimc_md *fmd = entity_to_fimc_mdev(me); |
d3953223 | 71 | struct v4l2_subdev *sd; |
52917bcb | 72 | struct v4l2_subdev *sensor = NULL; |
0f735f52 | 73 | int i; |
d3953223 | 74 | |
0f735f52 SN |
75 | for (i = 0; i < IDX_MAX; i++) |
76 | p->subdevs[i] = NULL; | |
d3953223 | 77 | |
0f735f52 | 78 | while (1) { |
39bb6df6 SN |
79 | struct media_pad *pad = NULL; |
80 | ||
81 | /* Find remote source pad */ | |
82 | for (i = 0; i < me->num_pads; i++) { | |
83 | struct media_pad *spad = &me->pads[i]; | |
84 | if (!(spad->flags & MEDIA_PAD_FL_SINK)) | |
85 | continue; | |
1bddf1b3 | 86 | pad = media_entity_remote_pad(spad); |
39bb6df6 SN |
87 | if (pad) |
88 | break; | |
89 | } | |
0f735f52 | 90 | |
3efdf62c | 91 | if (!pad || !is_media_entity_v4l2_subdev(pad->entity)) |
0f735f52 | 92 | break; |
0f735f52 SN |
93 | sd = media_entity_to_v4l2_subdev(pad->entity); |
94 | ||
95 | switch (sd->grp_id) { | |
588c87be | 96 | case GRP_ID_SENSOR: |
52917bcb SN |
97 | sensor = sd; |
98 | /* fall through */ | |
99 | case GRP_ID_FIMC_IS_SENSOR: | |
0f735f52 SN |
100 | p->subdevs[IDX_SENSOR] = sd; |
101 | break; | |
588c87be | 102 | case GRP_ID_CSIS: |
0f735f52 SN |
103 | p->subdevs[IDX_CSIS] = sd; |
104 | break; | |
588c87be | 105 | case GRP_ID_FLITE: |
4af81310 SN |
106 | p->subdevs[IDX_FLITE] = sd; |
107 | break; | |
588c87be | 108 | case GRP_ID_FIMC: |
52917bcb | 109 | p->subdevs[IDX_FIMC] = sd; |
0f735f52 | 110 | break; |
e781bbe3 SN |
111 | case GRP_ID_FIMC_IS: |
112 | p->subdevs[IDX_IS_ISP] = sd; | |
113 | break; | |
0f735f52 | 114 | default: |
e781bbe3 | 115 | break; |
0f735f52 | 116 | } |
39bb6df6 SN |
117 | me = &sd->entity; |
118 | if (me->num_pads == 1) | |
119 | break; | |
d3953223 | 120 | } |
52917bcb SN |
121 | |
122 | if (sensor && p->subdevs[IDX_FIMC]) | |
123 | __setup_sensor_notification(fmd, sensor, p->subdevs[IDX_FIMC]); | |
d3953223 SN |
124 | } |
125 | ||
126 | /** | |
127 | * __subdev_set_power - change power state of a single subdev | |
128 | * @sd: subdevice to change power state for | |
129 | * @on: 1 to enable power or 0 to disable | |
130 | * | |
131 | * Return result of s_power subdev operation or -ENXIO if sd argument | |
132 | * is NULL. Return 0 if the subdevice does not implement s_power. | |
133 | */ | |
134 | static int __subdev_set_power(struct v4l2_subdev *sd, int on) | |
135 | { | |
136 | int *use_count; | |
137 | int ret; | |
138 | ||
139 | if (sd == NULL) | |
140 | return -ENXIO; | |
141 | ||
142 | use_count = &sd->entity.use_count; | |
143 | if (on && (*use_count)++ > 0) | |
144 | return 0; | |
145 | else if (!on && (*use_count == 0 || --(*use_count) > 0)) | |
146 | return 0; | |
147 | ret = v4l2_subdev_call(sd, core, s_power, on); | |
148 | ||
149 | return ret != -ENOIOCTLCMD ? ret : 0; | |
150 | } | |
151 | ||
152 | /** | |
153 | * fimc_pipeline_s_power - change power state of all pipeline subdevs | |
154 | * @fimc: fimc device terminating the pipeline | |
0f735f52 | 155 | * @state: true to power on, false to power off |
d3953223 | 156 | * |
0f735f52 | 157 | * Needs to be called with the graph mutex held. |
d3953223 | 158 | */ |
f8bca4f5 | 159 | static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on) |
d3953223 | 160 | { |
f8bca4f5 SN |
161 | static const u8 seq[2][IDX_MAX - 1] = { |
162 | { IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE }, | |
163 | { IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP }, | |
164 | }; | |
165 | int i, ret = 0; | |
d3953223 | 166 | |
0f735f52 | 167 | if (p->subdevs[IDX_SENSOR] == NULL) |
d3953223 SN |
168 | return -ENXIO; |
169 | ||
f8bca4f5 SN |
170 | for (i = 0; i < IDX_MAX - 1; i++) { |
171 | unsigned int idx = seq[on][i]; | |
172 | ||
173 | ret = __subdev_set_power(p->subdevs[idx], on); | |
174 | ||
0f735f52 | 175 | |
0f735f52 | 176 | if (ret < 0 && ret != -ENXIO) |
f8bca4f5 | 177 | goto error; |
d3953223 | 178 | } |
0f735f52 | 179 | return 0; |
f8bca4f5 SN |
180 | error: |
181 | for (; i >= 0; i--) { | |
182 | unsigned int idx = seq[on][i]; | |
183 | __subdev_set_power(p->subdevs[idx], !on); | |
184 | } | |
185 | return ret; | |
d3953223 SN |
186 | } |
187 | ||
188 | /** | |
b9ee31e6 SN |
189 | * __fimc_pipeline_open - update the pipeline information, enable power |
190 | * of all pipeline subdevs and the sensor clock | |
d3953223 | 191 | * @me: media entity to start graph walk with |
056f4f30 | 192 | * @prepare: true to walk the current pipeline and acquire all subdevs |
d3953223 | 193 | * |
740ad921 | 194 | * Called with the graph mutex held. |
d3953223 | 195 | */ |
403dfbec | 196 | static int __fimc_pipeline_open(struct exynos_media_pipeline *ep, |
056f4f30 | 197 | struct media_entity *me, bool prepare) |
d3953223 | 198 | { |
056f4f30 | 199 | struct fimc_md *fmd = entity_to_fimc_mdev(me); |
403dfbec | 200 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
056f4f30 | 201 | struct v4l2_subdev *sd; |
d3953223 SN |
202 | int ret; |
203 | ||
056f4f30 SN |
204 | if (WARN_ON(p == NULL || me == NULL)) |
205 | return -EINVAL; | |
206 | ||
207 | if (prepare) | |
0f735f52 SN |
208 | fimc_pipeline_prepare(p, me); |
209 | ||
056f4f30 SN |
210 | sd = p->subdevs[IDX_SENSOR]; |
211 | if (sd == NULL) | |
d3953223 | 212 | return -EINVAL; |
0f735f52 | 213 | |
056f4f30 SN |
214 | /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */ |
215 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) { | |
216 | ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]); | |
217 | if (ret < 0) | |
218 | return ret; | |
219 | } | |
fa91f105 | 220 | |
056f4f30 SN |
221 | ret = fimc_pipeline_s_power(p, 1); |
222 | if (!ret) | |
223 | return 0; | |
0f735f52 | 224 | |
056f4f30 SN |
225 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) |
226 | clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); | |
227 | ||
228 | return ret; | |
d3953223 SN |
229 | } |
230 | ||
d3953223 | 231 | /** |
b9ee31e6 | 232 | * __fimc_pipeline_close - disable the sensor clock and pipeline power |
d3953223 SN |
233 | * @fimc: fimc device terminating the pipeline |
234 | * | |
740ad921 | 235 | * Disable power of all subdevs and turn the external sensor clock off. |
d3953223 | 236 | */ |
403dfbec | 237 | static int __fimc_pipeline_close(struct exynos_media_pipeline *ep) |
d3953223 | 238 | { |
403dfbec | 239 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
056f4f30 SN |
240 | struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL; |
241 | struct fimc_md *fmd; | |
36da6fcd | 242 | int ret; |
740ad921 | 243 | |
36da6fcd SN |
244 | if (sd == NULL) { |
245 | pr_warn("%s(): No sensor subdev\n", __func__); | |
246 | return 0; | |
d3953223 | 247 | } |
056f4f30 | 248 | |
36da6fcd | 249 | ret = fimc_pipeline_s_power(p, 0); |
36da6fcd | 250 | |
056f4f30 SN |
251 | fmd = entity_to_fimc_mdev(&sd->entity); |
252 | ||
253 | /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */ | |
254 | if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) | |
255 | clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]); | |
256 | ||
d3953223 SN |
257 | return ret == -ENXIO ? 0 : ret; |
258 | } | |
259 | ||
d3953223 | 260 | /** |
8d274e7c | 261 | * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs |
0f735f52 | 262 | * @pipeline: video pipeline structure |
8d274e7c | 263 | * @on: passed as the s_stream() callback argument |
d3953223 | 264 | */ |
403dfbec | 265 | static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on) |
d3953223 | 266 | { |
8d274e7c SN |
267 | static const u8 seq[2][IDX_MAX] = { |
268 | { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE }, | |
269 | { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP }, | |
270 | }; | |
403dfbec | 271 | struct fimc_pipeline *p = to_fimc_pipeline(ep); |
8d274e7c | 272 | int i, ret = 0; |
d3953223 | 273 | |
0f735f52 | 274 | if (p->subdevs[IDX_SENSOR] == NULL) |
d3953223 SN |
275 | return -ENODEV; |
276 | ||
0f735f52 | 277 | for (i = 0; i < IDX_MAX; i++) { |
8d274e7c | 278 | unsigned int idx = seq[on][i]; |
0f735f52 SN |
279 | |
280 | ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on); | |
281 | ||
282 | if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV) | |
8d274e7c | 283 | goto error; |
0f735f52 | 284 | } |
0f735f52 | 285 | return 0; |
8d274e7c SN |
286 | error: |
287 | for (; i >= 0; i--) { | |
288 | unsigned int idx = seq[on][i]; | |
289 | v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on); | |
290 | } | |
291 | return ret; | |
d3953223 | 292 | } |
b9ee31e6 SN |
293 | |
294 | /* Media pipeline operations for the FIMC/FIMC-LITE video device driver */ | |
403dfbec | 295 | static const struct exynos_media_pipeline_ops fimc_pipeline_ops = { |
740ad921 SN |
296 | .open = __fimc_pipeline_open, |
297 | .close = __fimc_pipeline_close, | |
298 | .set_stream = __fimc_pipeline_s_stream, | |
b9ee31e6 | 299 | }; |
d3953223 | 300 | |
403dfbec SN |
301 | static struct exynos_media_pipeline *fimc_md_pipeline_create( |
302 | struct fimc_md *fmd) | |
303 | { | |
304 | struct fimc_pipeline *p; | |
305 | ||
306 | p = kzalloc(sizeof(*p), GFP_KERNEL); | |
307 | if (!p) | |
308 | return NULL; | |
309 | ||
310 | list_add_tail(&p->list, &fmd->pipelines); | |
311 | ||
312 | p->ep.ops = &fimc_pipeline_ops; | |
313 | return &p->ep; | |
314 | } | |
315 | ||
316 | static void fimc_md_pipelines_free(struct fimc_md *fmd) | |
317 | { | |
318 | while (!list_empty(&fmd->pipelines)) { | |
319 | struct fimc_pipeline *p; | |
320 | ||
321 | p = list_entry(fmd->pipelines.next, typeof(*p), list); | |
322 | list_del(&p->list); | |
323 | kfree(p); | |
324 | } | |
325 | } | |
326 | ||
2b13f7d4 SN |
327 | /* Parse port node and register as a sub-device any sensor specified there. */ |
328 | static int fimc_md_parse_port_node(struct fimc_md *fmd, | |
329 | struct device_node *port, | |
330 | unsigned int index) | |
331 | { | |
49b2f4c5 | 332 | struct fimc_source_info *pd = &fmd->sensor[index].pdata; |
2b13f7d4 | 333 | struct device_node *rem, *ep, *np; |
2b13f7d4 | 334 | struct v4l2_of_endpoint endpoint; |
2b13f7d4 SN |
335 | |
336 | /* Assume here a port node can have only one endpoint node. */ | |
337 | ep = of_get_next_child(port, NULL); | |
338 | if (!ep) | |
339 | return 0; | |
340 | ||
341 | v4l2_of_parse_endpoint(ep, &endpoint); | |
f2a575f6 | 342 | if (WARN_ON(endpoint.base.port == 0) || index >= FIMC_MAX_SENSORS) |
2b13f7d4 SN |
343 | return -EINVAL; |
344 | ||
f2a575f6 | 345 | pd->mux_id = (endpoint.base.port - 1) & 0x1; |
2b13f7d4 | 346 | |
fd9fdb78 | 347 | rem = of_graph_get_remote_port_parent(ep); |
2b13f7d4 SN |
348 | of_node_put(ep); |
349 | if (rem == NULL) { | |
350 | v4l2_info(&fmd->v4l2_dev, "Remote device at %s not found\n", | |
351 | ep->full_name); | |
352 | return 0; | |
353 | } | |
2b13f7d4 | 354 | |
f2a575f6 | 355 | if (fimc_input_is_parallel(endpoint.base.port)) { |
2b13f7d4 SN |
356 | if (endpoint.bus_type == V4L2_MBUS_PARALLEL) |
357 | pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601; | |
358 | else | |
359 | pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656; | |
360 | pd->flags = endpoint.bus.parallel.flags; | |
f2a575f6 | 361 | } else if (fimc_input_is_mipi_csi(endpoint.base.port)) { |
2b13f7d4 SN |
362 | /* |
363 | * MIPI CSI-2: only input mux selection and | |
364 | * the sensor's clock frequency is needed. | |
365 | */ | |
366 | pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2; | |
367 | } else { | |
368 | v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %s\n", | |
f2a575f6 | 369 | endpoint.base.port, rem->full_name); |
2b13f7d4 SN |
370 | } |
371 | /* | |
372 | * For FIMC-IS handled sensors, that are placed under i2c-isp device | |
373 | * node, FIMC is connected to the FIMC-IS through its ISP Writeback | |
374 | * input. Sensors are attached to the FIMC-LITE hostdata interface | |
375 | * directly or through MIPI-CSIS, depending on the external media bus | |
376 | * used. This needs to be handled in a more reliable way, not by just | |
377 | * checking parent's node name. | |
378 | */ | |
379 | np = of_get_parent(rem); | |
380 | ||
381 | if (np && !of_node_cmp(np->name, "i2c-isp")) | |
382 | pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK; | |
383 | else | |
384 | pd->fimc_bus_type = pd->sensor_bus_type; | |
385 | ||
fa91f105 SN |
386 | if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor))) |
387 | return -EINVAL; | |
2b13f7d4 | 388 | |
fa91f105 SN |
389 | fmd->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_OF; |
390 | fmd->sensor[index].asd.match.of.node = rem; | |
391 | fmd->async_subdevs[index] = &fmd->sensor[index].asd; | |
392 | ||
393 | fmd->num_sensors++; | |
394 | ||
395 | of_node_put(rem); | |
396 | return 0; | |
2b13f7d4 SN |
397 | } |
398 | ||
399 | /* Register all SoC external sub-devices */ | |
49b2f4c5 | 400 | static int fimc_md_register_sensor_entities(struct fimc_md *fmd) |
2b13f7d4 SN |
401 | { |
402 | struct device_node *parent = fmd->pdev->dev.of_node; | |
403 | struct device_node *node, *ports; | |
404 | int index = 0; | |
405 | int ret; | |
406 | ||
49b2f4c5 SN |
407 | /* |
408 | * Runtime resume one of the FIMC entities to make sure | |
409 | * the sclk_cam clocks are not globally disabled. | |
410 | */ | |
411 | if (!fmd->pmf) | |
412 | return -ENXIO; | |
413 | ||
414 | ret = pm_runtime_get_sync(fmd->pmf); | |
415 | if (ret < 0) | |
416 | return ret; | |
417 | ||
418 | fmd->num_sensors = 0; | |
419 | ||
2b13f7d4 SN |
420 | /* Attach sensors linked to MIPI CSI-2 receivers */ |
421 | for_each_available_child_of_node(parent, node) { | |
422 | struct device_node *port; | |
423 | ||
424 | if (of_node_cmp(node->name, "csis")) | |
425 | continue; | |
426 | /* The csis node can have only port subnode. */ | |
427 | port = of_get_next_child(node, NULL); | |
428 | if (!port) | |
429 | continue; | |
430 | ||
431 | ret = fimc_md_parse_port_node(fmd, port, index); | |
432 | if (ret < 0) | |
49b2f4c5 | 433 | goto rpm_put; |
2b13f7d4 SN |
434 | index++; |
435 | } | |
436 | ||
437 | /* Attach sensors listed in the parallel-ports node */ | |
438 | ports = of_get_child_by_name(parent, "parallel-ports"); | |
439 | if (!ports) | |
49b2f4c5 | 440 | goto rpm_put; |
2b13f7d4 SN |
441 | |
442 | for_each_child_of_node(ports, node) { | |
443 | ret = fimc_md_parse_port_node(fmd, node, index); | |
444 | if (ret < 0) | |
445 | break; | |
446 | index++; | |
447 | } | |
49b2f4c5 SN |
448 | rpm_put: |
449 | pm_runtime_put(fmd->pmf); | |
450 | return ret; | |
2b13f7d4 SN |
451 | } |
452 | ||
e2985a26 SN |
453 | static int __of_get_csis_id(struct device_node *np) |
454 | { | |
455 | u32 reg = 0; | |
456 | ||
457 | np = of_get_child_by_name(np, "port"); | |
458 | if (!np) | |
459 | return -EINVAL; | |
460 | of_property_read_u32(np, "reg", ®); | |
461 | return reg - FIMC_INPUT_MIPI_CSI2_0; | |
462 | } | |
d3953223 SN |
463 | |
464 | /* | |
7b43a6f3 | 465 | * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration. |
d3953223 | 466 | */ |
7b43a6f3 SN |
467 | static int register_fimc_lite_entity(struct fimc_md *fmd, |
468 | struct fimc_lite *fimc_lite) | |
d3953223 | 469 | { |
8163ec0b | 470 | struct v4l2_subdev *sd; |
403dfbec | 471 | struct exynos_media_pipeline *ep; |
afd7348c | 472 | int ret; |
4af81310 | 473 | |
7b43a6f3 SN |
474 | if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS || |
475 | fmd->fimc_lite[fimc_lite->index])) | |
476 | return -EBUSY; | |
d3953223 | 477 | |
7b43a6f3 SN |
478 | sd = &fimc_lite->subdev; |
479 | sd->grp_id = GRP_ID_FLITE; | |
403dfbec SN |
480 | |
481 | ep = fimc_md_pipeline_create(fmd); | |
482 | if (!ep) | |
483 | return -ENOMEM; | |
484 | ||
485 | v4l2_set_subdev_hostdata(sd, ep); | |
693f5c40 SN |
486 | |
487 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); | |
7b43a6f3 SN |
488 | if (!ret) |
489 | fmd->fimc_lite[fimc_lite->index] = fimc_lite; | |
490 | else | |
491 | v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n", | |
492 | fimc_lite->index); | |
493 | return ret; | |
d3953223 SN |
494 | } |
495 | ||
7b43a6f3 | 496 | static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc) |
4af81310 | 497 | { |
7b43a6f3 | 498 | struct v4l2_subdev *sd; |
403dfbec | 499 | struct exynos_media_pipeline *ep; |
4af81310 SN |
500 | int ret; |
501 | ||
7b43a6f3 SN |
502 | if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id])) |
503 | return -EBUSY; | |
4af81310 | 504 | |
7b43a6f3 SN |
505 | sd = &fimc->vid_cap.subdev; |
506 | sd->grp_id = GRP_ID_FIMC; | |
403dfbec SN |
507 | |
508 | ep = fimc_md_pipeline_create(fmd); | |
509 | if (!ep) | |
510 | return -ENOMEM; | |
511 | ||
512 | v4l2_set_subdev_hostdata(sd, ep); | |
4af81310 | 513 | |
7b43a6f3 SN |
514 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
515 | if (!ret) { | |
3e20c345 SN |
516 | if (!fmd->pmf && fimc->pdev) |
517 | fmd->pmf = &fimc->pdev->dev; | |
7b43a6f3 SN |
518 | fmd->fimc[fimc->id] = fimc; |
519 | fimc->vid_cap.user_subdev_api = fmd->user_subdev_api; | |
520 | } else { | |
521 | v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n", | |
522 | fimc->id, ret); | |
4af81310 | 523 | } |
7b43a6f3 | 524 | return ret; |
4af81310 SN |
525 | } |
526 | ||
7b43a6f3 SN |
527 | static int register_csis_entity(struct fimc_md *fmd, |
528 | struct platform_device *pdev, | |
529 | struct v4l2_subdev *sd) | |
d3953223 | 530 | { |
7b43a6f3 | 531 | struct device_node *node = pdev->dev.of_node; |
d3953223 SN |
532 | int id, ret; |
533 | ||
e2985a26 | 534 | id = node ? __of_get_csis_id(node) : max(0, pdev->id); |
7b43a6f3 | 535 | |
e2985a26 SN |
536 | if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES)) |
537 | return -ENOENT; | |
7b43a6f3 | 538 | |
e2985a26 SN |
539 | if (WARN_ON(fmd->csis[id].sd)) |
540 | return -EBUSY; | |
d3953223 | 541 | |
588c87be | 542 | sd->grp_id = GRP_ID_CSIS; |
d3953223 | 543 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
afd7348c SN |
544 | if (!ret) |
545 | fmd->csis[id].sd = sd; | |
546 | else | |
d3953223 | 547 | v4l2_err(&fmd->v4l2_dev, |
7b43a6f3 | 548 | "Failed to register MIPI-CSIS.%d (%d)\n", id, ret); |
d3953223 SN |
549 | return ret; |
550 | } | |
551 | ||
e781bbe3 SN |
552 | static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is) |
553 | { | |
554 | struct v4l2_subdev *sd = &is->isp.subdev; | |
34947b8a | 555 | struct exynos_media_pipeline *ep; |
e781bbe3 SN |
556 | int ret; |
557 | ||
34947b8a SN |
558 | /* Allocate pipeline object for the ISP capture video node. */ |
559 | ep = fimc_md_pipeline_create(fmd); | |
560 | if (!ep) | |
561 | return -ENOMEM; | |
562 | ||
563 | v4l2_set_subdev_hostdata(sd, ep); | |
564 | ||
e781bbe3 SN |
565 | ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd); |
566 | if (ret) { | |
567 | v4l2_err(&fmd->v4l2_dev, | |
568 | "Failed to register FIMC-ISP (%d)\n", ret); | |
569 | return ret; | |
570 | } | |
571 | ||
572 | fmd->fimc_is = is; | |
573 | return 0; | |
574 | } | |
575 | ||
7b43a6f3 SN |
576 | static int fimc_md_register_platform_entity(struct fimc_md *fmd, |
577 | struct platform_device *pdev, | |
578 | int plat_entity) | |
d3953223 | 579 | { |
7b43a6f3 SN |
580 | struct device *dev = &pdev->dev; |
581 | int ret = -EPROBE_DEFER; | |
582 | void *drvdata; | |
583 | ||
584 | /* Lock to ensure dev->driver won't change. */ | |
585 | device_lock(dev); | |
586 | ||
587 | if (!dev->driver || !try_module_get(dev->driver->owner)) | |
588 | goto dev_unlock; | |
589 | ||
590 | drvdata = dev_get_drvdata(dev); | |
f58c91ce | 591 | /* Some subdev didn't probe successfully id drvdata is NULL */ |
7b43a6f3 SN |
592 | if (drvdata) { |
593 | switch (plat_entity) { | |
594 | case IDX_FIMC: | |
595 | ret = register_fimc_entity(fmd, drvdata); | |
596 | break; | |
597 | case IDX_FLITE: | |
598 | ret = register_fimc_lite_entity(fmd, drvdata); | |
ecd9acbf | 599 | break; |
7b43a6f3 SN |
600 | case IDX_CSIS: |
601 | ret = register_csis_entity(fmd, pdev, drvdata); | |
602 | break; | |
e781bbe3 SN |
603 | case IDX_IS_ISP: |
604 | ret = register_fimc_is_entity(fmd, drvdata); | |
605 | break; | |
7b43a6f3 SN |
606 | default: |
607 | ret = -ENODEV; | |
ecd9acbf SN |
608 | } |
609 | } | |
d3953223 | 610 | |
7b43a6f3 SN |
611 | module_put(dev->driver->owner); |
612 | dev_unlock: | |
613 | device_unlock(dev); | |
614 | if (ret == -EPROBE_DEFER) | |
615 | dev_info(&fmd->pdev->dev, "deferring %s device registration\n", | |
616 | dev_name(dev)); | |
617 | else if (ret < 0) | |
618 | dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n", | |
619 | dev_name(dev), ret); | |
620 | return ret; | |
621 | } | |
622 | ||
e2985a26 | 623 | /* Register FIMC, FIMC-LITE and CSIS media entities */ |
49b2f4c5 SN |
624 | static int fimc_md_register_platform_entities(struct fimc_md *fmd, |
625 | struct device_node *parent) | |
e2985a26 SN |
626 | { |
627 | struct device_node *node; | |
628 | int ret = 0; | |
629 | ||
630 | for_each_available_child_of_node(parent, node) { | |
631 | struct platform_device *pdev; | |
632 | int plat_entity = -1; | |
633 | ||
634 | pdev = of_find_device_by_node(node); | |
635 | if (!pdev) | |
636 | continue; | |
637 | ||
638 | /* If driver of any entity isn't ready try all again later. */ | |
639 | if (!strcmp(node->name, CSIS_OF_NODE_NAME)) | |
640 | plat_entity = IDX_CSIS; | |
e781bbe3 SN |
641 | else if (!strcmp(node->name, FIMC_IS_OF_NODE_NAME)) |
642 | plat_entity = IDX_IS_ISP; | |
e2985a26 SN |
643 | else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME)) |
644 | plat_entity = IDX_FLITE; | |
645 | else if (!strcmp(node->name, FIMC_OF_NODE_NAME) && | |
646 | !of_property_read_bool(node, "samsung,lcd-wb")) | |
647 | plat_entity = IDX_FIMC; | |
648 | ||
649 | if (plat_entity >= 0) | |
650 | ret = fimc_md_register_platform_entity(fmd, pdev, | |
651 | plat_entity); | |
652 | put_device(&pdev->dev); | |
653 | if (ret < 0) | |
654 | break; | |
655 | } | |
656 | ||
657 | return ret; | |
658 | } | |
e2985a26 | 659 | |
d3953223 SN |
660 | static void fimc_md_unregister_entities(struct fimc_md *fmd) |
661 | { | |
662 | int i; | |
663 | ||
664 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
403dfbec SN |
665 | struct fimc_dev *dev = fmd->fimc[i]; |
666 | if (dev == NULL) | |
d3953223 | 667 | continue; |
403dfbec SN |
668 | v4l2_device_unregister_subdev(&dev->vid_cap.subdev); |
669 | dev->vid_cap.ve.pipe = NULL; | |
d3953223 SN |
670 | fmd->fimc[i] = NULL; |
671 | } | |
4af81310 | 672 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { |
403dfbec SN |
673 | struct fimc_lite *dev = fmd->fimc_lite[i]; |
674 | if (dev == NULL) | |
4af81310 | 675 | continue; |
403dfbec SN |
676 | v4l2_device_unregister_subdev(&dev->subdev); |
677 | dev->ve.pipe = NULL; | |
4af81310 SN |
678 | fmd->fimc_lite[i] = NULL; |
679 | } | |
d3953223 SN |
680 | for (i = 0; i < CSIS_MAX_ENTITIES; i++) { |
681 | if (fmd->csis[i].sd == NULL) | |
682 | continue; | |
683 | v4l2_device_unregister_subdev(fmd->csis[i].sd); | |
684 | fmd->csis[i].sd = NULL; | |
685 | } | |
e41a35cb SN |
686 | |
687 | if (fmd->fimc_is) | |
688 | v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev); | |
689 | ||
7b43a6f3 | 690 | v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n"); |
d3953223 SN |
691 | } |
692 | ||
d3953223 SN |
693 | /** |
694 | * __fimc_md_create_fimc_links - create links to all FIMC entities | |
695 | * @fmd: fimc media device | |
696 | * @source: the source entity to create links to all fimc entities from | |
697 | * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null | |
698 | * @pad: the source entity pad index | |
d0da3c35 | 699 | * @link_mask: bitmask of the fimc devices for which link should be enabled |
d3953223 | 700 | */ |
4af81310 SN |
701 | static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd, |
702 | struct media_entity *source, | |
703 | struct v4l2_subdev *sensor, | |
d0da3c35 | 704 | int pad, int link_mask) |
d3953223 | 705 | { |
4c8f0629 | 706 | struct fimc_source_info *si = NULL; |
d3953223 | 707 | struct media_entity *sink; |
4af81310 | 708 | unsigned int flags = 0; |
f998bb7b | 709 | int i, ret = 0; |
d3953223 | 710 | |
f998bb7b SN |
711 | if (sensor) { |
712 | si = v4l2_get_subdev_hostdata(sensor); | |
713 | /* Skip direct FIMC links in the logical FIMC-IS sensor path */ | |
4c8f0629 | 714 | if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) |
f998bb7b SN |
715 | ret = 1; |
716 | } | |
717 | ||
718 | for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) { | |
d3953223 | 719 | if (!fmd->fimc[i]) |
4af81310 | 720 | continue; |
d3953223 SN |
721 | /* |
722 | * Some FIMC variants are not fitted with camera capture | |
723 | * interface. Skip creating a link from sensor for those. | |
724 | */ | |
4af81310 | 725 | if (!fmd->fimc[i]->variant->has_cam_if) |
d3953223 SN |
726 | continue; |
727 | ||
d0da3c35 | 728 | flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0; |
4af81310 | 729 | |
693f5c40 | 730 | sink = &fmd->fimc[i]->vid_cap.subdev.entity; |
8df00a15 | 731 | ret = media_create_pad_link(source, pad, sink, |
88fa8311 | 732 | FIMC_SD_PAD_SINK_CAM, flags); |
d3953223 SN |
733 | if (ret) |
734 | return ret; | |
735 | ||
237e0265 SN |
736 | /* Notify FIMC capture subdev entity */ |
737 | ret = media_entity_call(sink, link_setup, &sink->pads[0], | |
738 | &source->pads[pad], flags); | |
739 | if (ret) | |
740 | break; | |
741 | ||
542fb082 | 742 | v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n", |
d3953223 | 743 | source->name, flags ? '=' : '-', sink->name); |
d3953223 | 744 | } |
4af81310 SN |
745 | |
746 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { | |
747 | if (!fmd->fimc_lite[i]) | |
748 | continue; | |
749 | ||
4af81310 | 750 | sink = &fmd->fimc_lite[i]->subdev.entity; |
8df00a15 | 751 | ret = media_create_pad_link(source, pad, sink, |
f998bb7b | 752 | FLITE_SD_PAD_SINK, 0); |
4af81310 SN |
753 | if (ret) |
754 | return ret; | |
755 | ||
756 | /* Notify FIMC-LITE subdev entity */ | |
757 | ret = media_entity_call(sink, link_setup, &sink->pads[0], | |
f998bb7b | 758 | &source->pads[pad], 0); |
4af81310 SN |
759 | if (ret) |
760 | break; | |
761 | ||
f998bb7b SN |
762 | v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n", |
763 | source->name, sink->name); | |
4af81310 | 764 | } |
d3953223 SN |
765 | return 0; |
766 | } | |
767 | ||
4af81310 SN |
768 | /* Create links from FIMC-LITE source pads to other entities */ |
769 | static int __fimc_md_create_flite_source_links(struct fimc_md *fmd) | |
770 | { | |
771 | struct media_entity *source, *sink; | |
a26860bd | 772 | int i, ret = 0; |
4af81310 SN |
773 | |
774 | for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) { | |
775 | struct fimc_lite *fimc = fmd->fimc_lite[i]; | |
f998bb7b | 776 | |
4af81310 SN |
777 | if (fimc == NULL) |
778 | continue; | |
f998bb7b | 779 | |
4af81310 | 780 | source = &fimc->subdev.entity; |
bc7584b0 | 781 | sink = &fimc->ve.vdev.entity; |
4af81310 | 782 | /* FIMC-LITE's subdev and video node */ |
8df00a15 | 783 | ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_DMA, |
f998bb7b SN |
784 | sink, 0, 0); |
785 | if (ret) | |
786 | break; | |
787 | /* Link from FIMC-LITE to IS-ISP subdev */ | |
788 | sink = &fmd->fimc_is->isp.subdev.entity; | |
8df00a15 | 789 | ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_ISP, |
f998bb7b | 790 | sink, 0, 0); |
4af81310 SN |
791 | if (ret) |
792 | break; | |
f998bb7b SN |
793 | } |
794 | ||
795 | return ret; | |
796 | } | |
797 | ||
798 | /* Create FIMC-IS links */ | |
799 | static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd) | |
800 | { | |
34947b8a | 801 | struct fimc_isp *isp = &fmd->fimc_is->isp; |
f998bb7b SN |
802 | struct media_entity *source, *sink; |
803 | int i, ret; | |
804 | ||
34947b8a | 805 | source = &isp->subdev.entity; |
f998bb7b SN |
806 | |
807 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
808 | if (fmd->fimc[i] == NULL) | |
809 | continue; | |
810 | ||
34947b8a | 811 | /* Link from FIMC-IS-ISP subdev to FIMC */ |
f998bb7b | 812 | sink = &fmd->fimc[i]->vid_cap.subdev.entity; |
8df00a15 | 813 | ret = media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_FIFO, |
f998bb7b SN |
814 | sink, FIMC_SD_PAD_SINK_FIFO, 0); |
815 | if (ret) | |
816 | return ret; | |
4af81310 SN |
817 | } |
818 | ||
34947b8a SN |
819 | /* Link from FIMC-IS-ISP subdev to fimc-is-isp.capture video node */ |
820 | sink = &isp->video_capture.ve.vdev.entity; | |
821 | ||
822 | /* Skip this link if the fimc-is-isp video node driver isn't built-in */ | |
823 | if (sink->num_pads == 0) | |
824 | return 0; | |
825 | ||
8df00a15 | 826 | return media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_DMA, |
34947b8a | 827 | sink, 0, 0); |
4af81310 SN |
828 | } |
829 | ||
d3953223 SN |
830 | /** |
831 | * fimc_md_create_links - create default links between registered entities | |
832 | * | |
833 | * Parallel interface sensor entities are connected directly to FIMC capture | |
834 | * entities. The sensors using MIPI CSIS bus are connected through immutable | |
835 | * link with CSI receiver entity specified by mux_id. Any registered CSIS | |
836 | * entity has a link to each registered FIMC capture entity. Enabled links | |
837 | * are created by default between each subsequent registered sensor and | |
838 | * subsequent FIMC capture entity. The number of default active links is | |
839 | * determined by the number of available sensors or FIMC entities, | |
840 | * whichever is less. | |
841 | */ | |
842 | static int fimc_md_create_links(struct fimc_md *fmd) | |
843 | { | |
a8697ec8 | 844 | struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL }; |
d3953223 | 845 | struct v4l2_subdev *sensor, *csis; |
56bc911a | 846 | struct fimc_source_info *pdata; |
237e0265 | 847 | struct media_entity *source, *sink; |
d0da3c35 SN |
848 | int i, pad, fimc_id = 0, ret = 0; |
849 | u32 flags, link_mask = 0; | |
d3953223 SN |
850 | |
851 | for (i = 0; i < fmd->num_sensors; i++) { | |
852 | if (fmd->sensor[i].subdev == NULL) | |
853 | continue; | |
854 | ||
855 | sensor = fmd->sensor[i].subdev; | |
4c8f0629 SN |
856 | pdata = v4l2_get_subdev_hostdata(sensor); |
857 | if (!pdata) | |
d3953223 SN |
858 | continue; |
859 | ||
860 | source = NULL; | |
d3953223 | 861 | |
56bc911a SN |
862 | switch (pdata->sensor_bus_type) { |
863 | case FIMC_BUS_TYPE_MIPI_CSI2: | |
d3953223 SN |
864 | if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES, |
865 | "Wrong CSI channel id: %d\n", pdata->mux_id)) | |
866 | return -EINVAL; | |
867 | ||
868 | csis = fmd->csis[pdata->mux_id].sd; | |
869 | if (WARN(csis == NULL, | |
870 | "MIPI-CSI interface specified " | |
871 | "but s5p-csis module is not loaded!\n")) | |
d12392ec | 872 | return -EINVAL; |
d3953223 | 873 | |
1c9f5bd7 | 874 | pad = sensor->entity.num_pads - 1; |
8df00a15 | 875 | ret = media_create_pad_link(&sensor->entity, pad, |
d3953223 SN |
876 | &csis->entity, CSIS_PAD_SINK, |
877 | MEDIA_LNK_FL_IMMUTABLE | | |
878 | MEDIA_LNK_FL_ENABLED); | |
879 | if (ret) | |
880 | return ret; | |
881 | ||
969e877c | 882 | v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n", |
d3953223 SN |
883 | sensor->entity.name, csis->entity.name); |
884 | ||
4af81310 | 885 | source = NULL; |
5d33ee92 | 886 | csi_sensors[pdata->mux_id] = sensor; |
d3953223 SN |
887 | break; |
888 | ||
56bc911a | 889 | case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656: |
d3953223 SN |
890 | source = &sensor->entity; |
891 | pad = 0; | |
892 | break; | |
893 | ||
894 | default: | |
895 | v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n", | |
56bc911a | 896 | pdata->sensor_bus_type); |
d3953223 SN |
897 | return -EINVAL; |
898 | } | |
899 | if (source == NULL) | |
900 | continue; | |
901 | ||
d0da3c35 | 902 | link_mask = 1 << fimc_id++; |
4af81310 | 903 | ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor, |
d0da3c35 | 904 | pad, link_mask); |
4af81310 SN |
905 | } |
906 | ||
a8697ec8 | 907 | for (i = 0; i < CSIS_MAX_ENTITIES; i++) { |
4af81310 SN |
908 | if (fmd->csis[i].sd == NULL) |
909 | continue; | |
f998bb7b | 910 | |
4af81310 SN |
911 | source = &fmd->csis[i].sd->entity; |
912 | pad = CSIS_PAD_SOURCE; | |
5d33ee92 | 913 | sensor = csi_sensors[i]; |
4af81310 | 914 | |
d0da3c35 | 915 | link_mask = 1 << fimc_id++; |
5d33ee92 | 916 | ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor, |
d0da3c35 | 917 | pad, link_mask); |
d3953223 | 918 | } |
4af81310 | 919 | |
237e0265 SN |
920 | /* Create immutable links between each FIMC's subdev and video node */ |
921 | flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED; | |
922 | for (i = 0; i < FIMC_MAX_DEVS; i++) { | |
923 | if (!fmd->fimc[i]) | |
924 | continue; | |
f998bb7b | 925 | |
693f5c40 | 926 | source = &fmd->fimc[i]->vid_cap.subdev.entity; |
bc7584b0 | 927 | sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity; |
f998bb7b | 928 | |
8df00a15 | 929 | ret = media_create_pad_link(source, FIMC_SD_PAD_SOURCE, |
237e0265 SN |
930 | sink, 0, flags); |
931 | if (ret) | |
932 | break; | |
933 | } | |
934 | ||
f998bb7b SN |
935 | ret = __fimc_md_create_flite_source_links(fmd); |
936 | if (ret < 0) | |
937 | return ret; | |
938 | ||
939 | if (fmd->use_isp) | |
940 | ret = __fimc_md_create_fimc_is_links(fmd); | |
941 | ||
942 | return ret; | |
d3953223 SN |
943 | } |
944 | ||
945 | /* | |
056f4f30 | 946 | * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management. |
d3953223 | 947 | */ |
0e23cbbe SN |
948 | static void fimc_md_put_clocks(struct fimc_md *fmd) |
949 | { | |
950 | int i = FIMC_MAX_CAMCLKS; | |
951 | ||
952 | while (--i >= 0) { | |
953 | if (IS_ERR(fmd->camclk[i].clock)) | |
954 | continue; | |
0e23cbbe SN |
955 | clk_put(fmd->camclk[i].clock); |
956 | fmd->camclk[i].clock = ERR_PTR(-EINVAL); | |
957 | } | |
056f4f30 SN |
958 | |
959 | /* Writeback (PIXELASYNCMx) clocks */ | |
960 | for (i = 0; i < FIMC_MAX_WBCLKS; i++) { | |
961 | if (IS_ERR(fmd->wbclk[i])) | |
962 | continue; | |
963 | clk_put(fmd->wbclk[i]); | |
964 | fmd->wbclk[i] = ERR_PTR(-EINVAL); | |
965 | } | |
0e23cbbe SN |
966 | } |
967 | ||
d3953223 SN |
968 | static int fimc_md_get_clocks(struct fimc_md *fmd) |
969 | { | |
49b2f4c5 | 970 | struct device *dev = &fmd->pdev->dev; |
d3953223 SN |
971 | char clk_name[32]; |
972 | struct clk *clock; | |
044c372a | 973 | int i, ret = 0; |
0e23cbbe SN |
974 | |
975 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) | |
976 | fmd->camclk[i].clock = ERR_PTR(-EINVAL); | |
977 | ||
d3953223 SN |
978 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) { |
979 | snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i); | |
0e23cbbe SN |
980 | clock = clk_get(dev, clk_name); |
981 | ||
dc3ae328 | 982 | if (IS_ERR(clock)) { |
49b2f4c5 | 983 | dev_err(dev, "Failed to get clock: %s\n", clk_name); |
0e23cbbe SN |
984 | ret = PTR_ERR(clock); |
985 | break; | |
986 | } | |
d3953223 SN |
987 | fmd->camclk[i].clock = clock; |
988 | } | |
0e23cbbe SN |
989 | if (ret) |
990 | fimc_md_put_clocks(fmd); | |
d3953223 | 991 | |
056f4f30 SN |
992 | if (!fmd->use_isp) |
993 | return 0; | |
994 | /* | |
995 | * For now get only PIXELASYNCM1 clock (Writeback B/ISP), | |
996 | * leave PIXELASYNCM0 out for the LCD Writeback driver. | |
997 | */ | |
998 | fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL); | |
999 | ||
1000 | for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) { | |
1001 | snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i); | |
1002 | clock = clk_get(dev, clk_name); | |
1003 | if (IS_ERR(clock)) { | |
1004 | v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n", | |
1005 | clk_name); | |
1006 | ret = PTR_ERR(clock); | |
1007 | break; | |
1008 | } | |
1009 | fmd->wbclk[i] = clock; | |
1010 | } | |
1011 | if (ret) | |
1012 | fimc_md_put_clocks(fmd); | |
1013 | ||
0e23cbbe | 1014 | return ret; |
d3953223 SN |
1015 | } |
1016 | ||
d3775fa7 | 1017 | static int __fimc_md_modify_pipeline(struct media_entity *entity, bool enable) |
d3953223 | 1018 | { |
403dfbec | 1019 | struct exynos_video_entity *ve; |
d3775fa7 | 1020 | struct fimc_pipeline *p; |
403dfbec | 1021 | struct video_device *vdev; |
d3775fa7 | 1022 | int ret; |
d3953223 | 1023 | |
d3775fa7 SN |
1024 | vdev = media_entity_to_video_device(entity); |
1025 | if (vdev->entity.use_count == 0) | |
d3953223 SN |
1026 | return 0; |
1027 | ||
403dfbec | 1028 | ve = vdev_to_exynos_video_entity(vdev); |
d3775fa7 SN |
1029 | p = to_fimc_pipeline(ve->pipe); |
1030 | /* | |
1031 | * Nothing to do if we are disabling the pipeline, some link | |
1032 | * has been disconnected and p->subdevs array is cleared now. | |
1033 | */ | |
1034 | if (!enable && p->subdevs[IDX_SENSOR] == NULL) | |
1035 | return 0; | |
403dfbec | 1036 | |
d3775fa7 SN |
1037 | if (enable) |
1038 | ret = __fimc_pipeline_open(ve->pipe, entity, true); | |
1039 | else | |
1040 | ret = __fimc_pipeline_close(ve->pipe); | |
131b6c61 | 1041 | |
d3775fa7 SN |
1042 | if (ret == 0 && !enable) |
1043 | memset(p->subdevs, 0, sizeof(p->subdevs)); | |
1044 | ||
1045 | return ret; | |
1046 | } | |
1047 | ||
d10c9894 | 1048 | /* Locking: called with entity->graph_obj.mdev->graph_mutex mutex held. */ |
fd7e5309 SA |
1049 | static int __fimc_md_modify_pipelines(struct media_entity *entity, bool enable, |
1050 | struct media_entity_graph *graph) | |
d3775fa7 SN |
1051 | { |
1052 | struct media_entity *entity_err = entity; | |
d3775fa7 SN |
1053 | int ret; |
1054 | ||
1055 | /* | |
1056 | * Walk current graph and call the pipeline open/close routine for each | |
1057 | * opened video node that belongs to the graph of entities connected | |
1058 | * through active links. This is needed as we cannot power on/off the | |
1059 | * subdevs in random order. | |
1060 | */ | |
fd7e5309 | 1061 | media_entity_graph_walk_start(graph, entity); |
d3775fa7 | 1062 | |
fd7e5309 | 1063 | while ((entity = media_entity_graph_walk_next(graph))) { |
3efdf62c | 1064 | if (!is_media_entity_v4l2_io(entity)) |
d3775fa7 SN |
1065 | continue; |
1066 | ||
1067 | ret = __fimc_md_modify_pipeline(entity, enable); | |
1068 | ||
1069 | if (ret < 0) | |
1070 | goto err; | |
1071 | } | |
1072 | ||
1073 | return 0; | |
d3775fa7 | 1074 | |
fd7e5309 SA |
1075 | err: |
1076 | media_entity_graph_walk_start(graph, entity_err); | |
1077 | ||
1078 | while ((entity_err = media_entity_graph_walk_next(graph))) { | |
3efdf62c | 1079 | if (!is_media_entity_v4l2_io(entity_err)) |
d3775fa7 SN |
1080 | continue; |
1081 | ||
1082 | __fimc_md_modify_pipeline(entity_err, !enable); | |
1083 | ||
1084 | if (entity_err == entity) | |
1085 | break; | |
1086 | } | |
1087 | ||
1088 | return ret; | |
1089 | } | |
1090 | ||
1091 | static int fimc_md_link_notify(struct media_link *link, unsigned int flags, | |
1092 | unsigned int notification) | |
1093 | { | |
fd7e5309 SA |
1094 | struct media_entity_graph *graph = |
1095 | &container_of(link->graph_obj.mdev, struct fimc_md, | |
1096 | media_dev)->link_setup_graph; | |
d3775fa7 SN |
1097 | struct media_entity *sink = link->sink->entity; |
1098 | int ret = 0; | |
1099 | ||
1100 | /* Before link disconnection */ | |
1101 | if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) { | |
fd7e5309 SA |
1102 | ret = media_entity_graph_walk_init(graph, |
1103 | link->graph_obj.mdev); | |
1104 | if (ret) | |
1105 | return ret; | |
d3775fa7 | 1106 | if (!(flags & MEDIA_LNK_FL_ENABLED)) |
fd7e5309 | 1107 | ret = __fimc_md_modify_pipelines(sink, false, graph); |
cdf58a6f | 1108 | #if 0 |
d3775fa7 | 1109 | else |
cdf58a6f MCC |
1110 | /* TODO: Link state change validation */ |
1111 | #endif | |
d3775fa7 | 1112 | /* After link activation */ |
fd7e5309 SA |
1113 | } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH) { |
1114 | if (link->flags & MEDIA_LNK_FL_ENABLED) | |
1115 | ret = __fimc_md_modify_pipelines(sink, true, graph); | |
1116 | media_entity_graph_walk_cleanup(graph); | |
d3953223 | 1117 | } |
740ad921 | 1118 | |
d3775fa7 | 1119 | return ret ? -EPIPE : 0; |
d3953223 SN |
1120 | } |
1121 | ||
1122 | static ssize_t fimc_md_sysfs_show(struct device *dev, | |
1123 | struct device_attribute *attr, char *buf) | |
1124 | { | |
1125 | struct platform_device *pdev = to_platform_device(dev); | |
1126 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1127 | ||
1128 | if (fmd->user_subdev_api) | |
1129 | return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE); | |
1130 | ||
1131 | return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE); | |
1132 | } | |
1133 | ||
1134 | static ssize_t fimc_md_sysfs_store(struct device *dev, | |
1135 | struct device_attribute *attr, | |
1136 | const char *buf, size_t count) | |
1137 | { | |
1138 | struct platform_device *pdev = to_platform_device(dev); | |
1139 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1140 | bool subdev_api; | |
1141 | int i; | |
1142 | ||
1143 | if (!strcmp(buf, "vid-dev\n")) | |
1144 | subdev_api = false; | |
1145 | else if (!strcmp(buf, "sub-dev\n")) | |
1146 | subdev_api = true; | |
1147 | else | |
1148 | return count; | |
1149 | ||
1150 | fmd->user_subdev_api = subdev_api; | |
1151 | for (i = 0; i < FIMC_MAX_DEVS; i++) | |
1152 | if (fmd->fimc[i]) | |
1153 | fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api; | |
1154 | return count; | |
1155 | } | |
1156 | /* | |
1157 | * This device attribute is to select video pipeline configuration method. | |
1158 | * There are following valid values: | |
1159 | * vid-dev - for V4L2 video node API only, subdevice will be configured | |
1160 | * by the host driver. | |
1161 | * sub-dev - for media controller API, subdevs must be configured in user | |
1162 | * space before starting streaming. | |
1163 | */ | |
1164 | static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO, | |
1165 | fimc_md_sysfs_show, fimc_md_sysfs_store); | |
1166 | ||
4163851f SN |
1167 | static int fimc_md_get_pinctrl(struct fimc_md *fmd) |
1168 | { | |
1169 | struct device *dev = &fmd->pdev->dev; | |
1170 | struct fimc_pinctrl *pctl = &fmd->pinctl; | |
1171 | ||
1172 | pctl->pinctrl = devm_pinctrl_get(dev); | |
1173 | if (IS_ERR(pctl->pinctrl)) | |
1174 | return PTR_ERR(pctl->pinctrl); | |
1175 | ||
1176 | pctl->state_default = pinctrl_lookup_state(pctl->pinctrl, | |
1177 | PINCTRL_STATE_DEFAULT); | |
1178 | if (IS_ERR(pctl->state_default)) | |
1179 | return PTR_ERR(pctl->state_default); | |
1180 | ||
1181 | pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl, | |
1182 | PINCTRL_STATE_IDLE); | |
1183 | return 0; | |
1184 | } | |
1185 | ||
d3f5e0c5 SN |
1186 | static int cam_clk_prepare(struct clk_hw *hw) |
1187 | { | |
1188 | struct cam_clk *camclk = to_cam_clk(hw); | |
1189 | int ret; | |
1190 | ||
1191 | if (camclk->fmd->pmf == NULL) | |
1192 | return -ENODEV; | |
1193 | ||
1194 | ret = pm_runtime_get_sync(camclk->fmd->pmf); | |
1195 | return ret < 0 ? ret : 0; | |
1196 | } | |
1197 | ||
1198 | static void cam_clk_unprepare(struct clk_hw *hw) | |
1199 | { | |
1200 | struct cam_clk *camclk = to_cam_clk(hw); | |
1201 | ||
1202 | if (camclk->fmd->pmf == NULL) | |
1203 | return; | |
1204 | ||
1205 | pm_runtime_put_sync(camclk->fmd->pmf); | |
1206 | } | |
1207 | ||
1208 | static const struct clk_ops cam_clk_ops = { | |
1209 | .prepare = cam_clk_prepare, | |
1210 | .unprepare = cam_clk_unprepare, | |
1211 | }; | |
1212 | ||
1213 | static void fimc_md_unregister_clk_provider(struct fimc_md *fmd) | |
1214 | { | |
1215 | struct cam_clk_provider *cp = &fmd->clk_provider; | |
1216 | unsigned int i; | |
1217 | ||
1218 | if (cp->of_node) | |
1219 | of_clk_del_provider(cp->of_node); | |
1220 | ||
1221 | for (i = 0; i < cp->num_clocks; i++) | |
1222 | clk_unregister(cp->clks[i]); | |
1223 | } | |
1224 | ||
1225 | static int fimc_md_register_clk_provider(struct fimc_md *fmd) | |
1226 | { | |
1227 | struct cam_clk_provider *cp = &fmd->clk_provider; | |
1228 | struct device *dev = &fmd->pdev->dev; | |
1229 | int i, ret; | |
1230 | ||
1231 | for (i = 0; i < FIMC_MAX_CAMCLKS; i++) { | |
1232 | struct cam_clk *camclk = &cp->camclk[i]; | |
1233 | struct clk_init_data init; | |
1234 | const char *p_name; | |
1235 | ||
1236 | ret = of_property_read_string_index(dev->of_node, | |
1237 | "clock-output-names", i, &init.name); | |
1238 | if (ret < 0) | |
1239 | break; | |
1240 | ||
1241 | p_name = __clk_get_name(fmd->camclk[i].clock); | |
1242 | ||
1243 | /* It's safe since clk_register() will duplicate the string. */ | |
1244 | init.parent_names = &p_name; | |
1245 | init.num_parents = 1; | |
1246 | init.ops = &cam_clk_ops; | |
1247 | init.flags = CLK_SET_RATE_PARENT; | |
1248 | camclk->hw.init = &init; | |
1249 | camclk->fmd = fmd; | |
1250 | ||
1251 | cp->clks[i] = clk_register(NULL, &camclk->hw); | |
1252 | if (IS_ERR(cp->clks[i])) { | |
1253 | dev_err(dev, "failed to register clock: %s (%ld)\n", | |
1254 | init.name, PTR_ERR(cp->clks[i])); | |
1255 | ret = PTR_ERR(cp->clks[i]); | |
1256 | goto err; | |
1257 | } | |
1258 | cp->num_clocks++; | |
1259 | } | |
1260 | ||
1261 | if (cp->num_clocks == 0) { | |
1262 | dev_warn(dev, "clk provider not registered\n"); | |
1263 | return 0; | |
1264 | } | |
1265 | ||
1266 | cp->clk_data.clks = cp->clks; | |
1267 | cp->clk_data.clk_num = cp->num_clocks; | |
1268 | cp->of_node = dev->of_node; | |
1269 | ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get, | |
1270 | &cp->clk_data); | |
1271 | if (ret == 0) | |
1272 | return 0; | |
1273 | err: | |
1274 | fimc_md_unregister_clk_provider(fmd); | |
1275 | return ret; | |
1276 | } | |
d3f5e0c5 | 1277 | |
fa91f105 SN |
1278 | static int subdev_notifier_bound(struct v4l2_async_notifier *notifier, |
1279 | struct v4l2_subdev *subdev, | |
1280 | struct v4l2_async_subdev *asd) | |
1281 | { | |
1282 | struct fimc_md *fmd = notifier_to_fimc_md(notifier); | |
1283 | struct fimc_sensor_info *si = NULL; | |
1284 | int i; | |
1285 | ||
1286 | /* Find platform data for this sensor subdev */ | |
1287 | for (i = 0; i < ARRAY_SIZE(fmd->sensor); i++) | |
1288 | if (fmd->sensor[i].asd.match.of.node == subdev->dev->of_node) | |
1289 | si = &fmd->sensor[i]; | |
1290 | ||
1291 | if (si == NULL) | |
1292 | return -EINVAL; | |
1293 | ||
1294 | v4l2_set_subdev_hostdata(subdev, &si->pdata); | |
1295 | ||
1296 | if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK) | |
1297 | subdev->grp_id = GRP_ID_FIMC_IS_SENSOR; | |
1298 | else | |
1299 | subdev->grp_id = GRP_ID_SENSOR; | |
1300 | ||
1301 | si->subdev = subdev; | |
1302 | ||
1303 | v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n", | |
1304 | subdev->name, fmd->num_sensors); | |
1305 | ||
1306 | fmd->num_sensors++; | |
1307 | ||
1308 | return 0; | |
1309 | } | |
1310 | ||
1311 | static int subdev_notifier_complete(struct v4l2_async_notifier *notifier) | |
1312 | { | |
1313 | struct fimc_md *fmd = notifier_to_fimc_md(notifier); | |
1314 | int ret; | |
1315 | ||
1316 | mutex_lock(&fmd->media_dev.graph_mutex); | |
1317 | ||
1318 | ret = fimc_md_create_links(fmd); | |
1319 | if (ret < 0) | |
1320 | goto unlock; | |
1321 | ||
1322 | ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev); | |
1323 | unlock: | |
1324 | mutex_unlock(&fmd->media_dev.graph_mutex); | |
9832e155 JMC |
1325 | if (ret < 0) |
1326 | return ret; | |
1327 | ||
1328 | return media_device_register(&fmd->media_dev); | |
fa91f105 SN |
1329 | } |
1330 | ||
ecd9acbf | 1331 | static int fimc_md_probe(struct platform_device *pdev) |
d3953223 | 1332 | { |
e2985a26 | 1333 | struct device *dev = &pdev->dev; |
d3953223 SN |
1334 | struct v4l2_device *v4l2_dev; |
1335 | struct fimc_md *fmd; | |
1336 | int ret; | |
1337 | ||
e2985a26 | 1338 | fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL); |
d3953223 SN |
1339 | if (!fmd) |
1340 | return -ENOMEM; | |
1341 | ||
1342 | spin_lock_init(&fmd->slock); | |
403dfbec | 1343 | INIT_LIST_HEAD(&fmd->pipelines); |
49b2f4c5 | 1344 | fmd->pdev = pdev; |
d3953223 SN |
1345 | |
1346 | strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC", | |
1347 | sizeof(fmd->media_dev.model)); | |
1348 | fmd->media_dev.link_notify = fimc_md_link_notify; | |
e2985a26 | 1349 | fmd->media_dev.dev = dev; |
d3953223 SN |
1350 | |
1351 | v4l2_dev = &fmd->v4l2_dev; | |
1352 | v4l2_dev->mdev = &fmd->media_dev; | |
e1d72f4d | 1353 | v4l2_dev->notify = fimc_sensor_notify; |
e2985a26 | 1354 | strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name)); |
d3953223 | 1355 | |
e781bbe3 | 1356 | fmd->use_isp = fimc_md_is_isp_available(dev->of_node); |
49b2f4c5 | 1357 | fmd->user_subdev_api = true; |
e781bbe3 | 1358 | |
2e7508e4 MCC |
1359 | media_device_init(&fmd->media_dev); |
1360 | ||
e2985a26 | 1361 | ret = v4l2_device_register(dev, &fmd->v4l2_dev); |
d3953223 SN |
1362 | if (ret < 0) { |
1363 | v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret); | |
6d91a51a | 1364 | return ret; |
d3953223 | 1365 | } |
d3f5e0c5 | 1366 | |
d3953223 SN |
1367 | ret = fimc_md_get_clocks(fmd); |
1368 | if (ret) | |
fa91f105 | 1369 | goto err_md; |
d3953223 | 1370 | |
4163851f SN |
1371 | ret = fimc_md_get_pinctrl(fmd); |
1372 | if (ret < 0) { | |
1373 | if (ret != EPROBE_DEFER) | |
1374 | dev_err(dev, "Failed to get pinctrl: %d\n", ret); | |
fa91f105 | 1375 | goto err_clk; |
4163851f SN |
1376 | } |
1377 | ||
fa91f105 SN |
1378 | platform_set_drvdata(pdev, fmd); |
1379 | ||
1380 | /* Protect the media graph while we're registering entities */ | |
1381 | mutex_lock(&fmd->media_dev.graph_mutex); | |
1382 | ||
49b2f4c5 | 1383 | ret = fimc_md_register_platform_entities(fmd, dev->of_node); |
fa91f105 SN |
1384 | if (ret) { |
1385 | mutex_unlock(&fmd->media_dev.graph_mutex); | |
1386 | goto err_clk; | |
1387 | } | |
d3953223 | 1388 | |
49b2f4c5 SN |
1389 | ret = fimc_md_register_sensor_entities(fmd); |
1390 | if (ret) { | |
1391 | mutex_unlock(&fmd->media_dev.graph_mutex); | |
1392 | goto err_m_ent; | |
5cbf6f16 | 1393 | } |
e2985a26 | 1394 | |
fa91f105 | 1395 | mutex_unlock(&fmd->media_dev.graph_mutex); |
d3953223 SN |
1396 | |
1397 | ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode); | |
693f5c40 | 1398 | if (ret) |
fa91f105 SN |
1399 | goto err_m_ent; |
1400 | /* | |
1401 | * FIMC platform devices need to be registered before the sclk_cam | |
1402 | * clocks provider, as one of these devices needs to be activated | |
1403 | * to enable the clock. | |
1404 | */ | |
1405 | ret = fimc_md_register_clk_provider(fmd); | |
1406 | if (ret < 0) { | |
1407 | v4l2_err(v4l2_dev, "clock provider registration failed\n"); | |
1408 | goto err_attr; | |
1409 | } | |
1410 | ||
1411 | if (fmd->num_sensors > 0) { | |
1412 | fmd->subdev_notifier.subdevs = fmd->async_subdevs; | |
1413 | fmd->subdev_notifier.num_subdevs = fmd->num_sensors; | |
1414 | fmd->subdev_notifier.bound = subdev_notifier_bound; | |
1415 | fmd->subdev_notifier.complete = subdev_notifier_complete; | |
1416 | fmd->num_sensors = 0; | |
1417 | ||
1418 | ret = v4l2_async_notifier_register(&fmd->v4l2_dev, | |
1419 | &fmd->subdev_notifier); | |
1420 | if (ret) | |
1421 | goto err_clk_p; | |
1422 | } | |
693f5c40 | 1423 | |
693f5c40 SN |
1424 | return 0; |
1425 | ||
fa91f105 SN |
1426 | err_clk_p: |
1427 | fimc_md_unregister_clk_provider(fmd); | |
1428 | err_attr: | |
1429 | device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode); | |
693f5c40 | 1430 | err_clk: |
d3953223 | 1431 | fimc_md_put_clocks(fmd); |
fa91f105 | 1432 | err_m_ent: |
d3953223 | 1433 | fimc_md_unregister_entities(fmd); |
693f5c40 | 1434 | err_md: |
9832e155 | 1435 | media_device_cleanup(&fmd->media_dev); |
d3953223 | 1436 | v4l2_device_unregister(&fmd->v4l2_dev); |
d3953223 SN |
1437 | return ret; |
1438 | } | |
1439 | ||
4c62e976 | 1440 | static int fimc_md_remove(struct platform_device *pdev) |
d3953223 SN |
1441 | { |
1442 | struct fimc_md *fmd = platform_get_drvdata(pdev); | |
1443 | ||
1444 | if (!fmd) | |
1445 | return 0; | |
b74bee15 | 1446 | |
d3f5e0c5 | 1447 | fimc_md_unregister_clk_provider(fmd); |
fa91f105 SN |
1448 | v4l2_async_notifier_unregister(&fmd->subdev_notifier); |
1449 | ||
b74bee15 | 1450 | v4l2_device_unregister(&fmd->v4l2_dev); |
d3953223 SN |
1451 | device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode); |
1452 | fimc_md_unregister_entities(fmd); | |
403dfbec | 1453 | fimc_md_pipelines_free(fmd); |
d3953223 | 1454 | media_device_unregister(&fmd->media_dev); |
9832e155 | 1455 | media_device_cleanup(&fmd->media_dev); |
d3953223 | 1456 | fimc_md_put_clocks(fmd); |
fa91f105 | 1457 | |
d3953223 SN |
1458 | return 0; |
1459 | } | |
1460 | ||
c42639d8 | 1461 | static const struct platform_device_id fimc_driver_ids[] __always_unused = { |
e2985a26 SN |
1462 | { .name = "s5p-fimc-md" }, |
1463 | { }, | |
1464 | }; | |
1465 | MODULE_DEVICE_TABLE(platform, fimc_driver_ids); | |
1466 | ||
1467 | static const struct of_device_id fimc_md_of_match[] = { | |
1468 | { .compatible = "samsung,fimc" }, | |
1469 | { }, | |
1470 | }; | |
1471 | MODULE_DEVICE_TABLE(of, fimc_md_of_match); | |
1472 | ||
d3953223 SN |
1473 | static struct platform_driver fimc_md_driver = { |
1474 | .probe = fimc_md_probe, | |
4c62e976 | 1475 | .remove = fimc_md_remove, |
d3953223 | 1476 | .driver = { |
e2985a26 SN |
1477 | .of_match_table = of_match_ptr(fimc_md_of_match), |
1478 | .name = "s5p-fimc-md", | |
d3953223 SN |
1479 | } |
1480 | }; | |
1481 | ||
7e566be2 | 1482 | static int __init fimc_md_init(void) |
d3953223 SN |
1483 | { |
1484 | int ret; | |
ecd9acbf | 1485 | |
d3953223 SN |
1486 | request_module("s5p-csis"); |
1487 | ret = fimc_register_driver(); | |
1488 | if (ret) | |
1489 | return ret; | |
ecd9acbf | 1490 | |
d3953223 SN |
1491 | return platform_driver_register(&fimc_md_driver); |
1492 | } | |
7e566be2 SK |
1493 | |
1494 | static void __exit fimc_md_exit(void) | |
d3953223 SN |
1495 | { |
1496 | platform_driver_unregister(&fimc_md_driver); | |
1497 | fimc_unregister_driver(); | |
1498 | } | |
1499 | ||
1500 | module_init(fimc_md_init); | |
1501 | module_exit(fimc_md_exit); | |
1502 | ||
1503 | MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>"); | |
1504 | MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver"); | |
1505 | MODULE_LICENSE("GPL"); | |
1506 | MODULE_VERSION("2.0.1"); |