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[mirror_ubuntu-artful-kernel.git] / drivers / media / platform / exynos4-is / media-dev.c
CommitLineData
d3953223
SN
1/*
2 * S5P/EXYNOS4 SoC series camera host interface media device driver
3 *
52917bcb
SN
4 * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
5 * Author: Sylwester Nawrocki <s.nawrocki@samsung.com>
d3953223
SN
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published
9 * by the Free Software Foundation, either version 2 of the License,
10 * or (at your option) any later version.
11 */
12
13#include <linux/bug.h>
d3f5e0c5
SN
14#include <linux/clk.h>
15#include <linux/clk-provider.h>
d3953223
SN
16#include <linux/device.h>
17#include <linux/errno.h>
18#include <linux/i2c.h>
19#include <linux/kernel.h>
20#include <linux/list.h>
21#include <linux/module.h>
e2985a26
SN
22#include <linux/of.h>
23#include <linux/of_platform.h>
24#include <linux/of_device.h>
fd9fdb78 25#include <linux/of_graph.h>
d3953223
SN
26#include <linux/platform_device.h>
27#include <linux/pm_runtime.h>
28#include <linux/types.h>
29#include <linux/slab.h>
fa91f105 30#include <media/v4l2-async.h>
131b6c61 31#include <media/v4l2-ctrls.h>
e2985a26 32#include <media/v4l2-of.h>
d3953223 33#include <media/media-device.h>
d647f0b7 34#include <media/drv-intf/exynos-fimc.h>
d3953223 35
56fa1a6a 36#include "media-dev.h"
d3953223 37#include "fimc-core.h"
e781bbe3 38#include "fimc-is.h"
0f735f52 39#include "fimc-lite.h"
d3953223
SN
40#include "mipi-csis.h"
41
52917bcb
SN
42/* Set up image sensor subdev -> FIMC capture node notifications. */
43static void __setup_sensor_notification(struct fimc_md *fmd,
44 struct v4l2_subdev *sensor,
45 struct v4l2_subdev *fimc_sd)
46{
47 struct fimc_source_info *src_inf;
48 struct fimc_sensor_info *md_si;
49 unsigned long flags;
50
51 src_inf = v4l2_get_subdev_hostdata(sensor);
52 if (!src_inf || WARN_ON(fmd == NULL))
53 return;
54
55 md_si = source_to_sensor_info(src_inf);
56 spin_lock_irqsave(&fmd->slock, flags);
57 md_si->host = v4l2_get_subdevdata(fimc_sd);
58 spin_unlock_irqrestore(&fmd->slock, flags);
59}
60
d3953223
SN
61/**
62 * fimc_pipeline_prepare - update pipeline information with subdevice pointers
39bb6df6 63 * @me: media entity terminating the pipeline
d3953223
SN
64 *
65 * Caller holds the graph mutex.
66 */
b9ee31e6 67static void fimc_pipeline_prepare(struct fimc_pipeline *p,
403dfbec 68 struct media_entity *me)
d3953223 69{
52917bcb 70 struct fimc_md *fmd = entity_to_fimc_mdev(me);
d3953223 71 struct v4l2_subdev *sd;
52917bcb 72 struct v4l2_subdev *sensor = NULL;
0f735f52 73 int i;
d3953223 74
0f735f52
SN
75 for (i = 0; i < IDX_MAX; i++)
76 p->subdevs[i] = NULL;
d3953223 77
0f735f52 78 while (1) {
39bb6df6
SN
79 struct media_pad *pad = NULL;
80
81 /* Find remote source pad */
82 for (i = 0; i < me->num_pads; i++) {
83 struct media_pad *spad = &me->pads[i];
84 if (!(spad->flags & MEDIA_PAD_FL_SINK))
85 continue;
1bddf1b3 86 pad = media_entity_remote_pad(spad);
39bb6df6
SN
87 if (pad)
88 break;
89 }
0f735f52 90
3efdf62c 91 if (!pad || !is_media_entity_v4l2_subdev(pad->entity))
0f735f52 92 break;
0f735f52
SN
93 sd = media_entity_to_v4l2_subdev(pad->entity);
94
95 switch (sd->grp_id) {
588c87be 96 case GRP_ID_SENSOR:
52917bcb
SN
97 sensor = sd;
98 /* fall through */
99 case GRP_ID_FIMC_IS_SENSOR:
0f735f52
SN
100 p->subdevs[IDX_SENSOR] = sd;
101 break;
588c87be 102 case GRP_ID_CSIS:
0f735f52
SN
103 p->subdevs[IDX_CSIS] = sd;
104 break;
588c87be 105 case GRP_ID_FLITE:
4af81310
SN
106 p->subdevs[IDX_FLITE] = sd;
107 break;
588c87be 108 case GRP_ID_FIMC:
52917bcb 109 p->subdevs[IDX_FIMC] = sd;
0f735f52 110 break;
e781bbe3
SN
111 case GRP_ID_FIMC_IS:
112 p->subdevs[IDX_IS_ISP] = sd;
113 break;
0f735f52 114 default:
e781bbe3 115 break;
0f735f52 116 }
39bb6df6
SN
117 me = &sd->entity;
118 if (me->num_pads == 1)
119 break;
d3953223 120 }
52917bcb
SN
121
122 if (sensor && p->subdevs[IDX_FIMC])
123 __setup_sensor_notification(fmd, sensor, p->subdevs[IDX_FIMC]);
d3953223
SN
124}
125
126/**
127 * __subdev_set_power - change power state of a single subdev
128 * @sd: subdevice to change power state for
129 * @on: 1 to enable power or 0 to disable
130 *
131 * Return result of s_power subdev operation or -ENXIO if sd argument
132 * is NULL. Return 0 if the subdevice does not implement s_power.
133 */
134static int __subdev_set_power(struct v4l2_subdev *sd, int on)
135{
136 int *use_count;
137 int ret;
138
139 if (sd == NULL)
140 return -ENXIO;
141
142 use_count = &sd->entity.use_count;
143 if (on && (*use_count)++ > 0)
144 return 0;
145 else if (!on && (*use_count == 0 || --(*use_count) > 0))
146 return 0;
147 ret = v4l2_subdev_call(sd, core, s_power, on);
148
149 return ret != -ENOIOCTLCMD ? ret : 0;
150}
151
152/**
153 * fimc_pipeline_s_power - change power state of all pipeline subdevs
154 * @fimc: fimc device terminating the pipeline
0f735f52 155 * @state: true to power on, false to power off
d3953223 156 *
0f735f52 157 * Needs to be called with the graph mutex held.
d3953223 158 */
f8bca4f5 159static int fimc_pipeline_s_power(struct fimc_pipeline *p, bool on)
d3953223 160{
f8bca4f5
SN
161 static const u8 seq[2][IDX_MAX - 1] = {
162 { IDX_IS_ISP, IDX_SENSOR, IDX_CSIS, IDX_FLITE },
163 { IDX_CSIS, IDX_FLITE, IDX_SENSOR, IDX_IS_ISP },
164 };
165 int i, ret = 0;
d3953223 166
0f735f52 167 if (p->subdevs[IDX_SENSOR] == NULL)
d3953223
SN
168 return -ENXIO;
169
f8bca4f5
SN
170 for (i = 0; i < IDX_MAX - 1; i++) {
171 unsigned int idx = seq[on][i];
172
173 ret = __subdev_set_power(p->subdevs[idx], on);
174
0f735f52 175
0f735f52 176 if (ret < 0 && ret != -ENXIO)
f8bca4f5 177 goto error;
d3953223 178 }
0f735f52 179 return 0;
f8bca4f5
SN
180error:
181 for (; i >= 0; i--) {
182 unsigned int idx = seq[on][i];
183 __subdev_set_power(p->subdevs[idx], !on);
184 }
185 return ret;
d3953223
SN
186}
187
76775776
JA
188/**
189 * __fimc_pipeline_enable - enable power of all pipeline subdevs
190 * and the sensor clock
191 * @ep: video pipeline structure
192 * @fmd: fimc media device
193 *
194 * Called with the graph mutex held.
195 */
196static int __fimc_pipeline_enable(struct exynos_media_pipeline *ep,
197 struct fimc_md *fmd)
198{
199 struct fimc_pipeline *p = to_fimc_pipeline(ep);
200 int ret;
201
202 /* Enable PXLASYNC clock if this pipeline includes FIMC-IS */
203 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP]) {
204 ret = clk_prepare_enable(fmd->wbclk[CLK_IDX_WB_B]);
205 if (ret < 0)
206 return ret;
207 }
208
209 ret = fimc_pipeline_s_power(p, 1);
210 if (!ret)
211 return 0;
212
213 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
214 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
215
216 return ret;
217}
218
d3953223 219/**
b9ee31e6
SN
220 * __fimc_pipeline_open - update the pipeline information, enable power
221 * of all pipeline subdevs and the sensor clock
d3953223 222 * @me: media entity to start graph walk with
056f4f30 223 * @prepare: true to walk the current pipeline and acquire all subdevs
d3953223 224 *
740ad921 225 * Called with the graph mutex held.
d3953223 226 */
403dfbec 227static int __fimc_pipeline_open(struct exynos_media_pipeline *ep,
056f4f30 228 struct media_entity *me, bool prepare)
d3953223 229{
056f4f30 230 struct fimc_md *fmd = entity_to_fimc_mdev(me);
403dfbec 231 struct fimc_pipeline *p = to_fimc_pipeline(ep);
056f4f30 232 struct v4l2_subdev *sd;
d3953223 233
056f4f30
SN
234 if (WARN_ON(p == NULL || me == NULL))
235 return -EINVAL;
236
237 if (prepare)
0f735f52
SN
238 fimc_pipeline_prepare(p, me);
239
056f4f30 240 sd = p->subdevs[IDX_SENSOR];
76775776
JA
241 if (sd == NULL) {
242 pr_warn("%s(): No sensor subdev\n", __func__);
243 /*
244 * Pipeline open cannot fail so as to make it possible
245 * for the user space to configure the pipeline.
246 */
056f4f30 247 return 0;
76775776 248 }
0f735f52 249
76775776 250 return __fimc_pipeline_enable(ep, fmd);
d3953223
SN
251}
252
d3953223 253/**
b9ee31e6 254 * __fimc_pipeline_close - disable the sensor clock and pipeline power
d3953223
SN
255 * @fimc: fimc device terminating the pipeline
256 *
740ad921 257 * Disable power of all subdevs and turn the external sensor clock off.
d3953223 258 */
403dfbec 259static int __fimc_pipeline_close(struct exynos_media_pipeline *ep)
d3953223 260{
403dfbec 261 struct fimc_pipeline *p = to_fimc_pipeline(ep);
056f4f30
SN
262 struct v4l2_subdev *sd = p ? p->subdevs[IDX_SENSOR] : NULL;
263 struct fimc_md *fmd;
36da6fcd 264 int ret;
740ad921 265
36da6fcd
SN
266 if (sd == NULL) {
267 pr_warn("%s(): No sensor subdev\n", __func__);
268 return 0;
d3953223 269 }
056f4f30 270
36da6fcd 271 ret = fimc_pipeline_s_power(p, 0);
36da6fcd 272
056f4f30
SN
273 fmd = entity_to_fimc_mdev(&sd->entity);
274
275 /* Disable PXLASYNC clock if this pipeline includes FIMC-IS */
276 if (!IS_ERR(fmd->wbclk[CLK_IDX_WB_B]) && p->subdevs[IDX_IS_ISP])
277 clk_disable_unprepare(fmd->wbclk[CLK_IDX_WB_B]);
278
d3953223
SN
279 return ret == -ENXIO ? 0 : ret;
280}
281
d3953223 282/**
8d274e7c 283 * __fimc_pipeline_s_stream - call s_stream() on pipeline subdevs
0f735f52 284 * @pipeline: video pipeline structure
8d274e7c 285 * @on: passed as the s_stream() callback argument
d3953223 286 */
403dfbec 287static int __fimc_pipeline_s_stream(struct exynos_media_pipeline *ep, bool on)
d3953223 288{
8d274e7c
SN
289 static const u8 seq[2][IDX_MAX] = {
290 { IDX_FIMC, IDX_SENSOR, IDX_IS_ISP, IDX_CSIS, IDX_FLITE },
291 { IDX_CSIS, IDX_FLITE, IDX_FIMC, IDX_SENSOR, IDX_IS_ISP },
292 };
403dfbec 293 struct fimc_pipeline *p = to_fimc_pipeline(ep);
76775776
JA
294 struct fimc_md *fmd = entity_to_fimc_mdev(&p->subdevs[IDX_CSIS]->entity);
295 enum fimc_subdev_index sd_id;
8d274e7c 296 int i, ret = 0;
d3953223 297
76775776
JA
298 if (p->subdevs[IDX_SENSOR] == NULL) {
299 if (!fmd->user_subdev_api) {
300 /*
301 * Sensor must be already discovered if we
302 * aren't in the user_subdev_api mode
303 */
304 return -ENODEV;
305 }
306
307 /* Get pipeline sink entity */
308 if (p->subdevs[IDX_FIMC])
309 sd_id = IDX_FIMC;
310 else if (p->subdevs[IDX_IS_ISP])
311 sd_id = IDX_IS_ISP;
312 else if (p->subdevs[IDX_FLITE])
313 sd_id = IDX_FLITE;
314 else
315 return -ENODEV;
316
317 /*
318 * Sensor could have been linked between open and STREAMON -
319 * check if this is the case.
320 */
321 fimc_pipeline_prepare(p, &p->subdevs[sd_id]->entity);
322
323 if (p->subdevs[IDX_SENSOR] == NULL)
324 return -ENODEV;
325
326 ret = __fimc_pipeline_enable(ep, fmd);
327 if (ret < 0)
328 return ret;
329
330 }
d3953223 331
0f735f52 332 for (i = 0; i < IDX_MAX; i++) {
8d274e7c 333 unsigned int idx = seq[on][i];
0f735f52
SN
334
335 ret = v4l2_subdev_call(p->subdevs[idx], video, s_stream, on);
336
337 if (ret < 0 && ret != -ENOIOCTLCMD && ret != -ENODEV)
8d274e7c 338 goto error;
0f735f52 339 }
76775776 340
0f735f52 341 return 0;
8d274e7c 342error:
76775776 343 fimc_pipeline_s_power(p, !on);
8d274e7c
SN
344 for (; i >= 0; i--) {
345 unsigned int idx = seq[on][i];
346 v4l2_subdev_call(p->subdevs[idx], video, s_stream, !on);
347 }
348 return ret;
d3953223 349}
b9ee31e6
SN
350
351/* Media pipeline operations for the FIMC/FIMC-LITE video device driver */
403dfbec 352static const struct exynos_media_pipeline_ops fimc_pipeline_ops = {
740ad921
SN
353 .open = __fimc_pipeline_open,
354 .close = __fimc_pipeline_close,
355 .set_stream = __fimc_pipeline_s_stream,
b9ee31e6 356};
d3953223 357
403dfbec
SN
358static struct exynos_media_pipeline *fimc_md_pipeline_create(
359 struct fimc_md *fmd)
360{
361 struct fimc_pipeline *p;
362
363 p = kzalloc(sizeof(*p), GFP_KERNEL);
364 if (!p)
365 return NULL;
366
367 list_add_tail(&p->list, &fmd->pipelines);
368
369 p->ep.ops = &fimc_pipeline_ops;
370 return &p->ep;
371}
372
373static void fimc_md_pipelines_free(struct fimc_md *fmd)
374{
375 while (!list_empty(&fmd->pipelines)) {
376 struct fimc_pipeline *p;
377
378 p = list_entry(fmd->pipelines.next, typeof(*p), list);
379 list_del(&p->list);
380 kfree(p);
381 }
382}
383
2b13f7d4
SN
384/* Parse port node and register as a sub-device any sensor specified there. */
385static int fimc_md_parse_port_node(struct fimc_md *fmd,
386 struct device_node *port,
387 unsigned int index)
388{
49b2f4c5 389 struct fimc_source_info *pd = &fmd->sensor[index].pdata;
2b13f7d4 390 struct device_node *rem, *ep, *np;
2b13f7d4 391 struct v4l2_of_endpoint endpoint;
234eab84 392 int ret;
2b13f7d4
SN
393
394 /* Assume here a port node can have only one endpoint node. */
395 ep = of_get_next_child(port, NULL);
396 if (!ep)
397 return 0;
398
234eab84
JMC
399 ret = v4l2_of_parse_endpoint(ep, &endpoint);
400 if (ret) {
401 of_node_put(ep);
402 return ret;
403 }
404
f2a575f6 405 if (WARN_ON(endpoint.base.port == 0) || index >= FIMC_MAX_SENSORS)
2b13f7d4
SN
406 return -EINVAL;
407
f2a575f6 408 pd->mux_id = (endpoint.base.port - 1) & 0x1;
2b13f7d4 409
fd9fdb78 410 rem = of_graph_get_remote_port_parent(ep);
2b13f7d4
SN
411 of_node_put(ep);
412 if (rem == NULL) {
413 v4l2_info(&fmd->v4l2_dev, "Remote device at %s not found\n",
414 ep->full_name);
415 return 0;
416 }
2b13f7d4 417
f2a575f6 418 if (fimc_input_is_parallel(endpoint.base.port)) {
2b13f7d4
SN
419 if (endpoint.bus_type == V4L2_MBUS_PARALLEL)
420 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_601;
421 else
422 pd->sensor_bus_type = FIMC_BUS_TYPE_ITU_656;
423 pd->flags = endpoint.bus.parallel.flags;
f2a575f6 424 } else if (fimc_input_is_mipi_csi(endpoint.base.port)) {
2b13f7d4
SN
425 /*
426 * MIPI CSI-2: only input mux selection and
427 * the sensor's clock frequency is needed.
428 */
429 pd->sensor_bus_type = FIMC_BUS_TYPE_MIPI_CSI2;
430 } else {
431 v4l2_err(&fmd->v4l2_dev, "Wrong port id (%u) at node %s\n",
f2a575f6 432 endpoint.base.port, rem->full_name);
2b13f7d4
SN
433 }
434 /*
435 * For FIMC-IS handled sensors, that are placed under i2c-isp device
436 * node, FIMC is connected to the FIMC-IS through its ISP Writeback
437 * input. Sensors are attached to the FIMC-LITE hostdata interface
438 * directly or through MIPI-CSIS, depending on the external media bus
439 * used. This needs to be handled in a more reliable way, not by just
440 * checking parent's node name.
441 */
442 np = of_get_parent(rem);
443
444 if (np && !of_node_cmp(np->name, "i2c-isp"))
445 pd->fimc_bus_type = FIMC_BUS_TYPE_ISP_WRITEBACK;
446 else
447 pd->fimc_bus_type = pd->sensor_bus_type;
448
7e8da343
KK
449 if (WARN_ON(index >= ARRAY_SIZE(fmd->sensor))) {
450 of_node_put(rem);
fa91f105 451 return -EINVAL;
7e8da343 452 }
2b13f7d4 453
fa91f105
SN
454 fmd->sensor[index].asd.match_type = V4L2_ASYNC_MATCH_OF;
455 fmd->sensor[index].asd.match.of.node = rem;
456 fmd->async_subdevs[index] = &fmd->sensor[index].asd;
457
458 fmd->num_sensors++;
459
460 of_node_put(rem);
461 return 0;
2b13f7d4
SN
462}
463
464/* Register all SoC external sub-devices */
49b2f4c5 465static int fimc_md_register_sensor_entities(struct fimc_md *fmd)
2b13f7d4
SN
466{
467 struct device_node *parent = fmd->pdev->dev.of_node;
468 struct device_node *node, *ports;
469 int index = 0;
470 int ret;
471
49b2f4c5
SN
472 /*
473 * Runtime resume one of the FIMC entities to make sure
474 * the sclk_cam clocks are not globally disabled.
475 */
476 if (!fmd->pmf)
477 return -ENXIO;
478
479 ret = pm_runtime_get_sync(fmd->pmf);
480 if (ret < 0)
481 return ret;
482
483 fmd->num_sensors = 0;
484
2b13f7d4
SN
485 /* Attach sensors linked to MIPI CSI-2 receivers */
486 for_each_available_child_of_node(parent, node) {
487 struct device_node *port;
488
489 if (of_node_cmp(node->name, "csis"))
490 continue;
491 /* The csis node can have only port subnode. */
492 port = of_get_next_child(node, NULL);
493 if (!port)
494 continue;
495
496 ret = fimc_md_parse_port_node(fmd, port, index);
458a3952
AKC
497 if (ret < 0) {
498 of_node_put(node);
49b2f4c5 499 goto rpm_put;
458a3952 500 }
2b13f7d4
SN
501 index++;
502 }
503
504 /* Attach sensors listed in the parallel-ports node */
505 ports = of_get_child_by_name(parent, "parallel-ports");
506 if (!ports)
49b2f4c5 507 goto rpm_put;
2b13f7d4
SN
508
509 for_each_child_of_node(ports, node) {
510 ret = fimc_md_parse_port_node(fmd, node, index);
458a3952
AKC
511 if (ret < 0) {
512 of_node_put(node);
2b13f7d4 513 break;
458a3952 514 }
2b13f7d4
SN
515 index++;
516 }
49b2f4c5
SN
517rpm_put:
518 pm_runtime_put(fmd->pmf);
519 return ret;
2b13f7d4
SN
520}
521
e2985a26
SN
522static int __of_get_csis_id(struct device_node *np)
523{
524 u32 reg = 0;
525
526 np = of_get_child_by_name(np, "port");
527 if (!np)
528 return -EINVAL;
529 of_property_read_u32(np, "reg", &reg);
530 return reg - FIMC_INPUT_MIPI_CSI2_0;
531}
d3953223
SN
532
533/*
7b43a6f3 534 * MIPI-CSIS, FIMC and FIMC-LITE platform devices registration.
d3953223 535 */
7b43a6f3
SN
536static int register_fimc_lite_entity(struct fimc_md *fmd,
537 struct fimc_lite *fimc_lite)
d3953223 538{
8163ec0b 539 struct v4l2_subdev *sd;
403dfbec 540 struct exynos_media_pipeline *ep;
afd7348c 541 int ret;
4af81310 542
7b43a6f3
SN
543 if (WARN_ON(fimc_lite->index >= FIMC_LITE_MAX_DEVS ||
544 fmd->fimc_lite[fimc_lite->index]))
545 return -EBUSY;
d3953223 546
7b43a6f3
SN
547 sd = &fimc_lite->subdev;
548 sd->grp_id = GRP_ID_FLITE;
403dfbec
SN
549
550 ep = fimc_md_pipeline_create(fmd);
551 if (!ep)
552 return -ENOMEM;
553
554 v4l2_set_subdev_hostdata(sd, ep);
693f5c40
SN
555
556 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
7b43a6f3
SN
557 if (!ret)
558 fmd->fimc_lite[fimc_lite->index] = fimc_lite;
559 else
560 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.LITE%d\n",
561 fimc_lite->index);
562 return ret;
d3953223
SN
563}
564
7b43a6f3 565static int register_fimc_entity(struct fimc_md *fmd, struct fimc_dev *fimc)
4af81310 566{
7b43a6f3 567 struct v4l2_subdev *sd;
403dfbec 568 struct exynos_media_pipeline *ep;
4af81310
SN
569 int ret;
570
7b43a6f3
SN
571 if (WARN_ON(fimc->id >= FIMC_MAX_DEVS || fmd->fimc[fimc->id]))
572 return -EBUSY;
4af81310 573
7b43a6f3
SN
574 sd = &fimc->vid_cap.subdev;
575 sd->grp_id = GRP_ID_FIMC;
403dfbec
SN
576
577 ep = fimc_md_pipeline_create(fmd);
578 if (!ep)
579 return -ENOMEM;
580
581 v4l2_set_subdev_hostdata(sd, ep);
4af81310 582
7b43a6f3
SN
583 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
584 if (!ret) {
3e20c345
SN
585 if (!fmd->pmf && fimc->pdev)
586 fmd->pmf = &fimc->pdev->dev;
7b43a6f3
SN
587 fmd->fimc[fimc->id] = fimc;
588 fimc->vid_cap.user_subdev_api = fmd->user_subdev_api;
589 } else {
590 v4l2_err(&fmd->v4l2_dev, "Failed to register FIMC.%d (%d)\n",
591 fimc->id, ret);
4af81310 592 }
7b43a6f3 593 return ret;
4af81310
SN
594}
595
7b43a6f3
SN
596static int register_csis_entity(struct fimc_md *fmd,
597 struct platform_device *pdev,
598 struct v4l2_subdev *sd)
d3953223 599{
7b43a6f3 600 struct device_node *node = pdev->dev.of_node;
d3953223
SN
601 int id, ret;
602
e2985a26 603 id = node ? __of_get_csis_id(node) : max(0, pdev->id);
7b43a6f3 604
e2985a26
SN
605 if (WARN_ON(id < 0 || id >= CSIS_MAX_ENTITIES))
606 return -ENOENT;
7b43a6f3 607
e2985a26
SN
608 if (WARN_ON(fmd->csis[id].sd))
609 return -EBUSY;
d3953223 610
588c87be 611 sd->grp_id = GRP_ID_CSIS;
d3953223 612 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
afd7348c
SN
613 if (!ret)
614 fmd->csis[id].sd = sd;
615 else
d3953223 616 v4l2_err(&fmd->v4l2_dev,
7b43a6f3 617 "Failed to register MIPI-CSIS.%d (%d)\n", id, ret);
d3953223
SN
618 return ret;
619}
620
e781bbe3
SN
621static int register_fimc_is_entity(struct fimc_md *fmd, struct fimc_is *is)
622{
623 struct v4l2_subdev *sd = &is->isp.subdev;
34947b8a 624 struct exynos_media_pipeline *ep;
e781bbe3
SN
625 int ret;
626
34947b8a
SN
627 /* Allocate pipeline object for the ISP capture video node. */
628 ep = fimc_md_pipeline_create(fmd);
629 if (!ep)
630 return -ENOMEM;
631
632 v4l2_set_subdev_hostdata(sd, ep);
633
e781bbe3
SN
634 ret = v4l2_device_register_subdev(&fmd->v4l2_dev, sd);
635 if (ret) {
636 v4l2_err(&fmd->v4l2_dev,
637 "Failed to register FIMC-ISP (%d)\n", ret);
638 return ret;
639 }
640
641 fmd->fimc_is = is;
642 return 0;
643}
644
7b43a6f3
SN
645static int fimc_md_register_platform_entity(struct fimc_md *fmd,
646 struct platform_device *pdev,
647 int plat_entity)
d3953223 648{
7b43a6f3
SN
649 struct device *dev = &pdev->dev;
650 int ret = -EPROBE_DEFER;
651 void *drvdata;
652
653 /* Lock to ensure dev->driver won't change. */
654 device_lock(dev);
655
656 if (!dev->driver || !try_module_get(dev->driver->owner))
657 goto dev_unlock;
658
659 drvdata = dev_get_drvdata(dev);
f58c91ce 660 /* Some subdev didn't probe successfully id drvdata is NULL */
7b43a6f3
SN
661 if (drvdata) {
662 switch (plat_entity) {
663 case IDX_FIMC:
664 ret = register_fimc_entity(fmd, drvdata);
665 break;
666 case IDX_FLITE:
667 ret = register_fimc_lite_entity(fmd, drvdata);
ecd9acbf 668 break;
7b43a6f3
SN
669 case IDX_CSIS:
670 ret = register_csis_entity(fmd, pdev, drvdata);
671 break;
e781bbe3
SN
672 case IDX_IS_ISP:
673 ret = register_fimc_is_entity(fmd, drvdata);
674 break;
7b43a6f3
SN
675 default:
676 ret = -ENODEV;
ecd9acbf
SN
677 }
678 }
d3953223 679
7b43a6f3
SN
680 module_put(dev->driver->owner);
681dev_unlock:
682 device_unlock(dev);
683 if (ret == -EPROBE_DEFER)
684 dev_info(&fmd->pdev->dev, "deferring %s device registration\n",
685 dev_name(dev));
686 else if (ret < 0)
687 dev_err(&fmd->pdev->dev, "%s device registration failed (%d)\n",
688 dev_name(dev), ret);
689 return ret;
690}
691
e2985a26 692/* Register FIMC, FIMC-LITE and CSIS media entities */
49b2f4c5
SN
693static int fimc_md_register_platform_entities(struct fimc_md *fmd,
694 struct device_node *parent)
e2985a26
SN
695{
696 struct device_node *node;
697 int ret = 0;
698
699 for_each_available_child_of_node(parent, node) {
700 struct platform_device *pdev;
701 int plat_entity = -1;
702
703 pdev = of_find_device_by_node(node);
704 if (!pdev)
705 continue;
706
707 /* If driver of any entity isn't ready try all again later. */
708 if (!strcmp(node->name, CSIS_OF_NODE_NAME))
709 plat_entity = IDX_CSIS;
e781bbe3
SN
710 else if (!strcmp(node->name, FIMC_IS_OF_NODE_NAME))
711 plat_entity = IDX_IS_ISP;
e2985a26
SN
712 else if (!strcmp(node->name, FIMC_LITE_OF_NODE_NAME))
713 plat_entity = IDX_FLITE;
714 else if (!strcmp(node->name, FIMC_OF_NODE_NAME) &&
715 !of_property_read_bool(node, "samsung,lcd-wb"))
716 plat_entity = IDX_FIMC;
717
718 if (plat_entity >= 0)
719 ret = fimc_md_register_platform_entity(fmd, pdev,
720 plat_entity);
721 put_device(&pdev->dev);
458a3952
AKC
722 if (ret < 0) {
723 of_node_put(node);
e2985a26 724 break;
458a3952 725 }
e2985a26
SN
726 }
727
728 return ret;
729}
e2985a26 730
d3953223
SN
731static void fimc_md_unregister_entities(struct fimc_md *fmd)
732{
733 int i;
734
735 for (i = 0; i < FIMC_MAX_DEVS; i++) {
403dfbec
SN
736 struct fimc_dev *dev = fmd->fimc[i];
737 if (dev == NULL)
d3953223 738 continue;
403dfbec
SN
739 v4l2_device_unregister_subdev(&dev->vid_cap.subdev);
740 dev->vid_cap.ve.pipe = NULL;
d3953223
SN
741 fmd->fimc[i] = NULL;
742 }
4af81310 743 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
403dfbec
SN
744 struct fimc_lite *dev = fmd->fimc_lite[i];
745 if (dev == NULL)
4af81310 746 continue;
403dfbec
SN
747 v4l2_device_unregister_subdev(&dev->subdev);
748 dev->ve.pipe = NULL;
4af81310
SN
749 fmd->fimc_lite[i] = NULL;
750 }
d3953223
SN
751 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
752 if (fmd->csis[i].sd == NULL)
753 continue;
754 v4l2_device_unregister_subdev(fmd->csis[i].sd);
755 fmd->csis[i].sd = NULL;
756 }
e41a35cb
SN
757
758 if (fmd->fimc_is)
759 v4l2_device_unregister_subdev(&fmd->fimc_is->isp.subdev);
760
7b43a6f3 761 v4l2_info(&fmd->v4l2_dev, "Unregistered all entities\n");
d3953223
SN
762}
763
d3953223
SN
764/**
765 * __fimc_md_create_fimc_links - create links to all FIMC entities
766 * @fmd: fimc media device
767 * @source: the source entity to create links to all fimc entities from
768 * @sensor: sensor subdev linked to FIMC[fimc_id] entity, may be null
769 * @pad: the source entity pad index
d0da3c35 770 * @link_mask: bitmask of the fimc devices for which link should be enabled
d3953223 771 */
4af81310
SN
772static int __fimc_md_create_fimc_sink_links(struct fimc_md *fmd,
773 struct media_entity *source,
774 struct v4l2_subdev *sensor,
d0da3c35 775 int pad, int link_mask)
d3953223 776{
4c8f0629 777 struct fimc_source_info *si = NULL;
d3953223 778 struct media_entity *sink;
4af81310 779 unsigned int flags = 0;
f998bb7b 780 int i, ret = 0;
d3953223 781
f998bb7b
SN
782 if (sensor) {
783 si = v4l2_get_subdev_hostdata(sensor);
784 /* Skip direct FIMC links in the logical FIMC-IS sensor path */
4c8f0629 785 if (si && si->fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
f998bb7b
SN
786 ret = 1;
787 }
788
789 for (i = 0; !ret && i < FIMC_MAX_DEVS; i++) {
d3953223 790 if (!fmd->fimc[i])
4af81310 791 continue;
d3953223
SN
792 /*
793 * Some FIMC variants are not fitted with camera capture
794 * interface. Skip creating a link from sensor for those.
795 */
4af81310 796 if (!fmd->fimc[i]->variant->has_cam_if)
d3953223
SN
797 continue;
798
d0da3c35 799 flags = ((1 << i) & link_mask) ? MEDIA_LNK_FL_ENABLED : 0;
4af81310 800
693f5c40 801 sink = &fmd->fimc[i]->vid_cap.subdev.entity;
8df00a15 802 ret = media_create_pad_link(source, pad, sink,
88fa8311 803 FIMC_SD_PAD_SINK_CAM, flags);
d3953223
SN
804 if (ret)
805 return ret;
806
237e0265
SN
807 /* Notify FIMC capture subdev entity */
808 ret = media_entity_call(sink, link_setup, &sink->pads[0],
809 &source->pads[pad], flags);
810 if (ret)
811 break;
812
542fb082 813 v4l2_info(&fmd->v4l2_dev, "created link [%s] %c> [%s]\n",
d3953223 814 source->name, flags ? '=' : '-', sink->name);
d3953223 815 }
4af81310
SN
816
817 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
818 if (!fmd->fimc_lite[i])
819 continue;
820
4af81310 821 sink = &fmd->fimc_lite[i]->subdev.entity;
8df00a15 822 ret = media_create_pad_link(source, pad, sink,
f998bb7b 823 FLITE_SD_PAD_SINK, 0);
4af81310
SN
824 if (ret)
825 return ret;
826
827 /* Notify FIMC-LITE subdev entity */
828 ret = media_entity_call(sink, link_setup, &sink->pads[0],
f998bb7b 829 &source->pads[pad], 0);
4af81310
SN
830 if (ret)
831 break;
832
f998bb7b
SN
833 v4l2_info(&fmd->v4l2_dev, "created link [%s] -> [%s]\n",
834 source->name, sink->name);
4af81310 835 }
d3953223
SN
836 return 0;
837}
838
4af81310
SN
839/* Create links from FIMC-LITE source pads to other entities */
840static int __fimc_md_create_flite_source_links(struct fimc_md *fmd)
841{
842 struct media_entity *source, *sink;
a26860bd 843 int i, ret = 0;
4af81310
SN
844
845 for (i = 0; i < FIMC_LITE_MAX_DEVS; i++) {
846 struct fimc_lite *fimc = fmd->fimc_lite[i];
f998bb7b 847
4af81310
SN
848 if (fimc == NULL)
849 continue;
f998bb7b 850
4af81310 851 source = &fimc->subdev.entity;
bc7584b0 852 sink = &fimc->ve.vdev.entity;
4af81310 853 /* FIMC-LITE's subdev and video node */
8df00a15 854 ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_DMA,
f998bb7b
SN
855 sink, 0, 0);
856 if (ret)
857 break;
858 /* Link from FIMC-LITE to IS-ISP subdev */
859 sink = &fmd->fimc_is->isp.subdev.entity;
8df00a15 860 ret = media_create_pad_link(source, FLITE_SD_PAD_SOURCE_ISP,
f998bb7b 861 sink, 0, 0);
4af81310
SN
862 if (ret)
863 break;
f998bb7b
SN
864 }
865
866 return ret;
867}
868
869/* Create FIMC-IS links */
870static int __fimc_md_create_fimc_is_links(struct fimc_md *fmd)
871{
34947b8a 872 struct fimc_isp *isp = &fmd->fimc_is->isp;
f998bb7b
SN
873 struct media_entity *source, *sink;
874 int i, ret;
875
34947b8a 876 source = &isp->subdev.entity;
f998bb7b
SN
877
878 for (i = 0; i < FIMC_MAX_DEVS; i++) {
879 if (fmd->fimc[i] == NULL)
880 continue;
881
34947b8a 882 /* Link from FIMC-IS-ISP subdev to FIMC */
f998bb7b 883 sink = &fmd->fimc[i]->vid_cap.subdev.entity;
8df00a15 884 ret = media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_FIFO,
f998bb7b
SN
885 sink, FIMC_SD_PAD_SINK_FIFO, 0);
886 if (ret)
887 return ret;
4af81310
SN
888 }
889
34947b8a
SN
890 /* Link from FIMC-IS-ISP subdev to fimc-is-isp.capture video node */
891 sink = &isp->video_capture.ve.vdev.entity;
892
893 /* Skip this link if the fimc-is-isp video node driver isn't built-in */
894 if (sink->num_pads == 0)
895 return 0;
896
8df00a15 897 return media_create_pad_link(source, FIMC_ISP_SD_PAD_SRC_DMA,
34947b8a 898 sink, 0, 0);
4af81310
SN
899}
900
d3953223
SN
901/**
902 * fimc_md_create_links - create default links between registered entities
903 *
904 * Parallel interface sensor entities are connected directly to FIMC capture
905 * entities. The sensors using MIPI CSIS bus are connected through immutable
906 * link with CSI receiver entity specified by mux_id. Any registered CSIS
907 * entity has a link to each registered FIMC capture entity. Enabled links
908 * are created by default between each subsequent registered sensor and
909 * subsequent FIMC capture entity. The number of default active links is
910 * determined by the number of available sensors or FIMC entities,
911 * whichever is less.
912 */
913static int fimc_md_create_links(struct fimc_md *fmd)
914{
a8697ec8 915 struct v4l2_subdev *csi_sensors[CSIS_MAX_ENTITIES] = { NULL };
d3953223 916 struct v4l2_subdev *sensor, *csis;
56bc911a 917 struct fimc_source_info *pdata;
237e0265 918 struct media_entity *source, *sink;
d0da3c35
SN
919 int i, pad, fimc_id = 0, ret = 0;
920 u32 flags, link_mask = 0;
d3953223
SN
921
922 for (i = 0; i < fmd->num_sensors; i++) {
923 if (fmd->sensor[i].subdev == NULL)
924 continue;
925
926 sensor = fmd->sensor[i].subdev;
4c8f0629
SN
927 pdata = v4l2_get_subdev_hostdata(sensor);
928 if (!pdata)
d3953223
SN
929 continue;
930
931 source = NULL;
d3953223 932
56bc911a
SN
933 switch (pdata->sensor_bus_type) {
934 case FIMC_BUS_TYPE_MIPI_CSI2:
d3953223
SN
935 if (WARN(pdata->mux_id >= CSIS_MAX_ENTITIES,
936 "Wrong CSI channel id: %d\n", pdata->mux_id))
937 return -EINVAL;
938
939 csis = fmd->csis[pdata->mux_id].sd;
940 if (WARN(csis == NULL,
57425dc7 941 "MIPI-CSI interface specified but s5p-csis module is not loaded!\n"))
d12392ec 942 return -EINVAL;
d3953223 943
1c9f5bd7 944 pad = sensor->entity.num_pads - 1;
8df00a15 945 ret = media_create_pad_link(&sensor->entity, pad,
d3953223
SN
946 &csis->entity, CSIS_PAD_SINK,
947 MEDIA_LNK_FL_IMMUTABLE |
948 MEDIA_LNK_FL_ENABLED);
949 if (ret)
950 return ret;
951
969e877c 952 v4l2_info(&fmd->v4l2_dev, "created link [%s] => [%s]\n",
d3953223
SN
953 sensor->entity.name, csis->entity.name);
954
4af81310 955 source = NULL;
5d33ee92 956 csi_sensors[pdata->mux_id] = sensor;
d3953223
SN
957 break;
958
56bc911a 959 case FIMC_BUS_TYPE_ITU_601...FIMC_BUS_TYPE_ITU_656:
d3953223
SN
960 source = &sensor->entity;
961 pad = 0;
962 break;
963
964 default:
965 v4l2_err(&fmd->v4l2_dev, "Wrong bus_type: %x\n",
56bc911a 966 pdata->sensor_bus_type);
d3953223
SN
967 return -EINVAL;
968 }
969 if (source == NULL)
970 continue;
971
d0da3c35 972 link_mask = 1 << fimc_id++;
4af81310 973 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 974 pad, link_mask);
4af81310
SN
975 }
976
a8697ec8 977 for (i = 0; i < CSIS_MAX_ENTITIES; i++) {
4af81310
SN
978 if (fmd->csis[i].sd == NULL)
979 continue;
f998bb7b 980
4af81310
SN
981 source = &fmd->csis[i].sd->entity;
982 pad = CSIS_PAD_SOURCE;
5d33ee92 983 sensor = csi_sensors[i];
4af81310 984
d0da3c35 985 link_mask = 1 << fimc_id++;
5d33ee92 986 ret = __fimc_md_create_fimc_sink_links(fmd, source, sensor,
d0da3c35 987 pad, link_mask);
d3953223 988 }
4af81310 989
237e0265
SN
990 /* Create immutable links between each FIMC's subdev and video node */
991 flags = MEDIA_LNK_FL_IMMUTABLE | MEDIA_LNK_FL_ENABLED;
992 for (i = 0; i < FIMC_MAX_DEVS; i++) {
993 if (!fmd->fimc[i])
994 continue;
f998bb7b 995
693f5c40 996 source = &fmd->fimc[i]->vid_cap.subdev.entity;
bc7584b0 997 sink = &fmd->fimc[i]->vid_cap.ve.vdev.entity;
f998bb7b 998
8df00a15 999 ret = media_create_pad_link(source, FIMC_SD_PAD_SOURCE,
237e0265
SN
1000 sink, 0, flags);
1001 if (ret)
1002 break;
1003 }
1004
f998bb7b
SN
1005 ret = __fimc_md_create_flite_source_links(fmd);
1006 if (ret < 0)
1007 return ret;
1008
1009 if (fmd->use_isp)
1010 ret = __fimc_md_create_fimc_is_links(fmd);
1011
1012 return ret;
d3953223
SN
1013}
1014
1015/*
056f4f30 1016 * The peripheral sensor and CAM_BLK (PIXELASYNCMx) clocks management.
d3953223 1017 */
0e23cbbe
SN
1018static void fimc_md_put_clocks(struct fimc_md *fmd)
1019{
1020 int i = FIMC_MAX_CAMCLKS;
1021
1022 while (--i >= 0) {
1023 if (IS_ERR(fmd->camclk[i].clock))
1024 continue;
0e23cbbe
SN
1025 clk_put(fmd->camclk[i].clock);
1026 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1027 }
056f4f30
SN
1028
1029 /* Writeback (PIXELASYNCMx) clocks */
1030 for (i = 0; i < FIMC_MAX_WBCLKS; i++) {
1031 if (IS_ERR(fmd->wbclk[i]))
1032 continue;
1033 clk_put(fmd->wbclk[i]);
1034 fmd->wbclk[i] = ERR_PTR(-EINVAL);
1035 }
0e23cbbe
SN
1036}
1037
d3953223
SN
1038static int fimc_md_get_clocks(struct fimc_md *fmd)
1039{
49b2f4c5 1040 struct device *dev = &fmd->pdev->dev;
d3953223
SN
1041 char clk_name[32];
1042 struct clk *clock;
044c372a 1043 int i, ret = 0;
0e23cbbe
SN
1044
1045 for (i = 0; i < FIMC_MAX_CAMCLKS; i++)
1046 fmd->camclk[i].clock = ERR_PTR(-EINVAL);
1047
d3953223
SN
1048 for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
1049 snprintf(clk_name, sizeof(clk_name), "sclk_cam%u", i);
0e23cbbe
SN
1050 clock = clk_get(dev, clk_name);
1051
dc3ae328 1052 if (IS_ERR(clock)) {
49b2f4c5 1053 dev_err(dev, "Failed to get clock: %s\n", clk_name);
0e23cbbe
SN
1054 ret = PTR_ERR(clock);
1055 break;
1056 }
d3953223
SN
1057 fmd->camclk[i].clock = clock;
1058 }
0e23cbbe
SN
1059 if (ret)
1060 fimc_md_put_clocks(fmd);
d3953223 1061
056f4f30
SN
1062 if (!fmd->use_isp)
1063 return 0;
1064 /*
1065 * For now get only PIXELASYNCM1 clock (Writeback B/ISP),
1066 * leave PIXELASYNCM0 out for the LCD Writeback driver.
1067 */
1068 fmd->wbclk[CLK_IDX_WB_A] = ERR_PTR(-EINVAL);
1069
1070 for (i = CLK_IDX_WB_B; i < FIMC_MAX_WBCLKS; i++) {
1071 snprintf(clk_name, sizeof(clk_name), "pxl_async%u", i);
1072 clock = clk_get(dev, clk_name);
1073 if (IS_ERR(clock)) {
1074 v4l2_err(&fmd->v4l2_dev, "Failed to get clock: %s\n",
1075 clk_name);
1076 ret = PTR_ERR(clock);
1077 break;
1078 }
1079 fmd->wbclk[i] = clock;
1080 }
1081 if (ret)
1082 fimc_md_put_clocks(fmd);
1083
0e23cbbe 1084 return ret;
d3953223
SN
1085}
1086
d3775fa7 1087static int __fimc_md_modify_pipeline(struct media_entity *entity, bool enable)
d3953223 1088{
403dfbec 1089 struct exynos_video_entity *ve;
d3775fa7 1090 struct fimc_pipeline *p;
403dfbec 1091 struct video_device *vdev;
d3775fa7 1092 int ret;
d3953223 1093
d3775fa7
SN
1094 vdev = media_entity_to_video_device(entity);
1095 if (vdev->entity.use_count == 0)
d3953223
SN
1096 return 0;
1097
403dfbec 1098 ve = vdev_to_exynos_video_entity(vdev);
d3775fa7
SN
1099 p = to_fimc_pipeline(ve->pipe);
1100 /*
1101 * Nothing to do if we are disabling the pipeline, some link
1102 * has been disconnected and p->subdevs array is cleared now.
1103 */
1104 if (!enable && p->subdevs[IDX_SENSOR] == NULL)
1105 return 0;
403dfbec 1106
d3775fa7
SN
1107 if (enable)
1108 ret = __fimc_pipeline_open(ve->pipe, entity, true);
1109 else
1110 ret = __fimc_pipeline_close(ve->pipe);
131b6c61 1111
d3775fa7
SN
1112 if (ret == 0 && !enable)
1113 memset(p->subdevs, 0, sizeof(p->subdevs));
1114
1115 return ret;
1116}
1117
d10c9894 1118/* Locking: called with entity->graph_obj.mdev->graph_mutex mutex held. */
fd7e5309 1119static int __fimc_md_modify_pipelines(struct media_entity *entity, bool enable,
20b85227 1120 struct media_graph *graph)
d3775fa7
SN
1121{
1122 struct media_entity *entity_err = entity;
d3775fa7
SN
1123 int ret;
1124
1125 /*
1126 * Walk current graph and call the pipeline open/close routine for each
1127 * opened video node that belongs to the graph of entities connected
1128 * through active links. This is needed as we cannot power on/off the
1129 * subdevs in random order.
1130 */
20b85227 1131 media_graph_walk_start(graph, entity);
d3775fa7 1132
20b85227 1133 while ((entity = media_graph_walk_next(graph))) {
45b46879 1134 if (!is_media_entity_v4l2_video_device(entity))
d3775fa7
SN
1135 continue;
1136
1137 ret = __fimc_md_modify_pipeline(entity, enable);
1138
1139 if (ret < 0)
1140 goto err;
1141 }
1142
1143 return 0;
d3775fa7 1144
fd7e5309 1145err:
20b85227 1146 media_graph_walk_start(graph, entity_err);
fd7e5309 1147
20b85227 1148 while ((entity_err = media_graph_walk_next(graph))) {
45b46879 1149 if (!is_media_entity_v4l2_video_device(entity_err))
d3775fa7
SN
1150 continue;
1151
1152 __fimc_md_modify_pipeline(entity_err, !enable);
1153
1154 if (entity_err == entity)
1155 break;
1156 }
1157
1158 return ret;
1159}
1160
1161static int fimc_md_link_notify(struct media_link *link, unsigned int flags,
1162 unsigned int notification)
1163{
20b85227 1164 struct media_graph *graph =
fd7e5309
SA
1165 &container_of(link->graph_obj.mdev, struct fimc_md,
1166 media_dev)->link_setup_graph;
d3775fa7
SN
1167 struct media_entity *sink = link->sink->entity;
1168 int ret = 0;
1169
1170 /* Before link disconnection */
1171 if (notification == MEDIA_DEV_NOTIFY_PRE_LINK_CH) {
20b85227 1172 ret = media_graph_walk_init(graph,
fd7e5309
SA
1173 link->graph_obj.mdev);
1174 if (ret)
1175 return ret;
d3775fa7 1176 if (!(flags & MEDIA_LNK_FL_ENABLED))
fd7e5309 1177 ret = __fimc_md_modify_pipelines(sink, false, graph);
cdf58a6f 1178#if 0
d3775fa7 1179 else
cdf58a6f
MCC
1180 /* TODO: Link state change validation */
1181#endif
d3775fa7 1182 /* After link activation */
fd7e5309
SA
1183 } else if (notification == MEDIA_DEV_NOTIFY_POST_LINK_CH) {
1184 if (link->flags & MEDIA_LNK_FL_ENABLED)
1185 ret = __fimc_md_modify_pipelines(sink, true, graph);
20b85227 1186 media_graph_walk_cleanup(graph);
d3953223 1187 }
740ad921 1188
d3775fa7 1189 return ret ? -EPIPE : 0;
d3953223
SN
1190}
1191
68429f50
LP
1192static const struct media_device_ops fimc_md_ops = {
1193 .link_notify = fimc_md_link_notify,
1194};
1195
d3953223
SN
1196static ssize_t fimc_md_sysfs_show(struct device *dev,
1197 struct device_attribute *attr, char *buf)
1198{
1199 struct platform_device *pdev = to_platform_device(dev);
1200 struct fimc_md *fmd = platform_get_drvdata(pdev);
1201
1202 if (fmd->user_subdev_api)
1203 return strlcpy(buf, "Sub-device API (sub-dev)\n", PAGE_SIZE);
1204
1205 return strlcpy(buf, "V4L2 video node only API (vid-dev)\n", PAGE_SIZE);
1206}
1207
1208static ssize_t fimc_md_sysfs_store(struct device *dev,
1209 struct device_attribute *attr,
1210 const char *buf, size_t count)
1211{
1212 struct platform_device *pdev = to_platform_device(dev);
1213 struct fimc_md *fmd = platform_get_drvdata(pdev);
1214 bool subdev_api;
1215 int i;
1216
1217 if (!strcmp(buf, "vid-dev\n"))
1218 subdev_api = false;
1219 else if (!strcmp(buf, "sub-dev\n"))
1220 subdev_api = true;
1221 else
1222 return count;
1223
1224 fmd->user_subdev_api = subdev_api;
1225 for (i = 0; i < FIMC_MAX_DEVS; i++)
1226 if (fmd->fimc[i])
1227 fmd->fimc[i]->vid_cap.user_subdev_api = subdev_api;
1228 return count;
1229}
1230/*
1231 * This device attribute is to select video pipeline configuration method.
1232 * There are following valid values:
1233 * vid-dev - for V4L2 video node API only, subdevice will be configured
1234 * by the host driver.
1235 * sub-dev - for media controller API, subdevs must be configured in user
1236 * space before starting streaming.
1237 */
1238static DEVICE_ATTR(subdev_conf_mode, S_IWUSR | S_IRUGO,
1239 fimc_md_sysfs_show, fimc_md_sysfs_store);
1240
4163851f
SN
1241static int fimc_md_get_pinctrl(struct fimc_md *fmd)
1242{
1243 struct device *dev = &fmd->pdev->dev;
1244 struct fimc_pinctrl *pctl = &fmd->pinctl;
1245
1246 pctl->pinctrl = devm_pinctrl_get(dev);
1247 if (IS_ERR(pctl->pinctrl))
1248 return PTR_ERR(pctl->pinctrl);
1249
1250 pctl->state_default = pinctrl_lookup_state(pctl->pinctrl,
1251 PINCTRL_STATE_DEFAULT);
1252 if (IS_ERR(pctl->state_default))
1253 return PTR_ERR(pctl->state_default);
1254
1255 pctl->state_idle = pinctrl_lookup_state(pctl->pinctrl,
1256 PINCTRL_STATE_IDLE);
1257 return 0;
1258}
1259
d3f5e0c5
SN
1260static int cam_clk_prepare(struct clk_hw *hw)
1261{
1262 struct cam_clk *camclk = to_cam_clk(hw);
1263 int ret;
1264
1265 if (camclk->fmd->pmf == NULL)
1266 return -ENODEV;
1267
1268 ret = pm_runtime_get_sync(camclk->fmd->pmf);
1269 return ret < 0 ? ret : 0;
1270}
1271
1272static void cam_clk_unprepare(struct clk_hw *hw)
1273{
1274 struct cam_clk *camclk = to_cam_clk(hw);
1275
1276 if (camclk->fmd->pmf == NULL)
1277 return;
1278
1279 pm_runtime_put_sync(camclk->fmd->pmf);
1280}
1281
1282static const struct clk_ops cam_clk_ops = {
1283 .prepare = cam_clk_prepare,
1284 .unprepare = cam_clk_unprepare,
1285};
1286
1287static void fimc_md_unregister_clk_provider(struct fimc_md *fmd)
1288{
1289 struct cam_clk_provider *cp = &fmd->clk_provider;
1290 unsigned int i;
1291
1292 if (cp->of_node)
1293 of_clk_del_provider(cp->of_node);
1294
1295 for (i = 0; i < cp->num_clocks; i++)
1296 clk_unregister(cp->clks[i]);
1297}
1298
1299static int fimc_md_register_clk_provider(struct fimc_md *fmd)
1300{
1301 struct cam_clk_provider *cp = &fmd->clk_provider;
1302 struct device *dev = &fmd->pdev->dev;
1303 int i, ret;
1304
1305 for (i = 0; i < FIMC_MAX_CAMCLKS; i++) {
1306 struct cam_clk *camclk = &cp->camclk[i];
1307 struct clk_init_data init;
1308 const char *p_name;
1309
1310 ret = of_property_read_string_index(dev->of_node,
1311 "clock-output-names", i, &init.name);
1312 if (ret < 0)
1313 break;
1314
1315 p_name = __clk_get_name(fmd->camclk[i].clock);
1316
1317 /* It's safe since clk_register() will duplicate the string. */
1318 init.parent_names = &p_name;
1319 init.num_parents = 1;
1320 init.ops = &cam_clk_ops;
1321 init.flags = CLK_SET_RATE_PARENT;
1322 camclk->hw.init = &init;
1323 camclk->fmd = fmd;
1324
1325 cp->clks[i] = clk_register(NULL, &camclk->hw);
1326 if (IS_ERR(cp->clks[i])) {
1327 dev_err(dev, "failed to register clock: %s (%ld)\n",
1328 init.name, PTR_ERR(cp->clks[i]));
1329 ret = PTR_ERR(cp->clks[i]);
1330 goto err;
1331 }
1332 cp->num_clocks++;
1333 }
1334
1335 if (cp->num_clocks == 0) {
1336 dev_warn(dev, "clk provider not registered\n");
1337 return 0;
1338 }
1339
1340 cp->clk_data.clks = cp->clks;
1341 cp->clk_data.clk_num = cp->num_clocks;
1342 cp->of_node = dev->of_node;
1343 ret = of_clk_add_provider(dev->of_node, of_clk_src_onecell_get,
1344 &cp->clk_data);
1345 if (ret == 0)
1346 return 0;
1347err:
1348 fimc_md_unregister_clk_provider(fmd);
1349 return ret;
1350}
d3f5e0c5 1351
fa91f105
SN
1352static int subdev_notifier_bound(struct v4l2_async_notifier *notifier,
1353 struct v4l2_subdev *subdev,
1354 struct v4l2_async_subdev *asd)
1355{
1356 struct fimc_md *fmd = notifier_to_fimc_md(notifier);
1357 struct fimc_sensor_info *si = NULL;
1358 int i;
1359
1360 /* Find platform data for this sensor subdev */
1361 for (i = 0; i < ARRAY_SIZE(fmd->sensor); i++)
1362 if (fmd->sensor[i].asd.match.of.node == subdev->dev->of_node)
1363 si = &fmd->sensor[i];
1364
1365 if (si == NULL)
1366 return -EINVAL;
1367
1368 v4l2_set_subdev_hostdata(subdev, &si->pdata);
1369
1370 if (si->pdata.fimc_bus_type == FIMC_BUS_TYPE_ISP_WRITEBACK)
1371 subdev->grp_id = GRP_ID_FIMC_IS_SENSOR;
1372 else
1373 subdev->grp_id = GRP_ID_SENSOR;
1374
1375 si->subdev = subdev;
1376
1377 v4l2_info(&fmd->v4l2_dev, "Registered sensor subdevice: %s (%d)\n",
1378 subdev->name, fmd->num_sensors);
1379
1380 fmd->num_sensors++;
1381
1382 return 0;
1383}
1384
1385static int subdev_notifier_complete(struct v4l2_async_notifier *notifier)
1386{
1387 struct fimc_md *fmd = notifier_to_fimc_md(notifier);
1388 int ret;
1389
1390 mutex_lock(&fmd->media_dev.graph_mutex);
1391
1392 ret = fimc_md_create_links(fmd);
1393 if (ret < 0)
1394 goto unlock;
1395
1396 ret = v4l2_device_register_subdev_nodes(&fmd->v4l2_dev);
1397unlock:
1398 mutex_unlock(&fmd->media_dev.graph_mutex);
9832e155
JMC
1399 if (ret < 0)
1400 return ret;
1401
1402 return media_device_register(&fmd->media_dev);
fa91f105
SN
1403}
1404
ecd9acbf 1405static int fimc_md_probe(struct platform_device *pdev)
d3953223 1406{
e2985a26 1407 struct device *dev = &pdev->dev;
d3953223
SN
1408 struct v4l2_device *v4l2_dev;
1409 struct fimc_md *fmd;
1410 int ret;
1411
e2985a26 1412 fmd = devm_kzalloc(dev, sizeof(*fmd), GFP_KERNEL);
d3953223
SN
1413 if (!fmd)
1414 return -ENOMEM;
1415
1416 spin_lock_init(&fmd->slock);
403dfbec 1417 INIT_LIST_HEAD(&fmd->pipelines);
49b2f4c5 1418 fmd->pdev = pdev;
d3953223
SN
1419
1420 strlcpy(fmd->media_dev.model, "SAMSUNG S5P FIMC",
1421 sizeof(fmd->media_dev.model));
68429f50 1422 fmd->media_dev.ops = &fimc_md_ops;
e2985a26 1423 fmd->media_dev.dev = dev;
d3953223
SN
1424
1425 v4l2_dev = &fmd->v4l2_dev;
1426 v4l2_dev->mdev = &fmd->media_dev;
e1d72f4d 1427 v4l2_dev->notify = fimc_sensor_notify;
e2985a26 1428 strlcpy(v4l2_dev->name, "s5p-fimc-md", sizeof(v4l2_dev->name));
d3953223 1429
e781bbe3 1430 fmd->use_isp = fimc_md_is_isp_available(dev->of_node);
49b2f4c5 1431 fmd->user_subdev_api = true;
e781bbe3 1432
2e7508e4
MCC
1433 media_device_init(&fmd->media_dev);
1434
e2985a26 1435 ret = v4l2_device_register(dev, &fmd->v4l2_dev);
d3953223
SN
1436 if (ret < 0) {
1437 v4l2_err(v4l2_dev, "Failed to register v4l2_device: %d\n", ret);
6d91a51a 1438 return ret;
d3953223 1439 }
d3f5e0c5 1440
d3953223
SN
1441 ret = fimc_md_get_clocks(fmd);
1442 if (ret)
fa91f105 1443 goto err_md;
d3953223 1444
4163851f
SN
1445 ret = fimc_md_get_pinctrl(fmd);
1446 if (ret < 0) {
1447 if (ret != EPROBE_DEFER)
1448 dev_err(dev, "Failed to get pinctrl: %d\n", ret);
fa91f105 1449 goto err_clk;
4163851f
SN
1450 }
1451
fa91f105
SN
1452 platform_set_drvdata(pdev, fmd);
1453
49b2f4c5 1454 ret = fimc_md_register_platform_entities(fmd, dev->of_node);
243d4c02 1455 if (ret)
fa91f105 1456 goto err_clk;
d3953223 1457
49b2f4c5 1458 ret = fimc_md_register_sensor_entities(fmd);
243d4c02 1459 if (ret)
49b2f4c5 1460 goto err_m_ent;
d3953223
SN
1461
1462 ret = device_create_file(&pdev->dev, &dev_attr_subdev_conf_mode);
693f5c40 1463 if (ret)
fa91f105
SN
1464 goto err_m_ent;
1465 /*
1466 * FIMC platform devices need to be registered before the sclk_cam
1467 * clocks provider, as one of these devices needs to be activated
1468 * to enable the clock.
1469 */
1470 ret = fimc_md_register_clk_provider(fmd);
1471 if (ret < 0) {
1472 v4l2_err(v4l2_dev, "clock provider registration failed\n");
1473 goto err_attr;
1474 }
1475
1476 if (fmd->num_sensors > 0) {
1477 fmd->subdev_notifier.subdevs = fmd->async_subdevs;
1478 fmd->subdev_notifier.num_subdevs = fmd->num_sensors;
1479 fmd->subdev_notifier.bound = subdev_notifier_bound;
1480 fmd->subdev_notifier.complete = subdev_notifier_complete;
1481 fmd->num_sensors = 0;
1482
1483 ret = v4l2_async_notifier_register(&fmd->v4l2_dev,
1484 &fmd->subdev_notifier);
1485 if (ret)
1486 goto err_clk_p;
1487 }
693f5c40 1488
693f5c40
SN
1489 return 0;
1490
fa91f105
SN
1491err_clk_p:
1492 fimc_md_unregister_clk_provider(fmd);
1493err_attr:
1494 device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
693f5c40 1495err_clk:
d3953223 1496 fimc_md_put_clocks(fmd);
fa91f105 1497err_m_ent:
d3953223 1498 fimc_md_unregister_entities(fmd);
693f5c40 1499err_md:
9832e155 1500 media_device_cleanup(&fmd->media_dev);
d3953223 1501 v4l2_device_unregister(&fmd->v4l2_dev);
d3953223
SN
1502 return ret;
1503}
1504
4c62e976 1505static int fimc_md_remove(struct platform_device *pdev)
d3953223
SN
1506{
1507 struct fimc_md *fmd = platform_get_drvdata(pdev);
1508
1509 if (!fmd)
1510 return 0;
b74bee15 1511
d3f5e0c5 1512 fimc_md_unregister_clk_provider(fmd);
fa91f105
SN
1513 v4l2_async_notifier_unregister(&fmd->subdev_notifier);
1514
b74bee15 1515 v4l2_device_unregister(&fmd->v4l2_dev);
d3953223
SN
1516 device_remove_file(&pdev->dev, &dev_attr_subdev_conf_mode);
1517 fimc_md_unregister_entities(fmd);
403dfbec 1518 fimc_md_pipelines_free(fmd);
d3953223 1519 media_device_unregister(&fmd->media_dev);
9832e155 1520 media_device_cleanup(&fmd->media_dev);
d3953223 1521 fimc_md_put_clocks(fmd);
fa91f105 1522
d3953223
SN
1523 return 0;
1524}
1525
c42639d8 1526static const struct platform_device_id fimc_driver_ids[] __always_unused = {
e2985a26
SN
1527 { .name = "s5p-fimc-md" },
1528 { },
1529};
1530MODULE_DEVICE_TABLE(platform, fimc_driver_ids);
1531
1532static const struct of_device_id fimc_md_of_match[] = {
1533 { .compatible = "samsung,fimc" },
1534 { },
1535};
1536MODULE_DEVICE_TABLE(of, fimc_md_of_match);
1537
d3953223
SN
1538static struct platform_driver fimc_md_driver = {
1539 .probe = fimc_md_probe,
4c62e976 1540 .remove = fimc_md_remove,
d3953223 1541 .driver = {
e2985a26
SN
1542 .of_match_table = of_match_ptr(fimc_md_of_match),
1543 .name = "s5p-fimc-md",
d3953223
SN
1544 }
1545};
1546
7e566be2 1547static int __init fimc_md_init(void)
d3953223
SN
1548{
1549 int ret;
ecd9acbf 1550
d3953223
SN
1551 request_module("s5p-csis");
1552 ret = fimc_register_driver();
1553 if (ret)
1554 return ret;
ecd9acbf 1555
d3953223
SN
1556 return platform_driver_register(&fimc_md_driver);
1557}
7e566be2
SK
1558
1559static void __exit fimc_md_exit(void)
d3953223
SN
1560{
1561 platform_driver_unregister(&fimc_md_driver);
1562 fimc_unregister_driver();
1563}
1564
1565module_init(fimc_md_init);
1566module_exit(fimc_md_exit);
1567
1568MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
1569MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver");
1570MODULE_LICENSE("GPL");
1571MODULE_VERSION("2.0.1");