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[mirror_ubuntu-kernels.git] / drivers / media / platform / fsl-viu.c
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2874c5fd 1// SPDX-License-Identifier: GPL-2.0-or-later
95c5d605
AG		 2/*
3 * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
4 *
5 * Freescale VIU video driver
6 *
7 * Authors: Hongjun Chen <hong-jun.chen@freescale.com>
8 * Porting to 2.6.35 by DENX Software Engineering,
9 * Anatolij Gustschin <agust@denx.de>
95c5d605
AG		 10 */
11
12#include <linux/module.h>
13#include <linux/clk.h>
14#include <linux/kernel.h>
15#include <linux/i2c.h>
16#include <linux/init.h>
17#include <linux/interrupt.h>
18#include <linux/io.h>
5af50730
RH		 19#include <linux/of_address.h>
20#include <linux/of_irq.h>
95c5d605 21#include <linux/of_platform.h>
e69e34e9 22#include <linux/slab.h>
95c5d605
AG		 23#include <media/v4l2-common.h>
24#include <media/v4l2-device.h>
25#include <media/v4l2-ioctl.h>
1fea3d60 26#include <media/v4l2-ctrls.h>
7fe0b3d7
HV		 27#include <media/v4l2-fh.h>
28#include <media/v4l2-event.h>
95c5d605
AG		 29#include <media/videobuf-dma-contig.h>
30
31#define DRV_NAME "fsl_viu"
64dc3c1a 32#define VIU_VERSION "0.5.1"
95c5d605 33
29d75068
MCC		 34/* Allow building this driver with COMPILE_TEST */
35#ifndef CONFIG_PPC
36#define out_be32(v, a) iowrite32be(a, (void __iomem *)v)
37#define in_be32(a) ioread32be((void __iomem *)a)
38#endif
39
95c5d605
AG		 40#define BUFFER_TIMEOUT msecs_to_jiffies(500) /* 0.5 seconds */
41
42#define VIU_VID_MEM_LIMIT 4 /* Video memory limit, in Mb */
43
44/* I2C address of video decoder chip is 0x4A */
45#define VIU_VIDEO_DECODER_ADDR 0x25
46
95c5d605
AG		 47static int info_level;
48
49#define dprintk(level, fmt, arg...) \
50 do { \
51 if (level <= info_level) \
52 printk(KERN_DEBUG "viu: " fmt , ## arg); \
53 } while (0)
54
55/*
56 * Basic structures
57 */
58struct viu_fmt {
95c5d605
AG		 59 u32 fourcc; /* v4l2 format id */
60 u32 pixelformat;
61 int depth;
62};
63
64static struct viu_fmt formats[] = {
65 {
95c5d605
AG		 66 .fourcc = V4L2_PIX_FMT_RGB565,
67 .pixelformat = V4L2_PIX_FMT_RGB565,
68 .depth = 16,
69 }, {
95c5d605
AG		 70 .fourcc = V4L2_PIX_FMT_RGB32,
71 .pixelformat = V4L2_PIX_FMT_RGB32,
72 .depth = 32,
73 }
74};
75
76struct viu_dev;
77struct viu_buf;
78
79/* buffer for one video frame */
80struct viu_buf {
81 /* common v4l buffer stuff -- must be first */
82 struct videobuf_buffer vb;
83 struct viu_fmt *fmt;
84};
85
86struct viu_dmaqueue {
87 struct viu_dev *dev;
88 struct list_head active;
89 struct list_head queued;
90 struct timer_list timeout;
91};
92
93struct viu_status {
94 u32 field_irq;
95 u32 vsync_irq;
96 u32 hsync_irq;
97 u32 vstart_irq;
98 u32 dma_end_irq;
99 u32 error_irq;
100};
101
102struct viu_reg {
103 u32 status_cfg;
104 u32 luminance;
105 u32 chroma_r;
106 u32 chroma_g;
107 u32 chroma_b;
108 u32 field_base_addr;
109 u32 dma_inc;
110 u32 picture_count;
111 u32 req_alarm;
112 u32 alpha;
113} __attribute__ ((packed));
114
115struct viu_dev {
116 struct v4l2_device v4l2_dev;
1fea3d60 117 struct v4l2_ctrl_handler hdl;
95c5d605
AG		 118 struct mutex lock;
119 spinlock_t slock;
120 int users;
121
122 struct device *dev;
123 /* various device info */
124 struct video_device *vdev;
125 struct viu_dmaqueue vidq;
126 enum v4l2_field capfield;
127 int field;
128 int first;
129 int dma_done;
130
131 /* Hardware register area */
27e4b6cf 132 struct viu_reg __iomem *vr;
95c5d605
AG		 133
134 /* Interrupt vector */
135 int irq;
136 struct viu_status irqs;
137
138 /* video overlay */
139 struct v4l2_framebuffer ovbuf;
140 struct viu_fmt *ovfmt;
141 unsigned int ovenable;
142 enum v4l2_field ovfield;
143
144 /* crop */
145 struct v4l2_rect crop_current;
146
147 /* clock pointer */
148 struct clk *clk;
149
150 /* decoder */
151 struct v4l2_subdev *decoder;
50155c25
AG		 152
153 v4l2_std_id std;
95c5d605
AG		 154};
155
156struct viu_fh {
7fe0b3d7
HV		 157 /* must remain the first field of this struct */
158 struct v4l2_fh fh;
95c5d605
AG		 159 struct viu_dev *dev;
160
161 /* video capture */
162 struct videobuf_queue vb_vidq;
163 spinlock_t vbq_lock; /* spinlock for the videobuf queue */
164
165 /* video overlay */
166 struct v4l2_window win;
167 struct v4l2_clip clips[1];
168
169 /* video capture */
170 struct viu_fmt *fmt;
171 int width, height, sizeimage;
172 enum v4l2_buf_type type;
173};
174
175static struct viu_reg reg_val;
176
177/*
178 * Macro definitions of VIU registers
179 */
180
181/* STATUS_CONFIG register */
182enum status_config {
183 SOFT_RST = 1 << 0,
184
185 ERR_MASK = 0x0f << 4, /* Error code mask */
186 ERR_NO = 0x00, /* No error */
187 ERR_DMA_V = 0x01 << 4, /* DMA in vertical active */
188 ERR_DMA_VB = 0x02 << 4, /* DMA in vertical blanking */
189 ERR_LINE_TOO_LONG = 0x04 << 4, /* Line too long */
190 ERR_TOO_MANG_LINES = 0x05 << 4, /* Too many lines in field */
191 ERR_LINE_TOO_SHORT = 0x06 << 4, /* Line too short */
192 ERR_NOT_ENOUGH_LINE = 0x07 << 4, /* Not enough lines in field */
193 ERR_FIFO_OVERFLOW = 0x08 << 4, /* FIFO overflow */
194 ERR_FIFO_UNDERFLOW = 0x09 << 4, /* FIFO underflow */
195 ERR_1bit_ECC = 0x0a << 4, /* One bit ECC error */
196 ERR_MORE_ECC = 0x0b << 4, /* Two/more bits ECC error */
197
198 INT_FIELD_EN = 0x01 << 8, /* Enable field interrupt */
199 INT_VSYNC_EN = 0x01 << 9, /* Enable vsync interrupt */
200 INT_HSYNC_EN = 0x01 << 10, /* Enable hsync interrupt */
201 INT_VSTART_EN = 0x01 << 11, /* Enable vstart interrupt */
202 INT_DMA_END_EN = 0x01 << 12, /* Enable DMA end interrupt */
203 INT_ERROR_EN = 0x01 << 13, /* Enable error interrupt */
204 INT_ECC_EN = 0x01 << 14, /* Enable ECC interrupt */
205
206 INT_FIELD_STATUS = 0x01 << 16, /* field interrupt status */
207 INT_VSYNC_STATUS = 0x01 << 17, /* vsync interrupt status */
208 INT_HSYNC_STATUS = 0x01 << 18, /* hsync interrupt status */
209 INT_VSTART_STATUS = 0x01 << 19, /* vstart interrupt status */
210 INT_DMA_END_STATUS = 0x01 << 20, /* DMA end interrupt status */
211 INT_ERROR_STATUS = 0x01 << 21, /* error interrupt status */
212
213 DMA_ACT = 0x01 << 27, /* Enable DMA transfer */
214 FIELD_NO = 0x01 << 28, /* Field number */
215 DITHER_ON = 0x01 << 29, /* Dithering is on */
216 ROUND_ON = 0x01 << 30, /* Round is on */
217 MODE_32BIT = 0x01 << 31, /* Data in RGBa888,
218 * 0 in RGB565
219 */
220};
221
222#define norm_maxw() 720
223#define norm_maxh() 576
224
225#define INT_ALL_STATUS (INT_FIELD_STATUS | INT_VSYNC_STATUS | \
226 INT_HSYNC_STATUS | INT_VSTART_STATUS | \
227 INT_DMA_END_STATUS | INT_ERROR_STATUS)
228
229#define NUM_FORMATS ARRAY_SIZE(formats)
230
231static irqreturn_t viu_intr(int irq, void *dev_id);
232
adfcf2e9 233static struct viu_fmt *format_by_fourcc(int fourcc)
95c5d605
AG		 234{
235 int i;
236
237 for (i = 0; i < NUM_FORMATS; i++) {
238 if (formats[i].pixelformat == fourcc)
239 return formats + i;
240 }
241
242 dprintk(0, "unknown pixelformat:'%4.4s'\n", (char *)&fourcc);
243 return NULL;
244}
245
adfcf2e9 246static void viu_start_dma(struct viu_dev *dev)
95c5d605 247{
27e4b6cf 248 struct viu_reg __iomem *vr = dev->vr;
95c5d605
AG		 249
250 dev->field = 0;
251
252 /* Enable DMA operation */
253 out_be32(&vr->status_cfg, SOFT_RST);
254 out_be32(&vr->status_cfg, INT_FIELD_EN);
255}
256
adfcf2e9 257static void viu_stop_dma(struct viu_dev *dev)
95c5d605 258{
27e4b6cf 259 struct viu_reg __iomem *vr = dev->vr;
95c5d605
AG		 260 int cnt = 100;
261 u32 status_cfg;
262
263 out_be32(&vr->status_cfg, 0);
264
265 /* Clear pending interrupts */
266 status_cfg = in_be32(&vr->status_cfg);
267 if (status_cfg & 0x3f0000)
268 out_be32(&vr->status_cfg, status_cfg & 0x3f0000);
269
270 if (status_cfg & DMA_ACT) {
271 do {
272 status_cfg = in_be32(&vr->status_cfg);
273 if (status_cfg & INT_DMA_END_STATUS)
274 break;
275 } while (cnt--);
276
277 if (cnt < 0) {
278 /* timed out, issue soft reset */
279 out_be32(&vr->status_cfg, SOFT_RST);
280 out_be32(&vr->status_cfg, 0);
281 } else {
282 /* clear DMA_END and other pending irqs */
283 out_be32(&vr->status_cfg, status_cfg & 0x3f0000);
284 }
285 }
286
287 dev->field = 0;
288}
289
290static int restart_video_queue(struct viu_dmaqueue *vidq)
291{
292 struct viu_buf *buf, *prev;
293
2d78a19c 294 dprintk(1, "%s vidq=%p\n", __func__, vidq);
95c5d605
AG		 295 if (!list_empty(&vidq->active)) {
296 buf = list_entry(vidq->active.next, struct viu_buf, vb.queue);
297 dprintk(2, "restart_queue [%p/%d]: restart dma\n",
298 buf, buf->vb.i);
299
300 viu_stop_dma(vidq->dev);
301
302 /* cancel all outstanding capture requests */
303 list_for_each_entry_safe(buf, prev, &vidq->active, vb.queue) {
304 list_del(&buf->vb.queue);
305 buf->vb.state = VIDEOBUF_ERROR;
306 wake_up(&buf->vb.done);
307 }
308 mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT);
309 return 0;
310 }
311
312 prev = NULL;
313 for (;;) {
314 if (list_empty(&vidq->queued))
315 return 0;
316 buf = list_entry(vidq->queued.next, struct viu_buf, vb.queue);
317 if (prev == NULL) {
0666c6b8 318 list_move_tail(&buf->vb.queue, &vidq->active);
95c5d605
AG		 319
320 dprintk(1, "Restarting video dma\n");
321 viu_stop_dma(vidq->dev);
322 viu_start_dma(vidq->dev);
323
324 buf->vb.state = VIDEOBUF_ACTIVE;
325 mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT);
326 dprintk(2, "[%p/%d] restart_queue - first active\n",
327 buf, buf->vb.i);
328
329 } else if (prev->vb.width == buf->vb.width &&
330 prev->vb.height == buf->vb.height &&
331 prev->fmt == buf->fmt) {
0666c6b8 332 list_move_tail(&buf->vb.queue, &vidq->active);
95c5d605
AG		 333 buf->vb.state = VIDEOBUF_ACTIVE;
334 dprintk(2, "[%p/%d] restart_queue - move to active\n",
335 buf, buf->vb.i);
336 } else {
337 return 0;
338 }
339 prev = buf;
340 }
341}
342
86cb30ec 343static void viu_vid_timeout(struct timer_list *t)
95c5d605 344{
86cb30ec 345 struct viu_dev *dev = from_timer(dev, t, vidq.timeout);
95c5d605
AG		 346 struct viu_buf *buf;
347 struct viu_dmaqueue *vidq = &dev->vidq;
348
349 while (!list_empty(&vidq->active)) {
350 buf = list_entry(vidq->active.next, struct viu_buf, vb.queue);
351 list_del(&buf->vb.queue);
352 buf->vb.state = VIDEOBUF_ERROR;
353 wake_up(&buf->vb.done);
354 dprintk(1, "viu/0: [%p/%d] timeout\n", buf, buf->vb.i);
355 }
356
357 restart_video_queue(vidq);
358}
359
360/*
361 * Videobuf operations
362 */
363static int buffer_setup(struct videobuf_queue *vq, unsigned int *count,
364 unsigned int *size)
365{
366 struct viu_fh *fh = vq->priv_data;
367
368 *size = fh->width * fh->height * fh->fmt->depth >> 3;
369 if (*count == 0)
370 *count = 32;
371
372 while (*size * *count > VIU_VID_MEM_LIMIT * 1024 * 1024)
373 (*count)--;
374
375 dprintk(1, "%s, count=%d, size=%d\n", __func__, *count, *size);
376 return 0;
377}
378
379static void free_buffer(struct videobuf_queue *vq, struct viu_buf *buf)
380{
381 struct videobuf_buffer *vb = &buf->vb;
382 void *vaddr = NULL;
383
384 BUG_ON(in_interrupt());
385
0e0809a5 386 videobuf_waiton(vq, &buf->vb, 0, 0);
95c5d605
AG		 387
388 if (vq->int_ops && vq->int_ops->vaddr)
389 vaddr = vq->int_ops->vaddr(vb);
390
391 if (vaddr)
392 videobuf_dma_contig_free(vq, &buf->vb);
393
394 buf->vb.state = VIDEOBUF_NEEDS_INIT;
395}
396
397inline int buffer_activate(struct viu_dev *dev, struct viu_buf *buf)
398{
27e4b6cf 399 struct viu_reg __iomem *vr = dev->vr;
95c5d605
AG		 400 int bpp;
401
402 /* setup the DMA base address */
403 reg_val.field_base_addr = videobuf_to_dma_contig(&buf->vb);
404
405 dprintk(1, "buffer_activate [%p/%d]: dma addr 0x%lx\n",
406 buf, buf->vb.i, (unsigned long)reg_val.field_base_addr);
407
408 /* interlace is on by default, set horizontal DMA increment */
409 reg_val.status_cfg = 0;
410 bpp = buf->fmt->depth >> 3;
411 switch (bpp) {
412 case 2:
413 reg_val.status_cfg &= ~MODE_32BIT;
414 reg_val.dma_inc = buf->vb.width * 2;
415 break;
416 case 4:
417 reg_val.status_cfg |= MODE_32BIT;
418 reg_val.dma_inc = buf->vb.width * 4;
419 break;
420 default:
421 dprintk(0, "doesn't support color depth(%d)\n",
422 bpp * 8);
423 return -EINVAL;
424 }
425
426 /* setup picture_count register */
427 reg_val.picture_count = (buf->vb.height / 2) << 16 |
428 buf->vb.width;
429
430 reg_val.status_cfg |= DMA_ACT | INT_DMA_END_EN | INT_FIELD_EN;
431
432 buf->vb.state = VIDEOBUF_ACTIVE;
433 dev->capfield = buf->vb.field;
434
435 /* reset dma increment if needed */
436 if (!V4L2_FIELD_HAS_BOTH(buf->vb.field))
437 reg_val.dma_inc = 0;
438
439 out_be32(&vr->dma_inc, reg_val.dma_inc);
440 out_be32(&vr->picture_count, reg_val.picture_count);
441 out_be32(&vr->field_base_addr, reg_val.field_base_addr);
442 mod_timer(&dev->vidq.timeout, jiffies + BUFFER_TIMEOUT);
443 return 0;
444}
445
446static int buffer_prepare(struct videobuf_queue *vq,
447 struct videobuf_buffer *vb,
448 enum v4l2_field field)
449{
450 struct viu_fh *fh = vq->priv_data;
451 struct viu_buf *buf = container_of(vb, struct viu_buf, vb);
452 int rc;
453
454 BUG_ON(fh->fmt == NULL);
455
456 if (fh->width < 48 || fh->width > norm_maxw() ||
457 fh->height < 32 || fh->height > norm_maxh())
458 return -EINVAL;
459 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
460 if (buf->vb.baddr != 0 && buf->vb.bsize < buf->vb.size)
461 return -EINVAL;
462
463 if (buf->fmt != fh->fmt ||
464 buf->vb.width != fh->width ||
465 buf->vb.height != fh->height ||
466 buf->vb.field != field) {
467 buf->fmt = fh->fmt;
468 buf->vb.width = fh->width;
469 buf->vb.height = fh->height;
470 buf->vb.field = field;
471 }
472
473 if (buf->vb.state == VIDEOBUF_NEEDS_INIT) {
474 rc = videobuf_iolock(vq, &buf->vb, NULL);
475 if (rc != 0)
476 goto fail;
477
478 buf->vb.width = fh->width;
479 buf->vb.height = fh->height;
480 buf->vb.field = field;
481 buf->fmt = fh->fmt;
482 }
483
484 buf->vb.state = VIDEOBUF_PREPARED;
485 return 0;
486
487fail:
488 free_buffer(vq, buf);
489 return rc;
490}
491
492static void buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
493{
494 struct viu_buf *buf = container_of(vb, struct viu_buf, vb);
495 struct viu_fh *fh = vq->priv_data;
496 struct viu_dev *dev = fh->dev;
497 struct viu_dmaqueue *vidq = &dev->vidq;
498 struct viu_buf *prev;
499
500 if (!list_empty(&vidq->queued)) {
2d78a19c 501 dprintk(1, "adding vb queue=%p\n", &buf->vb.queue);
95c5d605
AG		 502 dprintk(1, "vidq pointer 0x%p, queued 0x%p\n",
503 vidq, &vidq->queued);
504 dprintk(1, "dev %p, queued: self %p, next %p, head %p\n",
505 dev, &vidq->queued, vidq->queued.next,
506 vidq->queued.prev);
507 list_add_tail(&buf->vb.queue, &vidq->queued);
508 buf->vb.state = VIDEOBUF_QUEUED;
509 dprintk(2, "[%p/%d] buffer_queue - append to queued\n",
510 buf, buf->vb.i);
511 } else if (list_empty(&vidq->active)) {
2d78a19c 512 dprintk(1, "adding vb active=%p\n", &buf->vb.queue);
95c5d605
AG		 513 list_add_tail(&buf->vb.queue, &vidq->active);
514 buf->vb.state = VIDEOBUF_ACTIVE;
515 mod_timer(&vidq->timeout, jiffies+BUFFER_TIMEOUT);
516 dprintk(2, "[%p/%d] buffer_queue - first active\n",
517 buf, buf->vb.i);
518
519 buffer_activate(dev, buf);
520 } else {
2d78a19c 521 dprintk(1, "adding vb queue2=%p\n", &buf->vb.queue);
95c5d605
AG		 522 prev = list_entry(vidq->active.prev, struct viu_buf, vb.queue);
523 if (prev->vb.width == buf->vb.width &&
524 prev->vb.height == buf->vb.height &&
525 prev->fmt == buf->fmt) {
526 list_add_tail(&buf->vb.queue, &vidq->active);
527 buf->vb.state = VIDEOBUF_ACTIVE;
528 dprintk(2, "[%p/%d] buffer_queue - append to active\n",
529 buf, buf->vb.i);
530 } else {
531 list_add_tail(&buf->vb.queue, &vidq->queued);
532 buf->vb.state = VIDEOBUF_QUEUED;
533 dprintk(2, "[%p/%d] buffer_queue - first queued\n",
534 buf, buf->vb.i);
535 }
536 }
537}
538
539static void buffer_release(struct videobuf_queue *vq,
540 struct videobuf_buffer *vb)
541{
542 struct viu_buf *buf = container_of(vb, struct viu_buf, vb);
543 struct viu_fh *fh = vq->priv_data;
544 struct viu_dev *dev = (struct viu_dev *)fh->dev;
545
546 viu_stop_dma(dev);
547 free_buffer(vq, buf);
548}
549
bd9f8f75 550static const struct videobuf_queue_ops viu_video_qops = {
95c5d605
AG		 551 .buf_setup = buffer_setup,
552 .buf_prepare = buffer_prepare,
553 .buf_queue = buffer_queue,
554 .buf_release = buffer_release,
555};
556
557/*
558 * IOCTL vidioc handling
559 */
560static int vidioc_querycap(struct file *file, void *priv,
561 struct v4l2_capability *cap)
562{
cc1e6315
MCC		 563 strscpy(cap->driver, "viu", sizeof(cap->driver));
564 strscpy(cap->card, "viu", sizeof(cap->card));
565 strscpy(cap->bus_info, "platform:viu", sizeof(cap->bus_info));
a020c747 566 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE |
95c5d605
AG		 567 V4L2_CAP_STREAMING |
568 V4L2_CAP_VIDEO_OVERLAY |
569 V4L2_CAP_READWRITE;
a020c747 570 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
95c5d605
AG		 571 return 0;
572}
573
574static int vidioc_enum_fmt(struct file *file, void *priv,
575 struct v4l2_fmtdesc *f)
576{
577 int index = f->index;
578
9acc8093 579 if (f->index >= NUM_FORMATS)
95c5d605
AG		 580 return -EINVAL;
581
95c5d605
AG		 582 f->pixelformat = formats[index].fourcc;
583 return 0;
584}
585
586static int vidioc_g_fmt_cap(struct file *file, void *priv,
587 struct v4l2_format *f)
588{
589 struct viu_fh *fh = priv;
590
591 f->fmt.pix.width = fh->width;
592 f->fmt.pix.height = fh->height;
593 f->fmt.pix.field = fh->vb_vidq.field;
594 f->fmt.pix.pixelformat = fh->fmt->pixelformat;
595 f->fmt.pix.bytesperline =
596 (f->fmt.pix.width * fh->fmt->depth) >> 3;
597 f->fmt.pix.sizeimage = fh->sizeimage;
e299bc99 598 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
95c5d605
AG		 599 return 0;
600}
601
602static int vidioc_try_fmt_cap(struct file *file, void *priv,
603 struct v4l2_format *f)
604{
605 struct viu_fmt *fmt;
95c5d605
AG		 606 unsigned int maxw, maxh;
607
608 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
609 if (!fmt) {
610 dprintk(1, "Fourcc format (0x%08x) invalid.",
611 f->fmt.pix.pixelformat);
612 return -EINVAL;
613 }
614
95c5d605
AG		 615 maxw = norm_maxw();
616 maxh = norm_maxh();
617
e299bc99 618 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
95c5d605
AG		 619 if (f->fmt.pix.height < 32)
620 f->fmt.pix.height = 32;
621 if (f->fmt.pix.height > maxh)
622 f->fmt.pix.height = maxh;
623 if (f->fmt.pix.width < 48)
624 f->fmt.pix.width = 48;
625 if (f->fmt.pix.width > maxw)
626 f->fmt.pix.width = maxw;
627 f->fmt.pix.width &= ~0x03;
628 f->fmt.pix.bytesperline =
629 (f->fmt.pix.width * fmt->depth) >> 3;
9acc8093 630 f->fmt.pix.sizeimage = f->fmt.pix.height * f->fmt.pix.bytesperline;
e299bc99 631 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
95c5d605
AG		 632
633 return 0;
634}
635
636static int vidioc_s_fmt_cap(struct file *file, void *priv,
637 struct v4l2_format *f)
638{
639 struct viu_fh *fh = priv;
640 int ret;
641
642 ret = vidioc_try_fmt_cap(file, fh, f);
643 if (ret < 0)
644 return ret;
645
646 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
647 fh->width = f->fmt.pix.width;
648 fh->height = f->fmt.pix.height;
649 fh->sizeimage = f->fmt.pix.sizeimage;
650 fh->vb_vidq.field = f->fmt.pix.field;
651 fh->type = f->type;
95c5d605
AG		 652 return 0;
653}
654
655static int vidioc_g_fmt_overlay(struct file *file, void *priv,
656 struct v4l2_format *f)
657{
658 struct viu_fh *fh = priv;
659
660 f->fmt.win = fh->win;
661 return 0;
662}
663
664static int verify_preview(struct viu_dev *dev, struct v4l2_window *win)
665{
666 enum v4l2_field field;
667 int maxw, maxh;
668
669 if (dev->ovbuf.base == NULL)
670 return -EINVAL;
671 if (dev->ovfmt == NULL)
672 return -EINVAL;
673 if (win->w.width < 48 || win->w.height < 32)
674 return -EINVAL;
675
676 field = win->field;
677 maxw = dev->crop_current.width;
678 maxh = dev->crop_current.height;
679
680 if (field == V4L2_FIELD_ANY) {
681 field = (win->w.height > maxh/2)
682 ? V4L2_FIELD_INTERLACED
683 : V4L2_FIELD_TOP;
684 }
685 switch (field) {
686 case V4L2_FIELD_TOP:
687 case V4L2_FIELD_BOTTOM:
688 maxh = maxh / 2;
689 break;
690 case V4L2_FIELD_INTERLACED:
691 break;
692 default:
693 return -EINVAL;
694 }
695
696 win->field = field;
697 if (win->w.width > maxw)
698 win->w.width = maxw;
699 if (win->w.height > maxh)
700 win->w.height = maxh;
701 return 0;
702}
703
27e4b6cf 704inline void viu_activate_overlay(struct viu_reg __iomem *vr)
95c5d605 705{
95c5d605
AG		 706 out_be32(&vr->field_base_addr, reg_val.field_base_addr);
707 out_be32(&vr->dma_inc, reg_val.dma_inc);
708 out_be32(&vr->picture_count, reg_val.picture_count);
709}
710
791ae699 711static int viu_setup_preview(struct viu_dev *dev, struct viu_fh *fh)
95c5d605
AG		 712{
713 int bpp;
714
0a6b9b04
HV		 715 dprintk(1, "%s %dx%d\n", __func__,
716 fh->win.w.width, fh->win.w.height);
95c5d605
AG		 717
718 reg_val.status_cfg = 0;
719
720 /* setup window */
721 reg_val.picture_count = (fh->win.w.height / 2) << 16 |
722 fh->win.w.width;
723
724 /* setup color depth and dma increment */
725 bpp = dev->ovfmt->depth / 8;
726 switch (bpp) {
727 case 2:
728 reg_val.status_cfg &= ~MODE_32BIT;
729 reg_val.dma_inc = fh->win.w.width * 2;
730 break;
731 case 4:
732 reg_val.status_cfg |= MODE_32BIT;
733 reg_val.dma_inc = fh->win.w.width * 4;
734 break;
735 default:
736 dprintk(0, "device doesn't support color depth(%d)\n",
737 bpp * 8);
738 return -EINVAL;
739 }
740
741 dev->ovfield = fh->win.field;
742 if (!V4L2_FIELD_HAS_BOTH(dev->ovfield))
743 reg_val.dma_inc = 0;
744
745 reg_val.status_cfg |= DMA_ACT | INT_DMA_END_EN | INT_FIELD_EN;
746
747 /* setup the base address of the overlay buffer */
34b2ea1c 748 reg_val.field_base_addr = (u32)(long)dev->ovbuf.base;
95c5d605 749
95c5d605
AG		 750 return 0;
751}
752
753static int vidioc_s_fmt_overlay(struct file *file, void *priv,
754 struct v4l2_format *f)
755{
756 struct viu_fh *fh = priv;
757 struct viu_dev *dev = (struct viu_dev *)fh->dev;
758 unsigned long flags;
759 int err;
760
761 err = verify_preview(dev, &f->fmt.win);
762 if (err)
763 return err;
764
95c5d605
AG		 765 fh->win = f->fmt.win;
766
767 spin_lock_irqsave(&dev->slock, flags);
791ae699 768 viu_setup_preview(dev, fh);
95c5d605 769 spin_unlock_irqrestore(&dev->slock, flags);
95c5d605
AG		 770 return 0;
771}
772
773static int vidioc_try_fmt_overlay(struct file *file, void *priv,
774 struct v4l2_format *f)
775{
776 return 0;
777}
778
791ae699
AG		 779static int vidioc_overlay(struct file *file, void *priv, unsigned int on)
780{
781 struct viu_fh *fh = priv;
782 struct viu_dev *dev = (struct viu_dev *)fh->dev;
783 unsigned long flags;
784
785 if (on) {
786 spin_lock_irqsave(&dev->slock, flags);
787 viu_activate_overlay(dev->vr);
788 dev->ovenable = 1;
789
790 /* start dma */
791 viu_start_dma(dev);
792 spin_unlock_irqrestore(&dev->slock, flags);
793 } else {
794 viu_stop_dma(dev);
795 dev->ovenable = 0;
796 }
797
798 return 0;
799}
800
adfcf2e9 801static int vidioc_g_fbuf(struct file *file, void *priv, struct v4l2_framebuffer *arg)
95c5d605
AG		 802{
803 struct viu_fh *fh = priv;
804 struct viu_dev *dev = fh->dev;
805 struct v4l2_framebuffer *fb = arg;
806
807 *fb = dev->ovbuf;
808 fb->capability = V4L2_FBUF_CAP_LIST_CLIPPING;
809 return 0;
810}
811
adfcf2e9 812static int vidioc_s_fbuf(struct file *file, void *priv, const struct v4l2_framebuffer *arg)
95c5d605
AG		 813{
814 struct viu_fh *fh = priv;
815 struct viu_dev *dev = fh->dev;
99b32b24 816 const struct v4l2_framebuffer *fb = arg;
95c5d605
AG		 817 struct viu_fmt *fmt;
818
819 if (!capable(CAP_SYS_ADMIN) && !capable(CAP_SYS_RAWIO))
820 return -EPERM;
821
822 /* check args */
823 fmt = format_by_fourcc(fb->fmt.pixelformat);
824 if (fmt == NULL)
825 return -EINVAL;
826
827 /* ok, accept it */
828 dev->ovbuf = *fb;
829 dev->ovfmt = fmt;
830 if (dev->ovbuf.fmt.bytesperline == 0) {
831 dev->ovbuf.fmt.bytesperline =
832 dev->ovbuf.fmt.width * fmt->depth / 8;
833 }
834 return 0;
835}
836
837static int vidioc_reqbufs(struct file *file, void *priv,
838 struct v4l2_requestbuffers *p)
839{
840 struct viu_fh *fh = priv;
841
842 return videobuf_reqbufs(&fh->vb_vidq, p);
843}
844
845static int vidioc_querybuf(struct file *file, void *priv,
846 struct v4l2_buffer *p)
847{
848 struct viu_fh *fh = priv;
849
850 return videobuf_querybuf(&fh->vb_vidq, p);
851}
852
853static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *p)
854{
855 struct viu_fh *fh = priv;
856
857 return videobuf_qbuf(&fh->vb_vidq, p);
858}
859
860static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *p)
861{
862 struct viu_fh *fh = priv;
863
864 return videobuf_dqbuf(&fh->vb_vidq, p,
865 file->f_flags & O_NONBLOCK);
866}
867
868static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
869{
870 struct viu_fh *fh = priv;
f3b1af19 871 struct viu_dev *dev = fh->dev;
95c5d605
AG		 872
873 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
874 return -EINVAL;
875 if (fh->type != i)
876 return -EINVAL;
877
f3b1af19
AG		 878 if (dev->ovenable)
879 dev->ovenable = 0;
880
c3353330
AG		 881 viu_start_dma(fh->dev);
882
95c5d605
AG		 883 return videobuf_streamon(&fh->vb_vidq);
884}
885
886static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
887{
888 struct viu_fh *fh = priv;
889
890 if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
891 return -EINVAL;
892 if (fh->type != i)
893 return -EINVAL;
894
c3353330
AG		 895 viu_stop_dma(fh->dev);
896
95c5d605
AG		 897 return videobuf_streamoff(&fh->vb_vidq);
898}
899
900#define decoder_call(viu, o, f, args...) \
901 v4l2_subdev_call(viu->decoder, o, f, ##args)
902
50155c25
AG		 903static int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *std_id)
904{
905 struct viu_fh *fh = priv;
906
907 decoder_call(fh->dev, video, querystd, std_id);
908 return 0;
909}
910
314527ac 911static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id id)
95c5d605
AG		 912{
913 struct viu_fh *fh = priv;
914
314527ac 915 fh->dev->std = id;
8774bed9 916 decoder_call(fh->dev, video, s_std, id);
95c5d605
AG		 917 return 0;
918}
919
50155c25
AG		 920static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *std_id)
921{
922 struct viu_fh *fh = priv;
923
924 *std_id = fh->dev->std;
925 return 0;
926}
927
95c5d605
AG		 928/* only one input in this driver */
929static int vidioc_enum_input(struct file *file, void *priv,
930 struct v4l2_input *inp)
931{
932 struct viu_fh *fh = priv;
933
934 if (inp->index != 0)
935 return -EINVAL;
936
937 inp->type = V4L2_INPUT_TYPE_CAMERA;
938 inp->std = fh->dev->vdev->tvnorms;
cc1e6315 939 strscpy(inp->name, "Camera", sizeof(inp->name));
95c5d605
AG		 940 return 0;
941}
942
943static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
944{
945 *i = 0;
946 return 0;
947}
948
949static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
950{
951 struct viu_fh *fh = priv;
952
9acc8093 953 if (i)
95c5d605
AG		 954 return -EINVAL;
955
956 decoder_call(fh->dev, video, s_routing, i, 0, 0);
957 return 0;
958}
959
95c5d605
AG		 960inline void viu_activate_next_buf(struct viu_dev *dev,
961 struct viu_dmaqueue *viuq)
962{
963 struct viu_dmaqueue *vidq = viuq;
964 struct viu_buf *buf;
965
966 /* launch another DMA operation for an active/queued buffer */
967 if (!list_empty(&vidq->active)) {
968 buf = list_entry(vidq->active.next, struct viu_buf,
969 vb.queue);
970 dprintk(1, "start another queued buffer: 0x%p\n", buf);
971 buffer_activate(dev, buf);
972 } else if (!list_empty(&vidq->queued)) {
973 buf = list_entry(vidq->queued.next, struct viu_buf,
974 vb.queue);
975 list_del(&buf->vb.queue);
976
977 dprintk(1, "start another queued buffer: 0x%p\n", buf);
978 list_add_tail(&buf->vb.queue, &vidq->active);
979 buf->vb.state = VIDEOBUF_ACTIVE;
980 buffer_activate(dev, buf);
981 }
982}
983
27e4b6cf 984inline void viu_default_settings(struct viu_reg __iomem *vr)
95c5d605 985{
95c5d605
AG		 986 out_be32(&vr->luminance, 0x9512A254);
987 out_be32(&vr->chroma_r, 0x03310000);
988 out_be32(&vr->chroma_g, 0x06600F38);
989 out_be32(&vr->chroma_b, 0x00000409);
990 out_be32(&vr->alpha, 0x000000ff);
991 out_be32(&vr->req_alarm, 0x00000090);
992 dprintk(1, "status reg: 0x%08x, field base: 0x%08x\n",
993 in_be32(&vr->status_cfg), in_be32(&vr->field_base_addr));
994}
995
996static void viu_overlay_intr(struct viu_dev *dev, u32 status)
997{
27e4b6cf 998 struct viu_reg __iomem *vr = dev->vr;
95c5d605
AG		 999
1000 if (status & INT_DMA_END_STATUS)
1001 dev->dma_done = 1;
1002
1003 if (status & INT_FIELD_STATUS) {
1004 if (dev->dma_done) {
1005 u32 addr = reg_val.field_base_addr;
1006
1007 dev->dma_done = 0;
1008 if (status & FIELD_NO)
1009 addr += reg_val.dma_inc;
1010
1011 out_be32(&vr->field_base_addr, addr);
1012 out_be32(&vr->dma_inc, reg_val.dma_inc);
1013 out_be32(&vr->status_cfg,
1014 (status & 0xffc0ffff) |
1015 (status & INT_ALL_STATUS) |
1016 reg_val.status_cfg);
1017 } else if (status & INT_VSYNC_STATUS) {
1018 out_be32(&vr->status_cfg,
1019 (status & 0xffc0ffff) |
1020 (status & INT_ALL_STATUS) |
1021 reg_val.status_cfg);
1022 }
1023 }
1024}
1025
1026static void viu_capture_intr(struct viu_dev *dev, u32 status)
1027{
1028 struct viu_dmaqueue *vidq = &dev->vidq;
27e4b6cf 1029 struct viu_reg __iomem *vr = dev->vr;
95c5d605
AG		 1030 struct viu_buf *buf;
1031 int field_num;
1032 int need_two;
1033 int dma_done = 0;
1034
1035 field_num = status & FIELD_NO;
1036 need_two = V4L2_FIELD_HAS_BOTH(dev->capfield);
1037
1038 if (status & INT_DMA_END_STATUS) {
1039 dma_done = 1;
1040 if (((field_num == 0) && (dev->field == 0)) ||
1041 (field_num && (dev->field == 1)))
1042 dev->field++;
1043 }
1044
1045 if (status & INT_FIELD_STATUS) {
1046 dprintk(1, "irq: field %d, done %d\n",
1047 !!field_num, dma_done);
1048 if (unlikely(dev->first)) {
1049 if (field_num == 0) {
1050 dev->first = 0;
1051 dprintk(1, "activate first buf\n");
1052 viu_activate_next_buf(dev, vidq);
1053 } else
1054 dprintk(1, "wait field 0\n");
1055 return;
1056 }
1057
1058 /* setup buffer address for next dma operation */
1059 if (!list_empty(&vidq->active)) {
1060 u32 addr = reg_val.field_base_addr;
1061
1062 if (field_num && need_two) {
1063 addr += reg_val.dma_inc;
1064 dprintk(1, "field 1, 0x%lx, dev field %d\n",
1065 (unsigned long)addr, dev->field);
1066 }
1067 out_be32(&vr->field_base_addr, addr);
1068 out_be32(&vr->dma_inc, reg_val.dma_inc);
1069 out_be32(&vr->status_cfg,
1070 (status & 0xffc0ffff) |
1071 (status & INT_ALL_STATUS) |
1072 reg_val.status_cfg);
1073 return;
1074 }
1075 }
1076
1077 if (dma_done && field_num && (dev->field == 2)) {
1078 dev->field = 0;
1079 buf = list_entry(vidq->active.next,
1080 struct viu_buf, vb.queue);
1081 dprintk(1, "viu/0: [%p/%d] 0x%lx/0x%lx: dma complete\n",
1082 buf, buf->vb.i,
1083 (unsigned long)videobuf_to_dma_contig(&buf->vb),
1084 (unsigned long)in_be32(&vr->field_base_addr));
1085
1086 if (waitqueue_active(&buf->vb.done)) {
1087 list_del(&buf->vb.queue);
15a40b27 1088 buf->vb.ts = ktime_get_ns();
95c5d605
AG		 1089 buf->vb.state = VIDEOBUF_DONE;
1090 buf->vb.field_count++;
1091 wake_up(&buf->vb.done);
1092 }
1093 /* activate next dma buffer */
1094 viu_activate_next_buf(dev, vidq);
1095 }
1096}
1097
1098static irqreturn_t viu_intr(int irq, void *dev_id)
1099{
1100 struct viu_dev *dev = (struct viu_dev *)dev_id;
27e4b6cf 1101 struct viu_reg __iomem *vr = dev->vr;
95c5d605
AG		 1102 u32 status;
1103 u32 error;
1104
1105 status = in_be32(&vr->status_cfg);
1106
1107 if (status & INT_ERROR_STATUS) {
1108 dev->irqs.error_irq++;
1109 error = status & ERR_MASK;
1110 if (error)
1111 dprintk(1, "Err: error(%d), times:%d!\n",
1112 error >> 4, dev->irqs.error_irq);
1113 /* Clear interrupt error bit and error flags */
1114 out_be32(&vr->status_cfg,
1115 (status & 0xffc0ffff) | INT_ERROR_STATUS);
1116 }
1117
1118 if (status & INT_DMA_END_STATUS) {
1119 dev->irqs.dma_end_irq++;
1120 dev->dma_done = 1;
1121 dprintk(2, "VIU DMA end interrupt times: %d\n",
1122 dev->irqs.dma_end_irq);
1123 }
1124
1125 if (status & INT_HSYNC_STATUS)
1126 dev->irqs.hsync_irq++;
1127
1128 if (status & INT_FIELD_STATUS) {
1129 dev->irqs.field_irq++;
1130 dprintk(2, "VIU field interrupt times: %d\n",
1131 dev->irqs.field_irq);
1132 }
1133
1134 if (status & INT_VSTART_STATUS)
1135 dev->irqs.vstart_irq++;
1136
1137 if (status & INT_VSYNC_STATUS) {
1138 dev->irqs.vsync_irq++;
1139 dprintk(2, "VIU vsync interrupt times: %d\n",
1140 dev->irqs.vsync_irq);
1141 }
1142
1143 /* clear all pending irqs */
1144 status = in_be32(&vr->status_cfg);
1145 out_be32(&vr->status_cfg,
1146 (status & 0xffc0ffff) | (status & INT_ALL_STATUS));
1147
1148 if (dev->ovenable) {
1149 viu_overlay_intr(dev, status);
1150 return IRQ_HANDLED;
1151 }
1152
1153 /* Capture mode */
1154 viu_capture_intr(dev, status);
1155 return IRQ_HANDLED;
1156}
1157
1158/*
1159 * File operations for the device
1160 */
1161static int viu_open(struct file *file)
1162{
1163 struct video_device *vdev = video_devdata(file);
1164 struct viu_dev *dev = video_get_drvdata(vdev);
1165 struct viu_fh *fh;
27e4b6cf 1166 struct viu_reg __iomem *vr;
95c5d605
AG		 1167 int minor = vdev->minor;
1168 u32 status_cfg;
95c5d605
AG		 1169
1170 dprintk(1, "viu: open (minor=%d)\n", minor);
1171
1172 dev->users++;
1173 if (dev->users > 1) {
1174 dev->users--;
1175 return -EBUSY;
1176 }
1177
1178 vr = dev->vr;
1179
1180 dprintk(1, "open minor=%d type=%s users=%d\n", minor,
1181 v4l2_type_names[V4L2_BUF_TYPE_VIDEO_CAPTURE], dev->users);
1182
87cb0278
HV		 1183 if (mutex_lock_interruptible(&dev->lock)) {
1184 dev->users--;
1185 return -ERESTARTSYS;
1186 }
1187
95c5d605
AG		 1188 /* allocate and initialize per filehandle data */
1189 fh = kzalloc(sizeof(*fh), GFP_KERNEL);
1190 if (!fh) {
1191 dev->users--;
87cb0278 1192 mutex_unlock(&dev->lock);
95c5d605
AG		 1193 return -ENOMEM;
1194 }
1195
7fe0b3d7 1196 v4l2_fh_init(&fh->fh, vdev);
95c5d605
AG		 1197 file->private_data = fh;
1198 fh->dev = dev;
1199
1200 fh->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1201 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_RGB32);
1202 fh->width = norm_maxw();
1203 fh->height = norm_maxh();
1204 dev->crop_current.width = fh->width;
1205 dev->crop_current.height = fh->height;
1206
2d78a19c 1207 dprintk(1, "Open: fh=%p, dev=%p, dev->vidq=%p\n", fh, dev, &dev->vidq);
95c5d605
AG		 1208 dprintk(1, "Open: list_empty queued=%d\n",
1209 list_empty(&dev->vidq.queued));
1210 dprintk(1, "Open: list_empty active=%d\n",
1211 list_empty(&dev->vidq.active));
1212
1213 viu_default_settings(vr);
1214
1215 status_cfg = in_be32(&vr->status_cfg);
1216 out_be32(&vr->status_cfg,
1217 status_cfg & ~(INT_VSYNC_EN | INT_HSYNC_EN |
1218 INT_FIELD_EN | INT_VSTART_EN |
1219 INT_DMA_END_EN | INT_ERROR_EN | INT_ECC_EN));
1220
1221 status_cfg = in_be32(&vr->status_cfg);
1222 out_be32(&vr->status_cfg, status_cfg | INT_ALL_STATUS);
1223
1224 spin_lock_init(&fh->vbq_lock);
1225 videobuf_queue_dma_contig_init(&fh->vb_vidq, &viu_video_qops,
1226 dev->dev, &fh->vbq_lock,
1227 fh->type, V4L2_FIELD_INTERLACED,
2f970006
AG		 1228 sizeof(struct viu_buf), fh,
1229 &fh->dev->lock);
7fe0b3d7 1230 v4l2_fh_add(&fh->fh);
87cb0278 1231 mutex_unlock(&dev->lock);
95c5d605
AG		 1232 return 0;
1233}
1234
1235static ssize_t viu_read(struct file *file, char __user *data, size_t count,
1236 loff_t *ppos)
1237{
1238 struct viu_fh *fh = file->private_data;
1239 struct viu_dev *dev = fh->dev;
1240 int ret = 0;
1241
1242 dprintk(2, "%s\n", __func__);
1243 if (dev->ovenable)
1244 dev->ovenable = 0;
1245
1246 if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
87cb0278
HV		 1247 if (mutex_lock_interruptible(&dev->lock))
1248 return -ERESTARTSYS;
95c5d605
AG		 1249 viu_start_dma(dev);
1250 ret = videobuf_read_stream(&fh->vb_vidq, data, count,
1251 ppos, 0, file->f_flags & O_NONBLOCK);
87cb0278 1252 mutex_unlock(&dev->lock);
95c5d605
AG		 1253 return ret;
1254 }
1255 return 0;
1256}
1257
c23e0cb8 1258static __poll_t viu_poll(struct file *file, struct poll_table_struct *wait)
95c5d605
AG		 1259{
1260 struct viu_fh *fh = file->private_data;
1261 struct videobuf_queue *q = &fh->vb_vidq;
87cb0278 1262 struct viu_dev *dev = fh->dev;
01699437 1263 __poll_t req_events = poll_requested_events(wait);
c23e0cb8 1264 __poll_t res = v4l2_ctrl_poll(file, wait);
95c5d605
AG		 1265
1266 if (V4L2_BUF_TYPE_VIDEO_CAPTURE != fh->type)
a9a08845 1267 return EPOLLERR;
95c5d605 1268
a9a08845 1269 if (!(req_events & (EPOLLIN | EPOLLRDNORM)))
7fe0b3d7
HV		 1270 return res;
1271
87cb0278 1272 mutex_lock(&dev->lock);
7fe0b3d7 1273 res |= videobuf_poll_stream(file, q, wait);
87cb0278
HV		 1274 mutex_unlock(&dev->lock);
1275 return res;
95c5d605
AG		 1276}
1277
1278static int viu_release(struct file *file)
1279{
1280 struct viu_fh *fh = file->private_data;
1281 struct viu_dev *dev = fh->dev;
1282 int minor = video_devdata(file)->minor;
1283
87cb0278 1284 mutex_lock(&dev->lock);
95c5d605
AG		 1285 viu_stop_dma(dev);
1286 videobuf_stop(&fh->vb_vidq);
c3353330 1287 videobuf_mmap_free(&fh->vb_vidq);
7fe0b3d7
HV		 1288 v4l2_fh_del(&fh->fh);
1289 v4l2_fh_exit(&fh->fh);
87cb0278 1290 mutex_unlock(&dev->lock);
95c5d605
AG		 1291
1292 kfree(fh);
1293
1294 dev->users--;
1295 dprintk(1, "close (minor=%d, users=%d)\n",
1296 minor, dev->users);
1297 return 0;
1298}
1299
27e4b6cf 1300static void viu_reset(struct viu_reg __iomem *reg)
95c5d605
AG		 1301{
1302 out_be32(&reg->status_cfg, 0);
1303 out_be32(&reg->luminance, 0x9512a254);
1304 out_be32(&reg->chroma_r, 0x03310000);
1305 out_be32(&reg->chroma_g, 0x06600f38);
1306 out_be32(&reg->chroma_b, 0x00000409);
1307 out_be32(&reg->field_base_addr, 0);
1308 out_be32(&reg->dma_inc, 0);
1309 out_be32(&reg->picture_count, 0x01e002d0);
1310 out_be32(&reg->req_alarm, 0x00000090);
1311 out_be32(&reg->alpha, 0x000000ff);
1312}
1313
1314static int viu_mmap(struct file *file, struct vm_area_struct *vma)
1315{
1316 struct viu_fh *fh = file->private_data;
87cb0278 1317 struct viu_dev *dev = fh->dev;
95c5d605
AG		 1318 int ret;
1319
2d78a19c 1320 dprintk(1, "mmap called, vma=%p\n", vma);
95c5d605 1321
87cb0278
HV		 1322 if (mutex_lock_interruptible(&dev->lock))
1323 return -ERESTARTSYS;
95c5d605 1324 ret = videobuf_mmap_mapper(&fh->vb_vidq, vma);
87cb0278 1325 mutex_unlock(&dev->lock);
95c5d605
AG		 1326
1327 dprintk(1, "vma start=0x%08lx, size=%ld, ret=%d\n",
1328 (unsigned long)vma->vm_start,
1329 (unsigned long)vma->vm_end-(unsigned long)vma->vm_start,
1330 ret);
1331
1332 return ret;
1333}
1334
6bcc0516 1335static const struct v4l2_file_operations viu_fops = {
95c5d605
AG		 1336 .owner = THIS_MODULE,
1337 .open = viu_open,
1338 .release = viu_release,
1339 .read = viu_read,
1340 .poll = viu_poll,
2f970006 1341 .unlocked_ioctl = video_ioctl2, /* V4L2 ioctl handler */
95c5d605
AG		 1342 .mmap = viu_mmap,
1343};
1344
1345static const struct v4l2_ioctl_ops viu_ioctl_ops = {
1346 .vidioc_querycap = vidioc_querycap,
1347 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt,
1348 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_cap,
1349 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_cap,
1350 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_cap,
1351 .vidioc_enum_fmt_vid_overlay = vidioc_enum_fmt,
1352 .vidioc_g_fmt_vid_overlay = vidioc_g_fmt_overlay,
1353 .vidioc_try_fmt_vid_overlay = vidioc_try_fmt_overlay,
1354 .vidioc_s_fmt_vid_overlay = vidioc_s_fmt_overlay,
791ae699 1355 .vidioc_overlay = vidioc_overlay,
95c5d605
AG		 1356 .vidioc_g_fbuf = vidioc_g_fbuf,
1357 .vidioc_s_fbuf = vidioc_s_fbuf,
1358 .vidioc_reqbufs = vidioc_reqbufs,
1359 .vidioc_querybuf = vidioc_querybuf,
1360 .vidioc_qbuf = vidioc_qbuf,
1361 .vidioc_dqbuf = vidioc_dqbuf,
50155c25 1362 .vidioc_g_std = vidioc_g_std,
95c5d605 1363 .vidioc_s_std = vidioc_s_std,
50155c25 1364 .vidioc_querystd = vidioc_querystd,
95c5d605
AG		 1365 .vidioc_enum_input = vidioc_enum_input,
1366 .vidioc_g_input = vidioc_g_input,
1367 .vidioc_s_input = vidioc_s_input,
95c5d605
AG		 1368 .vidioc_streamon = vidioc_streamon,
1369 .vidioc_streamoff = vidioc_streamoff,
7fe0b3d7
HV		 1370 .vidioc_log_status = v4l2_ctrl_log_status,
1371 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
1372 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
95c5d605
AG		 1373};
1374
5303135c 1375static const struct video_device viu_template = {
95c5d605
AG		 1376 .name = "FSL viu",
1377 .fops = &viu_fops,
1378 .minor = -1,
1379 .ioctl_ops = &viu_ioctl_ops,
1380 .release = video_device_release,
1381
1382 .tvnorms = V4L2_STD_NTSC_M | V4L2_STD_PAL,
95c5d605
AG		 1383};
1384
4c62e976 1385static int viu_of_probe(struct platform_device *op)
95c5d605
AG		 1386{
1387 struct viu_dev *viu_dev;
1388 struct video_device *vdev;
1389 struct resource r;
1390 struct viu_reg __iomem *viu_regs;
1391 struct i2c_adapter *ad;
1392 int ret, viu_irq;
a5d7a6de 1393 struct clk *clk;
95c5d605
AG		 1394
1395 ret = of_address_to_resource(op->dev.of_node, 0, &r);
1396 if (ret) {
1397 dev_err(&op->dev, "Can't parse device node resource\n");
1398 return -ENODEV;
1399 }
1400
1401 viu_irq = irq_of_parse_and_map(op->dev.of_node, 0);
29d75068 1402 if (!viu_irq) {
95c5d605
AG		 1403 dev_err(&op->dev, "Error while mapping the irq\n");
1404 return -EINVAL;
1405 }
1406
1407 /* request mem region */
1408 if (!devm_request_mem_region(&op->dev, r.start,
1409 sizeof(struct viu_reg), DRV_NAME)) {
1410 dev_err(&op->dev, "Error while requesting mem region\n");
1411 ret = -EBUSY;
662a99e1 1412 goto err_irq;
95c5d605
AG		 1413 }
1414
1415 /* remap registers */
1416 viu_regs = devm_ioremap(&op->dev, r.start, sizeof(struct viu_reg));
1417 if (!viu_regs) {
1418 dev_err(&op->dev, "Can't map register set\n");
1419 ret = -ENOMEM;
662a99e1 1420 goto err_irq;
95c5d605
AG		 1421 }
1422
1423 /* Prepare our private structure */
1424 viu_dev = devm_kzalloc(&op->dev, sizeof(struct viu_dev), GFP_ATOMIC);
1425 if (!viu_dev) {
1426 dev_err(&op->dev, "Can't allocate private structure\n");
1427 ret = -ENOMEM;
662a99e1 1428 goto err_irq;
95c5d605
AG		 1429 }
1430
1431 viu_dev->vr = viu_regs;
1432 viu_dev->irq = viu_irq;
1433 viu_dev->dev = &op->dev;
1434
1435 /* init video dma queues */
1436 INIT_LIST_HEAD(&viu_dev->vidq.active);
1437 INIT_LIST_HEAD(&viu_dev->vidq.queued);
1438
95c5d605
AG		 1439 snprintf(viu_dev->v4l2_dev.name,
1440 sizeof(viu_dev->v4l2_dev.name), "%s", "VIU");
1441 ret = v4l2_device_register(viu_dev->dev, &viu_dev->v4l2_dev);
1442 if (ret < 0) {
1443 dev_err(&op->dev, "v4l2_device_register() failed: %d\n", ret);
662a99e1 1444 goto err_irq;
95c5d605
AG		 1445 }
1446
1447 ad = i2c_get_adapter(0);
662a99e1
AK		 1448 if (!ad) {
1449 ret = -EFAULT;
1450 dev_err(&op->dev, "couldn't get i2c adapter\n");
1451 goto err_v4l2;
1452 }
1fea3d60
HV		 1453
1454 v4l2_ctrl_handler_init(&viu_dev->hdl, 5);
1455 if (viu_dev->hdl.error) {
1456 ret = viu_dev->hdl.error;
1457 dev_err(&op->dev, "couldn't register control\n");
662a99e1 1458 goto err_i2c;
1fea3d60
HV		 1459 }
1460 /* This control handler will inherit the control(s) from the
1461 sub-device(s). */
1462 viu_dev->v4l2_dev.ctrl_handler = &viu_dev->hdl;
95c5d605 1463 viu_dev->decoder = v4l2_i2c_new_subdev(&viu_dev->v4l2_dev, ad,
9a1f8b34 1464 "saa7113", VIU_VIDEO_DECODER_ADDR, NULL);
95c5d605 1465
86cb30ec 1466 timer_setup(&viu_dev->vidq.timeout, viu_vid_timeout, 0);
28221f88 1467 viu_dev->std = V4L2_STD_NTSC_M;
95c5d605
AG		 1468 viu_dev->first = 1;
1469
1470 /* Allocate memory for video device */
1471 vdev = video_device_alloc();
1472 if (vdev == NULL) {
1473 ret = -ENOMEM;
662a99e1 1474 goto err_hdl;
95c5d605
AG		 1475 }
1476
7fe0b3d7 1477 *vdev = viu_template;
95c5d605
AG		 1478
1479 vdev->v4l2_dev = &viu_dev->v4l2_dev;
1480
1481 viu_dev->vdev = vdev;
1482
2f970006
AG		 1483 /* initialize locks */
1484 mutex_init(&viu_dev->lock);
1485 viu_dev->vdev->lock = &viu_dev->lock;
1486 spin_lock_init(&viu_dev->slock);
1487
95c5d605
AG		 1488 video_set_drvdata(viu_dev->vdev, viu_dev);
1489
2f970006
AG		 1490 mutex_lock(&viu_dev->lock);
1491
95c5d605
AG		 1492 ret = video_register_device(viu_dev->vdev, VFL_TYPE_GRABBER, -1);
1493 if (ret < 0) {
1494 video_device_release(viu_dev->vdev);
662a99e1 1495 goto err_unlock;
95c5d605
AG		 1496 }
1497
1498 /* enable VIU clock */
17552189 1499 clk = devm_clk_get(&op->dev, "ipg");
a5d7a6de
GS		 1500 if (IS_ERR(clk)) {
1501 dev_err(&op->dev, "failed to lookup the clock!\n");
1502 ret = PTR_ERR(clk);
662a99e1 1503 goto err_vdev;
a5d7a6de
GS		 1504 }
1505 ret = clk_prepare_enable(clk);
1506 if (ret) {
1507 dev_err(&op->dev, "failed to enable the clock!\n");
662a99e1 1508 goto err_vdev;
95c5d605 1509 }
a5d7a6de 1510 viu_dev->clk = clk;
95c5d605
AG		 1511
1512 /* reset VIU module */
1513 viu_reset(viu_dev->vr);
1514
1515 /* install interrupt handler */
1516 if (request_irq(viu_dev->irq, viu_intr, 0, "viu", (void *)viu_dev)) {
1517 dev_err(&op->dev, "Request VIU IRQ failed.\n");
1518 ret = -ENODEV;
662a99e1 1519 goto err_clk;
95c5d605
AG		 1520 }
1521
2f970006
AG		 1522 mutex_unlock(&viu_dev->lock);
1523
95c5d605
AG		 1524 dev_info(&op->dev, "Freescale VIU Video Capture Board\n");
1525 return ret;
1526
95c5d605 1527err_clk:
662a99e1 1528 clk_disable_unprepare(viu_dev->clk);
95c5d605 1529err_vdev:
662a99e1
AK		 1530 video_unregister_device(viu_dev->vdev);
1531err_unlock:
2f970006 1532 mutex_unlock(&viu_dev->lock);
662a99e1
AK		 1533err_hdl:
1534 v4l2_ctrl_handler_free(&viu_dev->hdl);
1535err_i2c:
95c5d605 1536 i2c_put_adapter(ad);
662a99e1 1537err_v4l2:
95c5d605 1538 v4l2_device_unregister(&viu_dev->v4l2_dev);
662a99e1 1539err_irq:
95c5d605
AG		 1540 irq_dispose_mapping(viu_irq);
1541 return ret;
1542}
1543
4c62e976 1544static int viu_of_remove(struct platform_device *op)
95c5d605
AG		 1545{
1546 struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev);
1547 struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev);
1548 struct v4l2_subdev *sdev = list_entry(v4l2_dev->subdevs.next,
1549 struct v4l2_subdev, list);
1550 struct i2c_client *client = v4l2_get_subdevdata(sdev);
1551
1552 free_irq(dev->irq, (void *)dev);
1553 irq_dispose_mapping(dev->irq);
1554
a5d7a6de 1555 clk_disable_unprepare(dev->clk);
95c5d605 1556
1fea3d60 1557 v4l2_ctrl_handler_free(&dev->hdl);
95c5d605
AG		 1558 video_unregister_device(dev->vdev);
1559 i2c_put_adapter(client->adapter);
1560 v4l2_device_unregister(&dev->v4l2_dev);
1561 return 0;
1562}
1563
1564#ifdef CONFIG_PM
2dc11581 1565static int viu_suspend(struct platform_device *op, pm_message_t state)
95c5d605
AG		 1566{
1567 struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev);
1568 struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev);
1569
1570 clk_disable(dev->clk);
1571 return 0;
1572}
1573
2dc11581 1574static int viu_resume(struct platform_device *op)
95c5d605
AG		 1575{
1576 struct v4l2_device *v4l2_dev = dev_get_drvdata(&op->dev);
1577 struct viu_dev *dev = container_of(v4l2_dev, struct viu_dev, v4l2_dev);
1578
1579 clk_enable(dev->clk);
1580 return 0;
1581}
1582#endif
1583
1584/*
1585 * Initialization and module stuff
1586 */
7f099a75 1587static const struct of_device_id mpc512x_viu_of_match[] = {
95c5d605
AG		 1588 {
1589 .compatible = "fsl,mpc5121-viu",
1590 },
1591 {},
1592};
1593MODULE_DEVICE_TABLE(of, mpc512x_viu_of_match);
1594
1c48a5c9 1595static struct platform_driver viu_of_platform_driver = {
95c5d605 1596 .probe = viu_of_probe,
4c62e976 1597 .remove = viu_of_remove,
95c5d605
AG		 1598#ifdef CONFIG_PM
1599 .suspend = viu_suspend,
1600 .resume = viu_resume,
1601#endif
1602 .driver = {
1603 .name = DRV_NAME,
95c5d605
AG		 1604 .of_match_table = mpc512x_viu_of_match,
1605 },
1606};
1607
1d6629b1 1608module_platform_driver(viu_of_platform_driver);
95c5d605
AG		 1609
1610MODULE_DESCRIPTION("Freescale Video-In(VIU)");
1611MODULE_AUTHOR("Hongjun Chen");
1612MODULE_LICENSE("GPL");
64dc3c1a 1613MODULE_VERSION(VIU_VERSION);
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