[mirror_ubuntu-jammy-kernel.git] / drivers / media / platform / mtk-vcodec / vdec / vdec_vp8_if.c

/*
 * Copyright (c) 2016 MediaTek Inc.
 * Author: Jungchang Tsao <jungchang.tsao@mediatek.com>
 *	   PC Chen <pc.chen@mediatek.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/slab.h>
#include "../vdec_drv_if.h"
#include "../mtk_vcodec_util.h"
#include "../mtk_vcodec_dec.h"
#include "../mtk_vcodec_intr.h"
#include "../vdec_vpu_if.h"
#include "../vdec_drv_base.h"

/* Decoding picture buffer size (3 reference frames plus current frame) */
#define VP8_DPB_SIZE			4

/* HW working buffer size (bytes) */
#define VP8_WORKING_BUF_SZ		(45 * 4096)

/* HW control register address */
#define VP8_SEGID_DRAM_ADDR		0x3c
#define VP8_HW_VLD_ADDR			0x93C
#define VP8_HW_VLD_VALUE		0x940
#define VP8_BSASET			0x100
#define VP8_BSDSET			0x104
#define VP8_RW_CKEN_SET			0x0
#define VP8_RW_DCM_CON			0x18
#define VP8_WO_VLD_SRST			0x108
#define VP8_RW_MISC_SYS_SEL		0x84
#define VP8_RW_MISC_SPEC_CON		0xC8
#define VP8_WO_VLD_SRST			0x108
#define VP8_RW_VP8_CTRL			0xA4
#define VP8_RW_MISC_DCM_CON		0xEC
#define VP8_RW_MISC_SRST		0xF4
#define VP8_RW_MISC_FUNC_CON		0xCC

#define VP8_MAX_FRM_BUF_NUM		5
#define VP8_MAX_FRM_BUF_NODE_NUM	(VP8_MAX_FRM_BUF_NUM * 2)

/* required buffer size (bytes) to store decode information */
#define VP8_HW_SEGMENT_DATA_SZ		272
#define VP8_HW_SEGMENT_UINT		4

#define VP8_DEC_TABLE_PROC_LOOP		96
#define VP8_DEC_TABLE_UNIT		3
#define VP8_DEC_TABLE_SZ		300
#define VP8_DEC_TABLE_OFFSET		2
#define VP8_DEC_TABLE_RW_UNIT		4

/**
 * struct vdec_vp8_dec_info - decode misc information
 * @working_buf_dma   : working buffer dma address
 * @prev_y_dma        : previous decoded frame buffer Y plane address
 * @cur_y_fb_dma      : current plane Y frame buffer dma address
 * @cur_c_fb_dma      : current plane C frame buffer dma address
 * @bs_dma	      : bitstream dma address
 * @bs_sz	      : bitstream size
 * @resolution_changed: resolution change flag 1 - changed,  0 - not change
 * @show_frame	      : display this frame or not
 * @wait_key_frame    : wait key frame coming
 */
struct vdec_vp8_dec_info {
	uint64_t working_buf_dma;
	uint64_t prev_y_dma;
	uint64_t cur_y_fb_dma;
	uint64_t cur_c_fb_dma;
	uint64_t bs_dma;
	uint32_t bs_sz;
	uint32_t resolution_changed;
	uint32_t show_frame;
	uint32_t wait_key_frame;
};

/**
 * struct vdec_vp8_vsi - VPU shared information
 * @dec			: decoding information
 * @pic			: picture information
 * @dec_table		: decoder coefficient table
 * @segment_buf		: segmentation buffer
 * @load_data		: flag to indicate reload decode data
 */
struct vdec_vp8_vsi {
	struct vdec_vp8_dec_info dec;
	struct vdec_pic_info pic;
	uint32_t dec_table[VP8_DEC_TABLE_SZ];
	uint32_t segment_buf[VP8_HW_SEGMENT_DATA_SZ][VP8_HW_SEGMENT_UINT];
	uint32_t load_data;
};

/**
 * struct vdec_vp8_hw_reg_base - HW register base
 * @sys		: base address for sys
 * @misc	: base address for misc
 * @ld		: base address for ld
 * @top		: base address for top
 * @cm		: base address for cm
 * @hwd		: base address for hwd
 * @hwb		: base address for hwb
 */
struct vdec_vp8_hw_reg_base {
	void __iomem *sys;
	void __iomem *misc;
	void __iomem *ld;
	void __iomem *top;
	void __iomem *cm;
	void __iomem *hwd;
	void __iomem *hwb;
};

/**
 * struct vdec_vp8_vpu_inst - VPU instance for VP8 decode
 * @wq_hd	: Wait queue to wait VPU message ack
 * @signaled	: 1 - Host has received ack message from VPU, 0 - not recevie
 * @failure	: VPU execution result status 0 - success, others - fail
 * @inst_addr	: VPU decoder instance address
 */
struct vdec_vp8_vpu_inst {
	wait_queue_head_t wq_hd;
	int signaled;
	int failure;
	uint32_t inst_addr;
};

/* frame buffer (fb) list
 * [available_fb_node_list]  - decode fb are initialized to 0 and populated in
 * [fb_use_list]  - fb is set after decode and is moved to this list
 * [fb_free_list] - fb is not needed for reference will be moved from
 *		     [fb_use_list] to [fb_free_list] and
 *		     once user remove fb from [fb_free_list],
 *		     it is circulated back to [available_fb_node_list]
 * [fb_disp_list] - fb is set after decode and is moved to this list
 *                   once user remove fb from [fb_disp_list] it is
 *                   circulated back to [available_fb_node_list]
 */

/**
 * struct vdec_vp8_inst - VP8 decoder instance
 * @cur_fb		   : current frame buffer
 * @dec_fb		   : decode frame buffer node
 * @available_fb_node_list : list to store available frame buffer node
 * @fb_use_list		   : list to store frame buffer in use
 * @fb_free_list	   : list to store free frame buffer
 * @fb_disp_list	   : list to store display ready frame buffer
 * @working_buf		   : HW decoder working buffer
 * @reg_base		   : HW register base address
 * @frm_cnt		   : decode frame count
 * @ctx			   : V4L2 context
 * @vpu			   : VPU instance for decoder
 * @vsi			   : VPU share information
 */
struct vdec_vp8_inst {
	struct vdec_fb *cur_fb;
	struct vdec_fb_node dec_fb[VP8_MAX_FRM_BUF_NODE_NUM];
	struct list_head available_fb_node_list;
	struct list_head fb_use_list;
	struct list_head fb_free_list;
	struct list_head fb_disp_list;
	struct mtk_vcodec_mem working_buf;
	struct vdec_vp8_hw_reg_base reg_base;
	unsigned int frm_cnt;
	struct mtk_vcodec_ctx *ctx;
	struct vdec_vpu_inst vpu;
	struct vdec_vp8_vsi *vsi;
};

static void get_hw_reg_base(struct vdec_vp8_inst *inst)
{
	inst->reg_base.top = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_TOP);
	inst->reg_base.cm = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_CM);
	inst->reg_base.hwd = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_HWD);
	inst->reg_base.sys = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_SYS);
	inst->reg_base.misc = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_MISC);
	inst->reg_base.ld = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_LD);
	inst->reg_base.hwb = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_HWB);
}

static void write_hw_segmentation_data(struct vdec_vp8_inst *inst)
{
	int i, j;
	u32 seg_id_addr;
	u32 val;
	void __iomem *cm = inst->reg_base.cm;
	struct vdec_vp8_vsi *vsi = inst->vsi;

	seg_id_addr = readl(inst->reg_base.top + VP8_SEGID_DRAM_ADDR) >> 4;

	for (i = 0; i < ARRAY_SIZE(vsi->segment_buf); i++) {
		for (j = ARRAY_SIZE(vsi->segment_buf[i]) - 1; j >= 0; j--) {
			val = (1 << 16) + ((seg_id_addr + i) << 2) + j;
			writel(val, cm + VP8_HW_VLD_ADDR);

			val = vsi->segment_buf[i][j];
			writel(val, cm + VP8_HW_VLD_VALUE);
		}
	}
}

static void read_hw_segmentation_data(struct vdec_vp8_inst *inst)
{
	int i, j;
	u32 seg_id_addr;
	u32 val;
	void __iomem *cm = inst->reg_base.cm;
	struct vdec_vp8_vsi *vsi = inst->vsi;

	seg_id_addr = readl(inst->reg_base.top + VP8_SEGID_DRAM_ADDR) >> 4;

	for (i = 0; i < ARRAY_SIZE(vsi->segment_buf); i++) {
		for (j = ARRAY_SIZE(vsi->segment_buf[i]) - 1; j >= 0; j--) {
			val = ((seg_id_addr + i) << 2) + j;
			writel(val, cm + VP8_HW_VLD_ADDR);

			val = readl(cm + VP8_HW_VLD_VALUE);
			vsi->segment_buf[i][j] = val;
		}
	}
}

/* reset HW and enable HW read/write data function */
static void enable_hw_rw_function(struct vdec_vp8_inst *inst)
{
	u32 val = 0;
	void __iomem *sys = inst->reg_base.sys;
	void __iomem *misc = inst->reg_base.misc;
	void __iomem *ld = inst->reg_base.ld;
	void __iomem *hwb = inst->reg_base.hwb;
	void __iomem *hwd = inst->reg_base.hwd;

	writel(0x1, sys + VP8_RW_CKEN_SET);
	writel(0x101, ld + VP8_WO_VLD_SRST);
	writel(0x101, hwb + VP8_WO_VLD_SRST);

	writel(1, sys);
	val = readl(misc + VP8_RW_MISC_SRST);
	writel((val & 0xFFFFFFFE), misc + VP8_RW_MISC_SRST);

	writel(0x1, misc + VP8_RW_MISC_SYS_SEL);
	writel(0x17F, misc + VP8_RW_MISC_SPEC_CON);
	writel(0x71201100, misc + VP8_RW_MISC_FUNC_CON);
	writel(0x0, ld + VP8_WO_VLD_SRST);
	writel(0x0, hwb + VP8_WO_VLD_SRST);
	writel(0x1, sys + VP8_RW_DCM_CON);
	writel(0x1, misc + VP8_RW_MISC_DCM_CON);
	writel(0x1, hwd + VP8_RW_VP8_CTRL);
}

static void store_dec_table(struct vdec_vp8_inst *inst)
{
	int i, j;
	u32 addr = 0, val = 0;
	void __iomem *hwd = inst->reg_base.hwd;
	u32 *p = &inst->vsi->dec_table[VP8_DEC_TABLE_OFFSET];

	for (i = 0; i < VP8_DEC_TABLE_PROC_LOOP; i++) {
		writel(addr, hwd + VP8_BSASET);
		for (j = 0; j < VP8_DEC_TABLE_UNIT ; j++) {
			val = *p++;
			writel(val, hwd + VP8_BSDSET);
		}
		addr += VP8_DEC_TABLE_RW_UNIT;
	}
}

static void load_dec_table(struct vdec_vp8_inst *inst)
{
	int i;
	u32 addr = 0;
	u32 *p = &inst->vsi->dec_table[VP8_DEC_TABLE_OFFSET];
	void __iomem *hwd = inst->reg_base.hwd;

	for (i = 0; i < VP8_DEC_TABLE_PROC_LOOP; i++) {
		writel(addr, hwd + VP8_BSASET);
		/* read total 11 bytes */
		*p++ = readl(hwd + VP8_BSDSET);
		*p++ = readl(hwd + VP8_BSDSET);
		*p++ = readl(hwd + VP8_BSDSET) & 0xFFFFFF;
		addr += VP8_DEC_TABLE_RW_UNIT;
	}
}

static void get_pic_info(struct vdec_vp8_inst *inst, struct vdec_pic_info *pic)
{
	*pic = inst->vsi->pic;

	mtk_vcodec_debug(inst, "pic(%d, %d), buf(%d, %d)",
			 pic->pic_w, pic->pic_h, pic->buf_w, pic->buf_h);
	mtk_vcodec_debug(inst, "Y(%d, %d), C(%d, %d)", pic->y_bs_sz,
			 pic->y_len_sz, pic->c_bs_sz, pic->c_len_sz);
}

static void vp8_dec_finish(struct vdec_vp8_inst *inst)
{
	struct vdec_fb_node *node;
	uint64_t prev_y_dma = inst->vsi->dec.prev_y_dma;

	mtk_vcodec_debug(inst, "prev fb base dma=%llx", prev_y_dma);

	/* put last decode ok frame to fb_free_list */
	if (prev_y_dma != 0) {
		list_for_each_entry(node, &inst->fb_use_list, list) {
			struct vdec_fb *fb = (struct vdec_fb *)node->fb;

			if (prev_y_dma == (uint64_t)fb->base_y.dma_addr) {
				list_move_tail(&node->list,
					       &inst->fb_free_list);
				break;
			}
		}
	}

	/* available_fb_node_list -> fb_use_list */
	node = list_first_entry(&inst->available_fb_node_list,
				struct vdec_fb_node, list);
	node->fb = inst->cur_fb;
	list_move_tail(&node->list, &inst->fb_use_list);

	/* available_fb_node_list -> fb_disp_list */
	if (inst->vsi->dec.show_frame) {
		node = list_first_entry(&inst->available_fb_node_list,
					struct vdec_fb_node, list);
		node->fb = inst->cur_fb;
		list_move_tail(&node->list, &inst->fb_disp_list);
	}
}

static void move_fb_list_use_to_free(struct vdec_vp8_inst *inst)
{
	struct vdec_fb_node *node, *tmp;

	list_for_each_entry_safe(node, tmp, &inst->fb_use_list, list)
		list_move_tail(&node->list, &inst->fb_free_list);
}

static void init_list(struct vdec_vp8_inst *inst)
{
	int i;

	INIT_LIST_HEAD(&inst->available_fb_node_list);
	INIT_LIST_HEAD(&inst->fb_use_list);
	INIT_LIST_HEAD(&inst->fb_free_list);
	INIT_LIST_HEAD(&inst->fb_disp_list);

	for (i = 0; i < ARRAY_SIZE(inst->dec_fb); i++) {
		INIT_LIST_HEAD(&inst->dec_fb[i].list);
		inst->dec_fb[i].fb = NULL;
		list_add_tail(&inst->dec_fb[i].list,
			      &inst->available_fb_node_list);
	}
}

static void add_fb_to_free_list(struct vdec_vp8_inst *inst, void *fb)
{
	struct vdec_fb_node *node;

	if (fb) {
		node = list_first_entry(&inst->available_fb_node_list,
					struct vdec_fb_node, list);
		node->fb = fb;
		list_move_tail(&node->list, &inst->fb_free_list);
	}
}

static int alloc_working_buf(struct vdec_vp8_inst *inst)
{
	int err;
	struct mtk_vcodec_mem *mem = &inst->working_buf;

	mem->size = VP8_WORKING_BUF_SZ;
	err = mtk_vcodec_mem_alloc(inst->ctx, mem);
	if (err) {
		mtk_vcodec_err(inst, "Cannot allocate working buffer");
		return err;
	}

	inst->vsi->dec.working_buf_dma = (uint64_t)mem->dma_addr;
	return 0;
}

static void free_working_buf(struct vdec_vp8_inst *inst)
{
	struct mtk_vcodec_mem *mem = &inst->working_buf;

	if (mem->va)
		mtk_vcodec_mem_free(inst->ctx, mem);

	inst->vsi->dec.working_buf_dma = 0;
}

static int vdec_vp8_init(struct mtk_vcodec_ctx *ctx, unsigned long *h_vdec)
{
	struct vdec_vp8_inst *inst;
	int err;

	inst = kzalloc(sizeof(*inst), GFP_KERNEL);
	if (!inst)
		return  -ENOMEM;

	inst->ctx = ctx;

	inst->vpu.id = IPI_VDEC_VP8;
	inst->vpu.dev = ctx->dev->vpu_plat_dev;
	inst->vpu.ctx = ctx;
	inst->vpu.handler = vpu_dec_ipi_handler;

	err = vpu_dec_init(&inst->vpu);
	if (err) {
		mtk_vcodec_err(inst, "vdec_vp8 init err=%d", err);
		goto error_free_inst;
	}

	inst->vsi = (struct vdec_vp8_vsi *)inst->vpu.vsi;
	init_list(inst);
	err = alloc_working_buf(inst);
	if (err)
		goto error_deinit;

	get_hw_reg_base(inst);
	mtk_vcodec_debug(inst, "VP8 Instance >> %p", inst);

	*h_vdec = (unsigned long)inst;
	return 0;

error_deinit:
	vpu_dec_deinit(&inst->vpu);
error_free_inst:
	kfree(inst);
	return err;
}

static int vdec_vp8_decode(unsigned long h_vdec, struct mtk_vcodec_mem *bs,
			   struct vdec_fb *fb, bool *res_chg)
{
	struct vdec_vp8_inst *inst = (struct vdec_vp8_inst *)h_vdec;
	struct vdec_vp8_dec_info *dec = &inst->vsi->dec;
	struct vdec_vpu_inst *vpu = &inst->vpu;
	unsigned char *bs_va;
	unsigned int data;
	int err = 0;
	uint64_t y_fb_dma;
	uint64_t c_fb_dma;

	/* bs NULL means flush decoder */
	if (bs == NULL) {
		move_fb_list_use_to_free(inst);
		return vpu_dec_reset(vpu);
	}

	y_fb_dma = fb ? (u64)fb->base_y.dma_addr : 0;
	c_fb_dma = fb ? (u64)fb->base_c.dma_addr : 0;

	mtk_vcodec_debug(inst, "+ [%d] FB y_dma=%llx c_dma=%llx fb=%p",
			 inst->frm_cnt, y_fb_dma, c_fb_dma, fb);

	inst->cur_fb = fb;
	dec->bs_dma = (unsigned long)bs->dma_addr;
	dec->bs_sz = bs->size;
	dec->cur_y_fb_dma = y_fb_dma;
	dec->cur_c_fb_dma = c_fb_dma;

	mtk_vcodec_debug(inst, "\n + FRAME[%d] +\n", inst->frm_cnt);

	write_hw_segmentation_data(inst);
	enable_hw_rw_function(inst);
	store_dec_table(inst);

	bs_va = (unsigned char *)bs->va;

	/* retrieve width/hight and scale info from header */
	data = (*(bs_va + 9) << 24) | (*(bs_va + 8) << 16) |
	       (*(bs_va + 7) << 8) | *(bs_va + 6);
	err = vpu_dec_start(vpu, &data, 1);
	if (err) {
		add_fb_to_free_list(inst, fb);
		if (dec->wait_key_frame) {
			mtk_vcodec_debug(inst, "wait key frame !");
			return 0;
		}

		goto error;
	}

	if (dec->resolution_changed) {
		mtk_vcodec_debug(inst, "- resolution_changed -");
		*res_chg = true;
		add_fb_to_free_list(inst, fb);
		return 0;
	}

	/* wait decoder done interrupt */
	mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED,
				     WAIT_INTR_TIMEOUT_MS);

	if (inst->vsi->load_data)
		load_dec_table(inst);

	vp8_dec_finish(inst);
	read_hw_segmentation_data(inst);

	err = vpu_dec_end(vpu);
	if (err)
		goto error;

	mtk_vcodec_debug(inst, "\n - FRAME[%d] - show=%d\n", inst->frm_cnt,
			 dec->show_frame);
	inst->frm_cnt++;
	*res_chg = false;
	return 0;

error:
	mtk_vcodec_err(inst, "\n - FRAME[%d] - err=%d\n", inst->frm_cnt, err);
	return err;
}

static void get_disp_fb(struct vdec_vp8_inst *inst, struct vdec_fb **out_fb)
{
	struct vdec_fb_node *node;
	struct vdec_fb *fb;

	node = list_first_entry_or_null(&inst->fb_disp_list,
					struct vdec_fb_node, list);
	if (node) {
		list_move_tail(&node->list, &inst->available_fb_node_list);
		fb = (struct vdec_fb *)node->fb;
		fb->status |= FB_ST_DISPLAY;
		mtk_vcodec_debug(inst, "[FB] get disp fb %p st=%d",
				 node->fb, fb->status);
	} else {
		fb = NULL;
		mtk_vcodec_debug(inst, "[FB] there is no disp fb");
	}

	*out_fb = fb;
}

static void get_free_fb(struct vdec_vp8_inst *inst, struct vdec_fb **out_fb)
{
	struct vdec_fb_node *node;
	struct vdec_fb *fb;

	node = list_first_entry_or_null(&inst->fb_free_list,
					struct vdec_fb_node, list);
	if (node) {
		list_move_tail(&node->list, &inst->available_fb_node_list);
		fb = (struct vdec_fb *)node->fb;
		fb->status |= FB_ST_FREE;
		mtk_vcodec_debug(inst, "[FB] get free fb %p st=%d",
				 node->fb, fb->status);
	} else {
		fb = NULL;
		mtk_vcodec_debug(inst, "[FB] there is no free fb");
	}

	*out_fb = fb;
}

static void get_crop_info(struct vdec_vp8_inst *inst, struct v4l2_rect *cr)
{
	cr->left = 0;
	cr->top = 0;
	cr->width = inst->vsi->pic.pic_w;
	cr->height = inst->vsi->pic.pic_h;
	mtk_vcodec_debug(inst, "get crop info l=%d, t=%d, w=%d, h=%d",
			 cr->left, cr->top, cr->width, cr->height);
}

static int vdec_vp8_get_param(unsigned long h_vdec,
			      enum vdec_get_param_type type, void *out)
{
	struct vdec_vp8_inst *inst = (struct vdec_vp8_inst *)h_vdec;

	switch (type) {
	case GET_PARAM_DISP_FRAME_BUFFER:
		get_disp_fb(inst, out);
		break;

	case GET_PARAM_FREE_FRAME_BUFFER:
		get_free_fb(inst, out);
		break;

	case GET_PARAM_PIC_INFO:
		get_pic_info(inst, out);
		break;

	case GET_PARAM_CROP_INFO:
		get_crop_info(inst, out);
		break;

	case GET_PARAM_DPB_SIZE:
		*((unsigned int *)out) = VP8_DPB_SIZE;
		break;

	default:
		mtk_vcodec_err(inst, "invalid get parameter type=%d", type);
		return -EINVAL;
	}

	return 0;
}

static void vdec_vp8_deinit(unsigned long h_vdec)
{
	struct vdec_vp8_inst *inst = (struct vdec_vp8_inst *)h_vdec;

	mtk_vcodec_debug_enter(inst);

	vpu_dec_deinit(&inst->vpu);
	free_working_buf(inst);
	kfree(inst);
}

static struct vdec_common_if vdec_vp8_if = {
	.init		= vdec_vp8_init,
	.decode		= vdec_vp8_decode,
	.get_param	= vdec_vp8_get_param,
	.deinit		= vdec_vp8_deinit,
};

struct vdec_common_if *get_vp8_dec_comm_if(void);

struct vdec_common_if *get_vp8_dec_comm_if(void)
{
	return &vdec_vp8_if;
}
Commit	Line	Data
d1fad85f TL	1	/*
	2	* Copyright (c) 2016 MediaTek Inc.
	3	* Author: Jungchang Tsao <jungchang.tsao@mediatek.com>
	4	* PC Chen <pc.chen@mediatek.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*/
	15
	16	#include <linux/slab.h>
	17	#include "../vdec_drv_if.h"
	18	#include "../mtk_vcodec_util.h"
	19	#include "../mtk_vcodec_dec.h"
	20	#include "../mtk_vcodec_intr.h"
	21	#include "../vdec_vpu_if.h"
	22	#include "../vdec_drv_base.h"
	23
	24	/* Decoding picture buffer size (3 reference frames plus current frame) */
	25	#define VP8_DPB_SIZE 4
	26
	27	/* HW working buffer size (bytes) */
	28	#define VP8_WORKING_BUF_SZ (45 * 4096)
	29
	30	/* HW control register address */
	31	#define VP8_SEGID_DRAM_ADDR 0x3c
	32	#define VP8_HW_VLD_ADDR 0x93C
	33	#define VP8_HW_VLD_VALUE 0x940
	34	#define VP8_BSASET 0x100
	35	#define VP8_BSDSET 0x104
	36	#define VP8_RW_CKEN_SET 0x0
	37	#define VP8_RW_DCM_CON 0x18
	38	#define VP8_WO_VLD_SRST 0x108
	39	#define VP8_RW_MISC_SYS_SEL 0x84
	40	#define VP8_RW_MISC_SPEC_CON 0xC8
	41	#define VP8_WO_VLD_SRST 0x108
	42	#define VP8_RW_VP8_CTRL 0xA4
	43	#define VP8_RW_MISC_DCM_CON 0xEC
	44	#define VP8_RW_MISC_SRST 0xF4
	45	#define VP8_RW_MISC_FUNC_CON 0xCC
	46
	47	#define VP8_MAX_FRM_BUF_NUM 5
	48	#define VP8_MAX_FRM_BUF_NODE_NUM (VP8_MAX_FRM_BUF_NUM * 2)
	49
	50	/* required buffer size (bytes) to store decode information */
	51	#define VP8_HW_SEGMENT_DATA_SZ 272
	52	#define VP8_HW_SEGMENT_UINT 4
	53
	54	#define VP8_DEC_TABLE_PROC_LOOP 96
	55	#define VP8_DEC_TABLE_UNIT 3
	56	#define VP8_DEC_TABLE_SZ 300
	57	#define VP8_DEC_TABLE_OFFSET 2
	58	#define VP8_DEC_TABLE_RW_UNIT 4
	59
	60	/**
	61	* struct vdec_vp8_dec_info - decode misc information
	62	* @working_buf_dma : working buffer dma address
	63	* @prev_y_dma : previous decoded frame buffer Y plane address
	64	* @cur_y_fb_dma : current plane Y frame buffer dma address
65	* @cur_c_fb_dma : current plane C frame buffer dma address
66	* @bs_dma : bitstream dma address
67	* @bs_sz : bitstream size
68	* @resolution_changed: resolution change flag 1 - changed, 0 - not change
69	* @show_frame : display this frame or not
70	* @wait_key_frame : wait key frame coming
71	*/
72	struct vdec_vp8_dec_info {
73	uint64_t working_buf_dma;
74	uint64_t prev_y_dma;
75	uint64_t cur_y_fb_dma;
76	uint64_t cur_c_fb_dma;
77	uint64_t bs_dma;
78	uint32_t bs_sz;
79	uint32_t resolution_changed;
80	uint32_t show_frame;
81	uint32_t wait_key_frame;
82	};
83
84	/**
85	* struct vdec_vp8_vsi - VPU shared information
86	* @dec : decoding information
87	* @pic : picture information
88	* @dec_table : decoder coefficient table
89	* @segment_buf : segmentation buffer
90	* @load_data : flag to indicate reload decode data
91	*/
92	struct vdec_vp8_vsi {
93	struct vdec_vp8_dec_info dec;
94	struct vdec_pic_info pic;
95	uint32_t dec_table[VP8_DEC_TABLE_SZ];
96	uint32_t segment_buf[VP8_HW_SEGMENT_DATA_SZ][VP8_HW_SEGMENT_UINT];
97	uint32_t load_data;
98	};
99
100	/**
101	* struct vdec_vp8_hw_reg_base - HW register base
102	* @sys : base address for sys
103	* @misc : base address for misc
104	* @ld : base address for ld
105	* @top : base address for top
106	* @cm : base address for cm
107	* @hwd : base address for hwd
108	* @hwb : base address for hwb
109	*/
110	struct vdec_vp8_hw_reg_base {
111	void __iomem *sys;
112	void __iomem *misc;
113	void __iomem *ld;
114	void __iomem *top;
115	void __iomem *cm;
116	void __iomem *hwd;
117	void __iomem *hwb;
118	};
119
120	/**
121	* struct vdec_vp8_vpu_inst - VPU instance for VP8 decode
122	* @wq_hd : Wait queue to wait VPU message ack
123	* @signaled : 1 - Host has received ack message from VPU, 0 - not recevie
124	* @failure : VPU execution result status 0 - success, others - fail
125	* @inst_addr : VPU decoder instance address
126	*/
127	struct vdec_vp8_vpu_inst {
128	wait_queue_head_t wq_hd;
129	int signaled;
130	int failure;
131	uint32_t inst_addr;
132	};
133
134	/* frame buffer (fb) list
135	* [available_fb_node_list] - decode fb are initialized to 0 and populated in
136	* [fb_use_list] - fb is set after decode and is moved to this list
137	* [fb_free_list] - fb is not needed for reference will be moved from
138	* [fb_use_list] to [fb_free_list] and
139	* once user remove fb from [fb_free_list],
140	* it is circulated back to [available_fb_node_list]
141	* [fb_disp_list] - fb is set after decode and is moved to this list
142	* once user remove fb from [fb_disp_list] it is
143	* circulated back to [available_fb_node_list]
144	*/
145
146	/**
147	* struct vdec_vp8_inst - VP8 decoder instance
148	* @cur_fb : current frame buffer
149	* @dec_fb : decode frame buffer node
150	* @available_fb_node_list : list to store available frame buffer node
151	* @fb_use_list : list to store frame buffer in use
152	* @fb_free_list : list to store free frame buffer
153	* @fb_disp_list : list to store display ready frame buffer
154	* @working_buf : HW decoder working buffer
155	* @reg_base : HW register base address
156	* @frm_cnt : decode frame count
157	* @ctx : V4L2 context
d1fad85f TL	158	* @vpu : VPU instance for decoder
	159	* @vsi : VPU share information
	160	*/
	161	struct vdec_vp8_inst {
	162	struct vdec_fb *cur_fb;
	163	struct vdec_fb_node dec_fb[VP8_MAX_FRM_BUF_NODE_NUM];
	164	struct list_head available_fb_node_list;
	165	struct list_head fb_use_list;
	166	struct list_head fb_free_list;
	167	struct list_head fb_disp_list;
	168	struct mtk_vcodec_mem working_buf;
	169	struct vdec_vp8_hw_reg_base reg_base;
	170	unsigned int frm_cnt;
	171	struct mtk_vcodec_ctx *ctx;
	172	struct vdec_vpu_inst vpu;
	173	struct vdec_vp8_vsi *vsi;
	174	};
	175
	176	static void get_hw_reg_base(struct vdec_vp8_inst *inst)
	177	{
	178	inst->reg_base.top = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_TOP);
	179	inst->reg_base.cm = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_CM);
	180	inst->reg_base.hwd = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_HWD);
	181	inst->reg_base.sys = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_SYS);
	182	inst->reg_base.misc = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_MISC);
	183	inst->reg_base.ld = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_LD);
	184	inst->reg_base.hwb = mtk_vcodec_get_reg_addr(inst->ctx, VDEC_HWB);
	185	}
	186
	187	static void write_hw_segmentation_data(struct vdec_vp8_inst *inst)
	188	{
	189	int i, j;
	190	u32 seg_id_addr;
	191	u32 val;
	192	void __iomem *cm = inst->reg_base.cm;
	193	struct vdec_vp8_vsi *vsi = inst->vsi;
	194
	195	seg_id_addr = readl(inst->reg_base.top + VP8_SEGID_DRAM_ADDR) >> 4;
	196
	197	for (i = 0; i < ARRAY_SIZE(vsi->segment_buf); i++) {
	198	for (j = ARRAY_SIZE(vsi->segment_buf[i]) - 1; j >= 0; j--) {
	199	val = (1 << 16) + ((seg_id_addr + i) << 2) + j;
	200	writel(val, cm + VP8_HW_VLD_ADDR);
	201
	202	val = vsi->segment_buf[i][j];
	203	writel(val, cm + VP8_HW_VLD_VALUE);
	204	}
	205	}
	206	}
	207
	208	static void read_hw_segmentation_data(struct vdec_vp8_inst *inst)
	209	{
	210	int i, j;
	211	u32 seg_id_addr;
	212	u32 val;
	213	void __iomem *cm = inst->reg_base.cm;
	214	struct vdec_vp8_vsi *vsi = inst->vsi;
	215
	216	seg_id_addr = readl(inst->reg_base.top + VP8_SEGID_DRAM_ADDR) >> 4;
	217
	218	for (i = 0; i < ARRAY_SIZE(vsi->segment_buf); i++) {
	219	for (j = ARRAY_SIZE(vsi->segment_buf[i]) - 1; j >= 0; j--) {
	220	val = ((seg_id_addr + i) << 2) + j;
	221	writel(val, cm + VP8_HW_VLD_ADDR);
222
223	val = readl(cm + VP8_HW_VLD_VALUE);
224	vsi->segment_buf[i][j] = val;
225	}
226	}
227	}
228
229	/* reset HW and enable HW read/write data function */
230	static void enable_hw_rw_function(struct vdec_vp8_inst *inst)
231	{
232	u32 val = 0;
233	void __iomem *sys = inst->reg_base.sys;
234	void __iomem *misc = inst->reg_base.misc;
235	void __iomem *ld = inst->reg_base.ld;
236	void __iomem *hwb = inst->reg_base.hwb;
237	void __iomem *hwd = inst->reg_base.hwd;
238
239	writel(0x1, sys + VP8_RW_CKEN_SET);
240	writel(0x101, ld + VP8_WO_VLD_SRST);
241	writel(0x101, hwb + VP8_WO_VLD_SRST);
242
243	writel(1, sys);
244	val = readl(misc + VP8_RW_MISC_SRST);
245	writel((val & 0xFFFFFFFE), misc + VP8_RW_MISC_SRST);
246
247	writel(0x1, misc + VP8_RW_MISC_SYS_SEL);
248	writel(0x17F, misc + VP8_RW_MISC_SPEC_CON);
249	writel(0x71201100, misc + VP8_RW_MISC_FUNC_CON);
250	writel(0x0, ld + VP8_WO_VLD_SRST);
251	writel(0x0, hwb + VP8_WO_VLD_SRST);
252	writel(0x1, sys + VP8_RW_DCM_CON);
253	writel(0x1, misc + VP8_RW_MISC_DCM_CON);
254	writel(0x1, hwd + VP8_RW_VP8_CTRL);
255	}
256
257	static void store_dec_table(struct vdec_vp8_inst *inst)
258	{
259	int i, j;
260	u32 addr = 0, val = 0;
261	void __iomem *hwd = inst->reg_base.hwd;
262	u32 *p = &inst->vsi->dec_table[VP8_DEC_TABLE_OFFSET];
263
264	for (i = 0; i < VP8_DEC_TABLE_PROC_LOOP; i++) {
265	writel(addr, hwd + VP8_BSASET);
266	for (j = 0; j < VP8_DEC_TABLE_UNIT ; j++) {
267	val = *p++;
268	writel(val, hwd + VP8_BSDSET);
269	}
270	addr += VP8_DEC_TABLE_RW_UNIT;
271	}
272	}
273
274	static void load_dec_table(struct vdec_vp8_inst *inst)
275	{
276	int i;
277	u32 addr = 0;
278	u32 *p = &inst->vsi->dec_table[VP8_DEC_TABLE_OFFSET];
279	void __iomem *hwd = inst->reg_base.hwd;
280
281	for (i = 0; i < VP8_DEC_TABLE_PROC_LOOP; i++) {
282	writel(addr, hwd + VP8_BSASET);
283	/* read total 11 bytes */
284	*p++ = readl(hwd + VP8_BSDSET);
285	*p++ = readl(hwd + VP8_BSDSET);
286	*p++ = readl(hwd + VP8_BSDSET) & 0xFFFFFF;
287	addr += VP8_DEC_TABLE_RW_UNIT;
288	}
289	}
290
291	static void get_pic_info(struct vdec_vp8_inst inst, struct vdec_pic_info pic)
292	{
293	*pic = inst->vsi->pic;
294
295	mtk_vcodec_debug(inst, "pic(%d, %d), buf(%d, %d)",
296	pic->pic_w, pic->pic_h, pic->buf_w, pic->buf_h);
297	mtk_vcodec_debug(inst, "Y(%d, %d), C(%d, %d)", pic->y_bs_sz,
298	pic->y_len_sz, pic->c_bs_sz, pic->c_len_sz);
299	}
300
301	static void vp8_dec_finish(struct vdec_vp8_inst *inst)
302	{
303	struct vdec_fb_node *node;
304	uint64_t prev_y_dma = inst->vsi->dec.prev_y_dma;
305
306	mtk_vcodec_debug(inst, "prev fb base dma=%llx", prev_y_dma);
307
308	/* put last decode ok frame to fb_free_list */
309	if (prev_y_dma != 0) {
310	list_for_each_entry(node, &inst->fb_use_list, list) {
311	struct vdec_fb fb = (struct vdec_fb )node->fb;
312
313	if (prev_y_dma == (uint64_t)fb->base_y.dma_addr) {
314	list_move_tail(&node->list,
315	&inst->fb_free_list);
316	break;
317	}
318	}
319	}
320
321	/* available_fb_node_list -> fb_use_list */
322	node = list_first_entry(&inst->available_fb_node_list,
323	struct vdec_fb_node, list);
324	node->fb = inst->cur_fb;
325	list_move_tail(&node->list, &inst->fb_use_list);
326
327	/* available_fb_node_list -> fb_disp_list */
328	if (inst->vsi->dec.show_frame) {
329	node = list_first_entry(&inst->available_fb_node_list,
330	struct vdec_fb_node, list);
331	node->fb = inst->cur_fb;
332	list_move_tail(&node->list, &inst->fb_disp_list);
333	}
334	}
335
336	static void move_fb_list_use_to_free(struct vdec_vp8_inst *inst)
337	{
338	struct vdec_fb_node node, tmp;
339
340	list_for_each_entry_safe(node, tmp, &inst->fb_use_list, list)
341	list_move_tail(&node->list, &inst->fb_free_list);
342	}
343
344	static void init_list(struct vdec_vp8_inst *inst)
345	{
346	int i;
347
348	INIT_LIST_HEAD(&inst->available_fb_node_list);
349	INIT_LIST_HEAD(&inst->fb_use_list);
350	INIT_LIST_HEAD(&inst->fb_free_list);
351	INIT_LIST_HEAD(&inst->fb_disp_list);
352
353	for (i = 0; i < ARRAY_SIZE(inst->dec_fb); i++) {
354	INIT_LIST_HEAD(&inst->dec_fb[i].list);
355	inst->dec_fb[i].fb = NULL;
356	list_add_tail(&inst->dec_fb[i].list,
357	&inst->available_fb_node_list);
358	}
359	}
360
361	static void add_fb_to_free_list(struct vdec_vp8_inst inst, void fb)
362	{
363	struct vdec_fb_node *node;
364
365	if (fb) {
366	node = list_first_entry(&inst->available_fb_node_list,
367	struct vdec_fb_node, list);
368	node->fb = fb;
369	list_move_tail(&node->list, &inst->fb_free_list);
370	}
371	}
372
373	static int alloc_working_buf(struct vdec_vp8_inst *inst)
374	{
375	int err;
376	struct mtk_vcodec_mem *mem = &inst->working_buf;
377
378	mem->size = VP8_WORKING_BUF_SZ;
379	err = mtk_vcodec_mem_alloc(inst->ctx, mem);
380	if (err) {
381	mtk_vcodec_err(inst, "Cannot allocate working buffer");
382	return err;
383	}
384
385	inst->vsi->dec.working_buf_dma = (uint64_t)mem->dma_addr;
386	return 0;
387	}
388
389	static void free_working_buf(struct vdec_vp8_inst *inst)
390	{
391	struct mtk_vcodec_mem *mem = &inst->working_buf;
392
393	if (mem->va)
394	mtk_vcodec_mem_free(inst->ctx, mem);
395
396	inst->vsi->dec.working_buf_dma = 0;
397	}
398
399	static int vdec_vp8_init(struct mtk_vcodec_ctx ctx, unsigned long h_vdec)
400	{
401	struct vdec_vp8_inst *inst;
402	int err;
403
404	inst = kzalloc(sizeof(*inst), GFP_KERNEL);
405	if (!inst)
406	return -ENOMEM;
407
408	inst->ctx = ctx;
409
410	inst->vpu.id = IPI_VDEC_VP8;
411	inst->vpu.dev = ctx->dev->vpu_plat_dev;
412	inst->vpu.ctx = ctx;
413	inst->vpu.handler = vpu_dec_ipi_handler;
414
415	err = vpu_dec_init(&inst->vpu);
416	if (err) {
417	mtk_vcodec_err(inst, "vdec_vp8 init err=%d", err);
418	goto error_free_inst;
419	}
420
421	inst->vsi = (struct vdec_vp8_vsi *)inst->vpu.vsi;
422	init_list(inst);
423	err = alloc_working_buf(inst);
424	if (err)
425	goto error_deinit;
426
427	get_hw_reg_base(inst);
428	mtk_vcodec_debug(inst, "VP8 Instance >> %p", inst);
429
430	*h_vdec = (unsigned long)inst;
431	return 0;
432
433	error_deinit:
434	vpu_dec_deinit(&inst->vpu);
435	error_free_inst:
436	kfree(inst);
437	return err;
438	}
439
440	static int vdec_vp8_decode(unsigned long h_vdec, struct mtk_vcodec_mem *bs,
441	struct vdec_fb fb, bool res_chg)
442	{
443	struct vdec_vp8_inst inst = (struct vdec_vp8_inst )h_vdec;
444	struct vdec_vp8_dec_info *dec = &inst->vsi->dec;
445	struct vdec_vpu_inst *vpu = &inst->vpu;
446	unsigned char *bs_va;
447	unsigned int data;
448	int err = 0;
449	uint64_t y_fb_dma;
450	uint64_t c_fb_dma;
451
452	/* bs NULL means flush decoder */
453	if (bs == NULL) {
454	move_fb_list_use_to_free(inst);
455	return vpu_dec_reset(vpu);
456	}
457
458	y_fb_dma = fb ? (u64)fb->base_y.dma_addr : 0;
459	c_fb_dma = fb ? (u64)fb->base_c.dma_addr : 0;
460
461	mtk_vcodec_debug(inst, "+ [%d] FB y_dma=%llx c_dma=%llx fb=%p",
462	inst->frm_cnt, y_fb_dma, c_fb_dma, fb);
463
464	inst->cur_fb = fb;
465	dec->bs_dma = (unsigned long)bs->dma_addr;
466	dec->bs_sz = bs->size;
467	dec->cur_y_fb_dma = y_fb_dma;
468	dec->cur_c_fb_dma = c_fb_dma;
469
470	mtk_vcodec_debug(inst, "\n + FRAME[%d] +\n", inst->frm_cnt);
471
472	write_hw_segmentation_data(inst);
473	enable_hw_rw_function(inst);
474	store_dec_table(inst);
475
476	bs_va = (unsigned char *)bs->va;
477
478	/* retrieve width/hight and scale info from header */
479	data = ((bs_va + 9) << 24) \| ((bs_va + 8) << 16) \|
480	((bs_va + 7) << 8) \| (bs_va + 6);
481	err = vpu_dec_start(vpu, &data, 1);
482	if (err) {
483	add_fb_to_free_list(inst, fb);
484	if (dec->wait_key_frame) {
485	mtk_vcodec_debug(inst, "wait key frame !");
486	return 0;
487	}
488
489	goto error;
490	}
491
492	if (dec->resolution_changed) {
493	mtk_vcodec_debug(inst, "- resolution_changed -");
494	*res_chg = true;
495	add_fb_to_free_list(inst, fb);
496	return 0;
497	}
498
499	/* wait decoder done interrupt */
500	mtk_vcodec_wait_for_done_ctx(inst->ctx, MTK_INST_IRQ_RECEIVED,
501	WAIT_INTR_TIMEOUT_MS);
502
503	if (inst->vsi->load_data)
504	load_dec_table(inst);
505
506	vp8_dec_finish(inst);
507	read_hw_segmentation_data(inst);
508
509	err = vpu_dec_end(vpu);
510	if (err)
511	goto error;
512
513	mtk_vcodec_debug(inst, "\n - FRAME[%d] - show=%d\n", inst->frm_cnt,
514	dec->show_frame);
515	inst->frm_cnt++;
516	*res_chg = false;
517	return 0;
518
519	error:
520	mtk_vcodec_err(inst, "\n - FRAME[%d] - err=%d\n", inst->frm_cnt, err);
521	return err;
522	}
523
524	static void get_disp_fb(struct vdec_vp8_inst inst, struct vdec_fb *out_fb)
525	{
526	struct vdec_fb_node *node;
527	struct vdec_fb *fb;
528
529	node = list_first_entry_or_null(&inst->fb_disp_list,
530	struct vdec_fb_node, list);
531	if (node) {
532	list_move_tail(&node->list, &inst->available_fb_node_list);
533	fb = (struct vdec_fb *)node->fb;
534	fb->status \|= FB_ST_DISPLAY;
535	mtk_vcodec_debug(inst, "[FB] get disp fb %p st=%d",
536	node->fb, fb->status);
537	} else {
538	fb = NULL;
539	mtk_vcodec_debug(inst, "[FB] there is no disp fb");
540	}
541
542	*out_fb = fb;
543	}
544
545	static void get_free_fb(struct vdec_vp8_inst inst, struct vdec_fb *out_fb)
546	{
547	struct vdec_fb_node *node;
548	struct vdec_fb *fb;
549
550	node = list_first_entry_or_null(&inst->fb_free_list,
551	struct vdec_fb_node, list);
552	if (node) {
553	list_move_tail(&node->list, &inst->available_fb_node_list);
554	fb = (struct vdec_fb *)node->fb;
555	fb->status \|= FB_ST_FREE;
556	mtk_vcodec_debug(inst, "[FB] get free fb %p st=%d",
557	node->fb, fb->status);
558	} else {
559	fb = NULL;
560	mtk_vcodec_debug(inst, "[FB] there is no free fb");
561	}
562
563	*out_fb = fb;
564	}
565
566	static void get_crop_info(struct vdec_vp8_inst inst, struct v4l2_rect cr)
567	{
568	cr->left = 0;
569	cr->top = 0;
570	cr->width = inst->vsi->pic.pic_w;
571	cr->height = inst->vsi->pic.pic_h;
572	mtk_vcodec_debug(inst, "get crop info l=%d, t=%d, w=%d, h=%d",
573	cr->left, cr->top, cr->width, cr->height);
574	}
575
576	static int vdec_vp8_get_param(unsigned long h_vdec,
577	enum vdec_get_param_type type, void *out)
578	{
579	struct vdec_vp8_inst inst = (struct vdec_vp8_inst )h_vdec;
580
581	switch (type) {
582	case GET_PARAM_DISP_FRAME_BUFFER:
583	get_disp_fb(inst, out);
584	break;
585
586	case GET_PARAM_FREE_FRAME_BUFFER:
587	get_free_fb(inst, out);
588	break;
589
590	case GET_PARAM_PIC_INFO:
591	get_pic_info(inst, out);
592	break;
593
594	case GET_PARAM_CROP_INFO:
595	get_crop_info(inst, out);
596	break;
597
598	case GET_PARAM_DPB_SIZE:
599	((unsigned int )out) = VP8_DPB_SIZE;
600	break;
601
602	default:
603	mtk_vcodec_err(inst, "invalid get parameter type=%d", type);
604	return -EINVAL;
605	}
606
607	return 0;
608	}
609
610	static void vdec_vp8_deinit(unsigned long h_vdec)
611	{
612	struct vdec_vp8_inst inst = (struct vdec_vp8_inst )h_vdec;
613
614	mtk_vcodec_debug_enter(inst);
615
616	vpu_dec_deinit(&inst->vpu);
617	free_working_buf(inst);
618	kfree(inst);
619	}
620
621	static struct vdec_common_if vdec_vp8_if = {
243dd05d KC	622	.init = vdec_vp8_init,
	623	.decode = vdec_vp8_decode,
	624	.get_param = vdec_vp8_get_param,
	625	.deinit = vdec_vp8_deinit,
d1fad85f TL	626	};
	627
	628	struct vdec_common_if *get_vp8_dec_comm_if(void);
	629
	630	struct vdec_common_if *get_vp8_dec_comm_if(void)
	631	{
	632	return &vdec_vp8_if;
	633	}