[mirror_ubuntu-artful-kernel.git] / drivers / media / platform / mtk-vcodec / venc / venc_vp8_if.c

/*
 * Copyright (c) 2016 MediaTek Inc.
 * Author: Daniel Hsiao <daniel.hsiao@mediatek.com>
 *         PoChun Lin <pochun.lin@mediatek.com>
 *
 * This program is free software; you can redistribute it and/or
 * modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/interrupt.h>
#include <linux/kernel.h>
#include <linux/slab.h>

#include "../mtk_vcodec_drv.h"
#include "../mtk_vcodec_util.h"
#include "../mtk_vcodec_intr.h"
#include "../mtk_vcodec_enc.h"
#include "../mtk_vcodec_enc_pm.h"
#include "../venc_drv_base.h"
#include "../venc_ipi_msg.h"
#include "../venc_vpu_if.h"
#include "mtk_vpu.h"

#define VENC_BITSTREAM_FRAME_SIZE 0x0098
#define VENC_BITSTREAM_HEADER_LEN 0x00e8

/* This ac_tag is vp8 frame tag. */
#define MAX_AC_TAG_SIZE 10

/**
 * enum venc_vp8_vpu_work_buf - vp8 encoder buffer index
 */
enum venc_vp8_vpu_work_buf {
	VENC_VP8_VPU_WORK_BUF_LUMA,
	VENC_VP8_VPU_WORK_BUF_LUMA2,
	VENC_VP8_VPU_WORK_BUF_LUMA3,
	VENC_VP8_VPU_WORK_BUF_CHROMA,
	VENC_VP8_VPU_WORK_BUF_CHROMA2,
	VENC_VP8_VPU_WORK_BUF_CHROMA3,
	VENC_VP8_VPU_WORK_BUF_MV_INFO,
	VENC_VP8_VPU_WORK_BUF_BS_HEADER,
	VENC_VP8_VPU_WORK_BUF_PROB_BUF,
	VENC_VP8_VPU_WORK_BUF_RC_INFO,
	VENC_VP8_VPU_WORK_BUF_RC_CODE,
	VENC_VP8_VPU_WORK_BUF_RC_CODE2,
	VENC_VP8_VPU_WORK_BUF_RC_CODE3,
	VENC_VP8_VPU_WORK_BUF_MAX,
};

/*
 * struct venc_vp8_vpu_config - Structure for vp8 encoder configuration
 * @input_fourcc: input fourcc
 * @bitrate: target bitrate (in bps)
 * @pic_w: picture width. Picture size is visible stream resolution, in pixels,
 *         to be used for display purposes; must be smaller or equal to buffer
 *         size.
 * @pic_h: picture height
 * @buf_w: buffer width (with 16 alignment). Buffer size is stream resolution
 *         in pixels aligned to hardware requirements.
 * @buf_h: buffer height (with 16 alignment)
 * @gop_size: group of picture size (key frame)
 * @framerate: frame rate in fps
 * @ts_mode: temporal scalability mode (0: disable, 1: enable)
 *	     support three temporal layers - 0: 7.5fps 1: 7.5fps 2: 15fps.
 */
struct venc_vp8_vpu_config {
	u32 input_fourcc;
	u32 bitrate;
	u32 pic_w;
	u32 pic_h;
	u32 buf_w;
	u32 buf_h;
	u32 gop_size;
	u32 framerate;
	u32 ts_mode;
};

/*
 * struct venc_vp8_vpu_buf -Structure for buffer information
 * @align: buffer alignment (in bytes)
 * @iova: IO virtual address
 * @vpua: VPU side memory addr which is used by RC_CODE
 * @size: buffer size (in bytes)
 */
struct venc_vp8_vpu_buf {
	u32 align;
	u32 iova;
	u32 vpua;
	u32 size;
};

/*
 * struct venc_vp8_vsi - Structure for VPU driver control and info share
 * This structure is allocated in VPU side and shared to AP side.
 * @config: vp8 encoder configuration
 * @work_bufs: working buffer information in VPU side
 * The work_bufs here is for storing the 'size' info shared to AP side.
 * The similar item in struct venc_vp8_inst is for memory allocation
 * in AP side. The AP driver will copy the 'size' from here to the one in
 * struct mtk_vcodec_mem, then invoke mtk_vcodec_mem_alloc to allocate
 * the buffer. After that, bypass the 'dma_addr' to the 'iova' field here for
 * register setting in VPU side.
 */
struct venc_vp8_vsi {
	struct venc_vp8_vpu_config config;
	struct venc_vp8_vpu_buf work_bufs[VENC_VP8_VPU_WORK_BUF_MAX];
};

/*
 * struct venc_vp8_inst - vp8 encoder AP driver instance
 * @hw_base: vp8 encoder hardware register base
 * @work_bufs: working buffer
 * @work_buf_allocated: working buffer allocated flag
 * @frm_cnt: encoded frame count, it's used for I-frame judgement and
 *	     reset when force intra cmd received.
 * @ts_mode: temporal scalability mode (0: disable, 1: enable)
 *	     support three temporal layers - 0: 7.5fps 1: 7.5fps 2: 15fps.
 * @vpu_inst: VPU instance to exchange information between AP and VPU
 * @vsi: driver structure allocated by VPU side and shared to AP side for
 *	 control and info share
 * @ctx: context for v4l2 layer integration
 */
struct venc_vp8_inst {
	void __iomem *hw_base;
	struct mtk_vcodec_mem work_bufs[VENC_VP8_VPU_WORK_BUF_MAX];
	bool work_buf_allocated;
	unsigned int frm_cnt;
	unsigned int ts_mode;
	struct venc_vpu_inst vpu_inst;
	struct venc_vp8_vsi *vsi;
	struct mtk_vcodec_ctx *ctx;
};

static inline void vp8_enc_write_reg(struct venc_vp8_inst *inst, u32 addr,
				     u32 val)
{
	writel(val, inst->hw_base + addr);
}

static inline u32 vp8_enc_read_reg(struct venc_vp8_inst *inst, u32 addr)
{
	return readl(inst->hw_base + addr);
}

static void vp8_enc_free_work_buf(struct venc_vp8_inst *inst)
{
	int i;

	mtk_vcodec_debug_enter(inst);

	/* Buffers need to be freed by AP. */
	for (i = 0; i < VENC_VP8_VPU_WORK_BUF_MAX; i++) {
		if ((inst->work_bufs[i].size == 0))
			continue;
		mtk_vcodec_mem_free(inst->ctx, &inst->work_bufs[i]);
	}

	mtk_vcodec_debug_leave(inst);
}

static int vp8_enc_alloc_work_buf(struct venc_vp8_inst *inst)
{
	int i;
	int ret = 0;
	struct venc_vp8_vpu_buf *wb = inst->vsi->work_bufs;

	mtk_vcodec_debug_enter(inst);

	for (i = 0; i < VENC_VP8_VPU_WORK_BUF_MAX; i++) {
		if ((wb[i].size == 0))
			continue;
		/*
		 * This 'wb' structure is set by VPU side and shared to AP for
		 * buffer allocation and IO virtual addr mapping. For most of
		 * the buffers, AP will allocate the buffer according to 'size'
		 * field and store the IO virtual addr in 'iova' field. For the
		 * RC_CODEx buffers, they are pre-allocated in the VPU side
		 * because they are inside VPU SRAM, and save the VPU addr in
		 * the 'vpua' field. The AP will translate the VPU addr to the
		 * corresponding IO virtual addr and store in 'iova' field.
		 */
		inst->work_bufs[i].size = wb[i].size;
		ret = mtk_vcodec_mem_alloc(inst->ctx, &inst->work_bufs[i]);
		if (ret) {
			mtk_vcodec_err(inst,
				       "cannot alloc work_bufs[%d]", i);
			goto err_alloc;
		}
		/*
		 * This RC_CODEx is pre-allocated by VPU and saved in VPU addr.
		 * So we need use memcpy to copy RC_CODEx from VPU addr into IO
		 * virtual addr in 'iova' field for reg setting in VPU side.
		 */
		if (i == VENC_VP8_VPU_WORK_BUF_RC_CODE ||
		    i == VENC_VP8_VPU_WORK_BUF_RC_CODE2 ||
		    i == VENC_VP8_VPU_WORK_BUF_RC_CODE3) {
			void *tmp_va;

			tmp_va = vpu_mapping_dm_addr(inst->vpu_inst.dev,
						     wb[i].vpua);
			memcpy(inst->work_bufs[i].va, tmp_va, wb[i].size);
		}
		wb[i].iova = inst->work_bufs[i].dma_addr;

		mtk_vcodec_debug(inst,
				 "work_bufs[%d] va=0x%p,iova=0x%p,size=%zu",
				 i, inst->work_bufs[i].va,
				 (void *)inst->work_bufs[i].dma_addr,
				 inst->work_bufs[i].size);
	}

	mtk_vcodec_debug_leave(inst);

	return ret;

err_alloc:
	vp8_enc_free_work_buf(inst);

	return ret;
}

static unsigned int vp8_enc_wait_venc_done(struct venc_vp8_inst *inst)
{
	unsigned int irq_status = 0;
	struct mtk_vcodec_ctx *ctx = (struct mtk_vcodec_ctx *)inst->ctx;

	if (!mtk_vcodec_wait_for_done_ctx(ctx, MTK_INST_IRQ_RECEIVED,
					  WAIT_INTR_TIMEOUT_MS)) {
		irq_status = ctx->irq_status;
		mtk_vcodec_debug(inst, "isr return %x", irq_status);
	}
	return irq_status;
}

/*
 * Compose ac_tag, bitstream header and bitstream payload into
 * one bitstream buffer.
 */
static int vp8_enc_compose_one_frame(struct venc_vp8_inst *inst,
				     struct mtk_vcodec_mem *bs_buf,
				     unsigned int *bs_size)
{
	unsigned int not_key;
	u32 bs_frm_size;
	u32 bs_hdr_len;
	unsigned int ac_tag_size;
	u8 ac_tag[MAX_AC_TAG_SIZE];

	bs_frm_size = vp8_enc_read_reg(inst, VENC_BITSTREAM_FRAME_SIZE);
	bs_hdr_len = vp8_enc_read_reg(inst, VENC_BITSTREAM_HEADER_LEN);

	/* if a frame is key frame, not_key is 0 */
	not_key = !inst->vpu_inst.is_key_frm;
	*(u32 *)ac_tag = __cpu_to_le32((bs_hdr_len << 5) | 0x10 | not_key);
	/* key frame */
	if (not_key == 0) {
		ac_tag_size = MAX_AC_TAG_SIZE;
		ac_tag[3] = 0x9d;
		ac_tag[4] = 0x01;
		ac_tag[5] = 0x2a;
		ac_tag[6] = inst->vsi->config.pic_w;
		ac_tag[7] = inst->vsi->config.pic_w >> 8;
		ac_tag[8] = inst->vsi->config.pic_h;
		ac_tag[9] = inst->vsi->config.pic_h >> 8;
	} else {
		ac_tag_size = 3;
	}

	if (bs_buf->size < bs_hdr_len + bs_frm_size + ac_tag_size) {
		mtk_vcodec_err(inst, "bitstream buf size is too small(%zu)",
			       bs_buf->size);
		return -EINVAL;
	}

	/*
	* (1) The vp8 bitstream header and body are generated by the HW vp8
	* encoder separately at the same time. We cannot know the bitstream
	* header length in advance.
	* (2) From the vp8 spec, there is no stuffing byte allowed between the
	* ac tag, bitstream header and bitstream body.
	*/
	memmove(bs_buf->va + bs_hdr_len + ac_tag_size,
		bs_buf->va, bs_frm_size);
	memcpy(bs_buf->va + ac_tag_size,
	       inst->work_bufs[VENC_VP8_VPU_WORK_BUF_BS_HEADER].va,
	       bs_hdr_len);
	memcpy(bs_buf->va, ac_tag, ac_tag_size);
	*bs_size = bs_frm_size + bs_hdr_len + ac_tag_size;

	return 0;
}

static int vp8_enc_encode_frame(struct venc_vp8_inst *inst,
				struct venc_frm_buf *frm_buf,
				struct mtk_vcodec_mem *bs_buf,
				unsigned int *bs_size)
{
	int ret = 0;
	unsigned int irq_status;

	mtk_vcodec_debug(inst, "->frm_cnt=%d", inst->frm_cnt);

	ret = vpu_enc_encode(&inst->vpu_inst, 0, frm_buf, bs_buf, bs_size);
	if (ret)
		return ret;

	irq_status = vp8_enc_wait_venc_done(inst);
	if (irq_status != MTK_VENC_IRQ_STATUS_FRM) {
		mtk_vcodec_err(inst, "irq_status=%d failed", irq_status);
		return -EIO;
	}

	if (vp8_enc_compose_one_frame(inst, bs_buf, bs_size)) {
		mtk_vcodec_err(inst, "vp8_enc_compose_one_frame failed");
		return -EINVAL;
	}

	inst->frm_cnt++;
	mtk_vcodec_debug(inst, "<-size=%d key_frm=%d", *bs_size,
			 inst->vpu_inst.is_key_frm);

	return ret;
}

static int vp8_enc_init(struct mtk_vcodec_ctx *ctx, unsigned long *handle)
{
	int ret = 0;
	struct venc_vp8_inst *inst;

	inst = kzalloc(sizeof(*inst), GFP_KERNEL);
	if (!inst)
		return -ENOMEM;

	inst->ctx = ctx;
	inst->vpu_inst.ctx = ctx;
	inst->vpu_inst.dev = ctx->dev->vpu_plat_dev;
	inst->vpu_inst.id = IPI_VENC_VP8;
	inst->hw_base = mtk_vcodec_get_reg_addr(inst->ctx, VENC_LT_SYS);

	mtk_vcodec_debug_enter(inst);

	ret = vpu_enc_init(&inst->vpu_inst);

	inst->vsi = (struct venc_vp8_vsi *)inst->vpu_inst.vsi;

	mtk_vcodec_debug_leave(inst);

	if (ret)
		kfree(inst);
	else
		(*handle) = (unsigned long)inst;

	return ret;
}

static int vp8_enc_encode(unsigned long handle,
			  enum venc_start_opt opt,
			  struct venc_frm_buf *frm_buf,
			  struct mtk_vcodec_mem *bs_buf,
			  struct venc_done_result *result)
{
	int ret = 0;
	struct venc_vp8_inst *inst = (struct venc_vp8_inst *)handle;
	struct mtk_vcodec_ctx *ctx = inst->ctx;

	mtk_vcodec_debug_enter(inst);

	enable_irq(ctx->dev->enc_lt_irq);

	switch (opt) {
	case VENC_START_OPT_ENCODE_FRAME:
		ret = vp8_enc_encode_frame(inst, frm_buf, bs_buf,
					   &result->bs_size);
		if (ret)
			goto encode_err;
		result->is_key_frm = inst->vpu_inst.is_key_frm;
		break;

	default:
		mtk_vcodec_err(inst, "opt not support:%d", opt);
		ret = -EINVAL;
		break;
	}

encode_err:

	disable_irq(ctx->dev->enc_lt_irq);
	mtk_vcodec_debug_leave(inst);

	return ret;
}

static int vp8_enc_set_param(unsigned long handle,
			     enum venc_set_param_type type,
			     struct venc_enc_param *enc_prm)
{
	int ret = 0;
	struct venc_vp8_inst *inst = (struct venc_vp8_inst *)handle;

	mtk_vcodec_debug(inst, "->type=%d", type);

	switch (type) {
	case VENC_SET_PARAM_ENC:
		inst->vsi->config.input_fourcc = enc_prm->input_yuv_fmt;
		inst->vsi->config.bitrate = enc_prm->bitrate;
		inst->vsi->config.pic_w = enc_prm->width;
		inst->vsi->config.pic_h = enc_prm->height;
		inst->vsi->config.buf_w = enc_prm->buf_width;
		inst->vsi->config.buf_h = enc_prm->buf_height;
		inst->vsi->config.gop_size = enc_prm->gop_size;
		inst->vsi->config.framerate = enc_prm->frm_rate;
		inst->vsi->config.ts_mode = inst->ts_mode;
		ret = vpu_enc_set_param(&inst->vpu_inst, type, enc_prm);
		if (ret)
			break;
		if (inst->work_buf_allocated) {
			vp8_enc_free_work_buf(inst);
			inst->work_buf_allocated = false;
		}
		ret = vp8_enc_alloc_work_buf(inst);
		if (ret)
			break;
		inst->work_buf_allocated = true;
		break;

	/*
	 * VENC_SET_PARAM_TS_MODE must be called before VENC_SET_PARAM_ENC
	 */
	case VENC_SET_PARAM_TS_MODE:
		inst->ts_mode = 1;
		mtk_vcodec_debug(inst, "set ts_mode");
		break;

	default:
		ret = vpu_enc_set_param(&inst->vpu_inst, type, enc_prm);
		break;
	}

	mtk_vcodec_debug_leave(inst);

	return ret;
}

static int vp8_enc_deinit(unsigned long handle)
{
	int ret = 0;
	struct venc_vp8_inst *inst = (struct venc_vp8_inst *)handle;

	mtk_vcodec_debug_enter(inst);

	ret = vpu_enc_deinit(&inst->vpu_inst);

	if (inst->work_buf_allocated)
		vp8_enc_free_work_buf(inst);

	mtk_vcodec_debug_leave(inst);
	kfree(inst);

	return ret;
}

static struct venc_common_if venc_vp8_if = {
	vp8_enc_init,
	vp8_enc_encode,
	vp8_enc_set_param,
	vp8_enc_deinit,
};

struct venc_common_if *get_vp8_enc_comm_if(void);

struct venc_common_if *get_vp8_enc_comm_if(void)
{
	return &venc_vp8_if;
}
Commit	Line	Data
27a274db TL	1	/*
	2	* Copyright (c) 2016 MediaTek Inc.
	3	* Author: Daniel Hsiao <daniel.hsiao@mediatek.com>
	4	* PoChun Lin <pochun.lin@mediatek.com>
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*/
	16
	17	#include <linux/interrupt.h>
	18	#include <linux/kernel.h>
	19	#include <linux/slab.h>
	20
	21	#include "../mtk_vcodec_drv.h"
	22	#include "../mtk_vcodec_util.h"
	23	#include "../mtk_vcodec_intr.h"
	24	#include "../mtk_vcodec_enc.h"
	25	#include "../mtk_vcodec_enc_pm.h"
	26	#include "../venc_drv_base.h"
	27	#include "../venc_ipi_msg.h"
	28	#include "../venc_vpu_if.h"
	29	#include "mtk_vpu.h"
	30
	31	#define VENC_BITSTREAM_FRAME_SIZE 0x0098
	32	#define VENC_BITSTREAM_HEADER_LEN 0x00e8
	33
	34	/* This ac_tag is vp8 frame tag. */
	35	#define MAX_AC_TAG_SIZE 10
	36
	37	/**
	38	* enum venc_vp8_vpu_work_buf - vp8 encoder buffer index
	39	*/
	40	enum venc_vp8_vpu_work_buf {
	41	VENC_VP8_VPU_WORK_BUF_LUMA,
	42	VENC_VP8_VPU_WORK_BUF_LUMA2,
	43	VENC_VP8_VPU_WORK_BUF_LUMA3,
	44	VENC_VP8_VPU_WORK_BUF_CHROMA,
	45	VENC_VP8_VPU_WORK_BUF_CHROMA2,
	46	VENC_VP8_VPU_WORK_BUF_CHROMA3,
	47	VENC_VP8_VPU_WORK_BUF_MV_INFO,
	48	VENC_VP8_VPU_WORK_BUF_BS_HEADER,
	49	VENC_VP8_VPU_WORK_BUF_PROB_BUF,
	50	VENC_VP8_VPU_WORK_BUF_RC_INFO,
	51	VENC_VP8_VPU_WORK_BUF_RC_CODE,
	52	VENC_VP8_VPU_WORK_BUF_RC_CODE2,
	53	VENC_VP8_VPU_WORK_BUF_RC_CODE3,
	54	VENC_VP8_VPU_WORK_BUF_MAX,
	55	};
	56
	57	/*
	58	* struct venc_vp8_vpu_config - Structure for vp8 encoder configuration
	59	* @input_fourcc: input fourcc
	60	* @bitrate: target bitrate (in bps)
	61	* @pic_w: picture width. Picture size is visible stream resolution, in pixels,
	62	* to be used for display purposes; must be smaller or equal to buffer
	63	* size.
	64	* @pic_h: picture height
65	* @buf_w: buffer width (with 16 alignment). Buffer size is stream resolution
66	* in pixels aligned to hardware requirements.
67	* @buf_h: buffer height (with 16 alignment)
68	* @gop_size: group of picture size (key frame)
69	* @framerate: frame rate in fps
70	* @ts_mode: temporal scalability mode (0: disable, 1: enable)
71	* support three temporal layers - 0: 7.5fps 1: 7.5fps 2: 15fps.
72	*/
73	struct venc_vp8_vpu_config {
74	u32 input_fourcc;
75	u32 bitrate;
76	u32 pic_w;
77	u32 pic_h;
78	u32 buf_w;
79	u32 buf_h;
80	u32 gop_size;
81	u32 framerate;
82	u32 ts_mode;
83	};
84
85	/*
86	* struct venc_vp8_vpu_buf -Structure for buffer information
87	* @align: buffer alignment (in bytes)
88	* @iova: IO virtual address
89	* @vpua: VPU side memory addr which is used by RC_CODE
90	* @size: buffer size (in bytes)
91	*/
92	struct venc_vp8_vpu_buf {
93	u32 align;
94	u32 iova;
95	u32 vpua;
96	u32 size;
97	};
98
99	/*
100	* struct venc_vp8_vsi - Structure for VPU driver control and info share
101	* This structure is allocated in VPU side and shared to AP side.
102	* @config: vp8 encoder configuration
103	* @work_bufs: working buffer information in VPU side
104	* The work_bufs here is for storing the 'size' info shared to AP side.
105	* The similar item in struct venc_vp8_inst is for memory allocation
106	* in AP side. The AP driver will copy the 'size' from here to the one in
107	* struct mtk_vcodec_mem, then invoke mtk_vcodec_mem_alloc to allocate
108	* the buffer. After that, bypass the 'dma_addr' to the 'iova' field here for
109	* register setting in VPU side.
110	*/
111	struct venc_vp8_vsi {
112	struct venc_vp8_vpu_config config;
113	struct venc_vp8_vpu_buf work_bufs[VENC_VP8_VPU_WORK_BUF_MAX];
114	};
115
116	/*
117	* struct venc_vp8_inst - vp8 encoder AP driver instance
118	* @hw_base: vp8 encoder hardware register base
119	* @work_bufs: working buffer
120	* @work_buf_allocated: working buffer allocated flag
121	* @frm_cnt: encoded frame count, it's used for I-frame judgement and
122	* reset when force intra cmd received.
123	* @ts_mode: temporal scalability mode (0: disable, 1: enable)
124	* support three temporal layers - 0: 7.5fps 1: 7.5fps 2: 15fps.
125	* @vpu_inst: VPU instance to exchange information between AP and VPU
126	* @vsi: driver structure allocated by VPU side and shared to AP side for
127	* control and info share
128	* @ctx: context for v4l2 layer integration
129	*/
130	struct venc_vp8_inst {
131	void __iomem *hw_base;
132	struct mtk_vcodec_mem work_bufs[VENC_VP8_VPU_WORK_BUF_MAX];
133	bool work_buf_allocated;
134	unsigned int frm_cnt;
135	unsigned int ts_mode;
136	struct venc_vpu_inst vpu_inst;
137	struct venc_vp8_vsi *vsi;
138	struct mtk_vcodec_ctx *ctx;
139	};
140
141	static inline void vp8_enc_write_reg(struct venc_vp8_inst *inst, u32 addr,
142	u32 val)
143	{
144	writel(val, inst->hw_base + addr);
145	}
146
147	static inline u32 vp8_enc_read_reg(struct venc_vp8_inst *inst, u32 addr)
148	{
149	return readl(inst->hw_base + addr);
150	}
151
152	static void vp8_enc_free_work_buf(struct venc_vp8_inst *inst)
153	{
154	int i;
155
156	mtk_vcodec_debug_enter(inst);
157
158	/* Buffers need to be freed by AP. */
159	for (i = 0; i < VENC_VP8_VPU_WORK_BUF_MAX; i++) {
160	if ((inst->work_bufs[i].size == 0))
161	continue;
162	mtk_vcodec_mem_free(inst->ctx, &inst->work_bufs[i]);
163	}
164
165	mtk_vcodec_debug_leave(inst);
166	}
167
168	static int vp8_enc_alloc_work_buf(struct venc_vp8_inst *inst)
169	{
170	int i;
171	int ret = 0;
172	struct venc_vp8_vpu_buf *wb = inst->vsi->work_bufs;
173
174	mtk_vcodec_debug_enter(inst);
175
176	for (i = 0; i < VENC_VP8_VPU_WORK_BUF_MAX; i++) {
177	if ((wb[i].size == 0))
178	continue;
179	/*
180	* This 'wb' structure is set by VPU side and shared to AP for
181	* buffer allocation and IO virtual addr mapping. For most of
182	* the buffers, AP will allocate the buffer according to 'size'
183	* field and store the IO virtual addr in 'iova' field. For the
184	* RC_CODEx buffers, they are pre-allocated in the VPU side
185	* because they are inside VPU SRAM, and save the VPU addr in
186	* the 'vpua' field. The AP will translate the VPU addr to the
187	* corresponding IO virtual addr and store in 'iova' field.
188	*/
189	inst->work_bufs[i].size = wb[i].size;
190	ret = mtk_vcodec_mem_alloc(inst->ctx, &inst->work_bufs[i]);
191	if (ret) {
192	mtk_vcodec_err(inst,
193	"cannot alloc work_bufs[%d]", i);
194	goto err_alloc;
195	}
196	/*
197	* This RC_CODEx is pre-allocated by VPU and saved in VPU addr.
198	* So we need use memcpy to copy RC_CODEx from VPU addr into IO
199	* virtual addr in 'iova' field for reg setting in VPU side.
200	*/
201	if (i == VENC_VP8_VPU_WORK_BUF_RC_CODE \|\|
202	i == VENC_VP8_VPU_WORK_BUF_RC_CODE2 \|\|
203	i == VENC_VP8_VPU_WORK_BUF_RC_CODE3) {
204	void *tmp_va;
205
206	tmp_va = vpu_mapping_dm_addr(inst->vpu_inst.dev,
207	wb[i].vpua);
208	memcpy(inst->work_bufs[i].va, tmp_va, wb[i].size);
209	}
210	wb[i].iova = inst->work_bufs[i].dma_addr;
211
212	mtk_vcodec_debug(inst,
213	"work_bufs[%d] va=0x%p,iova=0x%p,size=%zu",
214	i, inst->work_bufs[i].va,
215	(void *)inst->work_bufs[i].dma_addr,
216	inst->work_bufs[i].size);
217	}
218
219	mtk_vcodec_debug_leave(inst);
220
221	return ret;
222
223	err_alloc:
224	vp8_enc_free_work_buf(inst);
225
226	return ret;
227	}
228
229	static unsigned int vp8_enc_wait_venc_done(struct venc_vp8_inst *inst)
230	{
231	unsigned int irq_status = 0;
232	struct mtk_vcodec_ctx ctx = (struct mtk_vcodec_ctx )inst->ctx;
233
234	if (!mtk_vcodec_wait_for_done_ctx(ctx, MTK_INST_IRQ_RECEIVED,
235	WAIT_INTR_TIMEOUT_MS)) {
236	irq_status = ctx->irq_status;
237	mtk_vcodec_debug(inst, "isr return %x", irq_status);
238	}
239	return irq_status;
240	}
241
242	/*
243	* Compose ac_tag, bitstream header and bitstream payload into
244	* one bitstream buffer.
245	*/
246	static int vp8_enc_compose_one_frame(struct venc_vp8_inst *inst,
247	struct mtk_vcodec_mem *bs_buf,
248	unsigned int *bs_size)
249	{
250	unsigned int not_key;
251	u32 bs_frm_size;
252	u32 bs_hdr_len;
253	unsigned int ac_tag_size;
254	u8 ac_tag[MAX_AC_TAG_SIZE];
255
256	bs_frm_size = vp8_enc_read_reg(inst, VENC_BITSTREAM_FRAME_SIZE);
257	bs_hdr_len = vp8_enc_read_reg(inst, VENC_BITSTREAM_HEADER_LEN);
258
259	/* if a frame is key frame, not_key is 0 */
260	not_key = !inst->vpu_inst.is_key_frm;
261	(u32 )ac_tag = __cpu_to_le32((bs_hdr_len << 5) \| 0x10 \| not_key);
262	/* key frame */
263	if (not_key == 0) {
264	ac_tag_size = MAX_AC_TAG_SIZE;
265	ac_tag[3] = 0x9d;
266	ac_tag[4] = 0x01;
267	ac_tag[5] = 0x2a;
268	ac_tag[6] = inst->vsi->config.pic_w;
269	ac_tag[7] = inst->vsi->config.pic_w >> 8;
270	ac_tag[8] = inst->vsi->config.pic_h;
271	ac_tag[9] = inst->vsi->config.pic_h >> 8;
272	} else {
273	ac_tag_size = 3;
274	}
275
276	if (bs_buf->size < bs_hdr_len + bs_frm_size + ac_tag_size) {
277	mtk_vcodec_err(inst, "bitstream buf size is too small(%zu)",
278	bs_buf->size);
279	return -EINVAL;
280	}
281
282	/*
283	* (1) The vp8 bitstream header and body are generated by the HW vp8
284	* encoder separately at the same time. We cannot know the bitstream
285	* header length in advance.
286	* (2) From the vp8 spec, there is no stuffing byte allowed between the
287	* ac tag, bitstream header and bitstream body.
288	*/
289	memmove(bs_buf->va + bs_hdr_len + ac_tag_size,
290	bs_buf->va, bs_frm_size);
291	memcpy(bs_buf->va + ac_tag_size,
292	inst->work_bufs[VENC_VP8_VPU_WORK_BUF_BS_HEADER].va,
293	bs_hdr_len);
294	memcpy(bs_buf->va, ac_tag, ac_tag_size);
295	*bs_size = bs_frm_size + bs_hdr_len + ac_tag_size;
296
297	return 0;
298	}
299
300	static int vp8_enc_encode_frame(struct venc_vp8_inst *inst,
301	struct venc_frm_buf *frm_buf,
302	struct mtk_vcodec_mem *bs_buf,
303	unsigned int *bs_size)
304	{
305	int ret = 0;
306	unsigned int irq_status;
307
308	mtk_vcodec_debug(inst, "->frm_cnt=%d", inst->frm_cnt);
309
310	ret = vpu_enc_encode(&inst->vpu_inst, 0, frm_buf, bs_buf, bs_size);
311	if (ret)
312	return ret;
313
314	irq_status = vp8_enc_wait_venc_done(inst);
315	if (irq_status != MTK_VENC_IRQ_STATUS_FRM) {
316	mtk_vcodec_err(inst, "irq_status=%d failed", irq_status);
317	return -EIO;
318	}
319
320	if (vp8_enc_compose_one_frame(inst, bs_buf, bs_size)) {
321	mtk_vcodec_err(inst, "vp8_enc_compose_one_frame failed");
322	return -EINVAL;
323	}
324
325	inst->frm_cnt++;
326	mtk_vcodec_debug(inst, "<-size=%d key_frm=%d", *bs_size,
327	inst->vpu_inst.is_key_frm);
328
329	return ret;
330	}
331
332	static int vp8_enc_init(struct mtk_vcodec_ctx ctx, unsigned long handle)
333	{
334	int ret = 0;
335	struct venc_vp8_inst *inst;
336
337	inst = kzalloc(sizeof(*inst), GFP_KERNEL);
338	if (!inst)
339	return -ENOMEM;
340
341	inst->ctx = ctx;
342	inst->vpu_inst.ctx = ctx;
343	inst->vpu_inst.dev = ctx->dev->vpu_plat_dev;
344	inst->vpu_inst.id = IPI_VENC_VP8;
345	inst->hw_base = mtk_vcodec_get_reg_addr(inst->ctx, VENC_LT_SYS);
346
347	mtk_vcodec_debug_enter(inst);
348
349	ret = vpu_enc_init(&inst->vpu_inst);
350
351	inst->vsi = (struct venc_vp8_vsi *)inst->vpu_inst.vsi;
352
353	mtk_vcodec_debug_leave(inst);
354
355	if (ret)
356	kfree(inst);
357	else
358	(*handle) = (unsigned long)inst;
359
360	return ret;
361	}
362
363	static int vp8_enc_encode(unsigned long handle,
364	enum venc_start_opt opt,
365	struct venc_frm_buf *frm_buf,
366	struct mtk_vcodec_mem *bs_buf,
367	struct venc_done_result *result)
368	{
369	int ret = 0;
370	struct venc_vp8_inst inst = (struct venc_vp8_inst )handle;
371	struct mtk_vcodec_ctx *ctx = inst->ctx;
372
373	mtk_vcodec_debug_enter(inst);
374
375	enable_irq(ctx->dev->enc_lt_irq);
376
377	switch (opt) {
378	case VENC_START_OPT_ENCODE_FRAME:
379	ret = vp8_enc_encode_frame(inst, frm_buf, bs_buf,
380	&result->bs_size);
381	if (ret)
382	goto encode_err;
383	result->is_key_frm = inst->vpu_inst.is_key_frm;
384	break;
385
386	default:
387	mtk_vcodec_err(inst, "opt not support:%d", opt);
388	ret = -EINVAL;
389	break;
390	}
391
392	encode_err:
393
394	disable_irq(ctx->dev->enc_lt_irq);
395	mtk_vcodec_debug_leave(inst);
396
397	return ret;
398	}
399
400	static int vp8_enc_set_param(unsigned long handle,
401	enum venc_set_param_type type,
402	struct venc_enc_param *enc_prm)
403	{
404	int ret = 0;
405	struct venc_vp8_inst inst = (struct venc_vp8_inst )handle;
406
407	mtk_vcodec_debug(inst, "->type=%d", type);
408
409	switch (type) {
410	case VENC_SET_PARAM_ENC:
411	inst->vsi->config.input_fourcc = enc_prm->input_yuv_fmt;
412	inst->vsi->config.bitrate = enc_prm->bitrate;
413	inst->vsi->config.pic_w = enc_prm->width;
414	inst->vsi->config.pic_h = enc_prm->height;
415	inst->vsi->config.buf_w = enc_prm->buf_width;
416	inst->vsi->config.buf_h = enc_prm->buf_height;
417	inst->vsi->config.gop_size = enc_prm->gop_size;
418	inst->vsi->config.framerate = enc_prm->frm_rate;
419	inst->vsi->config.ts_mode = inst->ts_mode;
420	ret = vpu_enc_set_param(&inst->vpu_inst, type, enc_prm);
421	if (ret)
422	break;
423	if (inst->work_buf_allocated) {
424	vp8_enc_free_work_buf(inst);
425	inst->work_buf_allocated = false;
426	}
427	ret = vp8_enc_alloc_work_buf(inst);
428	if (ret)
429	break;
430	inst->work_buf_allocated = true;
431	break;
432
433	/*
434	* VENC_SET_PARAM_TS_MODE must be called before VENC_SET_PARAM_ENC
435	*/
436	case VENC_SET_PARAM_TS_MODE:
437	inst->ts_mode = 1;
438	mtk_vcodec_debug(inst, "set ts_mode");
439	break;
440
441	default:
442	ret = vpu_enc_set_param(&inst->vpu_inst, type, enc_prm);
443	break;
444	}
445
446	mtk_vcodec_debug_leave(inst);
447
448	return ret;
449	}
450
451	static int vp8_enc_deinit(unsigned long handle)
452	{
453	int ret = 0;
454	struct venc_vp8_inst inst = (struct venc_vp8_inst )handle;
455
456	mtk_vcodec_debug_enter(inst);
457
458	ret = vpu_enc_deinit(&inst->vpu_inst);
459
460	if (inst->work_buf_allocated)
461	vp8_enc_free_work_buf(inst);
462
463	mtk_vcodec_debug_leave(inst);
464	kfree(inst);
465
466	return ret;
467	}
468
469	static struct venc_common_if venc_vp8_if = {
470	vp8_enc_init,
471	vp8_enc_encode,
472	vp8_enc_set_param,
473	vp8_enc_deinit,
474	};
475
476	struct venc_common_if *get_vp8_enc_comm_if(void);
477
478	struct venc_common_if *get_vp8_enc_comm_if(void)
479	{
480	return &venc_vp8_if;
481	}