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Merge tag 'powerpc-5.2-2' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc...
[mirror_ubuntu-hirsute-kernel.git] / drivers / media / platform / omap / omap_vout.c
CommitLineData
5c7ab634
VH		 1/*
2 * omap_vout.c
3 *
4 * Copyright (C) 2005-2010 Texas Instruments.
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 *
10 * Leveraged code from the OMAP2 camera driver
11 * Video-for-Linux (Version 2) camera capture driver for
12 * the OMAP24xx camera controller.
13 *
14 * Author: Andy Lowe (source@mvista.com)
15 *
16 * Copyright (C) 2004 MontaVista Software, Inc.
17 * Copyright (C) 2010 Texas Instruments.
18 *
19 * History:
20 * 20-APR-2006 Khasim Modified VRFB based Rotation,
21 * The image data is always read from 0 degree
22 * view and written
23 * to the virtual space of desired rotation angle
24 * 4-DEC-2006 Jian Changed to support better memory management
25 *
26 * 17-Nov-2008 Hardik Changed driver to use video_ioctl2
27 *
28 * 23-Feb-2010 Vaibhav H Modified to use new DSS2 interface
29 *
30 */
31
32#include <linux/init.h>
33#include <linux/module.h>
34#include <linux/vmalloc.h>
35#include <linux/sched.h>
36#include <linux/types.h>
37#include <linux/platform_device.h>
5c7ab634
VH		 38#include <linux/irq.h>
39#include <linux/videodev2.h>
72915e85 40#include <linux/dma-mapping.h>
d1ee8878 41#include <linux/slab.h>
5c7ab634 42
dd880dd4 43#include <media/videobuf-dma-contig.h>
5c7ab634
VH		 44#include <media/v4l2-device.h>
45#include <media/v4l2-ioctl.h>
46
6a1c9f6d 47#include <video/omapvrfb.h>
781a1622 48#include <video/omapfb_dss.h>
5c7ab634
VH		 49
50#include "omap_voutlib.h"
51#include "omap_voutdef.h"
445e258f 52#include "omap_vout_vrfb.h"
5c7ab634
VH		 53
54MODULE_AUTHOR("Texas Instruments");
55MODULE_DESCRIPTION("OMAP Video for Linux Video out driver");
56MODULE_LICENSE("GPL");
57
5c7ab634
VH		 58/* Driver Configuration macros */
59#define VOUT_NAME "omap_vout"
60
61enum omap_vout_channels {
62 OMAP_VIDEO1,
63 OMAP_VIDEO2,
64};
65
5c7ab634
VH		 66static struct videobuf_queue_ops video_vbq_ops;
67/* Variables configurable through module params*/
68static u32 video1_numbuffers = 3;
69static u32 video2_numbuffers = 3;
70static u32 video1_bufsize = OMAP_VOUT_MAX_BUF_SIZE;
71static u32 video2_bufsize = OMAP_VOUT_MAX_BUF_SIZE;
90ab5ee9
RR		 72static bool vid1_static_vrfb_alloc;
73static bool vid2_static_vrfb_alloc;
74static bool debug;
5c7ab634
VH		 75
76/* Module parameters */
77module_param(video1_numbuffers, uint, S_IRUGO);
78MODULE_PARM_DESC(video1_numbuffers,
79 "Number of buffers to be allocated at init time for Video1 device.");
80
81module_param(video2_numbuffers, uint, S_IRUGO);
82MODULE_PARM_DESC(video2_numbuffers,
83 "Number of buffers to be allocated at init time for Video2 device.");
84
85module_param(video1_bufsize, uint, S_IRUGO);
86MODULE_PARM_DESC(video1_bufsize,
87 "Size of the buffer to be allocated for video1 device");
88
89module_param(video2_bufsize, uint, S_IRUGO);
90MODULE_PARM_DESC(video2_bufsize,
91 "Size of the buffer to be allocated for video2 device");
92
93module_param(vid1_static_vrfb_alloc, bool, S_IRUGO);
94MODULE_PARM_DESC(vid1_static_vrfb_alloc,
95 "Static allocation of the VRFB buffer for video1 device");
96
97module_param(vid2_static_vrfb_alloc, bool, S_IRUGO);
98MODULE_PARM_DESC(vid2_static_vrfb_alloc,
99 "Static allocation of the VRFB buffer for video2 device");
100
101module_param(debug, bool, S_IRUGO);
102MODULE_PARM_DESC(debug, "Debug level (0-1)");
103
104/* list of image formats supported by OMAP2 video pipelines */
0d334f7f 105static const struct v4l2_fmtdesc omap_formats[] = {
5c7ab634
VH		 106 {
107 /* Note: V4L2 defines RGB565 as:
108 *
109 * Byte 0 Byte 1
110 * g2 g1 g0 r4 r3 r2 r1 r0 b4 b3 b2 b1 b0 g5 g4 g3
111 *
112 * We interpret RGB565 as:
113 *
114 * Byte 0 Byte 1
115 * g2 g1 g0 b4 b3 b2 b1 b0 r4 r3 r2 r1 r0 g5 g4 g3
116 */
117 .description = "RGB565, le",
118 .pixelformat = V4L2_PIX_FMT_RGB565,
119 },
120 {
121 /* Note: V4L2 defines RGB32 as: RGB-8-8-8-8 we use
122 * this for RGB24 unpack mode, the last 8 bits are ignored
123 * */
124 .description = "RGB32, le",
125 .pixelformat = V4L2_PIX_FMT_RGB32,
126 },
127 {
128 /* Note: V4L2 defines RGB24 as: RGB-8-8-8 we use
129 * this for RGB24 packed mode
130 *
131 */
132 .description = "RGB24, le",
133 .pixelformat = V4L2_PIX_FMT_RGB24,
134 },
135 {
136 .description = "YUYV (YUV 4:2:2), packed",
137 .pixelformat = V4L2_PIX_FMT_YUYV,
138 },
139 {
140 .description = "UYVY, packed",
141 .pixelformat = V4L2_PIX_FMT_UYVY,
142 },
143};
144
145#define NUM_OUTPUT_FORMATS (ARRAY_SIZE(omap_formats))
146
5c7ab634
VH		 147/*
148 * Try format
149 */
150static int omap_vout_try_format(struct v4l2_pix_format *pix)
151{
152 int ifmt, bpp = 0;
153
154 pix->height = clamp(pix->height, (u32)VID_MIN_HEIGHT,
155 (u32)VID_MAX_HEIGHT);
156 pix->width = clamp(pix->width, (u32)VID_MIN_WIDTH, (u32)VID_MAX_WIDTH);
157
158 for (ifmt = 0; ifmt < NUM_OUTPUT_FORMATS; ifmt++) {
159 if (pix->pixelformat == omap_formats[ifmt].pixelformat)
160 break;
161 }
162
163 if (ifmt == NUM_OUTPUT_FORMATS)
164 ifmt = 0;
165
166 pix->pixelformat = omap_formats[ifmt].pixelformat;
167 pix->field = V4L2_FIELD_ANY;
5c7ab634
VH		 168
169 switch (pix->pixelformat) {
170 case V4L2_PIX_FMT_YUYV:
171 case V4L2_PIX_FMT_UYVY:
172 default:
173 pix->colorspace = V4L2_COLORSPACE_JPEG;
174 bpp = YUYV_BPP;
175 break;
176 case V4L2_PIX_FMT_RGB565:
177 case V4L2_PIX_FMT_RGB565X:
178 pix->colorspace = V4L2_COLORSPACE_SRGB;
179 bpp = RGB565_BPP;
180 break;
181 case V4L2_PIX_FMT_RGB24:
182 pix->colorspace = V4L2_COLORSPACE_SRGB;
183 bpp = RGB24_BPP;
184 break;
185 case V4L2_PIX_FMT_RGB32:
186 case V4L2_PIX_FMT_BGR32:
187 pix->colorspace = V4L2_COLORSPACE_SRGB;
188 bpp = RGB32_BPP;
189 break;
190 }
191 pix->bytesperline = pix->width * bpp;
192 pix->sizeimage = pix->bytesperline * pix->height;
193
194 return bpp;
195}
196
197/*
8a677b6e
JK		 198 * omap_vout_get_userptr: Convert user space virtual address to physical
199 * address.
5c7ab634 200 */
34b2ea1c 201static int omap_vout_get_userptr(struct videobuf_buffer *vb, long virtp,
8a677b6e 202 u32 *physp)
5c7ab634 203{
8a677b6e
JK		 204 struct frame_vector *vec;
205 int ret;
5c7ab634 206
5c7ab634 207 /* For kernel direct-mapped memory, take the easy way */
8a677b6e
JK		 208 if (virtp >= PAGE_OFFSET) {
209 *physp = virt_to_phys((void *)virtp);
210 return 0;
211 }
212
213 vec = frame_vector_create(1);
214 if (!vec)
215 return -ENOMEM;
216
7f23b350 217 ret = get_vaddr_frames(virtp, 1, FOLL_WRITE, vec);
8a677b6e
JK		 218 if (ret != 1) {
219 frame_vector_destroy(vec);
220 return -EINVAL;
5c7ab634 221 }
8a677b6e
JK		 222 *physp = __pfn_to_phys(frame_vector_pfns(vec)[0]);
223 vb->priv = vec;
5c7ab634 224
8a677b6e 225 return 0;
5c7ab634
VH		 226}
227
5c7ab634
VH		 228/*
229 * Free the V4L2 buffers
230 */
445e258f 231void omap_vout_free_buffers(struct omap_vout_device *vout)
5c7ab634
VH		 232{
233 int i, numbuffers;
234
235 /* Allocate memory for the buffers */
236 numbuffers = (vout->vid) ? video2_numbuffers : video1_numbuffers;
237 vout->buffer_size = (vout->vid) ? video2_bufsize : video1_bufsize;
238
239 for (i = 0; i < numbuffers; i++) {
240 omap_vout_free_buffer(vout->buf_virt_addr[i],
241 vout->buffer_size);
242 vout->buf_phy_addr[i] = 0;
243 vout->buf_virt_addr[i] = 0;
244 }
245}
246
5c7ab634
VH		 247/*
248 * Convert V4L2 rotation to DSS rotation
249 * V4L2 understand 0, 90, 180, 270.
25985edc 250 * Convert to 0, 1, 2 and 3 respectively for DSS
5c7ab634
VH		 251 */
252static int v4l2_rot_to_dss_rot(int v4l2_rotation,
253 enum dss_rotation *rotation, bool mirror)
254{
255 int ret = 0;
256
257 switch (v4l2_rotation) {
258 case 90:
259 *rotation = dss_rotation_90_degree;
260 break;
261 case 180:
262 *rotation = dss_rotation_180_degree;
263 break;
264 case 270:
265 *rotation = dss_rotation_270_degree;
266 break;
267 case 0:
268 *rotation = dss_rotation_0_degree;
269 break;
270 default:
271 ret = -EINVAL;
272 }
273 return ret;
274}
275
5c7ab634
VH		 276static int omap_vout_calculate_offset(struct omap_vout_device *vout)
277{
5c7ab634 278 struct omapvideo_info *ovid;
5c7ab634
VH		 279 struct v4l2_rect *crop = &vout->crop;
280 struct v4l2_pix_format *pix = &vout->pix;
281 int *cropped_offset = &vout->cropped_offset;
445e258f 282 int ps = 2, line_length = 0;
5c7ab634
VH		 283
284 ovid = &vout->vid_info;
5c7ab634 285
445e258f
AT		 286 if (ovid->rotation_type == VOUT_ROT_VRFB) {
287 omap_vout_calculate_vrfb_offset(vout);
288 } else {
289 vout->line_length = line_length = pix->width;
5c7ab634 290
445e258f
AT		 291 if (V4L2_PIX_FMT_YUYV == pix->pixelformat ||
292 V4L2_PIX_FMT_UYVY == pix->pixelformat)
293 ps = 2;
294 else if (V4L2_PIX_FMT_RGB32 == pix->pixelformat)
5c7ab634 295 ps = 4;
445e258f
AT		 296 else if (V4L2_PIX_FMT_RGB24 == pix->pixelformat)
297 ps = 3;
5c7ab634 298
445e258f
AT		 299 vout->ps = ps;
300
301 *cropped_offset = (line_length * ps) *
302 crop->top + crop->left * ps;
5c7ab634 303 }
445e258f 304
5c7ab634 305 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "%s Offset:%x\n",
445e258f
AT		 306 __func__, vout->cropped_offset);
307
5c7ab634
VH		 308 return 0;
309}
310
311/*
312 * Convert V4L2 pixel format to DSS pixel format
313 */
72fcf2a8 314static int video_mode_to_dss_mode(struct omap_vout_device *vout)
5c7ab634
VH		 315{
316 struct omap_overlay *ovl;
317 struct omapvideo_info *ovid;
318 struct v4l2_pix_format *pix = &vout->pix;
319 enum omap_color_mode mode;
320
321 ovid = &vout->vid_info;
322 ovl = ovid->overlays[0];
323
324 switch (pix->pixelformat) {
5c7ab634
VH		 325 case V4L2_PIX_FMT_YUYV:
326 mode = OMAP_DSS_COLOR_YUV2;
327 break;
328 case V4L2_PIX_FMT_UYVY:
329 mode = OMAP_DSS_COLOR_UYVY;
330 break;
331 case V4L2_PIX_FMT_RGB565:
332 mode = OMAP_DSS_COLOR_RGB16;
333 break;
334 case V4L2_PIX_FMT_RGB24:
335 mode = OMAP_DSS_COLOR_RGB24P;
336 break;
337 case V4L2_PIX_FMT_RGB32:
338 mode = (ovl->id == OMAP_DSS_VIDEO1) ?
339 OMAP_DSS_COLOR_RGB24U : OMAP_DSS_COLOR_ARGB32;
340 break;
341 case V4L2_PIX_FMT_BGR32:
342 mode = OMAP_DSS_COLOR_RGBX32;
343 break;
344 default:
345 mode = -EINVAL;
fe653786 346 break;
5c7ab634
VH		 347 }
348 return mode;
349}
350
351/*
352 * Setup the overlay
353 */
a137ac87 354static int omapvid_setup_overlay(struct omap_vout_device *vout,
5c7ab634
VH		 355 struct omap_overlay *ovl, int posx, int posy, int outw,
356 int outh, u32 addr)
357{
358 int ret = 0;
359 struct omap_overlay_info info;
52334bb3 360 int cropheight, cropwidth, pixwidth;
5c7ab634
VH		 361
362 if ((ovl->caps & OMAP_DSS_OVL_CAP_SCALE) == 0 &&
363 (outw != vout->pix.width || outh != vout->pix.height)) {
364 ret = -EINVAL;
365 goto setup_ovl_err;
366 }
367
368 vout->dss_mode = video_mode_to_dss_mode(vout);
369 if (vout->dss_mode == -EINVAL) {
370 ret = -EINVAL;
371 goto setup_ovl_err;
372 }
373
374 /* Setup the input plane parameters according to
375 * rotation value selected.
376 */
b366888a 377 if (is_rotation_90_or_270(vout)) {
5c7ab634
VH		 378 cropheight = vout->crop.width;
379 cropwidth = vout->crop.height;
5c7ab634
VH		 380 pixwidth = vout->pix.height;
381 } else {
382 cropheight = vout->crop.height;
383 cropwidth = vout->crop.width;
5c7ab634
VH		 384 pixwidth = vout->pix.width;
385 }
386
387 ovl->get_overlay_info(ovl, &info);
388 info.paddr = addr;
5c7ab634
VH		 389 info.width = cropwidth;
390 info.height = cropheight;
391 info.color_mode = vout->dss_mode;
392 info.mirror = vout->mirror;
393 info.pos_x = posx;
394 info.pos_y = posy;
395 info.out_width = outw;
396 info.out_height = outh;
397 info.global_alpha = vout->win.global_alpha;
b366888a 398 if (!is_rotation_enabled(vout)) {
5c7ab634
VH		 399 info.rotation = 0;
400 info.rotation_type = OMAP_DSS_ROT_DMA;
401 info.screen_width = pixwidth;
402 } else {
403 info.rotation = vout->rotation;
404 info.rotation_type = OMAP_DSS_ROT_VRFB;
405 info.screen_width = 2048;
406 }
407
408 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev,
e8bd888a 409 "%s enable=%d addr=%pad width=%d\n height=%d color_mode=%d\n"
5c7ab634 410 "rotation=%d mirror=%d posx=%d posy=%d out_width = %d \n"
bc39030b
MCC		 411 "out_height=%d rotation_type=%d screen_width=%d\n", __func__,
412 ovl->is_enabled(ovl), &info.paddr, info.width, info.height,
5c7ab634
VH		 413 info.color_mode, info.rotation, info.mirror, info.pos_x,
414 info.pos_y, info.out_width, info.out_height, info.rotation_type,
415 info.screen_width);
416
417 ret = ovl->set_overlay_info(ovl, &info);
418 if (ret)
419 goto setup_ovl_err;
420
421 return 0;
422
423setup_ovl_err:
424 v4l2_warn(&vout->vid_dev->v4l2_dev, "setup_overlay failed\n");
425 return ret;
426}
427
428/*
429 * Initialize the overlay structure
430 */
a137ac87 431static int omapvid_init(struct omap_vout_device *vout, u32 addr)
5c7ab634
VH		 432{
433 int ret = 0, i;
434 struct v4l2_window *win;
435 struct omap_overlay *ovl;
cc182196 436 int posx, posy, outw, outh;
5c7ab634
VH		 437 struct omap_video_timings *timing;
438 struct omapvideo_info *ovid = &vout->vid_info;
439
440 win = &vout->win;
441 for (i = 0; i < ovid->num_overlays; i++) {
d629f03f
AT		 442 struct omap_dss_device *dssdev;
443
5c7ab634 444 ovl = ovid->overlays[i];
d629f03f
AT		 445 dssdev = ovl->get_device(ovl);
446
447 if (!dssdev)
5c7ab634
VH		 448 return -EINVAL;
449
d629f03f 450 timing = &dssdev->panel.timings;
5c7ab634
VH		 451
452 outw = win->w.width;
453 outh = win->w.height;
454 switch (vout->rotation) {
455 case dss_rotation_90_degree:
456 /* Invert the height and width for 90
457 * and 270 degree rotation
458 */
cc182196 459 swap(outw, outh);
5c7ab634
VH		 460 posy = (timing->y_res - win->w.width) - win->w.left;
461 posx = win->w.top;
462 break;
463
464 case dss_rotation_180_degree:
465 posx = (timing->x_res - win->w.width) - win->w.left;
466 posy = (timing->y_res - win->w.height) - win->w.top;
467 break;
468
469 case dss_rotation_270_degree:
cc182196 470 swap(outw, outh);
5c7ab634
VH		 471 posy = win->w.left;
472 posx = (timing->x_res - win->w.height) - win->w.top;
473 break;
474
475 default:
476 posx = win->w.left;
477 posy = win->w.top;
478 break;
479 }
480
481 ret = omapvid_setup_overlay(vout, ovl, posx, posy,
482 outw, outh, addr);
483 if (ret)
484 goto omapvid_init_err;
485 }
486 return 0;
487
488omapvid_init_err:
489 v4l2_warn(&vout->vid_dev->v4l2_dev, "apply_changes failed\n");
490 return ret;
491}
492
493/*
494 * Apply the changes set the go bit of DSS
495 */
a137ac87 496static int omapvid_apply_changes(struct omap_vout_device *vout)
5c7ab634
VH		 497{
498 int i;
499 struct omap_overlay *ovl;
500 struct omapvideo_info *ovid = &vout->vid_info;
501
502 for (i = 0; i < ovid->num_overlays; i++) {
d629f03f
AT		 503 struct omap_dss_device *dssdev;
504
5c7ab634 505 ovl = ovid->overlays[i];
d629f03f
AT		 506 dssdev = ovl->get_device(ovl);
507 if (!dssdev)
5c7ab634
VH		 508 return -EINVAL;
509 ovl->manager->apply(ovl->manager);
510 }
511
512 return 0;
513}
514
27801688 515static int omapvid_handle_interlace_display(struct omap_vout_device *vout,
15a40b27 516 unsigned int irqstatus, u64 ts)
27801688
AT		 517{
518 u32 fid;
519
520 if (vout->first_int) {
521 vout->first_int = 0;
522 goto err;
523 }
524
525 if (irqstatus & DISPC_IRQ_EVSYNC_ODD)
526 fid = 1;
527 else if (irqstatus & DISPC_IRQ_EVSYNC_EVEN)
528 fid = 0;
529 else
530 goto err;
531
532 vout->field_id ^= 1;
533 if (fid != vout->field_id) {
534 if (fid == 0)
535 vout->field_id = fid;
536 } else if (0 == fid) {
537 if (vout->cur_frm == vout->next_frm)
538 goto err;
539
15a40b27 540 vout->cur_frm->ts = ts;
27801688
AT		 541 vout->cur_frm->state = VIDEOBUF_DONE;
542 wake_up_interruptible(&vout->cur_frm->done);
543 vout->cur_frm = vout->next_frm;
544 } else {
545 if (list_empty(&vout->dma_queue) ||
546 (vout->cur_frm != vout->next_frm))
547 goto err;
548 }
549
550 return vout->field_id;
551err:
552 return 0;
553}
554
a137ac87 555static void omap_vout_isr(void *arg, unsigned int irqstatus)
5c7ab634 556{
e144ca64
AT		 557 int ret, fid, mgr_id;
558 u32 addr, irq;
5c7ab634 559 struct omap_overlay *ovl;
15a40b27 560 u64 ts;
5c7ab634
VH		 561 struct omapvideo_info *ovid;
562 struct omap_dss_device *cur_display;
563 struct omap_vout_device *vout = (struct omap_vout_device *)arg;
564
565 if (!vout->streaming)
566 return;
567
568 ovid = &vout->vid_info;
569 ovl = ovid->overlays[0];
5c7ab634 570
e144ca64 571 mgr_id = ovl->manager->id;
d629f03f
AT		 572
573 /* get the display device attached to the overlay */
574 cur_display = ovl->get_device(ovl);
575
576 if (!cur_display)
577 return;
5c7ab634
VH		 578
579 spin_lock(&vout->vbq_lock);
15a40b27 580 ts = ktime_get_ns();
5c7ab634 581
27801688 582 switch (cur_display->type) {
881a9640 583 case OMAP_DISPLAY_TYPE_DSI:
27801688 584 case OMAP_DISPLAY_TYPE_DPI:
c6a328a0 585 case OMAP_DISPLAY_TYPE_DVI:
e144ca64
AT		 586 if (mgr_id == OMAP_DSS_CHANNEL_LCD)
587 irq = DISPC_IRQ_VSYNC;
588 else if (mgr_id == OMAP_DSS_CHANNEL_LCD2)
589 irq = DISPC_IRQ_VSYNC2;
590 else
5c7ab634
VH		 591 goto vout_isr_err;
592
e144ca64 593 if (!(irqstatus & irq))
5251dd6c 594 goto vout_isr_err;
27801688
AT		 595 break;
596 case OMAP_DISPLAY_TYPE_VENC:
597 fid = omapvid_handle_interlace_display(vout, irqstatus,
15a40b27 598 ts);
27801688 599 if (!fid)
5c7ab634 600 goto vout_isr_err;
27801688
AT		 601 break;
602 case OMAP_DISPLAY_TYPE_HDMI:
603 if (!(irqstatus & DISPC_IRQ_EVSYNC_EVEN))
604 goto vout_isr_err;
605 break;
606 default:
607 goto vout_isr_err;
608 }
5c7ab634 609
27801688 610 if (!vout->first_int && (vout->cur_frm != vout->next_frm)) {
15a40b27 611 vout->cur_frm->ts = ts;
27801688
AT		 612 vout->cur_frm->state = VIDEOBUF_DONE;
613 wake_up_interruptible(&vout->cur_frm->done);
614 vout->cur_frm = vout->next_frm;
615 }
5c7ab634 616
27801688
AT		 617 vout->first_int = 0;
618 if (list_empty(&vout->dma_queue))
619 goto vout_isr_err;
5c7ab634 620
27801688
AT		 621 vout->next_frm = list_entry(vout->dma_queue.next,
622 struct videobuf_buffer, queue);
623 list_del(&vout->next_frm->queue);
5c7ab634 624
27801688 625 vout->next_frm->state = VIDEOBUF_ACTIVE;
5c7ab634 626
27801688
AT		 627 addr = (unsigned long) vout->queued_buf_addr[vout->next_frm->i]
628 + vout->cropped_offset;
5c7ab634 629
27801688
AT		 630 /* First save the configuration in ovelray structure */
631 ret = omapvid_init(vout, addr);
15170025 632 if (ret) {
27801688
AT		 633 printk(KERN_ERR VOUT_NAME
634 "failed to set overlay info\n");
15170025
FF		 635 goto vout_isr_err;
636 }
637
27801688
AT		 638 /* Enable the pipeline and set the Go bit */
639 ret = omapvid_apply_changes(vout);
640 if (ret)
641 printk(KERN_ERR VOUT_NAME "failed to change mode\n");
5c7ab634
VH		 642
643vout_isr_err:
644 spin_unlock(&vout->vbq_lock);
645}
646
5c7ab634
VH		 647/* Video buffer call backs */
648
649/*
650 * Buffer setup function is called by videobuf layer when REQBUF ioctl is
651 * called. This is used to setup buffers and return size and count of
652 * buffers allocated. After the call to this buffer, videobuf layer will
653 * setup buffer queue depending on the size and count of buffers
654 */
655static int omap_vout_buffer_setup(struct videobuf_queue *q, unsigned int *count,
656 unsigned int *size)
657{
658 int startindex = 0, i, j;
659 u32 phy_addr = 0, virt_addr = 0;
660 struct omap_vout_device *vout = q->priv_data;
445e258f 661 struct omapvideo_info *ovid = &vout->vid_info;
d06db7ec 662 int vid_max_buf_size;
5c7ab634
VH		 663
664 if (!vout)
665 return -EINVAL;
666
d06db7ec
AT		 667 vid_max_buf_size = vout->vid == OMAP_VIDEO1 ? video1_bufsize :
668 video2_bufsize;
669
5c7ab634
VH		 670 if (V4L2_BUF_TYPE_VIDEO_OUTPUT != q->type)
671 return -EINVAL;
672
673 startindex = (vout->vid == OMAP_VIDEO1) ?
674 video1_numbuffers : video2_numbuffers;
675 if (V4L2_MEMORY_MMAP == vout->memory && *count < startindex)
676 *count = startindex;
677
445e258f 678 if (ovid->rotation_type == VOUT_ROT_VRFB) {
5c7ab634
VH		 679 if (omap_vout_vrfb_buffer_setup(vout, count, startindex))
680 return -ENOMEM;
445e258f 681 }
5c7ab634
VH		 682
683 if (V4L2_MEMORY_MMAP != vout->memory)
684 return 0;
685
686 /* Now allocated the V4L2 buffers */
687 *size = PAGE_ALIGN(vout->pix.width * vout->pix.height * vout->bpp);
688 startindex = (vout->vid == OMAP_VIDEO1) ?
689 video1_numbuffers : video2_numbuffers;
690
383e4f69 691 /* Check the size of the buffer */
d06db7ec 692 if (*size > vid_max_buf_size) {
383e4f69
VH		 693 v4l2_err(&vout->vid_dev->v4l2_dev,
694 "buffer allocation mismatch [%u] [%u]\n",
695 *size, vout->buffer_size);
696 return -ENOMEM;
697 }
698
5c7ab634
VH		 699 for (i = startindex; i < *count; i++) {
700 vout->buffer_size = *size;
701
702 virt_addr = omap_vout_alloc_buffer(vout->buffer_size,
703 &phy_addr);
704 if (!virt_addr) {
b1011a33 705 if (ovid->rotation_type == VOUT_ROT_NONE)
5c7ab634 706 break;
b1011a33
MCC		 707
708 if (!is_rotation_enabled(vout))
709 break;
710
5c7ab634
VH		 711 /* Free the VRFB buffers if no space for V4L2 buffers */
712 for (j = i; j < *count; j++) {
b1011a33
MCC		 713 omap_vout_free_buffer(vout->smsshado_virt_addr[j],
714 vout->smsshado_size);
5c7ab634
VH		 715 vout->smsshado_virt_addr[j] = 0;
716 vout->smsshado_phy_addr[j] = 0;
717 }
718 }
719 vout->buf_virt_addr[i] = virt_addr;
720 vout->buf_phy_addr[i] = phy_addr;
721 }
722 *count = vout->buffer_allocated = i;
723
724 return 0;
725}
726
727/*
728 * Free the V4L2 buffers additionally allocated than default
445e258f 729 * number of buffers
5c7ab634 730 */
445e258f 731static void omap_vout_free_extra_buffers(struct omap_vout_device *vout)
5c7ab634
VH		 732{
733 int num_buffers = 0, i;
734
735 num_buffers = (vout->vid == OMAP_VIDEO1) ?
736 video1_numbuffers : video2_numbuffers;
737
738 for (i = num_buffers; i < vout->buffer_allocated; i++) {
739 if (vout->buf_virt_addr[i])
740 omap_vout_free_buffer(vout->buf_virt_addr[i],
741 vout->buffer_size);
742
743 vout->buf_virt_addr[i] = 0;
744 vout->buf_phy_addr[i] = 0;
745 }
5c7ab634
VH		 746 vout->buffer_allocated = num_buffers;
747}
748
749/*
750 * This function will be called when VIDIOC_QBUF ioctl is called.
751 * It prepare buffers before give out for the display. This function
752 * converts user space virtual address into physical address if userptr memory
753 * exchange mechanism is used. If rotation is enabled, it copies entire
754 * buffer into VRFB memory space before giving it to the DSS.
755 */
756static int omap_vout_buffer_prepare(struct videobuf_queue *q,
445e258f
AT		 757 struct videobuf_buffer *vb,
758 enum v4l2_field field)
5c7ab634 759{
5c7ab634 760 struct omap_vout_device *vout = q->priv_data;
445e258f 761 struct omapvideo_info *ovid = &vout->vid_info;
5c7ab634
VH		 762
763 if (VIDEOBUF_NEEDS_INIT == vb->state) {
764 vb->width = vout->pix.width;
765 vb->height = vout->pix.height;
766 vb->size = vb->width * vb->height * vout->bpp;
767 vb->field = field;
768 }
769 vb->state = VIDEOBUF_PREPARED;
770 /* if user pointer memory mechanism is used, get the physical
771 * address of the buffer
772 */
773 if (V4L2_MEMORY_USERPTR == vb->memory) {
8a677b6e
JK		 774 int ret;
775
5c7ab634
VH		 776 if (0 == vb->baddr)
777 return -EINVAL;
5c7ab634 778 /* Physical address */
8a677b6e
JK		 779 ret = omap_vout_get_userptr(vb, vb->baddr,
780 (u32 *)&vout->queued_buf_addr[vb->i]);
781 if (ret < 0)
782 return ret;
dd880dd4 783 } else {
e8bd888a 784 unsigned long addr, dma_addr;
72915e85
AJ		 785 unsigned long size;
786
787 addr = (unsigned long) vout->buf_virt_addr[vb->i];
788 size = (unsigned long) vb->size;
789
790 dma_addr = dma_map_single(vout->vid_dev->v4l2_dev.dev, (void *) addr,
791 size, DMA_TO_DEVICE);
792 if (dma_mapping_error(vout->vid_dev->v4l2_dev.dev, dma_addr))
bc39030b
MCC		 793 v4l2_err(&vout->vid_dev->v4l2_dev,
794 "dma_map_single failed\n");
72915e85 795
dd880dd4 796 vout->queued_buf_addr[vb->i] = (u8 *)vout->buf_phy_addr[vb->i];
5c7ab634
VH		 797 }
798
445e258f
AT		 799 if (ovid->rotation_type == VOUT_ROT_VRFB)
800 return omap_vout_prepare_vrfb(vout, vb);
801 else
5c7ab634 802 return 0;
5c7ab634
VH		 803}
804
805/*
25985edc 806 * Buffer queue function will be called from the videobuf layer when _QBUF
5c7ab634
VH		 807 * ioctl is called. It is used to enqueue buffer, which is ready to be
808 * displayed.
809 */
810static void omap_vout_buffer_queue(struct videobuf_queue *q,
811 struct videobuf_buffer *vb)
812{
813 struct omap_vout_device *vout = q->priv_data;
814
815 /* Driver is also maintainig a queue. So enqueue buffer in the driver
816 * queue */
817 list_add_tail(&vb->queue, &vout->dma_queue);
818
819 vb->state = VIDEOBUF_QUEUED;
820}
821
822/*
823 * Buffer release function is called from videobuf layer to release buffer
824 * which are already allocated
825 */
826static void omap_vout_buffer_release(struct videobuf_queue *q,
827 struct videobuf_buffer *vb)
828{
5c7ab634 829 vb->state = VIDEOBUF_NEEDS_INIT;
8a677b6e
JK		 830 if (vb->memory == V4L2_MEMORY_USERPTR && vb->priv) {
831 struct frame_vector *vec = vb->priv;
5c7ab634 832
8a677b6e
JK		 833 put_vaddr_frames(vec);
834 frame_vector_destroy(vec);
835 }
5c7ab634
VH		 836}
837
838/*
839 * File operations
840 */
c23e0cb8 841static __poll_t omap_vout_poll(struct file *file,
94f3f48f
LP		 842 struct poll_table_struct *wait)
843{
844 struct omap_vout_device *vout = file->private_data;
845 struct videobuf_queue *q = &vout->vbq;
846
847 return videobuf_poll_stream(file, q, wait);
848}
849
5c7ab634
VH		 850static void omap_vout_vm_open(struct vm_area_struct *vma)
851{
852 struct omap_vout_device *vout = vma->vm_private_data;
853
854 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev,
855 "vm_open [vma=%08lx-%08lx]\n", vma->vm_start, vma->vm_end);
856 vout->mmap_count++;
857}
858
859static void omap_vout_vm_close(struct vm_area_struct *vma)
860{
861 struct omap_vout_device *vout = vma->vm_private_data;
862
863 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev,
864 "vm_close [vma=%08lx-%08lx]\n", vma->vm_start, vma->vm_end);
865 vout->mmap_count--;
866}
867
7cbea8dc 868static const struct vm_operations_struct omap_vout_vm_ops = {
5c7ab634
VH		 869 .open = omap_vout_vm_open,
870 .close = omap_vout_vm_close,
871};
872
873static int omap_vout_mmap(struct file *file, struct vm_area_struct *vma)
874{
875 int i;
876 void *pos;
877 unsigned long start = vma->vm_start;
878 unsigned long size = (vma->vm_end - vma->vm_start);
5c7ab634
VH		 879 struct omap_vout_device *vout = file->private_data;
880 struct videobuf_queue *q = &vout->vbq;
881
882 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev,
883 " %s pgoff=0x%lx, start=0x%lx, end=0x%lx\n", __func__,
884 vma->vm_pgoff, vma->vm_start, vma->vm_end);
885
886 /* look for the buffer to map */
887 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
888 if (NULL == q->bufs[i])
889 continue;
890 if (V4L2_MEMORY_MMAP != q->bufs[i]->memory)
891 continue;
892 if (q->bufs[i]->boff == (vma->vm_pgoff << PAGE_SHIFT))
893 break;
894 }
895
896 if (VIDEO_MAX_FRAME == i) {
897 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev,
898 "offset invalid [offset=0x%lx]\n",
899 (vma->vm_pgoff << PAGE_SHIFT));
900 return -EINVAL;
901 }
383e4f69
VH		 902 /* Check the size of the buffer */
903 if (size > vout->buffer_size) {
904 v4l2_err(&vout->vid_dev->v4l2_dev,
905 "insufficient memory [%lu] [%u]\n",
906 size, vout->buffer_size);
907 return -ENOMEM;
908 }
909
5c7ab634
VH		 910 q->bufs[i]->baddr = vma->vm_start;
911
314e51b9 912 vma->vm_flags |= VM_DONTEXPAND | VM_DONTDUMP;
5c7ab634
VH		 913 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
914 vma->vm_ops = &omap_vout_vm_ops;
915 vma->vm_private_data = (void *) vout;
dd880dd4 916 pos = (void *)vout->buf_virt_addr[i];
5c7ab634
VH		 917 vma->vm_pgoff = virt_to_phys((void *)pos) >> PAGE_SHIFT;
918 while (size > 0) {
919 unsigned long pfn;
920 pfn = virt_to_phys((void *) pos) >> PAGE_SHIFT;
921 if (remap_pfn_range(vma, start, pfn, PAGE_SIZE, PAGE_SHARED))
922 return -EAGAIN;
923 start += PAGE_SIZE;
924 pos += PAGE_SIZE;
925 size -= PAGE_SIZE;
926 }
927 vout->mmap_count++;
928 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "Exiting %s\n", __func__);
929
930 return 0;
931}
932
933static int omap_vout_release(struct file *file)
934{
935 unsigned int ret, i;
936 struct videobuf_queue *q;
937 struct omapvideo_info *ovid;
938 struct omap_vout_device *vout = file->private_data;
939
940 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "Entering %s\n", __func__);
941 ovid = &vout->vid_info;
942
943 if (!vout)
944 return 0;
945
946 q = &vout->vbq;
947 /* Disable all the overlay managers connected with this interface */
948 for (i = 0; i < ovid->num_overlays; i++) {
949 struct omap_overlay *ovl = ovid->overlays[i];
d629f03f
AT		 950 struct omap_dss_device *dssdev = ovl->get_device(ovl);
951
952 if (dssdev)
aaa874a9 953 ovl->disable(ovl);
5c7ab634
VH		 954 }
955 /* Turn off the pipeline */
956 ret = omapvid_apply_changes(vout);
957 if (ret)
958 v4l2_warn(&vout->vid_dev->v4l2_dev,
959 "Unable to apply changes\n");
960
961 /* Free all buffers */
445e258f
AT		 962 omap_vout_free_extra_buffers(vout);
963
964 /* Free the VRFB buffers only if they are allocated
965 * during reqbufs. Don't free if init time allocated
966 */
967 if (ovid->rotation_type == VOUT_ROT_VRFB) {
968 if (!vout->vrfb_static_allocation)
969 omap_vout_free_vrfb_buffers(vout);
970 }
5c7ab634
VH		 971 videobuf_mmap_free(q);
972
973 /* Even if apply changes fails we should continue
b595076a 974 freeing allocated memory */
5c7ab634
VH		 975 if (vout->streaming) {
976 u32 mask = 0;
977
978 mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN |
5251dd6c 979 DISPC_IRQ_EVSYNC_ODD | DISPC_IRQ_VSYNC2;
5c7ab634 980 omap_dispc_unregister_isr(omap_vout_isr, vout, mask);
160ac0ba 981 vout->streaming = false;
5c7ab634
VH		 982
983 videobuf_streamoff(q);
984 videobuf_queue_cancel(q);
985 }
986
987 if (vout->mmap_count != 0)
988 vout->mmap_count = 0;
989
990 vout->opened -= 1;
991 file->private_data = NULL;
992
993 if (vout->buffer_allocated)
994 videobuf_mmap_free(q);
995
996 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "Exiting %s\n", __func__);
997 return ret;
998}
999
1000static int omap_vout_open(struct file *file)
1001{
1002 struct videobuf_queue *q;
1003 struct omap_vout_device *vout = NULL;
1004
1005 vout = video_drvdata(file);
5c7ab634
VH		 1006
1007 if (vout == NULL)
1008 return -ENODEV;
1009
bfba2b3e
ME		 1010 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "Entering %s\n", __func__);
1011
5c7ab634
VH		 1012 /* for now, we only support single open */
1013 if (vout->opened)
1014 return -EBUSY;
1015
1016 vout->opened += 1;
1017
1018 file->private_data = vout;
1019 vout->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1020
1021 q = &vout->vbq;
1022 video_vbq_ops.buf_setup = omap_vout_buffer_setup;
1023 video_vbq_ops.buf_prepare = omap_vout_buffer_prepare;
1024 video_vbq_ops.buf_release = omap_vout_buffer_release;
1025 video_vbq_ops.buf_queue = omap_vout_buffer_queue;
1026 spin_lock_init(&vout->vbq_lock);
1027
dd880dd4
VH		 1028 videobuf_queue_dma_contig_init(q, &video_vbq_ops, q->dev,
1029 &vout->vbq_lock, vout->type, V4L2_FIELD_NONE,
e3cfd447 1030 sizeof(struct videobuf_buffer), vout, NULL);
5c7ab634
VH		 1031
1032 v4l2_dbg(1, debug, &vout->vid_dev->v4l2_dev, "Exiting %s\n", __func__);
1033 return 0;
1034}
1035
1036/*
1037 * V4L2 ioctls
1038 */
1039static int vidioc_querycap(struct file *file, void *fh,
1040 struct v4l2_capability *cap)
1041{
1042 struct omap_vout_device *vout = fh;
1043
c0decac1
MCC		 1044 strscpy(cap->driver, VOUT_NAME, sizeof(cap->driver));
1045 strscpy(cap->card, vout->vfd->name, sizeof(cap->card));
5c7ab634 1046 cap->bus_info[0] = '\0';
a020c747 1047 cap->device_caps = V4L2_CAP_STREAMING | V4L2_CAP_VIDEO_OUTPUT |
047a01fd 1048 V4L2_CAP_VIDEO_OUTPUT_OVERLAY;
a020c747 1049 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
5c7ab634
VH		 1050
1051 return 0;
1052}
1053
1054static int vidioc_enum_fmt_vid_out(struct file *file, void *fh,
1055 struct v4l2_fmtdesc *fmt)
1056{
1057 int index = fmt->index;
5c7ab634 1058
5c7ab634
VH		 1059 if (index >= NUM_OUTPUT_FORMATS)
1060 return -EINVAL;
1061
1062 fmt->flags = omap_formats[index].flags;
c0decac1
MCC		 1063 strscpy(fmt->description, omap_formats[index].description,
1064 sizeof(fmt->description));
5c7ab634
VH		 1065 fmt->pixelformat = omap_formats[index].pixelformat;
1066
1067 return 0;
1068}
1069
1070static int vidioc_g_fmt_vid_out(struct file *file, void *fh,
1071 struct v4l2_format *f)
1072{
1073 struct omap_vout_device *vout = fh;
1074
1075 f->fmt.pix = vout->pix;
1076 return 0;
1077
1078}
1079
1080static int vidioc_try_fmt_vid_out(struct file *file, void *fh,
1081 struct v4l2_format *f)
1082{
1083 struct omap_overlay *ovl;
1084 struct omapvideo_info *ovid;
1085 struct omap_video_timings *timing;
1086 struct omap_vout_device *vout = fh;
d629f03f 1087 struct omap_dss_device *dssdev;
5c7ab634
VH		 1088
1089 ovid = &vout->vid_info;
1090 ovl = ovid->overlays[0];
d629f03f
AT		 1091 /* get the display device attached to the overlay */
1092 dssdev = ovl->get_device(ovl);
5c7ab634 1093
d629f03f 1094 if (!dssdev)
5c7ab634 1095 return -EINVAL;
d629f03f
AT		 1096
1097 timing = &dssdev->panel.timings;
5c7ab634
VH		 1098
1099 vout->fbuf.fmt.height = timing->y_res;
1100 vout->fbuf.fmt.width = timing->x_res;
1101
1102 omap_vout_try_format(&f->fmt.pix);
1103 return 0;
1104}
1105
1106static int vidioc_s_fmt_vid_out(struct file *file, void *fh,
1107 struct v4l2_format *f)
1108{
1109 int ret, bpp;
1110 struct omap_overlay *ovl;
1111 struct omapvideo_info *ovid;
1112 struct omap_video_timings *timing;
1113 struct omap_vout_device *vout = fh;
d629f03f 1114 struct omap_dss_device *dssdev;
5c7ab634
VH		 1115
1116 if (vout->streaming)
1117 return -EBUSY;
1118
1119 mutex_lock(&vout->lock);
1120
1121 ovid = &vout->vid_info;
1122 ovl = ovid->overlays[0];
d629f03f 1123 dssdev = ovl->get_device(ovl);
5c7ab634
VH		 1124
1125 /* get the display device attached to the overlay */
d629f03f 1126 if (!dssdev) {
5c7ab634
VH		 1127 ret = -EINVAL;
1128 goto s_fmt_vid_out_exit;
1129 }
d629f03f 1130 timing = &dssdev->panel.timings;
5c7ab634 1131
8b72c18d 1132 /* We don't support RGB24-packed mode if vrfb rotation
5c7ab634 1133 * is enabled*/
b366888a 1134 if ((is_rotation_enabled(vout)) &&
5c7ab634
VH		 1135 f->fmt.pix.pixelformat == V4L2_PIX_FMT_RGB24) {
1136 ret = -EINVAL;
1137 goto s_fmt_vid_out_exit;
1138 }
1139
1140 /* get the framebuffer parameters */
1141
b366888a 1142 if (is_rotation_90_or_270(vout)) {
5c7ab634
VH		 1143 vout->fbuf.fmt.height = timing->x_res;
1144 vout->fbuf.fmt.width = timing->y_res;
1145 } else {
1146 vout->fbuf.fmt.height = timing->y_res;
1147 vout->fbuf.fmt.width = timing->x_res;
1148 }
1149
8b72c18d 1150 /* change to smaller size is OK */
5c7ab634
VH		 1151
1152 bpp = omap_vout_try_format(&f->fmt.pix);
1153 f->fmt.pix.sizeimage = f->fmt.pix.width * f->fmt.pix.height * bpp;
1154
1155 /* try & set the new output format */
1156 vout->bpp = bpp;
1157 vout->pix = f->fmt.pix;
1158 vout->vrfb_bpp = 1;
1159
1160 /* If YUYV then vrfb bpp is 2, for others its 1 */
1161 if (V4L2_PIX_FMT_YUYV == vout->pix.pixelformat ||
1162 V4L2_PIX_FMT_UYVY == vout->pix.pixelformat)
1163 vout->vrfb_bpp = 2;
1164
1165 /* set default crop and win */
1166 omap_vout_new_format(&vout->pix, &vout->fbuf, &vout->crop, &vout->win);
1167
5c7ab634
VH		 1168 ret = 0;
1169
1170s_fmt_vid_out_exit:
1171 mutex_unlock(&vout->lock);
1172 return ret;
1173}
1174
1175static int vidioc_try_fmt_vid_overlay(struct file *file, void *fh,
1176 struct v4l2_format *f)
1177{
1178 int ret = 0;
1179 struct omap_vout_device *vout = fh;
11354dd5
AT		 1180 struct omap_overlay *ovl;
1181 struct omapvideo_info *ovid;
5c7ab634
VH		 1182 struct v4l2_window *win = &f->fmt.win;
1183
11354dd5
AT		 1184 ovid = &vout->vid_info;
1185 ovl = ovid->overlays[0];
1186
5c7ab634
VH		 1187 ret = omap_vout_try_window(&vout->fbuf, win);
1188
1189 if (!ret) {
11354dd5 1190 if ((ovl->caps & OMAP_DSS_OVL_CAP_GLOBAL_ALPHA) == 0)
5c7ab634
VH		 1191 win->global_alpha = 255;
1192 else
1193 win->global_alpha = f->fmt.win.global_alpha;
1194 }
1195
1196 return ret;
1197}
1198
1199static int vidioc_s_fmt_vid_overlay(struct file *file, void *fh,
1200 struct v4l2_format *f)
1201{
1202 int ret = 0;
1203 struct omap_overlay *ovl;
1204 struct omapvideo_info *ovid;
1205 struct omap_vout_device *vout = fh;
1206 struct v4l2_window *win = &f->fmt.win;
1207
1208 mutex_lock(&vout->lock);
1209 ovid = &vout->vid_info;
1210 ovl = ovid->overlays[0];
1211
1212 ret = omap_vout_new_window(&vout->crop, &vout->win, &vout->fbuf, win);
1213 if (!ret) {
11354dd5
AT		 1214 /* Video1 plane does not support global alpha on OMAP3 */
1215 if ((ovl->caps & OMAP_DSS_OVL_CAP_GLOBAL_ALPHA) == 0)
5c7ab634
VH		 1216 vout->win.global_alpha = 255;
1217 else
1218 vout->win.global_alpha = f->fmt.win.global_alpha;
1219
1220 vout->win.chromakey = f->fmt.win.chromakey;
1221 }
1222 mutex_unlock(&vout->lock);
1223 return ret;
1224}
1225
5c7ab634
VH		 1226static int vidioc_g_fmt_vid_overlay(struct file *file, void *fh,
1227 struct v4l2_format *f)
1228{
1229 u32 key_value = 0;
1230 struct omap_overlay *ovl;
1231 struct omapvideo_info *ovid;
1232 struct omap_vout_device *vout = fh;
1233 struct omap_overlay_manager_info info;
1234 struct v4l2_window *win = &f->fmt.win;
1235
1236 ovid = &vout->vid_info;
1237 ovl = ovid->overlays[0];
1238
1239 win->w = vout->win.w;
1240 win->field = vout->win.field;
1241 win->global_alpha = vout->win.global_alpha;
1242
1243 if (ovl->manager && ovl->manager->get_manager_info) {
1244 ovl->manager->get_manager_info(ovl->manager, &info);
1245 key_value = info.trans_key;
1246 }
1247 win->chromakey = key_value;
1248 return 0;
1249}
1250
d1d09461 1251static int vidioc_g_selection(struct file *file, void *fh, struct v4l2_selection *sel)
5c7ab634
VH		 1252{
1253 struct omap_vout_device *vout = fh;
1254 struct v4l2_pix_format *pix = &vout->pix;
1255
d1d09461 1256 if (sel->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
5c7ab634
VH		 1257 return -EINVAL;
1258
d1d09461
HV		 1259 switch (sel->target) {
1260 case V4L2_SEL_TGT_CROP:
1261 sel->r = vout->crop;
1262 break;
1263 case V4L2_SEL_TGT_CROP_DEFAULT:
1264 omap_vout_default_crop(&vout->pix, &vout->fbuf, &sel->r);
1265 break;
1266 case V4L2_SEL_TGT_CROP_BOUNDS:
1267 /* Width and height are always even */
1268 sel->r.width = pix->width & ~1;
1269 sel->r.height = pix->height & ~1;
1270 break;
1271 default:
5c7ab634 1272 return -EINVAL;
d1d09461 1273 }
5c7ab634
VH		 1274 return 0;
1275}
1276
d1d09461 1277static int vidioc_s_selection(struct file *file, void *fh, struct v4l2_selection *sel)
5c7ab634
VH		 1278{
1279 int ret = -EINVAL;
1280 struct omap_vout_device *vout = fh;
1281 struct omapvideo_info *ovid;
1282 struct omap_overlay *ovl;
1283 struct omap_video_timings *timing;
d629f03f 1284 struct omap_dss_device *dssdev;
5c7ab634 1285
d1d09461
HV		 1286 if (sel->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
1287 return -EINVAL;
1288
1289 if (sel->target != V4L2_SEL_TGT_CROP)
1290 return -EINVAL;
1291
5c7ab634
VH		 1292 if (vout->streaming)
1293 return -EBUSY;
1294
1295 mutex_lock(&vout->lock);
1296 ovid = &vout->vid_info;
1297 ovl = ovid->overlays[0];
d629f03f
AT		 1298 /* get the display device attached to the overlay */
1299 dssdev = ovl->get_device(ovl);
5c7ab634 1300
d629f03f 1301 if (!dssdev) {
5c7ab634
VH		 1302 ret = -EINVAL;
1303 goto s_crop_err;
1304 }
d629f03f
AT		 1305
1306 timing = &dssdev->panel.timings;
5c7ab634 1307
b366888a 1308 if (is_rotation_90_or_270(vout)) {
5c7ab634
VH		 1309 vout->fbuf.fmt.height = timing->x_res;
1310 vout->fbuf.fmt.width = timing->y_res;
1311 } else {
1312 vout->fbuf.fmt.height = timing->y_res;
1313 vout->fbuf.fmt.width = timing->x_res;
1314 }
1315
d1d09461
HV		 1316 ret = omap_vout_new_crop(&vout->pix, &vout->crop, &vout->win,
1317 &vout->fbuf, &sel->r);
5c7ab634
VH		 1318
1319s_crop_err:
1320 mutex_unlock(&vout->lock);
1321 return ret;
1322}
1323
77430f03 1324static int omap_vout_s_ctrl(struct v4l2_ctrl *ctrl)
5c7ab634 1325{
77430f03
HV		 1326 struct omap_vout_device *vout =
1327 container_of(ctrl->handler, struct omap_vout_device, ctrl_handler);
5c7ab634
VH		 1328 int ret = 0;
1329
1330 switch (ctrl->id) {
77430f03 1331 case V4L2_CID_ROTATE: {
445e258f 1332 struct omapvideo_info *ovid;
77430f03 1333 int rotation = ctrl->val;
5c7ab634 1334
445e258f
AT		 1335 ovid = &vout->vid_info;
1336
5c7ab634 1337 mutex_lock(&vout->lock);
445e258f
AT		 1338 if (rotation && ovid->rotation_type == VOUT_ROT_NONE) {
1339 mutex_unlock(&vout->lock);
1340 ret = -ERANGE;
1341 break;
1342 }
5c7ab634
VH		 1343
1344 if (rotation && vout->pix.pixelformat == V4L2_PIX_FMT_RGB24) {
1345 mutex_unlock(&vout->lock);
1346 ret = -EINVAL;
1347 break;
1348 }
1349
1350 if (v4l2_rot_to_dss_rot(rotation, &vout->rotation,
1351 vout->mirror)) {
1352 mutex_unlock(&vout->lock);
1353 ret = -EINVAL;
1354 break;
1355 }
5c7ab634
VH		 1356 mutex_unlock(&vout->lock);
1357 break;
1358 }
1359 case V4L2_CID_BG_COLOR:
1360 {
1361 struct omap_overlay *ovl;
77430f03 1362 unsigned int color = ctrl->val;
5c7ab634
VH		 1363 struct omap_overlay_manager_info info;
1364
1365 ovl = vout->vid_info.overlays[0];
1366
1367 mutex_lock(&vout->lock);
1368 if (!ovl->manager || !ovl->manager->get_manager_info) {
1369 mutex_unlock(&vout->lock);
1370 ret = -EINVAL;
1371 break;
1372 }
1373
1374 ovl->manager->get_manager_info(ovl->manager, &info);
1375 info.default_color = color;
1376 if (ovl->manager->set_manager_info(ovl->manager, &info)) {
1377 mutex_unlock(&vout->lock);
1378 ret = -EINVAL;
1379 break;
1380 }
5c7ab634
VH		 1381 mutex_unlock(&vout->lock);
1382 break;
1383 }
1384 case V4L2_CID_VFLIP:
1385 {
5c7ab634 1386 struct omapvideo_info *ovid;
77430f03 1387 unsigned int mirror = ctrl->val;
5c7ab634
VH		 1388
1389 ovid = &vout->vid_info;
5c7ab634
VH		 1390
1391 mutex_lock(&vout->lock);
445e258f
AT		 1392 if (mirror && ovid->rotation_type == VOUT_ROT_NONE) {
1393 mutex_unlock(&vout->lock);
1394 ret = -ERANGE;
1395 break;
1396 }
5c7ab634
VH		 1397
1398 if (mirror && vout->pix.pixelformat == V4L2_PIX_FMT_RGB24) {
1399 mutex_unlock(&vout->lock);
1400 ret = -EINVAL;
1401 break;
1402 }
1403 vout->mirror = mirror;
5c7ab634
VH		 1404 mutex_unlock(&vout->lock);
1405 break;
1406 }
1407 default:
77430f03 1408 return -EINVAL;
5c7ab634
VH		 1409 }
1410 return ret;
1411}
1412
77430f03
HV		 1413static const struct v4l2_ctrl_ops omap_vout_ctrl_ops = {
1414 .s_ctrl = omap_vout_s_ctrl,
1415};
1416
5c7ab634
VH		 1417static int vidioc_reqbufs(struct file *file, void *fh,
1418 struct v4l2_requestbuffers *req)
1419{
1420 int ret = 0;
1421 unsigned int i, num_buffers = 0;
1422 struct omap_vout_device *vout = fh;
1423 struct videobuf_queue *q = &vout->vbq;
5c7ab634 1424
52334bb3 1425 if (req->type != V4L2_BUF_TYPE_VIDEO_OUTPUT)
5c7ab634
VH		 1426 return -EINVAL;
1427 /* if memory is not mmp or userptr
1428 return error */
1429 if ((V4L2_MEMORY_MMAP != req->memory) &&
1430 (V4L2_MEMORY_USERPTR != req->memory))
1431 return -EINVAL;
1432
1433 mutex_lock(&vout->lock);
1434 /* Cannot be requested when streaming is on */
1435 if (vout->streaming) {
1436 ret = -EBUSY;
1437 goto reqbuf_err;
1438 }
1439
1440 /* If buffers are already allocated free them */
1441 if (q->bufs[0] && (V4L2_MEMORY_MMAP == q->bufs[0]->memory)) {
1442 if (vout->mmap_count) {
1443 ret = -EBUSY;
1444 goto reqbuf_err;
1445 }
1446 num_buffers = (vout->vid == OMAP_VIDEO1) ?
1447 video1_numbuffers : video2_numbuffers;
1448 for (i = num_buffers; i < vout->buffer_allocated; i++) {
dd880dd4 1449 omap_vout_free_buffer(vout->buf_virt_addr[i],
5c7ab634
VH		 1450 vout->buffer_size);
1451 vout->buf_virt_addr[i] = 0;
1452 vout->buf_phy_addr[i] = 0;
1453 }
1454 vout->buffer_allocated = num_buffers;
1455 videobuf_mmap_free(q);
1456 } else if (q->bufs[0] && (V4L2_MEMORY_USERPTR == q->bufs[0]->memory)) {
1457 if (vout->buffer_allocated) {
1458 videobuf_mmap_free(q);
1459 for (i = 0; i < vout->buffer_allocated; i++) {
1460 kfree(q->bufs[i]);
1461 q->bufs[i] = NULL;
1462 }
1463 vout->buffer_allocated = 0;
1464 }
1465 }
1466
1467 /*store the memory type in data structure */
1468 vout->memory = req->memory;
1469
1470 INIT_LIST_HEAD(&vout->dma_queue);
1471
1472 /* call videobuf_reqbufs api */
1473 ret = videobuf_reqbufs(q, req);
1474 if (ret < 0)
1475 goto reqbuf_err;
1476
1477 vout->buffer_allocated = req->count;
dd880dd4 1478
5c7ab634
VH		 1479reqbuf_err:
1480 mutex_unlock(&vout->lock);
1481 return ret;
1482}
1483
1484static int vidioc_querybuf(struct file *file, void *fh,
1485 struct v4l2_buffer *b)
1486{
1487 struct omap_vout_device *vout = fh;
1488
1489 return videobuf_querybuf(&vout->vbq, b);
1490}
1491
1492static int vidioc_qbuf(struct file *file, void *fh,
1493 struct v4l2_buffer *buffer)
1494{
1495 struct omap_vout_device *vout = fh;
1496 struct videobuf_queue *q = &vout->vbq;
1497
1498 if ((V4L2_BUF_TYPE_VIDEO_OUTPUT != buffer->type) ||
1499 (buffer->index >= vout->buffer_allocated) ||
1500 (q->bufs[buffer->index]->memory != buffer->memory)) {
1501 return -EINVAL;
1502 }
1503 if (V4L2_MEMORY_USERPTR == buffer->memory) {
1504 if ((buffer->length < vout->pix.sizeimage) ||
1505 (0 == buffer->m.userptr)) {
1506 return -EINVAL;
1507 }
1508 }
1509
b366888a 1510 if ((is_rotation_enabled(vout)) &&
5c7ab634
VH		 1511 vout->vrfb_dma_tx.req_status == DMA_CHAN_NOT_ALLOTED) {
1512 v4l2_warn(&vout->vid_dev->v4l2_dev,
1513 "DMA Channel not allocated for Rotation\n");
1514 return -EINVAL;
1515 }
1516
1517 return videobuf_qbuf(q, buffer);
1518}
1519
1520static int vidioc_dqbuf(struct file *file, void *fh, struct v4l2_buffer *b)
1521{
1522 struct omap_vout_device *vout = fh;
1523 struct videobuf_queue *q = &vout->vbq;
1524
72915e85
AJ		 1525 int ret;
1526 u32 addr;
1527 unsigned long size;
1528 struct videobuf_buffer *vb;
1529
5c7ab634
VH		 1530 if (!vout->streaming)
1531 return -EINVAL;
1532
dd6e2a98
DC		 1533 ret = videobuf_dqbuf(q, b, !!(file->f_flags & O_NONBLOCK));
1534 if (ret)
1535 return ret;
1536
1537 vb = q->bufs[b->index];
72915e85
AJ		 1538
1539 addr = (unsigned long) vout->buf_phy_addr[vb->i];
1540 size = (unsigned long) vb->size;
1541 dma_unmap_single(vout->vid_dev->v4l2_dev.dev, addr,
1542 size, DMA_TO_DEVICE);
dd6e2a98 1543 return 0;
5c7ab634
VH		 1544}
1545
1546static int vidioc_streamon(struct file *file, void *fh, enum v4l2_buf_type i)
1547{
1548 int ret = 0, j;
1549 u32 addr = 0, mask = 0;
1550 struct omap_vout_device *vout = fh;
1551 struct videobuf_queue *q = &vout->vbq;
1552 struct omapvideo_info *ovid = &vout->vid_info;
1553
1554 mutex_lock(&vout->lock);
1555
1556 if (vout->streaming) {
1557 ret = -EBUSY;
1558 goto streamon_err;
1559 }
1560
1561 ret = videobuf_streamon(q);
1562 if (ret)
1563 goto streamon_err;
1564
1565 if (list_empty(&vout->dma_queue)) {
1566 ret = -EIO;
1567 goto streamon_err1;
1568 }
1569
1570 /* Get the next frame from the buffer queue */
1571 vout->next_frm = vout->cur_frm = list_entry(vout->dma_queue.next,
1572 struct videobuf_buffer, queue);
1573 /* Remove buffer from the buffer queue */
1574 list_del(&vout->cur_frm->queue);
1575 /* Mark state of the current frame to active */
1576 vout->cur_frm->state = VIDEOBUF_ACTIVE;
1577 /* Initialize field_id and started member */
1578 vout->field_id = 0;
1579
1580 /* set flag here. Next QBUF will start DMA */
160ac0ba 1581 vout->streaming = true;
5c7ab634
VH		 1582
1583 vout->first_int = 1;
1584
1585 if (omap_vout_calculate_offset(vout)) {
1586 ret = -EINVAL;
1587 goto streamon_err1;
1588 }
1589 addr = (unsigned long) vout->queued_buf_addr[vout->cur_frm->i]
1590 + vout->cropped_offset;
1591
5251dd6c
AJ		 1592 mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD
1593 | DISPC_IRQ_VSYNC2;
5c7ab634 1594
5c7ab634
VH		 1595 /* First save the configuration in ovelray structure */
1596 ret = omapvid_init(vout, addr);
15170025 1597 if (ret) {
5c7ab634
VH		 1598 v4l2_err(&vout->vid_dev->v4l2_dev,
1599 "failed to set overlay info\n");
15170025
FF		 1600 goto streamon_err1;
1601 }
1602
1603 omap_dispc_register_isr(omap_vout_isr, vout, mask);
1604
5c7ab634
VH		 1605 /* Enable the pipeline and set the Go bit */
1606 ret = omapvid_apply_changes(vout);
1607 if (ret)
1608 v4l2_err(&vout->vid_dev->v4l2_dev, "failed to change mode\n");
1609
aaa874a9
TV		 1610 for (j = 0; j < ovid->num_overlays; j++) {
1611 struct omap_overlay *ovl = ovid->overlays[j];
d629f03f 1612 struct omap_dss_device *dssdev = ovl->get_device(ovl);
aaa874a9 1613
d629f03f 1614 if (dssdev) {
aaa874a9
TV		 1615 ret = ovl->enable(ovl);
1616 if (ret)
1617 goto streamon_err1;
1618 }
1619 }
1620
5c7ab634
VH		 1621 ret = 0;
1622
1623streamon_err1:
1624 if (ret)
1625 ret = videobuf_streamoff(q);
1626streamon_err:
1627 mutex_unlock(&vout->lock);
1628 return ret;
1629}
1630
1631static int vidioc_streamoff(struct file *file, void *fh, enum v4l2_buf_type i)
1632{
1633 u32 mask = 0;
1634 int ret = 0, j;
1635 struct omap_vout_device *vout = fh;
1636 struct omapvideo_info *ovid = &vout->vid_info;
1637
1638 if (!vout->streaming)
1639 return -EINVAL;
1640
160ac0ba 1641 vout->streaming = false;
5251dd6c
AJ		 1642 mask = DISPC_IRQ_VSYNC | DISPC_IRQ_EVSYNC_EVEN | DISPC_IRQ_EVSYNC_ODD
1643 | DISPC_IRQ_VSYNC2;
5c7ab634
VH		 1644
1645 omap_dispc_unregister_isr(omap_vout_isr, vout, mask);
1646
1647 for (j = 0; j < ovid->num_overlays; j++) {
1648 struct omap_overlay *ovl = ovid->overlays[j];
d629f03f 1649 struct omap_dss_device *dssdev = ovl->get_device(ovl);
5c7ab634 1650
d629f03f 1651 if (dssdev)
aaa874a9 1652 ovl->disable(ovl);
5c7ab634
VH		 1653 }
1654
1655 /* Turn of the pipeline */
1656 ret = omapvid_apply_changes(vout);
1657 if (ret)
bc39030b
MCC		 1658 v4l2_err(&vout->vid_dev->v4l2_dev,
1659 "failed to change mode in streamoff\n");
5c7ab634
VH		 1660
1661 INIT_LIST_HEAD(&vout->dma_queue);
1662 ret = videobuf_streamoff(&vout->vbq);
1663
1664 return ret;
1665}
1666
1667static int vidioc_s_fbuf(struct file *file, void *fh,
e6eb28c2 1668 const struct v4l2_framebuffer *a)
5c7ab634
VH		 1669{
1670 int enable = 0;
1671 struct omap_overlay *ovl;
1672 struct omapvideo_info *ovid;
1673 struct omap_vout_device *vout = fh;
1674 struct omap_overlay_manager_info info;
1675 enum omap_dss_trans_key_type key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
1676
1677 ovid = &vout->vid_info;
1678 ovl = ovid->overlays[0];
1679
1680 /* OMAP DSS doesn't support Source and Destination color
1681 key together */
1682 if ((a->flags & V4L2_FBUF_FLAG_SRC_CHROMAKEY) &&
1683 (a->flags & V4L2_FBUF_FLAG_CHROMAKEY))
1684 return -EINVAL;
1685 /* OMAP DSS Doesn't support the Destination color key
1686 and alpha blending together */
1687 if ((a->flags & V4L2_FBUF_FLAG_CHROMAKEY) &&
1688 (a->flags & V4L2_FBUF_FLAG_LOCAL_ALPHA))
1689 return -EINVAL;
1690
1691 if ((a->flags & V4L2_FBUF_FLAG_SRC_CHROMAKEY)) {
1692 vout->fbuf.flags |= V4L2_FBUF_FLAG_SRC_CHROMAKEY;
1693 key_type = OMAP_DSS_COLOR_KEY_VID_SRC;
1694 } else
1695 vout->fbuf.flags &= ~V4L2_FBUF_FLAG_SRC_CHROMAKEY;
1696
1697 if ((a->flags & V4L2_FBUF_FLAG_CHROMAKEY)) {
1698 vout->fbuf.flags |= V4L2_FBUF_FLAG_CHROMAKEY;
1699 key_type = OMAP_DSS_COLOR_KEY_GFX_DST;
1700 } else
1701 vout->fbuf.flags &= ~V4L2_FBUF_FLAG_CHROMAKEY;
1702
1703 if (a->flags & (V4L2_FBUF_FLAG_CHROMAKEY |
1704 V4L2_FBUF_FLAG_SRC_CHROMAKEY))
1705 enable = 1;
1706 else
1707 enable = 0;
1708 if (ovl->manager && ovl->manager->get_manager_info &&
1709 ovl->manager->set_manager_info) {
1710
1711 ovl->manager->get_manager_info(ovl->manager, &info);
1712 info.trans_enabled = enable;
1713 info.trans_key_type = key_type;
1714 info.trans_key = vout->win.chromakey;
1715
1716 if (ovl->manager->set_manager_info(ovl->manager, &info))
1717 return -EINVAL;
1718 }
1719 if (a->flags & V4L2_FBUF_FLAG_LOCAL_ALPHA) {
1720 vout->fbuf.flags |= V4L2_FBUF_FLAG_LOCAL_ALPHA;
1721 enable = 1;
1722 } else {
1723 vout->fbuf.flags &= ~V4L2_FBUF_FLAG_LOCAL_ALPHA;
1724 enable = 0;
1725 }
1726 if (ovl->manager && ovl->manager->get_manager_info &&
1727 ovl->manager->set_manager_info) {
1728 ovl->manager->get_manager_info(ovl->manager, &info);
11354dd5
AT		 1729 /* enable this only if there is no zorder cap */
1730 if ((ovl->caps & OMAP_DSS_OVL_CAP_ZORDER) == 0)
1731 info.partial_alpha_enabled = enable;
5c7ab634
VH		 1732 if (ovl->manager->set_manager_info(ovl->manager, &info))
1733 return -EINVAL;
1734 }
1735
1736 return 0;
1737}
1738
1739static int vidioc_g_fbuf(struct file *file, void *fh,
1740 struct v4l2_framebuffer *a)
1741{
1742 struct omap_overlay *ovl;
1743 struct omapvideo_info *ovid;
1744 struct omap_vout_device *vout = fh;
1745 struct omap_overlay_manager_info info;
1746
1747 ovid = &vout->vid_info;
1748 ovl = ovid->overlays[0];
1749
047a01fd
HV		 1750 /* The video overlay must stay within the framebuffer and can't be
1751 positioned independently. */
1752 a->flags = V4L2_FBUF_FLAG_OVERLAY;
5c7ab634
VH		 1753 a->capability = V4L2_FBUF_CAP_LOCAL_ALPHA | V4L2_FBUF_CAP_CHROMAKEY
1754 | V4L2_FBUF_CAP_SRC_CHROMAKEY;
1755
1756 if (ovl->manager && ovl->manager->get_manager_info) {
1757 ovl->manager->get_manager_info(ovl->manager, &info);
1758 if (info.trans_key_type == OMAP_DSS_COLOR_KEY_VID_SRC)
1759 a->flags |= V4L2_FBUF_FLAG_SRC_CHROMAKEY;
1760 if (info.trans_key_type == OMAP_DSS_COLOR_KEY_GFX_DST)
1761 a->flags |= V4L2_FBUF_FLAG_CHROMAKEY;
1762 }
1763 if (ovl->manager && ovl->manager->get_manager_info) {
1764 ovl->manager->get_manager_info(ovl->manager, &info);
11354dd5 1765 if (info.partial_alpha_enabled)
5c7ab634
VH		 1766 a->flags |= V4L2_FBUF_FLAG_LOCAL_ALPHA;
1767 }
1768
1769 return 0;
1770}
1771
1772static const struct v4l2_ioctl_ops vout_ioctl_ops = {
6e6a8b5a
MCC		 1773 .vidioc_querycap = vidioc_querycap,
1774 .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
5c7ab634
VH		 1775 .vidioc_g_fmt_vid_out = vidioc_g_fmt_vid_out,
1776 .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
1777 .vidioc_s_fmt_vid_out = vidioc_s_fmt_vid_out,
5c7ab634
VH		 1778 .vidioc_s_fbuf = vidioc_s_fbuf,
1779 .vidioc_g_fbuf = vidioc_g_fbuf,
7b2607c9
LP		 1780 .vidioc_try_fmt_vid_out_overlay = vidioc_try_fmt_vid_overlay,
1781 .vidioc_s_fmt_vid_out_overlay = vidioc_s_fmt_vid_overlay,
1782 .vidioc_g_fmt_vid_out_overlay = vidioc_g_fmt_vid_overlay,
d1d09461
HV		 1783 .vidioc_g_selection = vidioc_g_selection,
1784 .vidioc_s_selection = vidioc_s_selection,
5c7ab634
VH		 1785 .vidioc_reqbufs = vidioc_reqbufs,
1786 .vidioc_querybuf = vidioc_querybuf,
1787 .vidioc_qbuf = vidioc_qbuf,
1788 .vidioc_dqbuf = vidioc_dqbuf,
1789 .vidioc_streamon = vidioc_streamon,
1790 .vidioc_streamoff = vidioc_streamoff,
1791};
1792
1793static const struct v4l2_file_operations omap_vout_fops = {
6e6a8b5a 1794 .owner = THIS_MODULE,
94f3f48f 1795 .poll = omap_vout_poll,
5c7ab634 1796 .unlocked_ioctl = video_ioctl2,
6e6a8b5a
MCC		 1797 .mmap = omap_vout_mmap,
1798 .open = omap_vout_open,
1799 .release = omap_vout_release,
5c7ab634
VH		 1800};
1801
1802/* Init functions used during driver initialization */
1803/* Initial setup of video_data */
1804static int __init omap_vout_setup_video_data(struct omap_vout_device *vout)
1805{
1806 struct video_device *vfd;
1807 struct v4l2_pix_format *pix;
d629f03f
AT		 1808 struct omap_overlay *ovl = vout->vid_info.overlays[0];
1809 struct omap_dss_device *display = ovl->get_device(ovl);
77430f03 1810 struct v4l2_ctrl_handler *hdl;
5c7ab634
VH		 1811
1812 /* set the default pix */
1813 pix = &vout->pix;
1814
1815 /* Set the default picture of QVGA */
1816 pix->width = QQVGA_WIDTH;
1817 pix->height = QQVGA_HEIGHT;
1818
1819 /* Default pixel format is RGB 5-6-5 */
1820 pix->pixelformat = V4L2_PIX_FMT_RGB565;
1821 pix->field = V4L2_FIELD_ANY;
1822 pix->bytesperline = pix->width * 2;
1823 pix->sizeimage = pix->bytesperline * pix->height;
5c7ab634
VH		 1824 pix->colorspace = V4L2_COLORSPACE_JPEG;
1825
1826 vout->bpp = RGB565_BPP;
1827 vout->fbuf.fmt.width = display->panel.timings.x_res;
1828 vout->fbuf.fmt.height = display->panel.timings.y_res;
1829
1830 /* Set the data structures for the overlay parameters*/
1831 vout->win.global_alpha = 255;
1832 vout->fbuf.flags = 0;
1833 vout->fbuf.capability = V4L2_FBUF_CAP_LOCAL_ALPHA |
1834 V4L2_FBUF_CAP_SRC_CHROMAKEY | V4L2_FBUF_CAP_CHROMAKEY;
1835 vout->win.chromakey = 0;
1836
1837 omap_vout_new_format(pix, &vout->fbuf, &vout->crop, &vout->win);
1838
77430f03
HV		 1839 hdl = &vout->ctrl_handler;
1840 v4l2_ctrl_handler_init(hdl, 3);
1841 v4l2_ctrl_new_std(hdl, &omap_vout_ctrl_ops,
1842 V4L2_CID_ROTATE, 0, 270, 90, 0);
1843 v4l2_ctrl_new_std(hdl, &omap_vout_ctrl_ops,
1844 V4L2_CID_BG_COLOR, 0, 0xffffff, 1, 0);
1845 v4l2_ctrl_new_std(hdl, &omap_vout_ctrl_ops,
1846 V4L2_CID_VFLIP, 0, 1, 1, 0);
1847 if (hdl->error)
1848 return hdl->error;
1849
5c7ab634 1850 vout->rotation = 0;
160ac0ba 1851 vout->mirror = false;
445e258f
AT		 1852 if (vout->vid_info.rotation_type == VOUT_ROT_VRFB)
1853 vout->vrfb_bpp = 2;
5c7ab634 1854
5c7ab634
VH		 1855 /* initialize the video_device struct */
1856 vfd = vout->vfd = video_device_alloc();
1857
1858 if (!vfd) {
bc39030b
MCC		 1859 printk(KERN_ERR VOUT_NAME
1860 ": could not allocate video device struct\n");
77430f03 1861 v4l2_ctrl_handler_free(hdl);
5c7ab634
VH		 1862 return -ENOMEM;
1863 }
77430f03 1864 vfd->ctrl_handler = hdl;
5c7ab634
VH		 1865 vfd->release = video_device_release;
1866 vfd->ioctl_ops = &vout_ioctl_ops;
1867
c0decac1 1868 strscpy(vfd->name, VOUT_NAME, sizeof(vfd->name));
5c7ab634 1869
5c7ab634
VH		 1870 vfd->fops = &omap_vout_fops;
1871 vfd->v4l2_dev = &vout->vid_dev->v4l2_dev;
954f340f 1872 vfd->vfl_dir = VFL_DIR_TX;
5c7ab634
VH		 1873 mutex_init(&vout->lock);
1874
1875 vfd->minor = -1;
1876 return 0;
1877
1878}
1879
1880/* Setup video buffers */
1881static int __init omap_vout_setup_video_bufs(struct platform_device *pdev,
1882 int vid_num)
1883{
1884 u32 numbuffers;
445e258f
AT		 1885 int ret = 0, i;
1886 struct omapvideo_info *ovid;
5c7ab634 1887 struct omap_vout_device *vout;
5c7ab634
VH		 1888 struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev);
1889 struct omap2video_device *vid_dev =
1890 container_of(v4l2_dev, struct omap2video_device, v4l2_dev);
1891
1892 vout = vid_dev->vouts[vid_num];
445e258f 1893 ovid = &vout->vid_info;
5c7ab634
VH		 1894
1895 numbuffers = (vid_num == 0) ? video1_numbuffers : video2_numbuffers;
1896 vout->buffer_size = (vid_num == 0) ? video1_bufsize : video2_bufsize;
1897 dev_info(&pdev->dev, "Buffer Size = %d\n", vout->buffer_size);
1898
1899 for (i = 0; i < numbuffers; i++) {
1900 vout->buf_virt_addr[i] =
1901 omap_vout_alloc_buffer(vout->buffer_size,
1902 (u32 *) &vout->buf_phy_addr[i]);
1903 if (!vout->buf_virt_addr[i]) {
1904 numbuffers = i;
1905 ret = -ENOMEM;
1906 goto free_buffers;
1907 }
1908 }
1909
5c7ab634
VH		 1910 vout->cropped_offset = 0;
1911
445e258f 1912 if (ovid->rotation_type == VOUT_ROT_VRFB) {
ac0b2b30 1913 bool static_vrfb_allocation = (vid_num == 0) ?
445e258f
AT		 1914 vid1_static_vrfb_alloc : vid2_static_vrfb_alloc;
1915 ret = omap_vout_setup_vrfb_bufs(pdev, vid_num,
1916 static_vrfb_allocation);
5c7ab634 1917 }
5c7ab634 1918
445e258f 1919 return ret;
5c7ab634
VH		 1920
1921free_buffers:
1922 for (i = 0; i < numbuffers; i++) {
1923 omap_vout_free_buffer(vout->buf_virt_addr[i],
1924 vout->buffer_size);
1925 vout->buf_virt_addr[i] = 0;
1926 vout->buf_phy_addr[i] = 0;
1927 }
1928 return ret;
1929
1930}
1931
1932/* Create video out devices */
1933static int __init omap_vout_create_video_devices(struct platform_device *pdev)
1934{
1935 int ret = 0, k;
1936 struct omap_vout_device *vout;
1937 struct video_device *vfd = NULL;
1938 struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev);
1939 struct omap2video_device *vid_dev = container_of(v4l2_dev,
1940 struct omap2video_device, v4l2_dev);
1941
1942 for (k = 0; k < pdev->num_resources; k++) {
1943
2ef17c9f 1944 vout = kzalloc(sizeof(struct omap_vout_device), GFP_KERNEL);
5c7ab634
VH		 1945 if (!vout) {
1946 dev_err(&pdev->dev, ": could not allocate memory\n");
1947 return -ENOMEM;
1948 }
5c7ab634
VH		 1949
1950 vout->vid = k;
1951 vid_dev->vouts[k] = vout;
1952 vout->vid_dev = vid_dev;
1953 /* Select video2 if only 1 overlay is controlled by V4L2 */
1954 if (pdev->num_resources == 1)
1955 vout->vid_info.overlays[0] = vid_dev->overlays[k + 2];
1956 else
1957 /* Else select video1 and video2 one by one. */
1958 vout->vid_info.overlays[0] = vid_dev->overlays[k + 1];
1959 vout->vid_info.num_overlays = 1;
1960 vout->vid_info.id = k + 1;
1961
445e258f 1962 /* Set VRFB as rotation_type for omap2 and omap3 */
950e2fb4 1963 if (omap_vout_dss_omap24xx() || omap_vout_dss_omap34xx())
445e258f
AT		 1964 vout->vid_info.rotation_type = VOUT_ROT_VRFB;
1965
5c7ab634
VH		 1966 /* Setup the default configuration for the video devices
1967 */
1968 if (omap_vout_setup_video_data(vout) != 0) {
1969 ret = -ENOMEM;
1970 goto error;
1971 }
1972
1973 /* Allocate default number of buffers for the video streaming
1974 * and reserve the VRFB space for rotation
1975 */
1976 if (omap_vout_setup_video_bufs(pdev, k) != 0) {
1977 ret = -ENOMEM;
1978 goto error1;
1979 }
1980
1981 /* Register the Video device with V4L2
1982 */
1983 vfd = vout->vfd;
8f3a307b 1984 if (video_register_device(vfd, VFL_TYPE_GRABBER, -1) < 0) {
bc39030b
MCC		 1985 dev_err(&pdev->dev,
1986 ": Could not register Video for Linux device\n");
5c7ab634
VH		 1987 vfd->minor = -1;
1988 ret = -ENODEV;
1989 goto error2;
1990 }
1991 video_set_drvdata(vfd, vout);
1992
bc39030b
MCC		 1993 dev_info(&pdev->dev,
1994 ": registered and initialized video device %d\n",
1995 vfd->minor);
32d640de
AT		 1996 if (k == (pdev->num_resources - 1))
1997 return 0;
5c7ab634 1998
32d640de 1999 continue;
5c7ab634 2000error2:
445e258f
AT		 2001 if (vout->vid_info.rotation_type == VOUT_ROT_VRFB)
2002 omap_vout_release_vrfb(vout);
5c7ab634
VH		 2003 omap_vout_free_buffers(vout);
2004error1:
2005 video_device_release(vfd);
2006error:
2007 kfree(vout);
2008 return ret;
5c7ab634
VH		 2009 }
2010
2011 return -ENODEV;
2012}
2013/* Driver functions */
2014static void omap_vout_cleanup_device(struct omap_vout_device *vout)
2015{
2016 struct video_device *vfd;
445e258f 2017 struct omapvideo_info *ovid;
5c7ab634
VH		 2018
2019 if (!vout)
2020 return;
2021
2022 vfd = vout->vfd;
445e258f 2023 ovid = &vout->vid_info;
5c7ab634
VH		 2024 if (vfd) {
2025 if (!video_is_registered(vfd)) {
2026 /*
2027 * The device was never registered, so release the
2028 * video_device struct directly.
2029 */
2030 video_device_release(vfd);
2031 } else {
2032 /*
2033 * The unregister function will release the video_device
2034 * struct as well as unregistering it.
2035 */
2036 video_unregister_device(vfd);
2037 }
2038 }
77430f03 2039 v4l2_ctrl_handler_free(&vout->ctrl_handler);
445e258f
AT		 2040 if (ovid->rotation_type == VOUT_ROT_VRFB) {
2041 omap_vout_release_vrfb(vout);
2042 /* Free the VRFB buffer if allocated
2043 * init time
2044 */
2045 if (vout->vrfb_static_allocation)
2046 omap_vout_free_vrfb_buffers(vout);
2047 }
5c7ab634 2048 omap_vout_free_buffers(vout);
5c7ab634
VH		 2049
2050 kfree(vout);
2051}
2052
2053static int omap_vout_remove(struct platform_device *pdev)
2054{
2055 int k;
2056 struct v4l2_device *v4l2_dev = platform_get_drvdata(pdev);
2057 struct omap2video_device *vid_dev = container_of(v4l2_dev, struct
2058 omap2video_device, v4l2_dev);
2059
2060 v4l2_device_unregister(v4l2_dev);
2061 for (k = 0; k < pdev->num_resources; k++)
2062 omap_vout_cleanup_device(vid_dev->vouts[k]);
2063
2064 for (k = 0; k < vid_dev->num_displays; k++) {
2065 if (vid_dev->displays[k]->state != OMAP_DSS_DISPLAY_DISABLED)
5ba9bb0e 2066 vid_dev->displays[k]->driver->disable(vid_dev->displays[k]);
5c7ab634
VH		 2067
2068 omap_dss_put_device(vid_dev->displays[k]);
2069 }
2070 kfree(vid_dev);
2071 return 0;
2072}
2073
2074static int __init omap_vout_probe(struct platform_device *pdev)
2075{
2076 int ret = 0, i;
2077 struct omap_overlay *ovl;
2078 struct omap_dss_device *dssdev = NULL;
2079 struct omap_dss_device *def_display;
2080 struct omap2video_device *vid_dev = NULL;
2081
591a0ac7
TV		 2082 if (omapdss_is_initialized() == false)
2083 return -EPROBE_DEFER;
2084
a9ee9f08
TV		 2085 ret = omapdss_compat_init();
2086 if (ret) {
2087 dev_err(&pdev->dev, "failed to init dss\n");
2088 return ret;
2089 }
2090
5c7ab634
VH		 2091 if (pdev->num_resources == 0) {
2092 dev_err(&pdev->dev, "probed for an unknown device\n");
a9ee9f08
TV		 2093 ret = -ENODEV;
2094 goto err_dss_init;
5c7ab634
VH		 2095 }
2096
2097 vid_dev = kzalloc(sizeof(struct omap2video_device), GFP_KERNEL);
a9ee9f08
TV		 2098 if (vid_dev == NULL) {
2099 ret = -ENOMEM;
2100 goto err_dss_init;
2101 }
5c7ab634
VH		 2102
2103 vid_dev->num_displays = 0;
2104 for_each_dss_dev(dssdev) {
2105 omap_dss_get_device(dssdev);
71c7a972
TV		 2106
2107 if (!dssdev->driver) {
2108 dev_warn(&pdev->dev, "no driver for display: %s\n",
2109 dssdev->name);
2110 omap_dss_put_device(dssdev);
2111 continue;
2112 }
2113
5c7ab634
VH		 2114 vid_dev->displays[vid_dev->num_displays++] = dssdev;
2115 }
2116
2117 if (vid_dev->num_displays == 0) {
2118 dev_err(&pdev->dev, "no displays\n");
2119 ret = -EINVAL;
2120 goto probe_err0;
2121 }
2122
2123 vid_dev->num_overlays = omap_dss_get_num_overlays();
2124 for (i = 0; i < vid_dev->num_overlays; i++)
2125 vid_dev->overlays[i] = omap_dss_get_overlay(i);
2126
2127 vid_dev->num_managers = omap_dss_get_num_overlay_managers();
2128 for (i = 0; i < vid_dev->num_managers; i++)
2129 vid_dev->managers[i] = omap_dss_get_overlay_manager(i);
2130
2131 /* Get the Video1 overlay and video2 overlay.
2132 * Setup the Display attached to that overlays
2133 */
2134 for (i = 1; i < vid_dev->num_overlays; i++) {
2135 ovl = omap_dss_get_overlay(i);
d629f03f
AT		 2136 dssdev = ovl->get_device(ovl);
2137
2138 if (dssdev) {
2139 def_display = dssdev;
5c7ab634
VH		 2140 } else {
2141 dev_warn(&pdev->dev, "cannot find display\n");
2142 def_display = NULL;
2143 }
2144 if (def_display) {
5ba9bb0e
VH		 2145 struct omap_dss_driver *dssdrv = def_display->driver;
2146
2147 ret = dssdrv->enable(def_display);
5c7ab634
VH		 2148 if (ret) {
2149 /* Here we are not considering a error
2150 * as display may be enabled by frame
2151 * buffer driver
2152 */
2153 dev_warn(&pdev->dev,
2154 "'%s' Display already enabled\n",
2155 def_display->name);
2156 }
5c7ab634
VH		 2157 }
2158 }
2159
2160 if (v4l2_device_register(&pdev->dev, &vid_dev->v4l2_dev) < 0) {
2161 dev_err(&pdev->dev, "v4l2_device_register failed\n");
2162 ret = -ENODEV;
2163 goto probe_err1;
2164 }
2165
2166 ret = omap_vout_create_video_devices(pdev);
2167 if (ret)
2168 goto probe_err2;
2169
2170 for (i = 0; i < vid_dev->num_displays; i++) {
2171 struct omap_dss_device *display = vid_dev->displays[i];
2172
5ba9bb0e
VH		 2173 if (display->driver->update)
2174 display->driver->update(display, 0, 0,
5c7ab634
VH		 2175 display->panel.timings.x_res,
2176 display->panel.timings.y_res);
2177 }
2178 return 0;
2179
2180probe_err2:
2181 v4l2_device_unregister(&vid_dev->v4l2_dev);
2182probe_err1:
2183 for (i = 1; i < vid_dev->num_overlays; i++) {
2184 def_display = NULL;
2185 ovl = omap_dss_get_overlay(i);
d629f03f
AT		 2186 dssdev = ovl->get_device(ovl);
2187
2188 if (dssdev)
2189 def_display = dssdev;
5c7ab634 2190
5ba9bb0e
VH		 2191 if (def_display && def_display->driver)
2192 def_display->driver->disable(def_display);
5c7ab634
VH		 2193 }
2194probe_err0:
2195 kfree(vid_dev);
a9ee9f08
TV		 2196err_dss_init:
2197 omapdss_compat_uninit();
5c7ab634
VH		 2198 return ret;
2199}
2200
2201static struct platform_driver omap_vout_driver = {
2202 .driver = {
2203 .name = VOUT_NAME,
2204 },
5c7ab634
VH		 2205 .remove = omap_vout_remove,
2206};
2207
2208static int __init omap_vout_init(void)
2209{
93596ef7 2210 if (platform_driver_probe(&omap_vout_driver, omap_vout_probe) != 0) {
5c7ab634
VH		 2211 printk(KERN_ERR VOUT_NAME ":Could not register Video driver\n");
2212 return -EINVAL;
2213 }
2214 return 0;
2215}
2216
2217static void omap_vout_cleanup(void)
2218{
2219 platform_driver_unregister(&omap_vout_driver);
2220}
2221
2222late_initcall(omap_vout_init);
2223module_exit(omap_vout_cleanup);
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