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1517b039
TS
1/*
2 * vsp1_dl.h -- R-Car VSP1 Display List
3 *
4 * Copyright (C) 2015 Renesas Corporation
5 *
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/device.h>
15#include <linux/dma-mapping.h>
16#include <linux/gfp.h>
17#include <linux/slab.h>
9489a8ff 18#include <linux/workqueue.h>
1517b039
TS
19
20#include "vsp1.h"
21#include "vsp1_dl.h"
1517b039 22
f81e83c4 23#define VSP1_DL_NUM_ENTRIES 256
1517b039 24
12161989
LP
25#define VSP1_DLH_INT_ENABLE (1 << 1)
26#define VSP1_DLH_AUTO_START (1 << 0)
27
f81e83c4
LP
28struct vsp1_dl_header_list {
29 u32 num_bytes;
30 u32 addr;
31} __attribute__((__packed__));
32
12161989
LP
33struct vsp1_dl_header {
34 u32 num_lists;
f81e83c4 35 struct vsp1_dl_header_list lists[8];
12161989
LP
36 u32 next_header;
37 u32 flags;
38} __attribute__((__packed__));
39
1517b039
TS
40struct vsp1_dl_entry {
41 u32 addr;
42 u32 data;
43} __attribute__((__packed__));
44
f81e83c4
LP
45/**
46 * struct vsp1_dl_body - Display list body
47 * @list: entry in the display list list of bodies
48 * @vsp1: the VSP1 device
49 * @entries: array of entries
50 * @dma: DMA address of the entries
51 * @size: size of the DMA memory in bytes
52 * @num_entries: number of stored entries
53 */
54struct vsp1_dl_body {
c2dd2513 55 struct list_head list;
f81e83c4
LP
56 struct vsp1_device *vsp1;
57
58 struct vsp1_dl_entry *entries;
59 dma_addr_t dma;
60 size_t size;
61
62 unsigned int num_entries;
63};
1517b039 64
f81e83c4
LP
65/**
66 * struct vsp1_dl_list - Display list
67 * @list: entry in the display list manager lists
68 * @dlm: the display list manager
69 * @header: display list header, NULL for headerless lists
70 * @dma: DMA address for the header
71 * @body0: first display list body
72 * @fragments: list of extra display list bodies
76e48896 73 * @chain: entry in the display list partition chain
f81e83c4
LP
74 */
75struct vsp1_dl_list {
76 struct list_head list;
c2dd2513 77 struct vsp1_dl_manager *dlm;
1517b039 78
12161989 79 struct vsp1_dl_header *header;
1517b039 80 dma_addr_t dma;
1517b039 81
f81e83c4
LP
82 struct vsp1_dl_body body0;
83 struct list_head fragments;
76e48896
KB
84
85 bool has_chain;
86 struct list_head chain;
1517b039
TS
87};
88
12161989
LP
89enum vsp1_dl_mode {
90 VSP1_DL_MODE_HEADER,
91 VSP1_DL_MODE_HEADERLESS,
92};
93
ef9621bc
LP
94/**
95 * struct vsp1_dl_manager - Display List manager
12161989
LP
96 * @index: index of the related WPF
97 * @mode: display list operation mode (header or headerless)
ef9621bc 98 * @vsp1: the VSP1 device
9489a8ff 99 * @lock: protects the free, active, queued, pending and gc_fragments lists
ef9621bc
LP
100 * @free: array of all free display lists
101 * @active: list currently being processed (loaded) by hardware
102 * @queued: list queued to the hardware (written to the DL registers)
103 * @pending: list waiting to be queued to the hardware
9489a8ff
LP
104 * @gc_work: fragments garbage collector work struct
105 * @gc_fragments: array of display list fragments waiting to be freed
ef9621bc
LP
106 */
107struct vsp1_dl_manager {
12161989
LP
108 unsigned int index;
109 enum vsp1_dl_mode mode;
ef9621bc
LP
110 struct vsp1_device *vsp1;
111
112 spinlock_t lock;
113 struct list_head free;
114 struct vsp1_dl_list *active;
115 struct vsp1_dl_list *queued;
116 struct vsp1_dl_list *pending;
9489a8ff
LP
117
118 struct work_struct gc_work;
119 struct list_head gc_fragments;
ef9621bc
LP
120};
121
f81e83c4
LP
122/* -----------------------------------------------------------------------------
123 * Display List Body Management
124 */
125
126/*
127 * Initialize a display list body object and allocate DMA memory for the body
128 * data. The display list body object is expected to have been initialized to
129 * 0 when allocated.
130 */
131static int vsp1_dl_body_init(struct vsp1_device *vsp1,
132 struct vsp1_dl_body *dlb, unsigned int num_entries,
133 size_t extra_size)
134{
135 size_t size = num_entries * sizeof(*dlb->entries) + extra_size;
136
137 dlb->vsp1 = vsp1;
138 dlb->size = size;
139
140 dlb->entries = dma_alloc_wc(vsp1->dev, dlb->size, &dlb->dma,
141 GFP_KERNEL);
142 if (!dlb->entries)
143 return -ENOMEM;
144
145 return 0;
146}
147
148/*
149 * Cleanup a display list body and free allocated DMA memory allocated.
150 */
151static void vsp1_dl_body_cleanup(struct vsp1_dl_body *dlb)
152{
153 dma_free_wc(dlb->vsp1->dev, dlb->size, dlb->entries, dlb->dma);
154}
155
156/**
157 * vsp1_dl_fragment_alloc - Allocate a display list fragment
158 * @vsp1: The VSP1 device
159 * @num_entries: The maximum number of entries that the fragment can contain
160 *
161 * Allocate a display list fragment with enough memory to contain the requested
162 * number of entries.
163 *
164 * Return a pointer to a fragment on success or NULL if memory can't be
165 * allocated.
166 */
167struct vsp1_dl_body *vsp1_dl_fragment_alloc(struct vsp1_device *vsp1,
168 unsigned int num_entries)
169{
170 struct vsp1_dl_body *dlb;
171 int ret;
172
173 dlb = kzalloc(sizeof(*dlb), GFP_KERNEL);
174 if (!dlb)
175 return NULL;
176
177 ret = vsp1_dl_body_init(vsp1, dlb, num_entries, 0);
178 if (ret < 0) {
179 kfree(dlb);
180 return NULL;
181 }
182
183 return dlb;
184}
185
186/**
187 * vsp1_dl_fragment_free - Free a display list fragment
188 * @dlb: The fragment
189 *
190 * Free the given display list fragment and the associated DMA memory.
191 *
192 * Fragments must only be freed explicitly if they are not added to a display
193 * list, as the display list will take ownership of them and free them
194 * otherwise. Manual free typically happens at cleanup time for fragments that
195 * have been allocated but not used.
196 *
197 * Passing a NULL pointer to this function is safe, in that case no operation
198 * will be performed.
199 */
200void vsp1_dl_fragment_free(struct vsp1_dl_body *dlb)
201{
202 if (!dlb)
203 return;
204
205 vsp1_dl_body_cleanup(dlb);
206 kfree(dlb);
207}
208
209/**
210 * vsp1_dl_fragment_write - Write a register to a display list fragment
211 * @dlb: The fragment
212 * @reg: The register address
213 * @data: The register value
214 *
215 * Write the given register and value to the display list fragment. The maximum
216 * number of entries that can be written in a fragment is specified when the
217 * fragment is allocated by vsp1_dl_fragment_alloc().
218 */
219void vsp1_dl_fragment_write(struct vsp1_dl_body *dlb, u32 reg, u32 data)
220{
221 dlb->entries[dlb->num_entries].addr = reg;
222 dlb->entries[dlb->num_entries].data = data;
223 dlb->num_entries++;
224}
225
1517b039
TS
226/* -----------------------------------------------------------------------------
227 * Display List Transaction Management
228 */
229
c2dd2513 230static struct vsp1_dl_list *vsp1_dl_list_alloc(struct vsp1_dl_manager *dlm)
1517b039 231{
c2dd2513 232 struct vsp1_dl_list *dl;
12161989 233 size_t header_size;
f81e83c4 234 int ret;
1517b039 235
c2dd2513
LP
236 dl = kzalloc(sizeof(*dl), GFP_KERNEL);
237 if (!dl)
238 return NULL;
1517b039 239
f81e83c4 240 INIT_LIST_HEAD(&dl->fragments);
c2dd2513 241 dl->dlm = dlm;
c2dd2513 242
9dbed95b
LP
243 /*
244 * Initialize the display list body and allocate DMA memory for the body
f81e83c4
LP
245 * and the optional header. Both are allocated together to avoid memory
246 * fragmentation, with the header located right after the body in
247 * memory.
248 */
249 header_size = dlm->mode == VSP1_DL_MODE_HEADER
250 ? ALIGN(sizeof(struct vsp1_dl_header), 8)
251 : 0;
252
253 ret = vsp1_dl_body_init(dlm->vsp1, &dl->body0, VSP1_DL_NUM_ENTRIES,
254 header_size);
255 if (ret < 0) {
c2dd2513
LP
256 kfree(dl);
257 return NULL;
258 }
1517b039 259
12161989 260 if (dlm->mode == VSP1_DL_MODE_HEADER) {
f81e83c4
LP
261 size_t header_offset = VSP1_DL_NUM_ENTRIES
262 * sizeof(*dl->body0.entries);
263
264 dl->header = ((void *)dl->body0.entries) + header_offset;
265 dl->dma = dl->body0.dma + header_offset;
266
12161989 267 memset(dl->header, 0, sizeof(*dl->header));
f81e83c4 268 dl->header->lists[0].addr = dl->body0.dma;
12161989
LP
269 }
270
c2dd2513
LP
271 return dl;
272}
1517b039 273
c2dd2513
LP
274static void vsp1_dl_list_free(struct vsp1_dl_list *dl)
275{
f81e83c4 276 vsp1_dl_body_cleanup(&dl->body0);
9489a8ff 277 list_splice_init(&dl->fragments, &dl->dlm->gc_fragments);
c2dd2513 278 kfree(dl);
1517b039
TS
279}
280
c2dd2513
LP
281/**
282 * vsp1_dl_list_get - Get a free display list
283 * @dlm: The display list manager
284 *
285 * Get a display list from the pool of free lists and return it.
286 *
287 * This function must be called without the display list manager lock held.
288 */
289struct vsp1_dl_list *vsp1_dl_list_get(struct vsp1_dl_manager *dlm)
1517b039 290{
c2dd2513 291 struct vsp1_dl_list *dl = NULL;
1517b039 292 unsigned long flags;
1517b039 293
c2dd2513 294 spin_lock_irqsave(&dlm->lock, flags);
1517b039 295
c2dd2513
LP
296 if (!list_empty(&dlm->free)) {
297 dl = list_first_entry(&dlm->free, struct vsp1_dl_list, list);
298 list_del(&dl->list);
76e48896 299
b6187392
MCC
300 /*
301 * The display list chain must be initialised to ensure every
76e48896
KB
302 * display list can assert list_empty() if it is not in a chain.
303 */
304 INIT_LIST_HEAD(&dl->chain);
1517b039
TS
305 }
306
c2dd2513
LP
307 spin_unlock_irqrestore(&dlm->lock, flags);
308
309 return dl;
310}
1517b039 311
d2c1b028
LP
312/* This function must be called with the display list manager lock held.*/
313static void __vsp1_dl_list_put(struct vsp1_dl_list *dl)
314{
76e48896
KB
315 struct vsp1_dl_list *dl_child;
316
d2c1b028
LP
317 if (!dl)
318 return;
319
b6187392
MCC
320 /*
321 * Release any linked display-lists which were chained for a single
76e48896
KB
322 * hardware operation.
323 */
324 if (dl->has_chain) {
325 list_for_each_entry(dl_child, &dl->chain, chain)
326 __vsp1_dl_list_put(dl_child);
327 }
328
329 dl->has_chain = false;
330
b6187392
MCC
331 /*
332 * We can't free fragments here as DMA memory can only be freed in
9489a8ff
LP
333 * interruptible context. Move all fragments to the display list
334 * manager's list of fragments to be freed, they will be
335 * garbage-collected by the work queue.
336 */
337 if (!list_empty(&dl->fragments)) {
338 list_splice_init(&dl->fragments, &dl->dlm->gc_fragments);
339 schedule_work(&dl->dlm->gc_work);
340 }
341
f81e83c4 342 dl->body0.num_entries = 0;
d2c1b028
LP
343
344 list_add_tail(&dl->list, &dl->dlm->free);
345}
346
c2dd2513
LP
347/**
348 * vsp1_dl_list_put - Release a display list
349 * @dl: The display list
350 *
351 * Release the display list and return it to the pool of free lists.
352 *
c2dd2513
LP
353 * Passing a NULL pointer to this function is safe, in that case no operation
354 * will be performed.
355 */
356void vsp1_dl_list_put(struct vsp1_dl_list *dl)
357{
d2c1b028
LP
358 unsigned long flags;
359
c2dd2513
LP
360 if (!dl)
361 return;
1517b039 362
d2c1b028
LP
363 spin_lock_irqsave(&dl->dlm->lock, flags);
364 __vsp1_dl_list_put(dl);
365 spin_unlock_irqrestore(&dl->dlm->lock, flags);
1517b039
TS
366}
367
f81e83c4
LP
368/**
369 * vsp1_dl_list_write - Write a register to the display list
370 * @dl: The display list
371 * @reg: The register address
372 * @data: The register value
373 *
374 * Write the given register and value to the display list. Up to 256 registers
375 * can be written per display list.
376 */
c2dd2513 377void vsp1_dl_list_write(struct vsp1_dl_list *dl, u32 reg, u32 data)
1517b039 378{
f81e83c4
LP
379 vsp1_dl_fragment_write(&dl->body0, reg, data);
380}
381
382/**
383 * vsp1_dl_list_add_fragment - Add a fragment to the display list
384 * @dl: The display list
385 * @dlb: The fragment
386 *
387 * Add a display list body as a fragment to a display list. Registers contained
388 * in fragments are processed after registers contained in the main display
389 * list, in the order in which fragments are added.
390 *
391 * Adding a fragment to a display list passes ownership of the fragment to the
392 * list. The caller must not touch the fragment after this call, and must not
393 * free it explicitly with vsp1_dl_fragment_free().
394 *
395 * Fragments are only usable for display lists in header mode. Attempt to
396 * add a fragment to a header-less display list will return an error.
397 */
398int vsp1_dl_list_add_fragment(struct vsp1_dl_list *dl,
399 struct vsp1_dl_body *dlb)
400{
401 /* Multi-body lists are only available in header mode. */
402 if (dl->dlm->mode != VSP1_DL_MODE_HEADER)
403 return -EINVAL;
404
405 list_add_tail(&dlb->list, &dl->fragments);
406 return 0;
1517b039
TS
407}
408
76e48896
KB
409/**
410 * vsp1_dl_list_add_chain - Add a display list to a chain
411 * @head: The head display list
412 * @dl: The new display list
413 *
414 * Add a display list to an existing display list chain. The chained lists
415 * will be automatically processed by the hardware without intervention from
416 * the CPU. A display list end interrupt will only complete after the last
417 * display list in the chain has completed processing.
418 *
419 * Adding a display list to a chain passes ownership of the display list to
420 * the head display list item. The chain is released when the head dl item is
421 * put back with __vsp1_dl_list_put().
422 *
423 * Chained display lists are only usable in header mode. Attempts to add a
424 * display list to a chain in header-less mode will return an error.
425 */
426int vsp1_dl_list_add_chain(struct vsp1_dl_list *head,
427 struct vsp1_dl_list *dl)
428{
429 /* Chained lists are only available in header mode. */
430 if (head->dlm->mode != VSP1_DL_MODE_HEADER)
431 return -EINVAL;
432
433 head->has_chain = true;
434 list_add_tail(&dl->chain, &head->chain);
435 return 0;
436}
437
438static void vsp1_dl_list_fill_header(struct vsp1_dl_list *dl, bool is_last)
439{
440 struct vsp1_dl_header_list *hdr = dl->header->lists;
441 struct vsp1_dl_body *dlb;
442 unsigned int num_lists = 0;
443
b6187392
MCC
444 /*
445 * Fill the header with the display list bodies addresses and sizes. The
76e48896
KB
446 * address of the first body has already been filled when the display
447 * list was allocated.
448 */
449
450 hdr->num_bytes = dl->body0.num_entries
451 * sizeof(*dl->header->lists);
452
453 list_for_each_entry(dlb, &dl->fragments, list) {
454 num_lists++;
455 hdr++;
456
457 hdr->addr = dlb->dma;
458 hdr->num_bytes = dlb->num_entries
459 * sizeof(*dl->header->lists);
460 }
461
462 dl->header->num_lists = num_lists;
463
b6187392
MCC
464 /*
465 * If this display list's chain is not empty, we are on a list, where
76e48896
KB
466 * the next item in the list is the display list entity which should be
467 * automatically queued by the hardware.
468 */
469 if (!list_empty(&dl->chain) && !is_last) {
470 struct vsp1_dl_list *next = list_next_entry(dl, chain);
471
472 dl->header->next_header = next->dma;
473 dl->header->flags = VSP1_DLH_AUTO_START;
474 } else {
475 dl->header->flags = VSP1_DLH_INT_ENABLE;
476 }
477}
478
c2dd2513 479void vsp1_dl_list_commit(struct vsp1_dl_list *dl)
1517b039 480{
c2dd2513
LP
481 struct vsp1_dl_manager *dlm = dl->dlm;
482 struct vsp1_device *vsp1 = dlm->vsp1;
1517b039
TS
483 unsigned long flags;
484 bool update;
485
c2dd2513 486 spin_lock_irqsave(&dlm->lock, flags);
1517b039 487
12161989 488 if (dl->dlm->mode == VSP1_DL_MODE_HEADER) {
76e48896
KB
489 struct vsp1_dl_list *dl_child;
490
b6187392
MCC
491 /*
492 * In header mode the caller guarantees that the hardware is
f81e83c4 493 * idle at this point.
12161989 494 */
f81e83c4 495
76e48896
KB
496 /* Fill the header for the head and chained display lists. */
497 vsp1_dl_list_fill_header(dl, list_empty(&dl->chain));
f81e83c4 498
76e48896
KB
499 list_for_each_entry(dl_child, &dl->chain, chain) {
500 bool last = list_is_last(&dl_child->chain, &dl->chain);
501
502 vsp1_dl_list_fill_header(dl_child, last);
f81e83c4
LP
503 }
504
b6187392
MCC
505 /*
506 * Commit the head display list to hardware. Chained headers
76e48896
KB
507 * will auto-start.
508 */
12161989
LP
509 vsp1_write(vsp1, VI6_DL_HDR_ADDR(dlm->index), dl->dma);
510
511 dlm->active = dl;
512 goto done;
513 }
514
9dbed95b
LP
515 /*
516 * Once the UPD bit has been set the hardware can start processing the
1517b039
TS
517 * display list at any time and we can't touch the address and size
518 * registers. In that case mark the update as pending, it will be
519 * queued up to the hardware by the frame end interrupt handler.
520 */
521 update = !!(vsp1_read(vsp1, VI6_DL_BODY_SIZE) & VI6_DL_BODY_SIZE_UPD);
522 if (update) {
d2c1b028 523 __vsp1_dl_list_put(dlm->pending);
c2dd2513 524 dlm->pending = dl;
1517b039
TS
525 goto done;
526 }
527
9dbed95b
LP
528 /*
529 * Program the hardware with the display list body address and size.
1517b039
TS
530 * The UPD bit will be cleared by the device when the display list is
531 * processed.
532 */
f81e83c4 533 vsp1_write(vsp1, VI6_DL_HDR_ADDR(0), dl->body0.dma);
1517b039 534 vsp1_write(vsp1, VI6_DL_BODY_SIZE, VI6_DL_BODY_SIZE_UPD |
f81e83c4 535 (dl->body0.num_entries * sizeof(*dl->header->lists)));
1517b039 536
d2c1b028 537 __vsp1_dl_list_put(dlm->queued);
c2dd2513 538 dlm->queued = dl;
1517b039
TS
539
540done:
c2dd2513 541 spin_unlock_irqrestore(&dlm->lock, flags);
1517b039
TS
542}
543
544/* -----------------------------------------------------------------------------
c2dd2513 545 * Display List Manager
1517b039
TS
546 */
547
c2dd2513
LP
548/* Interrupt Handling */
549void vsp1_dlm_irq_display_start(struct vsp1_dl_manager *dlm)
1517b039 550{
c2dd2513 551 spin_lock(&dlm->lock);
1517b039 552
9dbed95b
LP
553 /*
554 * The display start interrupt signals the end of the display list
1517b039
TS
555 * processing by the device. The active display list, if any, won't be
556 * accessed anymore and can be reused.
557 */
d2c1b028 558 __vsp1_dl_list_put(dlm->active);
c2dd2513 559 dlm->active = NULL;
1517b039 560
c2dd2513 561 spin_unlock(&dlm->lock);
1517b039
TS
562}
563
c2dd2513 564void vsp1_dlm_irq_frame_end(struct vsp1_dl_manager *dlm)
1517b039 565{
c2dd2513 566 struct vsp1_device *vsp1 = dlm->vsp1;
1517b039 567
c2dd2513
LP
568 spin_lock(&dlm->lock);
569
d2c1b028 570 __vsp1_dl_list_put(dlm->active);
c2dd2513 571 dlm->active = NULL;
1517b039 572
9dbed95b
LP
573 /*
574 * Header mode is used for mem-to-mem pipelines only. We don't need to
12161989
LP
575 * perform any operation as there can't be any new display list queued
576 * in that case.
577 */
578 if (dlm->mode == VSP1_DL_MODE_HEADER)
579 goto done;
580
9dbed95b
LP
581 /*
582 * The UPD bit set indicates that the commit operation raced with the
1517b039
TS
583 * interrupt and occurred after the frame end event and UPD clear but
584 * before interrupt processing. The hardware hasn't taken the update
585 * into account yet, we'll thus skip one frame and retry.
586 */
587 if (vsp1_read(vsp1, VI6_DL_BODY_SIZE) & VI6_DL_BODY_SIZE_UPD)
588 goto done;
589
9dbed95b
LP
590 /*
591 * The device starts processing the queued display list right after the
1517b039
TS
592 * frame end interrupt. The display list thus becomes active.
593 */
c2dd2513
LP
594 if (dlm->queued) {
595 dlm->active = dlm->queued;
596 dlm->queued = NULL;
1517b039
TS
597 }
598
9dbed95b
LP
599 /*
600 * Now that the UPD bit has been cleared we can queue the next display
1517b039
TS
601 * list to the hardware if one has been prepared.
602 */
c2dd2513
LP
603 if (dlm->pending) {
604 struct vsp1_dl_list *dl = dlm->pending;
1517b039 605
f81e83c4 606 vsp1_write(vsp1, VI6_DL_HDR_ADDR(0), dl->body0.dma);
1517b039 607 vsp1_write(vsp1, VI6_DL_BODY_SIZE, VI6_DL_BODY_SIZE_UPD |
f81e83c4
LP
608 (dl->body0.num_entries *
609 sizeof(*dl->header->lists)));
1517b039 610
c2dd2513
LP
611 dlm->queued = dl;
612 dlm->pending = NULL;
1517b039
TS
613 }
614
615done:
c2dd2513 616 spin_unlock(&dlm->lock);
1517b039
TS
617}
618
c2dd2513
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619/* Hardware Setup */
620void vsp1_dlm_setup(struct vsp1_device *vsp1)
1517b039 621{
351bbf99
LP
622 u32 ctrl = (256 << VI6_DL_CTRL_AR_WAIT_SHIFT)
623 | VI6_DL_CTRL_DC2 | VI6_DL_CTRL_DC1 | VI6_DL_CTRL_DC0
624 | VI6_DL_CTRL_DLE;
1517b039 625
9dbed95b
LP
626 /*
627 * The DRM pipeline operates with display lists in Continuous Frame
351bbf99 628 * Mode, all other pipelines use manual start.
1517b039
TS
629 */
630 if (vsp1->drm)
351bbf99 631 ctrl |= VI6_DL_CTRL_CFM0 | VI6_DL_CTRL_NH0;
1517b039
TS
632
633 vsp1_write(vsp1, VI6_DL_CTRL, ctrl);
634 vsp1_write(vsp1, VI6_DL_SWAP, VI6_DL_SWAP_LWS);
635}
636
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LP
637void vsp1_dlm_reset(struct vsp1_dl_manager *dlm)
638{
d2c1b028
LP
639 unsigned long flags;
640
641 spin_lock_irqsave(&dlm->lock, flags);
642
643 __vsp1_dl_list_put(dlm->active);
644 __vsp1_dl_list_put(dlm->queued);
645 __vsp1_dl_list_put(dlm->pending);
646
647 spin_unlock_irqrestore(&dlm->lock, flags);
c2dd2513
LP
648
649 dlm->active = NULL;
650 dlm->queued = NULL;
651 dlm->pending = NULL;
652}
1517b039 653
9489a8ff
LP
654/*
655 * Free all fragments awaiting to be garbage-collected.
656 *
657 * This function must be called without the display list manager lock held.
658 */
659static void vsp1_dlm_fragments_free(struct vsp1_dl_manager *dlm)
660{
661 unsigned long flags;
662
663 spin_lock_irqsave(&dlm->lock, flags);
664
665 while (!list_empty(&dlm->gc_fragments)) {
666 struct vsp1_dl_body *dlb;
667
668 dlb = list_first_entry(&dlm->gc_fragments, struct vsp1_dl_body,
669 list);
670 list_del(&dlb->list);
671
672 spin_unlock_irqrestore(&dlm->lock, flags);
673 vsp1_dl_fragment_free(dlb);
674 spin_lock_irqsave(&dlm->lock, flags);
675 }
676
677 spin_unlock_irqrestore(&dlm->lock, flags);
678}
679
680static void vsp1_dlm_garbage_collect(struct work_struct *work)
681{
682 struct vsp1_dl_manager *dlm =
683 container_of(work, struct vsp1_dl_manager, gc_work);
684
685 vsp1_dlm_fragments_free(dlm);
686}
687
ef9621bc 688struct vsp1_dl_manager *vsp1_dlm_create(struct vsp1_device *vsp1,
12161989 689 unsigned int index,
ef9621bc 690 unsigned int prealloc)
1517b039 691{
ef9621bc 692 struct vsp1_dl_manager *dlm;
1517b039
TS
693 unsigned int i;
694
ef9621bc
LP
695 dlm = devm_kzalloc(vsp1->dev, sizeof(*dlm), GFP_KERNEL);
696 if (!dlm)
697 return NULL;
698
12161989
LP
699 dlm->index = index;
700 dlm->mode = index == 0 && !vsp1->info->uapi
701 ? VSP1_DL_MODE_HEADERLESS : VSP1_DL_MODE_HEADER;
c2dd2513 702 dlm->vsp1 = vsp1;
1517b039 703
c2dd2513
LP
704 spin_lock_init(&dlm->lock);
705 INIT_LIST_HEAD(&dlm->free);
9489a8ff
LP
706 INIT_LIST_HEAD(&dlm->gc_fragments);
707 INIT_WORK(&dlm->gc_work, vsp1_dlm_garbage_collect);
1517b039 708
c2dd2513
LP
709 for (i = 0; i < prealloc; ++i) {
710 struct vsp1_dl_list *dl;
1517b039 711
c2dd2513
LP
712 dl = vsp1_dl_list_alloc(dlm);
713 if (!dl)
ef9621bc 714 return NULL;
1517b039 715
c2dd2513 716 list_add_tail(&dl->list, &dlm->free);
1517b039
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717 }
718
ef9621bc 719 return dlm;
1517b039
TS
720}
721
ef9621bc 722void vsp1_dlm_destroy(struct vsp1_dl_manager *dlm)
1517b039 723{
c2dd2513
LP
724 struct vsp1_dl_list *dl, *next;
725
ef9621bc
LP
726 if (!dlm)
727 return;
728
9489a8ff
LP
729 cancel_work_sync(&dlm->gc_work);
730
c2dd2513
LP
731 list_for_each_entry_safe(dl, next, &dlm->free, list) {
732 list_del(&dl->list);
733 vsp1_dl_list_free(dl);
734 }
9489a8ff
LP
735
736 vsp1_dlm_fragments_free(dlm);
1517b039 737}