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Commit | Line | Data |
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2874c5fd | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
404f3e95 | 2 | /* |
402e7b63 | 3 | * IR SIR driver, (C) 2000 Milan Pikula <www@fornax.sk> |
404f3e95 | 4 | * |
cc06393a | 5 | * sir_ir - Device driver for use with SIR (serial infra red) |
404f3e95 | 6 | * mode of IrDA on many notebooks. |
404f3e95 JW |
7 | */ |
8 | ||
014f0066 YT |
9 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
10 | ||
404f3e95 | 11 | #include <linux/module.h> |
404f3e95 | 12 | #include <linux/interrupt.h> |
404f3e95 JW |
13 | #include <linux/kernel.h> |
14 | #include <linux/serial_reg.h> | |
34668350 | 15 | #include <linux/ktime.h> |
404f3e95 | 16 | #include <linux/delay.h> |
4b71ca6b | 17 | #include <linux/platform_device.h> |
404f3e95 | 18 | |
cc06393a | 19 | #include <media/rc-core.h> |
404f3e95 JW |
20 | |
21 | /* SECTION: Definitions */ | |
404f3e95 JW |
22 | #define PULSE '[' |
23 | ||
404f3e95 | 24 | /* 9bit * 1s/115200bit in milli seconds = 78.125ms*/ |
43371f6b | 25 | #define TIME_CONST (9000000ul / 115200ul) |
404f3e95 JW |
26 | |
27 | /* timeout for sequences in jiffies (=5/100s), must be longer than TIME_CONST */ | |
43371f6b | 28 | #define SIR_TIMEOUT (HZ * 5 / 100) |
404f3e95 | 29 | |
404f3e95 | 30 | /* onboard sir ports are typically com3 */ |
402e7b63 SY |
31 | static int io = 0x3e8; |
32 | static int irq = 4; | |
404f3e95 | 33 | static int threshold = 3; |
404f3e95 JW |
34 | |
35 | static DEFINE_SPINLOCK(timer_lock); | |
36 | static struct timer_list timerlist; | |
37 | /* time of last signal change detected */ | |
34668350 | 38 | static ktime_t last; |
404f3e95 | 39 | /* time of last UART data ready interrupt */ |
34668350 | 40 | static ktime_t last_intr_time; |
404f3e95 | 41 | static int last_value; |
cc06393a | 42 | static struct rc_dev *rcdev; |
404f3e95 | 43 | |
cc06393a | 44 | static struct platform_device *sir_ir_dev; |
404f3e95 JW |
45 | |
46 | static DEFINE_SPINLOCK(hardware_lock); | |
47 | ||
404f3e95 JW |
48 | /* SECTION: Prototypes */ |
49 | ||
50 | /* Communication with user-space */ | |
404f3e95 | 51 | static void add_read_queue(int flag, unsigned long val); |
404f3e95 JW |
52 | /* Hardware */ |
53 | static irqreturn_t sir_interrupt(int irq, void *dev_id); | |
54 | static void send_space(unsigned long len); | |
55 | static void send_pulse(unsigned long len); | |
30b4e122 | 56 | static int init_hardware(void); |
404f3e95 JW |
57 | static void drop_hardware(void); |
58 | /* Initialisation */ | |
404f3e95 | 59 | |
404f3e95 JW |
60 | static inline unsigned int sinp(int offset) |
61 | { | |
62 | return inb(io + offset); | |
63 | } | |
64 | ||
65 | static inline void soutp(int offset, int value) | |
66 | { | |
67 | outb(value, io + offset); | |
68 | } | |
404f3e95 | 69 | |
404f3e95 | 70 | /* SECTION: Communication with user-space */ |
cc06393a SY |
71 | static int sir_tx_ir(struct rc_dev *dev, unsigned int *tx_buf, |
72 | unsigned int count) | |
404f3e95 JW |
73 | { |
74 | unsigned long flags; | |
cc06393a SY |
75 | int i; |
76 | ||
404f3e95 | 77 | local_irq_save(flags); |
cc06393a | 78 | for (i = 0; i < count;) { |
404f3e95 JW |
79 | if (tx_buf[i]) |
80 | send_pulse(tx_buf[i]); | |
81 | i++; | |
82 | if (i >= count) | |
83 | break; | |
84 | if (tx_buf[i]) | |
85 | send_space(tx_buf[i]); | |
86 | i++; | |
87 | } | |
88 | local_irq_restore(flags); | |
404f3e95 | 89 | |
cc06393a | 90 | return count; |
404f3e95 JW |
91 | } |
92 | ||
93 | static void add_read_queue(int flag, unsigned long val) | |
94 | { | |
183e19f5 | 95 | struct ir_raw_event ev = {}; |
404f3e95 | 96 | |
c96bf1d6 | 97 | pr_debug("add flag %d with val %lu\n", flag, val); |
404f3e95 | 98 | |
404f3e95 JW |
99 | /* |
100 | * statistically, pulses are ~TIME_CONST/2 too long. we could | |
101 | * maybe make this more exact, but this is good enough | |
102 | */ | |
103 | if (flag) { | |
104 | /* pulse */ | |
cc06393a SY |
105 | if (val > TIME_CONST / 2) |
106 | val -= TIME_CONST / 2; | |
404f3e95 | 107 | else /* should not ever happen */ |
cc06393a SY |
108 | val = 1; |
109 | ev.pulse = true; | |
404f3e95 | 110 | } else { |
cc06393a | 111 | val += TIME_CONST / 2; |
404f3e95 | 112 | } |
cc06393a | 113 | ev.duration = US_TO_NS(val); |
404f3e95 | 114 | |
cc06393a | 115 | ir_raw_event_store_with_filter(rcdev, &ev); |
404f3e95 JW |
116 | } |
117 | ||
404f3e95 | 118 | /* SECTION: Hardware */ |
b17ec78a | 119 | static void sir_timeout(struct timer_list *unused) |
404f3e95 JW |
120 | { |
121 | /* | |
122 | * if last received signal was a pulse, but receiving stopped | |
123 | * within the 9 bit frame, we need to finish this pulse and | |
124 | * simulate a signal change to from pulse to space. Otherwise | |
125 | * upper layers will receive two sequences next time. | |
126 | */ | |
127 | ||
128 | unsigned long flags; | |
129 | unsigned long pulse_end; | |
130 | ||
131 | /* avoid interference with interrupt */ | |
132 | spin_lock_irqsave(&timer_lock, flags); | |
133 | if (last_value) { | |
404f3e95 JW |
134 | /* clear unread bits in UART and restart */ |
135 | outb(UART_FCR_CLEAR_RCVR, io + UART_FCR); | |
404f3e95 | 136 | /* determine 'virtual' pulse end: */ |
34668350 KS |
137 | pulse_end = min_t(unsigned long, |
138 | ktime_us_delta(last, last_intr_time), | |
cc06393a SY |
139 | IR_MAX_DURATION); |
140 | dev_dbg(&sir_ir_dev->dev, "timeout add %d for %lu usec\n", | |
141 | last_value, pulse_end); | |
404f3e95 JW |
142 | add_read_queue(last_value, pulse_end); |
143 | last_value = 0; | |
34668350 | 144 | last = last_intr_time; |
404f3e95 JW |
145 | } |
146 | spin_unlock_irqrestore(&timer_lock, flags); | |
cc06393a | 147 | ir_raw_event_handle(rcdev); |
404f3e95 JW |
148 | } |
149 | ||
150 | static irqreturn_t sir_interrupt(int irq, void *dev_id) | |
151 | { | |
152 | unsigned char data; | |
34668350 | 153 | ktime_t curr_time; |
6efa0943 | 154 | unsigned long delt; |
34668350 | 155 | unsigned long deltintr; |
404f3e95 | 156 | unsigned long flags; |
592ddc9f | 157 | int counter = 0; |
404f3e95 JW |
158 | int iir, lsr; |
159 | ||
160 | while ((iir = inb(io + UART_IIR) & UART_IIR_ID)) { | |
592ddc9f SY |
161 | if (++counter > 256) { |
162 | dev_err(&sir_ir_dev->dev, "Trapped in interrupt"); | |
163 | break; | |
164 | } | |
165 | ||
43371f6b | 166 | switch (iir & UART_IIR_ID) { /* FIXME toto treba preriedit */ |
404f3e95 | 167 | case UART_IIR_MSI: |
43371f6b | 168 | (void)inb(io + UART_MSR); |
404f3e95 JW |
169 | break; |
170 | case UART_IIR_RLSI: | |
404f3e95 | 171 | case UART_IIR_THRI: |
43371f6b | 172 | (void)inb(io + UART_LSR); |
404f3e95 JW |
173 | break; |
174 | case UART_IIR_RDI: | |
175 | /* avoid interference with timer */ | |
176 | spin_lock_irqsave(&timer_lock, flags); | |
177 | do { | |
178 | del_timer(&timerlist); | |
179 | data = inb(io + UART_RX); | |
34668350 KS |
180 | curr_time = ktime_get(); |
181 | delt = min_t(unsigned long, | |
182 | ktime_us_delta(last, curr_time), | |
cc06393a | 183 | IR_MAX_DURATION); |
34668350 KS |
184 | deltintr = min_t(unsigned long, |
185 | ktime_us_delta(last_intr_time, | |
186 | curr_time), | |
cc06393a SY |
187 | IR_MAX_DURATION); |
188 | dev_dbg(&sir_ir_dev->dev, "t %lu, d %d\n", | |
189 | deltintr, (int)data); | |
404f3e95 JW |
190 | /* |
191 | * if nothing came in last X cycles, | |
192 | * it was gap | |
193 | */ | |
34668350 | 194 | if (deltintr > TIME_CONST * threshold) { |
404f3e95 | 195 | if (last_value) { |
cc06393a | 196 | dev_dbg(&sir_ir_dev->dev, "GAP\n"); |
404f3e95 JW |
197 | /* simulate signal change */ |
198 | add_read_queue(last_value, | |
34668350 KS |
199 | delt - |
200 | deltintr); | |
404f3e95 | 201 | last_value = 0; |
34668350 KS |
202 | last = last_intr_time; |
203 | delt = deltintr; | |
404f3e95 JW |
204 | } |
205 | } | |
206 | data = 1; | |
207 | if (data ^ last_value) { | |
208 | /* | |
34668350 | 209 | * deltintr > 2*TIME_CONST, remember? |
404f3e95 JW |
210 | * the other case is timeout |
211 | */ | |
212 | add_read_queue(last_value, | |
43371f6b | 213 | delt - TIME_CONST); |
404f3e95 | 214 | last_value = data; |
34668350 KS |
215 | last = curr_time; |
216 | last = ktime_sub_us(last, | |
217 | TIME_CONST); | |
404f3e95 | 218 | } |
34668350 | 219 | last_intr_time = curr_time; |
404f3e95 JW |
220 | if (data) { |
221 | /* | |
222 | * start timer for end of | |
223 | * sequence detection | |
224 | */ | |
225 | timerlist.expires = jiffies + | |
226 | SIR_TIMEOUT; | |
227 | add_timer(&timerlist); | |
228 | } | |
229 | ||
230 | lsr = inb(io + UART_LSR); | |
231 | } while (lsr & UART_LSR_DR); /* data ready */ | |
232 | spin_unlock_irqrestore(&timer_lock, flags); | |
233 | break; | |
234 | default: | |
235 | break; | |
236 | } | |
237 | } | |
cc06393a | 238 | ir_raw_event_handle(rcdev); |
404f3e95 JW |
239 | return IRQ_RETVAL(IRQ_HANDLED); |
240 | } | |
241 | ||
404f3e95 JW |
242 | static void send_space(unsigned long len) |
243 | { | |
19bc4e05 | 244 | usleep_range(len, len + 25); |
404f3e95 JW |
245 | } |
246 | ||
247 | static void send_pulse(unsigned long len) | |
248 | { | |
249 | long bytes_out = len / TIME_CONST; | |
404f3e95 | 250 | |
04f561ff | 251 | if (bytes_out == 0) |
404f3e95 | 252 | bytes_out++; |
04f561ff | 253 | |
404f3e95 JW |
254 | while (bytes_out--) { |
255 | outb(PULSE, io + UART_TX); | |
256 | /* FIXME treba seriozne cakanie z char/serial.c */ | |
257 | while (!(inb(io + UART_LSR) & UART_LSR_THRE)) | |
258 | ; | |
259 | } | |
404f3e95 | 260 | } |
404f3e95 | 261 | |
30b4e122 | 262 | static int init_hardware(void) |
404f3e95 | 263 | { |
30b4e122 | 264 | u8 scratch, scratch2, scratch3; |
404f3e95 JW |
265 | unsigned long flags; |
266 | ||
267 | spin_lock_irqsave(&hardware_lock, flags); | |
30b4e122 SY |
268 | |
269 | /* | |
270 | * This is a simple port existence test, borrowed from the autoconfig | |
271 | * function in drivers/tty/serial/8250/8250_port.c | |
272 | */ | |
273 | scratch = sinp(UART_IER); | |
274 | soutp(UART_IER, 0); | |
275 | #ifdef __i386__ | |
276 | outb(0xff, 0x080); | |
277 | #endif | |
278 | scratch2 = sinp(UART_IER) & 0x0f; | |
279 | soutp(UART_IER, 0x0f); | |
280 | #ifdef __i386__ | |
281 | outb(0x00, 0x080); | |
282 | #endif | |
283 | scratch3 = sinp(UART_IER) & 0x0f; | |
284 | soutp(UART_IER, scratch); | |
285 | if (scratch2 != 0 || scratch3 != 0x0f) { | |
286 | /* we fail, there's nothing here */ | |
287 | spin_unlock_irqrestore(&hardware_lock, flags); | |
288 | pr_err("port existence test failed, cannot continue\n"); | |
289 | return -ENODEV; | |
290 | } | |
291 | ||
404f3e95 | 292 | /* reset UART */ |
404f3e95 JW |
293 | outb(0, io + UART_MCR); |
294 | outb(0, io + UART_IER); | |
295 | /* init UART */ | |
296 | /* set DLAB, speed = 115200 */ | |
297 | outb(UART_LCR_DLAB | UART_LCR_WLEN7, io + UART_LCR); | |
298 | outb(1, io + UART_DLL); outb(0, io + UART_DLM); | |
299 | /* 7N1+start = 9 bits at 115200 ~ 3 bits at 44000 */ | |
300 | outb(UART_LCR_WLEN7, io + UART_LCR); | |
301 | /* FIFO operation */ | |
302 | outb(UART_FCR_ENABLE_FIFO, io + UART_FCR); | |
303 | /* interrupts */ | |
304 | /* outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, io + UART_IER); */ | |
305 | outb(UART_IER_RDI, io + UART_IER); | |
306 | /* turn on UART */ | |
43371f6b | 307 | outb(UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2, io + UART_MCR); |
404f3e95 | 308 | spin_unlock_irqrestore(&hardware_lock, flags); |
30b4e122 SY |
309 | |
310 | return 0; | |
404f3e95 JW |
311 | } |
312 | ||
313 | static void drop_hardware(void) | |
314 | { | |
315 | unsigned long flags; | |
316 | ||
317 | spin_lock_irqsave(&hardware_lock, flags); | |
318 | ||
404f3e95 JW |
319 | /* turn off interrupts */ |
320 | outb(0, io + UART_IER); | |
c72374ff | 321 | |
404f3e95 JW |
322 | spin_unlock_irqrestore(&hardware_lock, flags); |
323 | } | |
324 | ||
325 | /* SECTION: Initialisation */ | |
c52f2ba7 | 326 | static int sir_ir_probe(struct platform_device *dev) |
404f3e95 JW |
327 | { |
328 | int retval; | |
329 | ||
c52f2ba7 SY |
330 | rcdev = devm_rc_allocate_device(&sir_ir_dev->dev, RC_DRIVER_IR_RAW); |
331 | if (!rcdev) | |
332 | return -ENOMEM; | |
333 | ||
518f4b26 | 334 | rcdev->device_name = "SIR IrDA port"; |
c52f2ba7 SY |
335 | rcdev->input_phys = KBUILD_MODNAME "/input0"; |
336 | rcdev->input_id.bustype = BUS_HOST; | |
337 | rcdev->input_id.vendor = 0x0001; | |
338 | rcdev->input_id.product = 0x0001; | |
339 | rcdev->input_id.version = 0x0100; | |
340 | rcdev->tx_ir = sir_tx_ir; | |
6d741bfe | 341 | rcdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; |
c52f2ba7 SY |
342 | rcdev->driver_name = KBUILD_MODNAME; |
343 | rcdev->map_name = RC_MAP_RC6_MCE; | |
344 | rcdev->timeout = IR_DEFAULT_TIMEOUT; | |
345 | rcdev->dev.parent = &sir_ir_dev->dev; | |
346 | ||
b17ec78a | 347 | timer_setup(&timerlist, sir_timeout, 0); |
8c7c6cad | 348 | |
404f3e95 | 349 | /* get I/O port access and IRQ line */ |
b462e1b2 | 350 | if (!devm_request_region(&sir_ir_dev->dev, io, 8, KBUILD_MODNAME)) { |
014f0066 | 351 | pr_err("i/o port 0x%.4x already in use.\n", io); |
404f3e95 JW |
352 | return -EBUSY; |
353 | } | |
b462e1b2 SY |
354 | retval = devm_request_irq(&sir_ir_dev->dev, irq, sir_interrupt, 0, |
355 | KBUILD_MODNAME, NULL); | |
404f3e95 | 356 | if (retval < 0) { |
014f0066 | 357 | pr_err("IRQ %d already in use.\n", irq); |
404f3e95 JW |
358 | return retval; |
359 | } | |
30b4e122 SY |
360 | |
361 | retval = init_hardware(); | |
362 | if (retval) { | |
363 | del_timer_sync(&timerlist); | |
364 | return retval; | |
365 | } | |
366 | ||
014f0066 | 367 | pr_info("I/O port 0x%.4x, IRQ %d.\n", io, irq); |
404f3e95 | 368 | |
c52f2ba7 | 369 | retval = devm_rc_register_device(&sir_ir_dev->dev, rcdev); |
cf9ed9aa SY |
370 | if (retval < 0) |
371 | return retval; | |
372 | ||
c52f2ba7 | 373 | return 0; |
4b71ca6b JW |
374 | } |
375 | ||
cc06393a | 376 | static int sir_ir_remove(struct platform_device *dev) |
4b71ca6b | 377 | { |
1beb5a7d | 378 | drop_hardware(); |
f23f5408 | 379 | del_timer_sync(&timerlist); |
4b71ca6b JW |
380 | return 0; |
381 | } | |
382 | ||
cc06393a SY |
383 | static struct platform_driver sir_ir_driver = { |
384 | .probe = sir_ir_probe, | |
385 | .remove = sir_ir_remove, | |
4b71ca6b | 386 | .driver = { |
cc06393a | 387 | .name = "sir_ir", |
4b71ca6b JW |
388 | }, |
389 | }; | |
404f3e95 | 390 | |
cc06393a | 391 | static int __init sir_ir_init(void) |
404f3e95 JW |
392 | { |
393 | int retval; | |
394 | ||
cc06393a | 395 | retval = platform_driver_register(&sir_ir_driver); |
4d7cf7ec SY |
396 | if (retval) |
397 | return retval; | |
4b71ca6b | 398 | |
cc06393a SY |
399 | sir_ir_dev = platform_device_alloc("sir_ir", 0); |
400 | if (!sir_ir_dev) { | |
4b71ca6b JW |
401 | retval = -ENOMEM; |
402 | goto pdev_alloc_fail; | |
403 | } | |
404 | ||
cc06393a | 405 | retval = platform_device_add(sir_ir_dev); |
4d7cf7ec | 406 | if (retval) |
4b71ca6b | 407 | goto pdev_add_fail; |
4b71ca6b | 408 | |
404f3e95 | 409 | return 0; |
4b71ca6b | 410 | |
4b71ca6b | 411 | pdev_add_fail: |
cc06393a | 412 | platform_device_put(sir_ir_dev); |
4b71ca6b | 413 | pdev_alloc_fail: |
cc06393a | 414 | platform_driver_unregister(&sir_ir_driver); |
4b71ca6b | 415 | return retval; |
404f3e95 JW |
416 | } |
417 | ||
cc06393a | 418 | static void __exit sir_ir_exit(void) |
404f3e95 | 419 | { |
cc06393a SY |
420 | platform_device_unregister(sir_ir_dev); |
421 | platform_driver_unregister(&sir_ir_driver); | |
404f3e95 JW |
422 | } |
423 | ||
cc06393a SY |
424 | module_init(sir_ir_init); |
425 | module_exit(sir_ir_exit); | |
404f3e95 | 426 | |
404f3e95 JW |
427 | MODULE_DESCRIPTION("Infrared receiver driver for SIR type serial ports"); |
428 | MODULE_AUTHOR("Milan Pikula"); | |
404f3e95 JW |
429 | MODULE_LICENSE("GPL"); |
430 | ||
6709e03c | 431 | module_param_hw(io, int, ioport, 0444); |
404f3e95 JW |
432 | MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)"); |
433 | ||
6709e03c | 434 | module_param_hw(irq, int, irq, 0444); |
404f3e95 JW |
435 | MODULE_PARM_DESC(irq, "Interrupt (4 or 3)"); |
436 | ||
5cd6522c | 437 | module_param(threshold, int, 0444); |
404f3e95 | 438 | MODULE_PARM_DESC(threshold, "space detection threshold (3)"); |