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Commit | Line | Data |
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404f3e95 | 1 | /* |
402e7b63 | 2 | * IR SIR driver, (C) 2000 Milan Pikula <www@fornax.sk> |
404f3e95 | 3 | * |
cc06393a | 4 | * sir_ir - Device driver for use with SIR (serial infra red) |
404f3e95 JW |
5 | * mode of IrDA on many notebooks. |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; either version 2 of the License, or | |
10 | * (at your option) any later version. | |
404f3e95 JW |
11 | */ |
12 | ||
014f0066 YT |
13 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt |
14 | ||
404f3e95 | 15 | #include <linux/module.h> |
404f3e95 | 16 | #include <linux/interrupt.h> |
404f3e95 JW |
17 | #include <linux/kernel.h> |
18 | #include <linux/serial_reg.h> | |
34668350 | 19 | #include <linux/ktime.h> |
404f3e95 | 20 | #include <linux/delay.h> |
4b71ca6b | 21 | #include <linux/platform_device.h> |
404f3e95 | 22 | |
cc06393a | 23 | #include <media/rc-core.h> |
404f3e95 JW |
24 | |
25 | /* SECTION: Definitions */ | |
404f3e95 JW |
26 | #define PULSE '[' |
27 | ||
404f3e95 | 28 | /* 9bit * 1s/115200bit in milli seconds = 78.125ms*/ |
43371f6b | 29 | #define TIME_CONST (9000000ul / 115200ul) |
404f3e95 JW |
30 | |
31 | /* timeout for sequences in jiffies (=5/100s), must be longer than TIME_CONST */ | |
43371f6b | 32 | #define SIR_TIMEOUT (HZ * 5 / 100) |
404f3e95 | 33 | |
404f3e95 | 34 | /* onboard sir ports are typically com3 */ |
402e7b63 SY |
35 | static int io = 0x3e8; |
36 | static int irq = 4; | |
404f3e95 | 37 | static int threshold = 3; |
404f3e95 JW |
38 | |
39 | static DEFINE_SPINLOCK(timer_lock); | |
40 | static struct timer_list timerlist; | |
41 | /* time of last signal change detected */ | |
34668350 | 42 | static ktime_t last; |
404f3e95 | 43 | /* time of last UART data ready interrupt */ |
34668350 | 44 | static ktime_t last_intr_time; |
404f3e95 | 45 | static int last_value; |
cc06393a | 46 | static struct rc_dev *rcdev; |
404f3e95 | 47 | |
cc06393a | 48 | static struct platform_device *sir_ir_dev; |
404f3e95 JW |
49 | |
50 | static DEFINE_SPINLOCK(hardware_lock); | |
51 | ||
404f3e95 JW |
52 | /* SECTION: Prototypes */ |
53 | ||
54 | /* Communication with user-space */ | |
404f3e95 | 55 | static void add_read_queue(int flag, unsigned long val); |
404f3e95 JW |
56 | /* Hardware */ |
57 | static irqreturn_t sir_interrupt(int irq, void *dev_id); | |
58 | static void send_space(unsigned long len); | |
59 | static void send_pulse(unsigned long len); | |
30b4e122 | 60 | static int init_hardware(void); |
404f3e95 JW |
61 | static void drop_hardware(void); |
62 | /* Initialisation */ | |
404f3e95 | 63 | |
404f3e95 JW |
64 | static inline unsigned int sinp(int offset) |
65 | { | |
66 | return inb(io + offset); | |
67 | } | |
68 | ||
69 | static inline void soutp(int offset, int value) | |
70 | { | |
71 | outb(value, io + offset); | |
72 | } | |
404f3e95 | 73 | |
404f3e95 | 74 | /* SECTION: Communication with user-space */ |
cc06393a SY |
75 | static int sir_tx_ir(struct rc_dev *dev, unsigned int *tx_buf, |
76 | unsigned int count) | |
404f3e95 JW |
77 | { |
78 | unsigned long flags; | |
cc06393a SY |
79 | int i; |
80 | ||
404f3e95 | 81 | local_irq_save(flags); |
cc06393a | 82 | for (i = 0; i < count;) { |
404f3e95 JW |
83 | if (tx_buf[i]) |
84 | send_pulse(tx_buf[i]); | |
85 | i++; | |
86 | if (i >= count) | |
87 | break; | |
88 | if (tx_buf[i]) | |
89 | send_space(tx_buf[i]); | |
90 | i++; | |
91 | } | |
92 | local_irq_restore(flags); | |
404f3e95 | 93 | |
cc06393a | 94 | return count; |
404f3e95 JW |
95 | } |
96 | ||
97 | static void add_read_queue(int flag, unsigned long val) | |
98 | { | |
cc06393a | 99 | DEFINE_IR_RAW_EVENT(ev); |
404f3e95 | 100 | |
c96bf1d6 | 101 | pr_debug("add flag %d with val %lu\n", flag, val); |
404f3e95 | 102 | |
404f3e95 JW |
103 | /* |
104 | * statistically, pulses are ~TIME_CONST/2 too long. we could | |
105 | * maybe make this more exact, but this is good enough | |
106 | */ | |
107 | if (flag) { | |
108 | /* pulse */ | |
cc06393a SY |
109 | if (val > TIME_CONST / 2) |
110 | val -= TIME_CONST / 2; | |
404f3e95 | 111 | else /* should not ever happen */ |
cc06393a SY |
112 | val = 1; |
113 | ev.pulse = true; | |
404f3e95 | 114 | } else { |
cc06393a | 115 | val += TIME_CONST / 2; |
404f3e95 | 116 | } |
cc06393a | 117 | ev.duration = US_TO_NS(val); |
404f3e95 | 118 | |
cc06393a | 119 | ir_raw_event_store_with_filter(rcdev, &ev); |
404f3e95 JW |
120 | } |
121 | ||
404f3e95 | 122 | /* SECTION: Hardware */ |
b17ec78a | 123 | static void sir_timeout(struct timer_list *unused) |
404f3e95 JW |
124 | { |
125 | /* | |
126 | * if last received signal was a pulse, but receiving stopped | |
127 | * within the 9 bit frame, we need to finish this pulse and | |
128 | * simulate a signal change to from pulse to space. Otherwise | |
129 | * upper layers will receive two sequences next time. | |
130 | */ | |
131 | ||
132 | unsigned long flags; | |
133 | unsigned long pulse_end; | |
134 | ||
135 | /* avoid interference with interrupt */ | |
136 | spin_lock_irqsave(&timer_lock, flags); | |
137 | if (last_value) { | |
404f3e95 JW |
138 | /* clear unread bits in UART and restart */ |
139 | outb(UART_FCR_CLEAR_RCVR, io + UART_FCR); | |
404f3e95 | 140 | /* determine 'virtual' pulse end: */ |
34668350 KS |
141 | pulse_end = min_t(unsigned long, |
142 | ktime_us_delta(last, last_intr_time), | |
cc06393a SY |
143 | IR_MAX_DURATION); |
144 | dev_dbg(&sir_ir_dev->dev, "timeout add %d for %lu usec\n", | |
145 | last_value, pulse_end); | |
404f3e95 JW |
146 | add_read_queue(last_value, pulse_end); |
147 | last_value = 0; | |
34668350 | 148 | last = last_intr_time; |
404f3e95 JW |
149 | } |
150 | spin_unlock_irqrestore(&timer_lock, flags); | |
cc06393a | 151 | ir_raw_event_handle(rcdev); |
404f3e95 JW |
152 | } |
153 | ||
154 | static irqreturn_t sir_interrupt(int irq, void *dev_id) | |
155 | { | |
156 | unsigned char data; | |
34668350 | 157 | ktime_t curr_time; |
6efa0943 | 158 | unsigned long delt; |
34668350 | 159 | unsigned long deltintr; |
404f3e95 | 160 | unsigned long flags; |
592ddc9f | 161 | int counter = 0; |
404f3e95 JW |
162 | int iir, lsr; |
163 | ||
164 | while ((iir = inb(io + UART_IIR) & UART_IIR_ID)) { | |
592ddc9f SY |
165 | if (++counter > 256) { |
166 | dev_err(&sir_ir_dev->dev, "Trapped in interrupt"); | |
167 | break; | |
168 | } | |
169 | ||
43371f6b | 170 | switch (iir & UART_IIR_ID) { /* FIXME toto treba preriedit */ |
404f3e95 | 171 | case UART_IIR_MSI: |
43371f6b | 172 | (void)inb(io + UART_MSR); |
404f3e95 JW |
173 | break; |
174 | case UART_IIR_RLSI: | |
404f3e95 | 175 | case UART_IIR_THRI: |
43371f6b | 176 | (void)inb(io + UART_LSR); |
404f3e95 JW |
177 | break; |
178 | case UART_IIR_RDI: | |
179 | /* avoid interference with timer */ | |
180 | spin_lock_irqsave(&timer_lock, flags); | |
181 | do { | |
182 | del_timer(&timerlist); | |
183 | data = inb(io + UART_RX); | |
34668350 KS |
184 | curr_time = ktime_get(); |
185 | delt = min_t(unsigned long, | |
186 | ktime_us_delta(last, curr_time), | |
cc06393a | 187 | IR_MAX_DURATION); |
34668350 KS |
188 | deltintr = min_t(unsigned long, |
189 | ktime_us_delta(last_intr_time, | |
190 | curr_time), | |
cc06393a SY |
191 | IR_MAX_DURATION); |
192 | dev_dbg(&sir_ir_dev->dev, "t %lu, d %d\n", | |
193 | deltintr, (int)data); | |
404f3e95 JW |
194 | /* |
195 | * if nothing came in last X cycles, | |
196 | * it was gap | |
197 | */ | |
34668350 | 198 | if (deltintr > TIME_CONST * threshold) { |
404f3e95 | 199 | if (last_value) { |
cc06393a | 200 | dev_dbg(&sir_ir_dev->dev, "GAP\n"); |
404f3e95 JW |
201 | /* simulate signal change */ |
202 | add_read_queue(last_value, | |
34668350 KS |
203 | delt - |
204 | deltintr); | |
404f3e95 | 205 | last_value = 0; |
34668350 KS |
206 | last = last_intr_time; |
207 | delt = deltintr; | |
404f3e95 JW |
208 | } |
209 | } | |
210 | data = 1; | |
211 | if (data ^ last_value) { | |
212 | /* | |
34668350 | 213 | * deltintr > 2*TIME_CONST, remember? |
404f3e95 JW |
214 | * the other case is timeout |
215 | */ | |
216 | add_read_queue(last_value, | |
43371f6b | 217 | delt - TIME_CONST); |
404f3e95 | 218 | last_value = data; |
34668350 KS |
219 | last = curr_time; |
220 | last = ktime_sub_us(last, | |
221 | TIME_CONST); | |
404f3e95 | 222 | } |
34668350 | 223 | last_intr_time = curr_time; |
404f3e95 JW |
224 | if (data) { |
225 | /* | |
226 | * start timer for end of | |
227 | * sequence detection | |
228 | */ | |
229 | timerlist.expires = jiffies + | |
230 | SIR_TIMEOUT; | |
231 | add_timer(&timerlist); | |
232 | } | |
233 | ||
234 | lsr = inb(io + UART_LSR); | |
235 | } while (lsr & UART_LSR_DR); /* data ready */ | |
236 | spin_unlock_irqrestore(&timer_lock, flags); | |
237 | break; | |
238 | default: | |
239 | break; | |
240 | } | |
241 | } | |
cc06393a | 242 | ir_raw_event_handle(rcdev); |
404f3e95 JW |
243 | return IRQ_RETVAL(IRQ_HANDLED); |
244 | } | |
245 | ||
404f3e95 JW |
246 | static void send_space(unsigned long len) |
247 | { | |
19bc4e05 | 248 | usleep_range(len, len + 25); |
404f3e95 JW |
249 | } |
250 | ||
251 | static void send_pulse(unsigned long len) | |
252 | { | |
253 | long bytes_out = len / TIME_CONST; | |
404f3e95 | 254 | |
04f561ff | 255 | if (bytes_out == 0) |
404f3e95 | 256 | bytes_out++; |
04f561ff | 257 | |
404f3e95 JW |
258 | while (bytes_out--) { |
259 | outb(PULSE, io + UART_TX); | |
260 | /* FIXME treba seriozne cakanie z char/serial.c */ | |
261 | while (!(inb(io + UART_LSR) & UART_LSR_THRE)) | |
262 | ; | |
263 | } | |
404f3e95 | 264 | } |
404f3e95 | 265 | |
30b4e122 | 266 | static int init_hardware(void) |
404f3e95 | 267 | { |
30b4e122 | 268 | u8 scratch, scratch2, scratch3; |
404f3e95 JW |
269 | unsigned long flags; |
270 | ||
271 | spin_lock_irqsave(&hardware_lock, flags); | |
30b4e122 SY |
272 | |
273 | /* | |
274 | * This is a simple port existence test, borrowed from the autoconfig | |
275 | * function in drivers/tty/serial/8250/8250_port.c | |
276 | */ | |
277 | scratch = sinp(UART_IER); | |
278 | soutp(UART_IER, 0); | |
279 | #ifdef __i386__ | |
280 | outb(0xff, 0x080); | |
281 | #endif | |
282 | scratch2 = sinp(UART_IER) & 0x0f; | |
283 | soutp(UART_IER, 0x0f); | |
284 | #ifdef __i386__ | |
285 | outb(0x00, 0x080); | |
286 | #endif | |
287 | scratch3 = sinp(UART_IER) & 0x0f; | |
288 | soutp(UART_IER, scratch); | |
289 | if (scratch2 != 0 || scratch3 != 0x0f) { | |
290 | /* we fail, there's nothing here */ | |
291 | spin_unlock_irqrestore(&hardware_lock, flags); | |
292 | pr_err("port existence test failed, cannot continue\n"); | |
293 | return -ENODEV; | |
294 | } | |
295 | ||
404f3e95 | 296 | /* reset UART */ |
404f3e95 JW |
297 | outb(0, io + UART_MCR); |
298 | outb(0, io + UART_IER); | |
299 | /* init UART */ | |
300 | /* set DLAB, speed = 115200 */ | |
301 | outb(UART_LCR_DLAB | UART_LCR_WLEN7, io + UART_LCR); | |
302 | outb(1, io + UART_DLL); outb(0, io + UART_DLM); | |
303 | /* 7N1+start = 9 bits at 115200 ~ 3 bits at 44000 */ | |
304 | outb(UART_LCR_WLEN7, io + UART_LCR); | |
305 | /* FIFO operation */ | |
306 | outb(UART_FCR_ENABLE_FIFO, io + UART_FCR); | |
307 | /* interrupts */ | |
308 | /* outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, io + UART_IER); */ | |
309 | outb(UART_IER_RDI, io + UART_IER); | |
310 | /* turn on UART */ | |
43371f6b | 311 | outb(UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2, io + UART_MCR); |
404f3e95 | 312 | spin_unlock_irqrestore(&hardware_lock, flags); |
30b4e122 SY |
313 | |
314 | return 0; | |
404f3e95 JW |
315 | } |
316 | ||
317 | static void drop_hardware(void) | |
318 | { | |
319 | unsigned long flags; | |
320 | ||
321 | spin_lock_irqsave(&hardware_lock, flags); | |
322 | ||
404f3e95 JW |
323 | /* turn off interrupts */ |
324 | outb(0, io + UART_IER); | |
c72374ff | 325 | |
404f3e95 JW |
326 | spin_unlock_irqrestore(&hardware_lock, flags); |
327 | } | |
328 | ||
329 | /* SECTION: Initialisation */ | |
c52f2ba7 | 330 | static int sir_ir_probe(struct platform_device *dev) |
404f3e95 JW |
331 | { |
332 | int retval; | |
333 | ||
c52f2ba7 SY |
334 | rcdev = devm_rc_allocate_device(&sir_ir_dev->dev, RC_DRIVER_IR_RAW); |
335 | if (!rcdev) | |
336 | return -ENOMEM; | |
337 | ||
518f4b26 | 338 | rcdev->device_name = "SIR IrDA port"; |
c52f2ba7 SY |
339 | rcdev->input_phys = KBUILD_MODNAME "/input0"; |
340 | rcdev->input_id.bustype = BUS_HOST; | |
341 | rcdev->input_id.vendor = 0x0001; | |
342 | rcdev->input_id.product = 0x0001; | |
343 | rcdev->input_id.version = 0x0100; | |
344 | rcdev->tx_ir = sir_tx_ir; | |
6d741bfe | 345 | rcdev->allowed_protocols = RC_PROTO_BIT_ALL_IR_DECODER; |
c52f2ba7 SY |
346 | rcdev->driver_name = KBUILD_MODNAME; |
347 | rcdev->map_name = RC_MAP_RC6_MCE; | |
348 | rcdev->timeout = IR_DEFAULT_TIMEOUT; | |
349 | rcdev->dev.parent = &sir_ir_dev->dev; | |
350 | ||
b17ec78a | 351 | timer_setup(&timerlist, sir_timeout, 0); |
8c7c6cad | 352 | |
404f3e95 | 353 | /* get I/O port access and IRQ line */ |
b462e1b2 | 354 | if (!devm_request_region(&sir_ir_dev->dev, io, 8, KBUILD_MODNAME)) { |
014f0066 | 355 | pr_err("i/o port 0x%.4x already in use.\n", io); |
404f3e95 JW |
356 | return -EBUSY; |
357 | } | |
b462e1b2 SY |
358 | retval = devm_request_irq(&sir_ir_dev->dev, irq, sir_interrupt, 0, |
359 | KBUILD_MODNAME, NULL); | |
404f3e95 | 360 | if (retval < 0) { |
014f0066 | 361 | pr_err("IRQ %d already in use.\n", irq); |
404f3e95 JW |
362 | return retval; |
363 | } | |
30b4e122 SY |
364 | |
365 | retval = init_hardware(); | |
366 | if (retval) { | |
367 | del_timer_sync(&timerlist); | |
368 | return retval; | |
369 | } | |
370 | ||
014f0066 | 371 | pr_info("I/O port 0x%.4x, IRQ %d.\n", io, irq); |
404f3e95 | 372 | |
c52f2ba7 | 373 | retval = devm_rc_register_device(&sir_ir_dev->dev, rcdev); |
cf9ed9aa SY |
374 | if (retval < 0) |
375 | return retval; | |
376 | ||
c52f2ba7 | 377 | return 0; |
4b71ca6b JW |
378 | } |
379 | ||
cc06393a | 380 | static int sir_ir_remove(struct platform_device *dev) |
4b71ca6b | 381 | { |
1beb5a7d | 382 | drop_hardware(); |
f23f5408 | 383 | del_timer_sync(&timerlist); |
4b71ca6b JW |
384 | return 0; |
385 | } | |
386 | ||
cc06393a SY |
387 | static struct platform_driver sir_ir_driver = { |
388 | .probe = sir_ir_probe, | |
389 | .remove = sir_ir_remove, | |
4b71ca6b | 390 | .driver = { |
cc06393a | 391 | .name = "sir_ir", |
4b71ca6b JW |
392 | }, |
393 | }; | |
404f3e95 | 394 | |
cc06393a | 395 | static int __init sir_ir_init(void) |
404f3e95 JW |
396 | { |
397 | int retval; | |
398 | ||
cc06393a | 399 | retval = platform_driver_register(&sir_ir_driver); |
4d7cf7ec SY |
400 | if (retval) |
401 | return retval; | |
4b71ca6b | 402 | |
cc06393a SY |
403 | sir_ir_dev = platform_device_alloc("sir_ir", 0); |
404 | if (!sir_ir_dev) { | |
4b71ca6b JW |
405 | retval = -ENOMEM; |
406 | goto pdev_alloc_fail; | |
407 | } | |
408 | ||
cc06393a | 409 | retval = platform_device_add(sir_ir_dev); |
4d7cf7ec | 410 | if (retval) |
4b71ca6b | 411 | goto pdev_add_fail; |
4b71ca6b | 412 | |
404f3e95 | 413 | return 0; |
4b71ca6b | 414 | |
4b71ca6b | 415 | pdev_add_fail: |
cc06393a | 416 | platform_device_put(sir_ir_dev); |
4b71ca6b | 417 | pdev_alloc_fail: |
cc06393a | 418 | platform_driver_unregister(&sir_ir_driver); |
4b71ca6b | 419 | return retval; |
404f3e95 JW |
420 | } |
421 | ||
cc06393a | 422 | static void __exit sir_ir_exit(void) |
404f3e95 | 423 | { |
cc06393a SY |
424 | platform_device_unregister(sir_ir_dev); |
425 | platform_driver_unregister(&sir_ir_driver); | |
404f3e95 JW |
426 | } |
427 | ||
cc06393a SY |
428 | module_init(sir_ir_init); |
429 | module_exit(sir_ir_exit); | |
404f3e95 | 430 | |
404f3e95 JW |
431 | MODULE_DESCRIPTION("Infrared receiver driver for SIR type serial ports"); |
432 | MODULE_AUTHOR("Milan Pikula"); | |
404f3e95 JW |
433 | MODULE_LICENSE("GPL"); |
434 | ||
6709e03c | 435 | module_param_hw(io, int, ioport, 0444); |
404f3e95 JW |
436 | MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)"); |
437 | ||
6709e03c | 438 | module_param_hw(irq, int, irq, 0444); |
404f3e95 JW |
439 | MODULE_PARM_DESC(irq, "Interrupt (4 or 3)"); |
440 | ||
5cd6522c | 441 | module_param(threshold, int, 0444); |
404f3e95 | 442 | MODULE_PARM_DESC(threshold, "space detection threshold (3)"); |