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1 | /* |
2 | * NXP TDA18218HN silicon tuner driver | |
3 | * | |
4 | * Copyright (C) 2010 Antti Palosaari <crope@iki.fi> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | */ | |
20 | ||
21 | #ifndef TDA18218_PRIV_H | |
22 | #define TDA18218_PRIV_H | |
23 | ||
9edd6987 | 24 | #include "tda18218.h" |
51ff2e2c AP |
25 | |
26 | #define R00_ID 0x00 /* ID byte */ | |
27 | #define R01_R1 0x01 /* Read byte 1 */ | |
28 | #define R02_R2 0x02 /* Read byte 2 */ | |
29 | #define R03_R3 0x03 /* Read byte 3 */ | |
30 | #define R04_R4 0x04 /* Read byte 4 */ | |
31 | #define R05_R5 0x05 /* Read byte 5 */ | |
32 | #define R06_R6 0x06 /* Read byte 6 */ | |
33 | #define R07_MD1 0x07 /* Main divider byte 1 */ | |
34 | #define R08_PSM1 0x08 /* PSM byte 1 */ | |
35 | #define R09_MD2 0x09 /* Main divider byte 2 */ | |
36 | #define R0A_MD3 0x0a /* Main divider byte 1 */ | |
37 | #define R0B_MD4 0x0b /* Main divider byte 4 */ | |
38 | #define R0C_MD5 0x0c /* Main divider byte 5 */ | |
39 | #define R0D_MD6 0x0d /* Main divider byte 6 */ | |
40 | #define R0E_MD7 0x0e /* Main divider byte 7 */ | |
41 | #define R0F_MD8 0x0f /* Main divider byte 8 */ | |
42 | #define R10_CD1 0x10 /* Call divider byte 1 */ | |
43 | #define R11_CD2 0x11 /* Call divider byte 2 */ | |
44 | #define R12_CD3 0x12 /* Call divider byte 3 */ | |
45 | #define R13_CD4 0x13 /* Call divider byte 4 */ | |
46 | #define R14_CD5 0x14 /* Call divider byte 5 */ | |
47 | #define R15_CD6 0x15 /* Call divider byte 6 */ | |
48 | #define R16_CD7 0x16 /* Call divider byte 7 */ | |
49 | #define R17_PD1 0x17 /* Power-down byte 1 */ | |
50 | #define R18_PD2 0x18 /* Power-down byte 2 */ | |
51 | #define R19_XTOUT 0x19 /* XTOUT byte */ | |
52 | #define R1A_IF1 0x1a /* IF byte 1 */ | |
53 | #define R1B_IF2 0x1b /* IF byte 2 */ | |
54 | #define R1C_AGC2B 0x1c /* AGC2b byte */ | |
55 | #define R1D_PSM2 0x1d /* PSM byte 2 */ | |
56 | #define R1E_PSM3 0x1e /* PSM byte 3 */ | |
57 | #define R1F_PSM4 0x1f /* PSM byte 4 */ | |
58 | #define R20_AGC11 0x20 /* AGC1 byte 1 */ | |
59 | #define R21_AGC12 0x21 /* AGC1 byte 2 */ | |
60 | #define R22_AGC13 0x22 /* AGC1 byte 3 */ | |
61 | #define R23_AGC21 0x23 /* AGC2 byte 1 */ | |
62 | #define R24_AGC22 0x24 /* AGC2 byte 2 */ | |
63 | #define R25_AAGC 0x25 /* Analog AGC byte */ | |
64 | #define R26_RC 0x26 /* RC byte */ | |
65 | #define R27_RSSI 0x27 /* RSSI byte */ | |
66 | #define R28_IRCAL1 0x28 /* IR CAL byte 1 */ | |
67 | #define R29_IRCAL2 0x29 /* IR CAL byte 2 */ | |
68 | #define R2A_IRCAL3 0x2a /* IR CAL byte 3 */ | |
69 | #define R2B_IRCAL4 0x2b /* IR CAL byte 4 */ | |
70 | #define R2C_RFCAL1 0x2c /* RF CAL byte 1 */ | |
71 | #define R2D_RFCAL2 0x2d /* RF CAL byte 2 */ | |
72 | #define R2E_RFCAL3 0x2e /* RF CAL byte 3 */ | |
73 | #define R2F_RFCAL4 0x2f /* RF CAL byte 4 */ | |
74 | #define R30_RFCAL5 0x30 /* RF CAL byte 5 */ | |
75 | #define R31_RFCAL6 0x31 /* RF CAL byte 6 */ | |
76 | #define R32_RFCAL7 0x32 /* RF CAL byte 7 */ | |
77 | #define R33_RFCAL8 0x33 /* RF CAL byte 8 */ | |
78 | #define R34_RFCAL9 0x34 /* RF CAL byte 9 */ | |
79 | #define R35_RFCAL10 0x35 /* RF CAL byte 10 */ | |
80 | #define R36_RFCALRAM1 0x36 /* RF CAL RAM byte 1 */ | |
81 | #define R37_RFCALRAM2 0x37 /* RF CAL RAM byte 2 */ | |
82 | #define R38_MARGIN 0x38 /* Margin byte */ | |
83 | #define R39_FMAX1 0x39 /* Fmax byte 1 */ | |
84 | #define R3A_FMAX2 0x3a /* Fmax byte 2 */ | |
85 | ||
86 | #define TDA18218_NUM_REGS 59 | |
87 | ||
88 | struct tda18218_priv { | |
89 | struct tda18218_config *cfg; | |
90 | struct i2c_adapter *i2c; | |
91 | ||
522fdf73 AP |
92 | u32 if_frequency; |
93 | ||
51ff2e2c AP |
94 | u8 regs[TDA18218_NUM_REGS]; |
95 | }; | |
96 | ||
97 | #endif |