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Commit | Line | Data |
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aacb9d31 ST |
1 | /* |
2 | * Driver for Xceive XC5000 "QAM/8VSB single chip tuner" | |
3 | * | |
4 | * Copyright (c) 2007 Xceive Corporation | |
6d897616 | 5 | * Copyright (c) 2007 Steven Toth <stoth@linuxtv.org> |
e80858e8 | 6 | * Copyright (c) 2009 Devin Heitmueller <dheitmueller@kernellabs.com> |
aacb9d31 ST |
7 | * |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | */ | |
23 | ||
24 | #include <linux/module.h> | |
25 | #include <linux/moduleparam.h> | |
4917019d | 26 | #include <linux/videodev2.h> |
aacb9d31 | 27 | #include <linux/delay.h> |
f7a27ff1 | 28 | #include <linux/workqueue.h> |
aacb9d31 ST |
29 | #include <linux/dvb/frontend.h> |
30 | #include <linux/i2c.h> | |
31 | ||
32 | #include "dvb_frontend.h" | |
33 | ||
34 | #include "xc5000.h" | |
89fd2854 | 35 | #include "tuner-i2c.h" |
aacb9d31 ST |
36 | |
37 | static int debug; | |
38 | module_param(debug, int, 0644); | |
39 | MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off)."); | |
40 | ||
b6bd5eb8 DH |
41 | static int no_poweroff; |
42 | module_param(no_poweroff, int, 0644); | |
43 | MODULE_PARM_DESC(no_poweroff, "0 (default) powers device off when not used.\n" | |
44 | "\t\t1 keep device energized and with tuner ready all the times.\n" | |
45 | "\t\tFaster, but consumes more power and keeps the device hotter"); | |
46 | ||
89fd2854 MK |
47 | static DEFINE_MUTEX(xc5000_list_mutex); |
48 | static LIST_HEAD(hybrid_tuner_instance_list); | |
49 | ||
8f3cd530 | 50 | #define dprintk(level, fmt, arg...) if (debug >= level) \ |
aacb9d31 ST |
51 | printk(KERN_INFO "%s: " fmt, "xc5000", ## arg) |
52 | ||
ffb41234 | 53 | struct xc5000_priv { |
89fd2854 MK |
54 | struct tuner_i2c_props i2c_props; |
55 | struct list_head hybrid_tuner_instance_list; | |
ffb41234 | 56 | |
2a6003c2 | 57 | u32 if_khz; |
409328a4 | 58 | u16 xtal_khz; |
a3eec916 | 59 | u32 freq_hz, freq_offset; |
ffb41234 MK |
60 | u32 bandwidth; |
61 | u8 video_standard; | |
16435202 | 62 | unsigned int mode; |
ffb41234 | 63 | u8 rf_mode; |
496e9057 | 64 | u8 radio_input; |
76efb0ba | 65 | |
6fab81df | 66 | int chip_id; |
de49bc6e | 67 | u16 pll_register_no; |
22d5c6f5 DH |
68 | u8 init_status_supported; |
69 | u8 fw_checksum_supported; | |
f7a27ff1 MCC |
70 | |
71 | struct dvb_frontend *fe; | |
72 | struct delayed_work timer_sleep; | |
5264a522 SK |
73 | |
74 | const struct firmware *firmware; | |
ffb41234 MK |
75 | }; |
76 | ||
aacb9d31 | 77 | /* Misc Defines */ |
724dcbfa | 78 | #define MAX_TV_STANDARD 24 |
aacb9d31 ST |
79 | #define XC_MAX_I2C_WRITE_LENGTH 64 |
80 | ||
f7a27ff1 MCC |
81 | /* Time to suspend after the .sleep callback is called */ |
82 | #define XC5000_SLEEP_TIME 5000 /* ms */ | |
83 | ||
aacb9d31 ST |
84 | /* Signal Types */ |
85 | #define XC_RF_MODE_AIR 0 | |
86 | #define XC_RF_MODE_CABLE 1 | |
87 | ||
27c685a4 ST |
88 | /* Product id */ |
89 | #define XC_PRODUCT_ID_FW_NOT_LOADED 0x2000 | |
5015c27b | 90 | #define XC_PRODUCT_ID_FW_LOADED 0x1388 |
27c685a4 | 91 | |
aacb9d31 ST |
92 | /* Registers */ |
93 | #define XREG_INIT 0x00 | |
94 | #define XREG_VIDEO_MODE 0x01 | |
95 | #define XREG_AUDIO_MODE 0x02 | |
96 | #define XREG_RF_FREQ 0x03 | |
97 | #define XREG_D_CODE 0x04 | |
98 | #define XREG_IF_OUT 0x05 | |
99 | #define XREG_SEEK_MODE 0x07 | |
7f05b530 | 100 | #define XREG_POWER_DOWN 0x0A /* Obsolete */ |
724dcbfa DB |
101 | /* Set the output amplitude - SIF for analog, DTVP/DTVN for digital */ |
102 | #define XREG_OUTPUT_AMP 0x0B | |
aacb9d31 ST |
103 | #define XREG_SIGNALSOURCE 0x0D /* 0=Air, 1=Cable */ |
104 | #define XREG_SMOOTHEDCVBS 0x0E | |
105 | #define XREG_XTALFREQ 0x0F | |
81c4dfe7 | 106 | #define XREG_FINERFREQ 0x10 |
aacb9d31 ST |
107 | #define XREG_DDIMODE 0x11 |
108 | ||
109 | #define XREG_ADC_ENV 0x00 | |
110 | #define XREG_QUALITY 0x01 | |
111 | #define XREG_FRAME_LINES 0x02 | |
112 | #define XREG_HSYNC_FREQ 0x03 | |
113 | #define XREG_LOCK 0x04 | |
114 | #define XREG_FREQ_ERROR 0x05 | |
115 | #define XREG_SNR 0x06 | |
116 | #define XREG_VERSION 0x07 | |
117 | #define XREG_PRODUCT_ID 0x08 | |
118 | #define XREG_BUSY 0x09 | |
bae7b7d7 | 119 | #define XREG_BUILD 0x0D |
7c287f18 | 120 | #define XREG_TOTALGAIN 0x0F |
22d5c6f5 DH |
121 | #define XREG_FW_CHECKSUM 0x12 |
122 | #define XREG_INIT_STATUS 0x13 | |
aacb9d31 ST |
123 | |
124 | /* | |
125 | Basic firmware description. This will remain with | |
126 | the driver for documentation purposes. | |
127 | ||
128 | This represents an I2C firmware file encoded as a | |
129 | string of unsigned char. Format is as follows: | |
130 | ||
131 | char[0 ]=len0_MSB -> len = len_MSB * 256 + len_LSB | |
132 | char[1 ]=len0_LSB -> length of first write transaction | |
133 | char[2 ]=data0 -> first byte to be sent | |
134 | char[3 ]=data1 | |
135 | char[4 ]=data2 | |
136 | char[ ]=... | |
137 | char[M ]=dataN -> last byte to be sent | |
138 | char[M+1]=len1_MSB -> len = len_MSB * 256 + len_LSB | |
139 | char[M+2]=len1_LSB -> length of second write transaction | |
140 | char[M+3]=data0 | |
141 | char[M+4]=data1 | |
142 | ... | |
143 | etc. | |
144 | ||
145 | The [len] value should be interpreted as follows: | |
146 | ||
147 | len= len_MSB _ len_LSB | |
148 | len=1111_1111_1111_1111 : End of I2C_SEQUENCE | |
149 | len=0000_0000_0000_0000 : Reset command: Do hardware reset | |
150 | len=0NNN_NNNN_NNNN_NNNN : Normal transaction: number of bytes = {1:32767) | |
151 | len=1WWW_WWWW_WWWW_WWWW : Wait command: wait for {1:32767} ms | |
152 | ||
153 | For the RESET and WAIT commands, the two following bytes will contain | |
154 | immediately the length of the following transaction. | |
155 | ||
156 | */ | |
8f3cd530 | 157 | struct XC_TV_STANDARD { |
303ddd92 MCC |
158 | char *name; |
159 | u16 audio_mode; | |
160 | u16 video_mode; | |
8f3cd530 | 161 | }; |
aacb9d31 ST |
162 | |
163 | /* Tuner standards */ | |
27c685a4 ST |
164 | #define MN_NTSC_PAL_BTSC 0 |
165 | #define MN_NTSC_PAL_A2 1 | |
166 | #define MN_NTSC_PAL_EIAJ 2 | |
303ddd92 | 167 | #define MN_NTSC_PAL_MONO 3 |
27c685a4 ST |
168 | #define BG_PAL_A2 4 |
169 | #define BG_PAL_NICAM 5 | |
170 | #define BG_PAL_MONO 6 | |
171 | #define I_PAL_NICAM 7 | |
172 | #define I_PAL_NICAM_MONO 8 | |
173 | #define DK_PAL_A2 9 | |
174 | #define DK_PAL_NICAM 10 | |
175 | #define DK_PAL_MONO 11 | |
176 | #define DK_SECAM_A2DK1 12 | |
5015c27b MCC |
177 | #define DK_SECAM_A2LDK3 13 |
178 | #define DK_SECAM_A2MONO 14 | |
27c685a4 ST |
179 | #define L_SECAM_NICAM 15 |
180 | #define LC_SECAM_NICAM 16 | |
181 | #define DTV6 17 | |
182 | #define DTV8 18 | |
183 | #define DTV7_8 19 | |
184 | #define DTV7 20 | |
5015c27b MCC |
185 | #define FM_RADIO_INPUT2 21 |
186 | #define FM_RADIO_INPUT1 22 | |
303ddd92 | 187 | #define FM_RADIO_INPUT1_MONO 23 |
aacb9d31 | 188 | |
303ddd92 | 189 | static struct XC_TV_STANDARD xc5000_standard[MAX_TV_STANDARD] = { |
aacb9d31 ST |
190 | {"M/N-NTSC/PAL-BTSC", 0x0400, 0x8020}, |
191 | {"M/N-NTSC/PAL-A2", 0x0600, 0x8020}, | |
192 | {"M/N-NTSC/PAL-EIAJ", 0x0440, 0x8020}, | |
193 | {"M/N-NTSC/PAL-Mono", 0x0478, 0x8020}, | |
194 | {"B/G-PAL-A2", 0x0A00, 0x8049}, | |
195 | {"B/G-PAL-NICAM", 0x0C04, 0x8049}, | |
196 | {"B/G-PAL-MONO", 0x0878, 0x8059}, | |
197 | {"I-PAL-NICAM", 0x1080, 0x8009}, | |
198 | {"I-PAL-NICAM-MONO", 0x0E78, 0x8009}, | |
199 | {"D/K-PAL-A2", 0x1600, 0x8009}, | |
200 | {"D/K-PAL-NICAM", 0x0E80, 0x8009}, | |
201 | {"D/K-PAL-MONO", 0x1478, 0x8009}, | |
202 | {"D/K-SECAM-A2 DK1", 0x1200, 0x8009}, | |
8f3cd530 | 203 | {"D/K-SECAM-A2 L/DK3", 0x0E00, 0x8009}, |
aacb9d31 ST |
204 | {"D/K-SECAM-A2 MONO", 0x1478, 0x8009}, |
205 | {"L-SECAM-NICAM", 0x8E82, 0x0009}, | |
206 | {"L'-SECAM-NICAM", 0x8E82, 0x4009}, | |
207 | {"DTV6", 0x00C0, 0x8002}, | |
208 | {"DTV8", 0x00C0, 0x800B}, | |
209 | {"DTV7/8", 0x00C0, 0x801B}, | |
210 | {"DTV7", 0x00C0, 0x8007}, | |
211 | {"FM Radio-INPUT2", 0x9802, 0x9002}, | |
724dcbfa DB |
212 | {"FM Radio-INPUT1", 0x0208, 0x9002}, |
213 | {"FM Radio-INPUT1_MONO", 0x0278, 0x9002} | |
aacb9d31 ST |
214 | }; |
215 | ||
ddea427f MK |
216 | |
217 | struct xc5000_fw_cfg { | |
218 | char *name; | |
219 | u16 size; | |
de49bc6e | 220 | u16 pll_reg; |
22d5c6f5 DH |
221 | u8 init_status_supported; |
222 | u8 fw_checksum_supported; | |
ddea427f MK |
223 | }; |
224 | ||
3422f2a6 | 225 | #define XC5000A_FIRMWARE "dvb-fe-xc5000-1.6.114.fw" |
a3db60bc | 226 | static const struct xc5000_fw_cfg xc5000a_1_6_114 = { |
3422f2a6 | 227 | .name = XC5000A_FIRMWARE, |
76efb0ba | 228 | .size = 12401, |
de49bc6e | 229 | .pll_reg = 0x806c, |
76efb0ba MK |
230 | }; |
231 | ||
3de5bffd | 232 | #define XC5000C_FIRMWARE "dvb-fe-xc5000c-4.1.30.7.fw" |
7d3d0d8d | 233 | static const struct xc5000_fw_cfg xc5000c_41_024_5 = { |
3422f2a6 | 234 | .name = XC5000C_FIRMWARE, |
7d3d0d8d | 235 | .size = 16497, |
de49bc6e | 236 | .pll_reg = 0x13, |
22d5c6f5 DH |
237 | .init_status_supported = 1, |
238 | .fw_checksum_supported = 1, | |
d8398805 MK |
239 | }; |
240 | ||
a3db60bc | 241 | static inline const struct xc5000_fw_cfg *xc5000_assign_firmware(int chip_id) |
ddea427f | 242 | { |
6fab81df | 243 | switch (chip_id) { |
ddea427f | 244 | default: |
6fab81df | 245 | case XC5000A: |
ddea427f | 246 | return &xc5000a_1_6_114; |
6fab81df | 247 | case XC5000C: |
7d3d0d8d | 248 | return &xc5000c_41_024_5; |
ddea427f MK |
249 | } |
250 | } | |
251 | ||
de49bc6e | 252 | static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force); |
91bd625e | 253 | static int xc5000_is_firmware_loaded(struct dvb_frontend *fe); |
bdd33563 | 254 | static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val); |
303ddd92 | 255 | static int xc5000_tuner_reset(struct dvb_frontend *fe); |
aacb9d31 | 256 | |
e12671cf | 257 | static int xc_send_i2c_data(struct xc5000_priv *priv, u8 *buf, int len) |
aacb9d31 | 258 | { |
d7800d4e DH |
259 | struct i2c_msg msg = { .addr = priv->i2c_props.addr, |
260 | .flags = 0, .buf = buf, .len = len }; | |
261 | ||
262 | if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) { | |
263 | printk(KERN_ERR "xc5000: I2C write failed (len=%i)\n", len); | |
859ae7f0 | 264 | return -EREMOTEIO; |
d7800d4e | 265 | } |
859ae7f0 | 266 | return 0; |
aacb9d31 ST |
267 | } |
268 | ||
1cdffda7 | 269 | #if 0 |
bdd33563 DH |
270 | /* This routine is never used because the only time we read data from the |
271 | i2c bus is when we read registers, and we want that to be an atomic i2c | |
272 | transaction in case we are on a multi-master bus */ | |
e12671cf | 273 | static int xc_read_i2c_data(struct xc5000_priv *priv, u8 *buf, int len) |
aacb9d31 | 274 | { |
bdd33563 DH |
275 | struct i2c_msg msg = { .addr = priv->i2c_props.addr, |
276 | .flags = I2C_M_RD, .buf = buf, .len = len }; | |
277 | ||
278 | if (i2c_transfer(priv->i2c_props.adap, &msg, 1) != 1) { | |
279 | printk(KERN_ERR "xc5000 I2C read failed (len=%i)\n", len); | |
280 | return -EREMOTEIO; | |
281 | } | |
282 | return 0; | |
aacb9d31 | 283 | } |
1cdffda7 | 284 | #endif |
aacb9d31 | 285 | |
4743319f DB |
286 | static int xc5000_readreg(struct xc5000_priv *priv, u16 reg, u16 *val) |
287 | { | |
288 | u8 buf[2] = { reg >> 8, reg & 0xff }; | |
289 | u8 bval[2] = { 0, 0 }; | |
290 | struct i2c_msg msg[2] = { | |
291 | { .addr = priv->i2c_props.addr, | |
292 | .flags = 0, .buf = &buf[0], .len = 2 }, | |
293 | { .addr = priv->i2c_props.addr, | |
294 | .flags = I2C_M_RD, .buf = &bval[0], .len = 2 }, | |
295 | }; | |
296 | ||
297 | if (i2c_transfer(priv->i2c_props.adap, msg, 2) != 2) { | |
298 | printk(KERN_WARNING "xc5000: I2C read failed\n"); | |
299 | return -EREMOTEIO; | |
300 | } | |
301 | ||
302 | *val = (bval[0] << 8) | bval[1]; | |
859ae7f0 | 303 | return 0; |
4743319f DB |
304 | } |
305 | ||
303ddd92 | 306 | static int xc5000_tuner_reset(struct dvb_frontend *fe) |
aacb9d31 ST |
307 | { |
308 | struct xc5000_priv *priv = fe->tuner_priv; | |
309 | int ret; | |
310 | ||
271ddbf7 | 311 | dprintk(1, "%s()\n", __func__); |
aacb9d31 | 312 | |
d7cba043 MK |
313 | if (fe->callback) { |
314 | ret = fe->callback(((fe->dvb) && (fe->dvb->priv)) ? | |
30650961 MK |
315 | fe->dvb->priv : |
316 | priv->i2c_props.adap->algo_data, | |
d7cba043 | 317 | DVB_FRONTEND_COMPONENT_TUNER, |
30650961 | 318 | XC5000_TUNER_RESET, 0); |
91bd625e | 319 | if (ret) { |
aacb9d31 | 320 | printk(KERN_ERR "xc5000: reset failed\n"); |
859ae7f0 | 321 | return ret; |
91bd625e DH |
322 | } |
323 | } else { | |
27c685a4 | 324 | printk(KERN_ERR "xc5000: no tuner reset callback function, fatal\n"); |
859ae7f0 | 325 | return -EINVAL; |
91bd625e | 326 | } |
859ae7f0 | 327 | return 0; |
aacb9d31 ST |
328 | } |
329 | ||
303ddd92 | 330 | static int xc_write_reg(struct xc5000_priv *priv, u16 reg_addr, u16 i2c_data) |
aacb9d31 | 331 | { |
e12671cf | 332 | u8 buf[4]; |
303ddd92 | 333 | int watch_dog_timer = 100; |
aacb9d31 ST |
334 | int result; |
335 | ||
303ddd92 MCC |
336 | buf[0] = (reg_addr >> 8) & 0xFF; |
337 | buf[1] = reg_addr & 0xFF; | |
338 | buf[2] = (i2c_data >> 8) & 0xFF; | |
339 | buf[3] = i2c_data & 0xFF; | |
aacb9d31 | 340 | result = xc_send_i2c_data(priv, buf, 4); |
859ae7f0 | 341 | if (result == 0) { |
aacb9d31 | 342 | /* wait for busy flag to clear */ |
303ddd92 | 343 | while ((watch_dog_timer > 0) && (result == 0)) { |
1cdffda7 | 344 | result = xc5000_readreg(priv, XREG_BUSY, (u16 *)buf); |
859ae7f0 | 345 | if (result == 0) { |
4743319f DB |
346 | if ((buf[0] == 0) && (buf[1] == 0)) { |
347 | /* busy flag cleared */ | |
aacb9d31 | 348 | break; |
4743319f | 349 | } else { |
e5bf4a11 | 350 | msleep(5); /* wait 5 ms */ |
303ddd92 | 351 | watch_dog_timer--; |
aacb9d31 ST |
352 | } |
353 | } | |
354 | } | |
355 | } | |
303ddd92 | 356 | if (watch_dog_timer <= 0) |
859ae7f0 | 357 | result = -EREMOTEIO; |
aacb9d31 ST |
358 | |
359 | return result; | |
360 | } | |
361 | ||
c63e87e9 | 362 | static int xc_load_i2c_sequence(struct dvb_frontend *fe, const u8 *i2c_sequence) |
aacb9d31 ST |
363 | { |
364 | struct xc5000_priv *priv = fe->tuner_priv; | |
365 | ||
366 | int i, nbytes_to_send, result; | |
367 | unsigned int len, pos, index; | |
e12671cf | 368 | u8 buf[XC_MAX_I2C_WRITE_LENGTH]; |
aacb9d31 | 369 | |
8f3cd530 ST |
370 | index = 0; |
371 | while ((i2c_sequence[index] != 0xFF) || | |
372 | (i2c_sequence[index + 1] != 0xFF)) { | |
373 | len = i2c_sequence[index] * 256 + i2c_sequence[index+1]; | |
e12671cf | 374 | if (len == 0x0000) { |
aacb9d31 | 375 | /* RESET command */ |
303ddd92 | 376 | result = xc5000_tuner_reset(fe); |
aacb9d31 | 377 | index += 2; |
859ae7f0 | 378 | if (result != 0) |
aacb9d31 ST |
379 | return result; |
380 | } else if (len & 0x8000) { | |
381 | /* WAIT command */ | |
e5bf4a11 | 382 | msleep(len & 0x7FFF); |
aacb9d31 ST |
383 | index += 2; |
384 | } else { | |
385 | /* Send i2c data whilst ensuring individual transactions | |
386 | * do not exceed XC_MAX_I2C_WRITE_LENGTH bytes. | |
387 | */ | |
388 | index += 2; | |
389 | buf[0] = i2c_sequence[index]; | |
390 | buf[1] = i2c_sequence[index + 1]; | |
391 | pos = 2; | |
392 | while (pos < len) { | |
8f3cd530 ST |
393 | if ((len - pos) > XC_MAX_I2C_WRITE_LENGTH - 2) |
394 | nbytes_to_send = | |
395 | XC_MAX_I2C_WRITE_LENGTH; | |
396 | else | |
aacb9d31 | 397 | nbytes_to_send = (len - pos + 2); |
8f3cd530 ST |
398 | for (i = 2; i < nbytes_to_send; i++) { |
399 | buf[i] = i2c_sequence[index + pos + | |
400 | i - 2]; | |
aacb9d31 | 401 | } |
8f3cd530 ST |
402 | result = xc_send_i2c_data(priv, buf, |
403 | nbytes_to_send); | |
aacb9d31 | 404 | |
859ae7f0 | 405 | if (result != 0) |
aacb9d31 ST |
406 | return result; |
407 | ||
408 | pos += nbytes_to_send - 2; | |
409 | } | |
410 | index += len; | |
411 | } | |
412 | } | |
859ae7f0 | 413 | return 0; |
aacb9d31 ST |
414 | } |
415 | ||
e12671cf | 416 | static int xc_initialize(struct xc5000_priv *priv) |
aacb9d31 | 417 | { |
271ddbf7 | 418 | dprintk(1, "%s()\n", __func__); |
aacb9d31 ST |
419 | return xc_write_reg(priv, XREG_INIT, 0); |
420 | } | |
421 | ||
303ddd92 MCC |
422 | static int xc_set_tv_standard(struct xc5000_priv *priv, |
423 | u16 video_mode, u16 audio_mode, u8 radio_mode) | |
aacb9d31 ST |
424 | { |
425 | int ret; | |
303ddd92 MCC |
426 | dprintk(1, "%s(0x%04x,0x%04x)\n", __func__, video_mode, audio_mode); |
427 | if (radio_mode) { | |
01ae7286 DB |
428 | dprintk(1, "%s() Standard = %s\n", |
429 | __func__, | |
303ddd92 | 430 | xc5000_standard[radio_mode].name); |
01ae7286 DB |
431 | } else { |
432 | dprintk(1, "%s() Standard = %s\n", | |
433 | __func__, | |
303ddd92 | 434 | xc5000_standard[priv->video_standard].name); |
01ae7286 | 435 | } |
aacb9d31 | 436 | |
303ddd92 | 437 | ret = xc_write_reg(priv, XREG_VIDEO_MODE, video_mode); |
859ae7f0 | 438 | if (ret == 0) |
303ddd92 | 439 | ret = xc_write_reg(priv, XREG_AUDIO_MODE, audio_mode); |
aacb9d31 ST |
440 | |
441 | return ret; | |
442 | } | |
443 | ||
303ddd92 | 444 | static int xc_set_signal_source(struct xc5000_priv *priv, u16 rf_mode) |
aacb9d31 | 445 | { |
271ddbf7 | 446 | dprintk(1, "%s(%d) Source = %s\n", __func__, rf_mode, |
aacb9d31 ST |
447 | rf_mode == XC_RF_MODE_AIR ? "ANTENNA" : "CABLE"); |
448 | ||
8f3cd530 | 449 | if ((rf_mode != XC_RF_MODE_AIR) && (rf_mode != XC_RF_MODE_CABLE)) { |
aacb9d31 ST |
450 | rf_mode = XC_RF_MODE_CABLE; |
451 | printk(KERN_ERR | |
452 | "%s(), Invalid mode, defaulting to CABLE", | |
271ddbf7 | 453 | __func__); |
aacb9d31 ST |
454 | } |
455 | return xc_write_reg(priv, XREG_SIGNALSOURCE, rf_mode); | |
456 | } | |
457 | ||
e12671cf | 458 | static const struct dvb_tuner_ops xc5000_tuner_ops; |
aacb9d31 | 459 | |
303ddd92 | 460 | static int xc_set_rf_frequency(struct xc5000_priv *priv, u32 freq_hz) |
e12671cf ST |
461 | { |
462 | u16 freq_code; | |
aacb9d31 | 463 | |
271ddbf7 | 464 | dprintk(1, "%s(%u)\n", __func__, freq_hz); |
aacb9d31 | 465 | |
e12671cf ST |
466 | if ((freq_hz > xc5000_tuner_ops.info.frequency_max) || |
467 | (freq_hz < xc5000_tuner_ops.info.frequency_min)) | |
859ae7f0 | 468 | return -EINVAL; |
aacb9d31 | 469 | |
e12671cf ST |
470 | freq_code = (u16)(freq_hz / 15625); |
471 | ||
81c4dfe7 DH |
472 | /* Starting in firmware version 1.1.44, Xceive recommends using the |
473 | FINERFREQ for all normal tuning (the doc indicates reg 0x03 should | |
474 | only be used for fast scanning for channel lock) */ | |
475 | return xc_write_reg(priv, XREG_FINERFREQ, freq_code); | |
aacb9d31 ST |
476 | } |
477 | ||
aacb9d31 | 478 | |
e12671cf ST |
479 | static int xc_set_IF_frequency(struct xc5000_priv *priv, u32 freq_khz) |
480 | { | |
481 | u32 freq_code = (freq_khz * 1024)/1000; | |
482 | dprintk(1, "%s(freq_khz = %d) freq_code = 0x%x\n", | |
271ddbf7 | 483 | __func__, freq_khz, freq_code); |
aacb9d31 | 484 | |
e12671cf | 485 | return xc_write_reg(priv, XREG_IF_OUT, freq_code); |
aacb9d31 ST |
486 | } |
487 | ||
aacb9d31 | 488 | |
303ddd92 | 489 | static int xc_get_adc_envelope(struct xc5000_priv *priv, u16 *adc_envelope) |
aacb9d31 | 490 | { |
bdd33563 | 491 | return xc5000_readreg(priv, XREG_ADC_ENV, adc_envelope); |
aacb9d31 ST |
492 | } |
493 | ||
e12671cf | 494 | static int xc_get_frequency_error(struct xc5000_priv *priv, u32 *freq_error_hz) |
aacb9d31 ST |
495 | { |
496 | int result; | |
303ddd92 | 497 | u16 reg_data; |
aacb9d31 ST |
498 | u32 tmp; |
499 | ||
303ddd92 | 500 | result = xc5000_readreg(priv, XREG_FREQ_ERROR, ®_data); |
859ae7f0 | 501 | if (result != 0) |
aacb9d31 ST |
502 | return result; |
503 | ||
303ddd92 | 504 | tmp = (u32)reg_data; |
e12671cf | 505 | (*freq_error_hz) = (tmp * 15625) / 1000; |
aacb9d31 ST |
506 | return result; |
507 | } | |
508 | ||
e12671cf | 509 | static int xc_get_lock_status(struct xc5000_priv *priv, u16 *lock_status) |
aacb9d31 | 510 | { |
bdd33563 | 511 | return xc5000_readreg(priv, XREG_LOCK, lock_status); |
aacb9d31 ST |
512 | } |
513 | ||
e12671cf ST |
514 | static int xc_get_version(struct xc5000_priv *priv, |
515 | u8 *hw_majorversion, u8 *hw_minorversion, | |
516 | u8 *fw_majorversion, u8 *fw_minorversion) | |
aacb9d31 | 517 | { |
e12671cf | 518 | u16 data; |
aacb9d31 ST |
519 | int result; |
520 | ||
bdd33563 | 521 | result = xc5000_readreg(priv, XREG_VERSION, &data); |
859ae7f0 | 522 | if (result != 0) |
aacb9d31 ST |
523 | return result; |
524 | ||
e12671cf ST |
525 | (*hw_majorversion) = (data >> 12) & 0x0F; |
526 | (*hw_minorversion) = (data >> 8) & 0x0F; | |
527 | (*fw_majorversion) = (data >> 4) & 0x0F; | |
528 | (*fw_minorversion) = data & 0x0F; | |
aacb9d31 ST |
529 | |
530 | return 0; | |
531 | } | |
532 | ||
bae7b7d7 DH |
533 | static int xc_get_buildversion(struct xc5000_priv *priv, u16 *buildrev) |
534 | { | |
535 | return xc5000_readreg(priv, XREG_BUILD, buildrev); | |
536 | } | |
537 | ||
e12671cf | 538 | static int xc_get_hsync_freq(struct xc5000_priv *priv, u32 *hsync_freq_hz) |
aacb9d31 | 539 | { |
303ddd92 | 540 | u16 reg_data; |
aacb9d31 ST |
541 | int result; |
542 | ||
303ddd92 | 543 | result = xc5000_readreg(priv, XREG_HSYNC_FREQ, ®_data); |
859ae7f0 | 544 | if (result != 0) |
aacb9d31 ST |
545 | return result; |
546 | ||
303ddd92 | 547 | (*hsync_freq_hz) = ((reg_data & 0x0fff) * 763)/100; |
aacb9d31 ST |
548 | return result; |
549 | } | |
550 | ||
e12671cf | 551 | static int xc_get_frame_lines(struct xc5000_priv *priv, u16 *frame_lines) |
aacb9d31 | 552 | { |
bdd33563 | 553 | return xc5000_readreg(priv, XREG_FRAME_LINES, frame_lines); |
aacb9d31 ST |
554 | } |
555 | ||
e12671cf | 556 | static int xc_get_quality(struct xc5000_priv *priv, u16 *quality) |
aacb9d31 | 557 | { |
bdd33563 | 558 | return xc5000_readreg(priv, XREG_QUALITY, quality); |
aacb9d31 ST |
559 | } |
560 | ||
7c287f18 DH |
561 | static int xc_get_analogsnr(struct xc5000_priv *priv, u16 *snr) |
562 | { | |
563 | return xc5000_readreg(priv, XREG_SNR, snr); | |
564 | } | |
565 | ||
566 | static int xc_get_totalgain(struct xc5000_priv *priv, u16 *totalgain) | |
567 | { | |
568 | return xc5000_readreg(priv, XREG_TOTALGAIN, totalgain); | |
569 | } | |
570 | ||
303ddd92 | 571 | static u16 wait_for_lock(struct xc5000_priv *priv) |
aacb9d31 | 572 | { |
303ddd92 MCC |
573 | u16 lock_state = 0; |
574 | int watch_dog_count = 40; | |
e12671cf | 575 | |
303ddd92 MCC |
576 | while ((lock_state == 0) && (watch_dog_count > 0)) { |
577 | xc_get_lock_status(priv, &lock_state); | |
578 | if (lock_state != 1) { | |
e5bf4a11 | 579 | msleep(5); |
303ddd92 | 580 | watch_dog_count--; |
aacb9d31 ST |
581 | } |
582 | } | |
303ddd92 | 583 | return lock_state; |
aacb9d31 ST |
584 | } |
585 | ||
a78baacf DH |
586 | #define XC_TUNE_ANALOG 0 |
587 | #define XC_TUNE_DIGITAL 1 | |
588 | static int xc_tune_channel(struct xc5000_priv *priv, u32 freq_hz, int mode) | |
aacb9d31 ST |
589 | { |
590 | int found = 0; | |
591 | ||
271ddbf7 | 592 | dprintk(1, "%s(%u)\n", __func__, freq_hz); |
aacb9d31 | 593 | |
303ddd92 | 594 | if (xc_set_rf_frequency(priv, freq_hz) != 0) |
aacb9d31 ST |
595 | return 0; |
596 | ||
a78baacf | 597 | if (mode == XC_TUNE_ANALOG) { |
303ddd92 | 598 | if (wait_for_lock(priv) == 1) |
a78baacf DH |
599 | found = 1; |
600 | } | |
aacb9d31 ST |
601 | |
602 | return found; | |
603 | } | |
604 | ||
7d3d0d8d MK |
605 | static int xc_set_xtal(struct dvb_frontend *fe) |
606 | { | |
607 | struct xc5000_priv *priv = fe->tuner_priv; | |
859ae7f0 | 608 | int ret = 0; |
7d3d0d8d MK |
609 | |
610 | switch (priv->chip_id) { | |
611 | default: | |
612 | case XC5000A: | |
613 | /* 32.000 MHz xtal is default */ | |
614 | break; | |
615 | case XC5000C: | |
616 | switch (priv->xtal_khz) { | |
617 | default: | |
618 | case 32000: | |
619 | /* 32.000 MHz xtal is default */ | |
620 | break; | |
621 | case 31875: | |
622 | /* 31.875 MHz xtal configuration */ | |
623 | ret = xc_write_reg(priv, 0x000f, 0x8081); | |
624 | break; | |
625 | } | |
626 | break; | |
627 | } | |
628 | return ret; | |
629 | } | |
aacb9d31 | 630 | |
8604f355 MCC |
631 | static int xc5000_fwupload(struct dvb_frontend *fe, |
632 | const struct xc5000_fw_cfg *desired_fw, | |
633 | const struct firmware *fw) | |
aacb9d31 ST |
634 | { |
635 | struct xc5000_priv *priv = fe->tuner_priv; | |
aacb9d31 ST |
636 | int ret; |
637 | ||
e12671cf | 638 | /* request the firmware, this will block and timeout */ |
8604f355 | 639 | dprintk(1, "waiting for firmware upload (%s)...\n", |
6fab81df | 640 | desired_fw->name); |
e12671cf | 641 | |
8604f355 MCC |
642 | priv->pll_register_no = desired_fw->pll_reg; |
643 | priv->init_status_supported = desired_fw->init_status_supported; | |
644 | priv->fw_checksum_supported = desired_fw->fw_checksum_supported; | |
aacb9d31 | 645 | |
aacb9d31 | 646 | |
8604f355 MCC |
647 | dprintk(1, "firmware uploading...\n"); |
648 | ret = xc_load_i2c_sequence(fe, fw->data); | |
649 | if (!ret) { | |
650 | ret = xc_set_xtal(fe); | |
651 | dprintk(1, "Firmware upload complete...\n"); | |
652 | } else | |
653 | printk(KERN_ERR "xc5000: firmware upload failed...\n"); | |
654 | ||
aacb9d31 ST |
655 | return ret; |
656 | } | |
657 | ||
e12671cf | 658 | static void xc_debug_dump(struct xc5000_priv *priv) |
aacb9d31 | 659 | { |
e12671cf ST |
660 | u16 adc_envelope; |
661 | u32 freq_error_hz = 0; | |
662 | u16 lock_status; | |
663 | u32 hsync_freq_hz = 0; | |
664 | u16 frame_lines; | |
665 | u16 quality; | |
7c287f18 DH |
666 | u16 snr; |
667 | u16 totalgain; | |
e12671cf ST |
668 | u8 hw_majorversion = 0, hw_minorversion = 0; |
669 | u8 fw_majorversion = 0, fw_minorversion = 0; | |
bae7b7d7 | 670 | u16 fw_buildversion = 0; |
de49bc6e | 671 | u16 regval; |
aacb9d31 ST |
672 | |
673 | /* Wait for stats to stabilize. | |
674 | * Frame Lines needs two frame times after initial lock | |
675 | * before it is valid. | |
676 | */ | |
e5bf4a11 | 677 | msleep(100); |
aacb9d31 | 678 | |
303ddd92 | 679 | xc_get_adc_envelope(priv, &adc_envelope); |
e12671cf | 680 | dprintk(1, "*** ADC envelope (0-1023) = %d\n", adc_envelope); |
aacb9d31 | 681 | |
e12671cf ST |
682 | xc_get_frequency_error(priv, &freq_error_hz); |
683 | dprintk(1, "*** Frequency error = %d Hz\n", freq_error_hz); | |
aacb9d31 | 684 | |
e12671cf ST |
685 | xc_get_lock_status(priv, &lock_status); |
686 | dprintk(1, "*** Lock status (0-Wait, 1-Locked, 2-No-signal) = %d\n", | |
aacb9d31 ST |
687 | lock_status); |
688 | ||
689 | xc_get_version(priv, &hw_majorversion, &hw_minorversion, | |
e12671cf | 690 | &fw_majorversion, &fw_minorversion); |
bae7b7d7 | 691 | xc_get_buildversion(priv, &fw_buildversion); |
ca60a45d | 692 | dprintk(1, "*** HW: V%d.%d, FW: V %d.%d.%d\n", |
aacb9d31 | 693 | hw_majorversion, hw_minorversion, |
bae7b7d7 | 694 | fw_majorversion, fw_minorversion, fw_buildversion); |
aacb9d31 | 695 | |
e12671cf ST |
696 | xc_get_hsync_freq(priv, &hsync_freq_hz); |
697 | dprintk(1, "*** Horizontal sync frequency = %d Hz\n", hsync_freq_hz); | |
aacb9d31 | 698 | |
e12671cf ST |
699 | xc_get_frame_lines(priv, &frame_lines); |
700 | dprintk(1, "*** Frame lines = %d\n", frame_lines); | |
aacb9d31 | 701 | |
e12671cf | 702 | xc_get_quality(priv, &quality); |
1aa9c487 | 703 | dprintk(1, "*** Quality (0:<8dB, 7:>56dB) = %d\n", quality & 0x07); |
7c287f18 DH |
704 | |
705 | xc_get_analogsnr(priv, &snr); | |
706 | dprintk(1, "*** Unweighted analog SNR = %d dB\n", snr & 0x3f); | |
707 | ||
708 | xc_get_totalgain(priv, &totalgain); | |
709 | dprintk(1, "*** Total gain = %d.%d dB\n", totalgain / 256, | |
710 | (totalgain % 256) * 100 / 256); | |
de49bc6e DH |
711 | |
712 | if (priv->pll_register_no) { | |
713 | xc5000_readreg(priv, priv->pll_register_no, ®val); | |
714 | dprintk(1, "*** PLL lock status = 0x%04x\n", regval); | |
715 | } | |
aacb9d31 ST |
716 | } |
717 | ||
16435202 MCC |
718 | static int xc5000_tune_digital(struct dvb_frontend *fe) |
719 | { | |
720 | struct xc5000_priv *priv = fe->tuner_priv; | |
721 | int ret; | |
722 | u32 bw = fe->dtv_property_cache.bandwidth_hz; | |
723 | ||
724 | ret = xc_set_signal_source(priv, priv->rf_mode); | |
725 | if (ret != 0) { | |
726 | printk(KERN_ERR | |
727 | "xc5000: xc_set_signal_source(%d) failed\n", | |
728 | priv->rf_mode); | |
729 | return -EREMOTEIO; | |
730 | } | |
731 | ||
732 | ret = xc_set_tv_standard(priv, | |
733 | xc5000_standard[priv->video_standard].video_mode, | |
734 | xc5000_standard[priv->video_standard].audio_mode, 0); | |
735 | if (ret != 0) { | |
736 | printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n"); | |
737 | return -EREMOTEIO; | |
738 | } | |
739 | ||
740 | ret = xc_set_IF_frequency(priv, priv->if_khz); | |
741 | if (ret != 0) { | |
742 | printk(KERN_ERR "xc5000: xc_Set_IF_frequency(%d) failed\n", | |
743 | priv->if_khz); | |
744 | return -EIO; | |
745 | } | |
746 | ||
747 | xc_write_reg(priv, XREG_OUTPUT_AMP, 0x8a); | |
748 | ||
749 | xc_tune_channel(priv, priv->freq_hz, XC_TUNE_DIGITAL); | |
750 | ||
751 | if (debug) | |
752 | xc_debug_dump(priv); | |
753 | ||
754 | priv->bandwidth = bw; | |
755 | ||
756 | return 0; | |
757 | } | |
758 | ||
59b94f3e | 759 | static int xc5000_set_digital_params(struct dvb_frontend *fe) |
aacb9d31 | 760 | { |
16435202 | 761 | int b; |
aacb9d31 | 762 | struct xc5000_priv *priv = fe->tuner_priv; |
fd66c45d MCC |
763 | u32 bw = fe->dtv_property_cache.bandwidth_hz; |
764 | u32 freq = fe->dtv_property_cache.frequency; | |
765 | u32 delsys = fe->dtv_property_cache.delivery_system; | |
aacb9d31 | 766 | |
859ae7f0 | 767 | if (xc_load_fw_and_init_tuner(fe, 0) != 0) { |
fc7a74ba DH |
768 | dprintk(1, "Unable to load firmware and init tuner\n"); |
769 | return -EINVAL; | |
760c466c | 770 | } |
8e4c6797 | 771 | |
fd66c45d | 772 | dprintk(1, "%s() frequency=%d (Hz)\n", __func__, freq); |
aacb9d31 | 773 | |
fd66c45d MCC |
774 | switch (delsys) { |
775 | case SYS_ATSC: | |
776 | dprintk(1, "%s() VSB modulation\n", __func__); | |
777 | priv->rf_mode = XC_RF_MODE_AIR; | |
a3eec916 | 778 | priv->freq_offset = 1750000; |
fd66c45d MCC |
779 | priv->video_standard = DTV6; |
780 | break; | |
781 | case SYS_DVBC_ANNEX_B: | |
782 | dprintk(1, "%s() QAM modulation\n", __func__); | |
783 | priv->rf_mode = XC_RF_MODE_CABLE; | |
a3eec916 | 784 | priv->freq_offset = 1750000; |
fd66c45d MCC |
785 | priv->video_standard = DTV6; |
786 | break; | |
5cf73ce1 MCC |
787 | case SYS_ISDBT: |
788 | /* All ISDB-T are currently for 6 MHz bw */ | |
789 | if (!bw) | |
790 | bw = 6000000; | |
791 | /* fall to OFDM handling */ | |
792 | case SYS_DMBTH: | |
fd66c45d MCC |
793 | case SYS_DVBT: |
794 | case SYS_DVBT2: | |
6c99080d | 795 | dprintk(1, "%s() OFDM\n", __func__); |
fd66c45d MCC |
796 | switch (bw) { |
797 | case 6000000: | |
6c99080d | 798 | priv->video_standard = DTV6; |
a3eec916 | 799 | priv->freq_offset = 1750000; |
6c99080d | 800 | break; |
fd66c45d | 801 | case 7000000: |
0433cd28 | 802 | priv->video_standard = DTV7; |
a3eec916 | 803 | priv->freq_offset = 2250000; |
0433cd28 | 804 | break; |
fd66c45d | 805 | case 8000000: |
6c99080d | 806 | priv->video_standard = DTV8; |
a3eec916 | 807 | priv->freq_offset = 2750000; |
6c99080d DW |
808 | break; |
809 | default: | |
810 | printk(KERN_ERR "xc5000 bandwidth not set!\n"); | |
811 | return -EINVAL; | |
812 | } | |
aacb9d31 | 813 | priv->rf_mode = XC_RF_MODE_AIR; |
cf1364b1 | 814 | break; |
fd66c45d MCC |
815 | case SYS_DVBC_ANNEX_A: |
816 | case SYS_DVBC_ANNEX_C: | |
817 | dprintk(1, "%s() QAM modulation\n", __func__); | |
818 | priv->rf_mode = XC_RF_MODE_CABLE; | |
819 | if (bw <= 6000000) { | |
fd66c45d | 820 | priv->video_standard = DTV6; |
a3eec916 | 821 | priv->freq_offset = 1750000; |
fd66c45d MCC |
822 | b = 6; |
823 | } else if (bw <= 7000000) { | |
fd66c45d | 824 | priv->video_standard = DTV7; |
a3eec916 | 825 | priv->freq_offset = 2250000; |
fd66c45d MCC |
826 | b = 7; |
827 | } else { | |
fd66c45d | 828 | priv->video_standard = DTV7_8; |
a3eec916 | 829 | priv->freq_offset = 2750000; |
fd66c45d | 830 | b = 8; |
e80edce1 | 831 | } |
fd66c45d MCC |
832 | dprintk(1, "%s() Bandwidth %dMHz (%d)\n", __func__, |
833 | b, bw); | |
834 | break; | |
835 | default: | |
836 | printk(KERN_ERR "xc5000: delivery system is not supported!\n"); | |
aacb9d31 ST |
837 | return -EINVAL; |
838 | } | |
839 | ||
a3eec916 | 840 | priv->freq_hz = freq - priv->freq_offset; |
16435202 | 841 | priv->mode = V4L2_TUNER_DIGITAL_TV; |
a3eec916 | 842 | |
fd66c45d MCC |
843 | dprintk(1, "%s() frequency=%d (compensated to %d)\n", |
844 | __func__, freq, priv->freq_hz); | |
aacb9d31 | 845 | |
16435202 | 846 | return xc5000_tune_digital(fe); |
aacb9d31 ST |
847 | } |
848 | ||
e470d817 ST |
849 | static int xc5000_is_firmware_loaded(struct dvb_frontend *fe) |
850 | { | |
851 | struct xc5000_priv *priv = fe->tuner_priv; | |
852 | int ret; | |
853 | u16 id; | |
854 | ||
855 | ret = xc5000_readreg(priv, XREG_PRODUCT_ID, &id); | |
859ae7f0 | 856 | if (ret == 0) { |
e470d817 | 857 | if (id == XC_PRODUCT_ID_FW_NOT_LOADED) |
859ae7f0 | 858 | ret = -ENOENT; |
e470d817 | 859 | else |
859ae7f0 | 860 | ret = 0; |
e470d817 ST |
861 | } |
862 | ||
863 | dprintk(1, "%s() returns %s id = 0x%x\n", __func__, | |
859ae7f0 | 864 | ret == 0 ? "True" : "False", id); |
e470d817 ST |
865 | return ret; |
866 | } | |
867 | ||
c3d6676b MCC |
868 | static void xc5000_config_tv(struct dvb_frontend *fe, |
869 | struct analog_parameters *params) | |
27c685a4 ST |
870 | { |
871 | struct xc5000_priv *priv = fe->tuner_priv; | |
27c685a4 | 872 | |
27c685a4 | 873 | dprintk(1, "%s() frequency=%d (in units of 62.5khz)\n", |
271ddbf7 | 874 | __func__, params->frequency); |
27c685a4 | 875 | |
1fab14ed MCC |
876 | /* Fix me: it could be air. */ |
877 | priv->rf_mode = params->mode; | |
878 | if (params->mode > XC_RF_MODE_CABLE) | |
879 | priv->rf_mode = XC_RF_MODE_CABLE; | |
27c685a4 ST |
880 | |
881 | /* params->frequency is in units of 62.5khz */ | |
882 | priv->freq_hz = params->frequency * 62500; | |
883 | ||
884 | /* FIX ME: Some video standards may have several possible audio | |
885 | standards. We simply default to one of them here. | |
886 | */ | |
8f3cd530 | 887 | if (params->std & V4L2_STD_MN) { |
27c685a4 ST |
888 | /* default to BTSC audio standard */ |
889 | priv->video_standard = MN_NTSC_PAL_BTSC; | |
c3d6676b | 890 | return; |
27c685a4 ST |
891 | } |
892 | ||
8f3cd530 | 893 | if (params->std & V4L2_STD_PAL_BG) { |
27c685a4 ST |
894 | /* default to NICAM audio standard */ |
895 | priv->video_standard = BG_PAL_NICAM; | |
c3d6676b | 896 | return; |
27c685a4 ST |
897 | } |
898 | ||
8f3cd530 | 899 | if (params->std & V4L2_STD_PAL_I) { |
27c685a4 ST |
900 | /* default to NICAM audio standard */ |
901 | priv->video_standard = I_PAL_NICAM; | |
c3d6676b | 902 | return; |
27c685a4 ST |
903 | } |
904 | ||
8f3cd530 | 905 | if (params->std & V4L2_STD_PAL_DK) { |
27c685a4 ST |
906 | /* default to NICAM audio standard */ |
907 | priv->video_standard = DK_PAL_NICAM; | |
c3d6676b | 908 | return; |
27c685a4 ST |
909 | } |
910 | ||
8f3cd530 | 911 | if (params->std & V4L2_STD_SECAM_DK) { |
27c685a4 ST |
912 | /* default to A2 DK1 audio standard */ |
913 | priv->video_standard = DK_SECAM_A2DK1; | |
c3d6676b | 914 | return; |
27c685a4 ST |
915 | } |
916 | ||
8f3cd530 | 917 | if (params->std & V4L2_STD_SECAM_L) { |
27c685a4 | 918 | priv->video_standard = L_SECAM_NICAM; |
c3d6676b | 919 | return; |
27c685a4 ST |
920 | } |
921 | ||
8f3cd530 | 922 | if (params->std & V4L2_STD_SECAM_LC) { |
27c685a4 | 923 | priv->video_standard = LC_SECAM_NICAM; |
c3d6676b | 924 | return; |
27c685a4 | 925 | } |
c3d6676b MCC |
926 | } |
927 | ||
928 | static int xc5000_set_tv_freq(struct dvb_frontend *fe) | |
929 | { | |
930 | struct xc5000_priv *priv = fe->tuner_priv; | |
931 | u16 pll_lock_status; | |
932 | int ret; | |
27c685a4 ST |
933 | |
934 | tune_channel: | |
303ddd92 | 935 | ret = xc_set_signal_source(priv, priv->rf_mode); |
859ae7f0 | 936 | if (ret != 0) { |
8f3cd530 | 937 | printk(KERN_ERR |
303ddd92 | 938 | "xc5000: xc_set_signal_source(%d) failed\n", |
27c685a4 ST |
939 | priv->rf_mode); |
940 | return -EREMOTEIO; | |
941 | } | |
942 | ||
303ddd92 MCC |
943 | ret = xc_set_tv_standard(priv, |
944 | xc5000_standard[priv->video_standard].video_mode, | |
945 | xc5000_standard[priv->video_standard].audio_mode, 0); | |
859ae7f0 | 946 | if (ret != 0) { |
303ddd92 | 947 | printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n"); |
27c685a4 ST |
948 | return -EREMOTEIO; |
949 | } | |
950 | ||
724dcbfa DB |
951 | xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09); |
952 | ||
a78baacf | 953 | xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG); |
27c685a4 ST |
954 | |
955 | if (debug) | |
956 | xc_debug_dump(priv); | |
957 | ||
de49bc6e DH |
958 | if (priv->pll_register_no != 0) { |
959 | msleep(20); | |
960 | xc5000_readreg(priv, priv->pll_register_no, &pll_lock_status); | |
961 | if (pll_lock_status > 63) { | |
962 | /* PLL is unlocked, force reload of the firmware */ | |
963 | dprintk(1, "xc5000: PLL not locked (0x%x). Reloading...\n", | |
964 | pll_lock_status); | |
859ae7f0 | 965 | if (xc_load_fw_and_init_tuner(fe, 1) != 0) { |
de49bc6e DH |
966 | printk(KERN_ERR "xc5000: Unable to reload fw\n"); |
967 | return -EREMOTEIO; | |
968 | } | |
969 | goto tune_channel; | |
970 | } | |
971 | } | |
972 | ||
27c685a4 ST |
973 | return 0; |
974 | } | |
975 | ||
c3d6676b MCC |
976 | static int xc5000_config_radio(struct dvb_frontend *fe, |
977 | struct analog_parameters *params) | |
978 | ||
d7009cdc BILDB |
979 | { |
980 | struct xc5000_priv *priv = fe->tuner_priv; | |
d7009cdc BILDB |
981 | |
982 | dprintk(1, "%s() frequency=%d (in units of khz)\n", | |
983 | __func__, params->frequency); | |
984 | ||
496e9057 DH |
985 | if (priv->radio_input == XC5000_RADIO_NOT_CONFIGURED) { |
986 | dprintk(1, "%s() radio input not configured\n", __func__); | |
987 | return -EINVAL; | |
988 | } | |
989 | ||
c3d6676b MCC |
990 | priv->freq_hz = params->frequency * 125 / 2; |
991 | priv->rf_mode = XC_RF_MODE_AIR; | |
992 | ||
993 | return 0; | |
994 | } | |
995 | ||
996 | static int xc5000_set_radio_freq(struct dvb_frontend *fe) | |
997 | { | |
998 | struct xc5000_priv *priv = fe->tuner_priv; | |
999 | int ret; | |
1000 | u8 radio_input; | |
1001 | ||
496e9057 | 1002 | if (priv->radio_input == XC5000_RADIO_FM1) |
303ddd92 | 1003 | radio_input = FM_RADIO_INPUT1; |
496e9057 | 1004 | else if (priv->radio_input == XC5000_RADIO_FM2) |
303ddd92 | 1005 | radio_input = FM_RADIO_INPUT2; |
724dcbfa | 1006 | else if (priv->radio_input == XC5000_RADIO_FM1_MONO) |
303ddd92 | 1007 | radio_input = FM_RADIO_INPUT1_MONO; |
496e9057 DH |
1008 | else { |
1009 | dprintk(1, "%s() unknown radio input %d\n", __func__, | |
1010 | priv->radio_input); | |
1011 | return -EINVAL; | |
1012 | } | |
1013 | ||
303ddd92 MCC |
1014 | ret = xc_set_tv_standard(priv, xc5000_standard[radio_input].video_mode, |
1015 | xc5000_standard[radio_input].audio_mode, radio_input); | |
d7009cdc | 1016 | |
859ae7f0 | 1017 | if (ret != 0) { |
303ddd92 | 1018 | printk(KERN_ERR "xc5000: xc_set_tv_standard failed\n"); |
d7009cdc BILDB |
1019 | return -EREMOTEIO; |
1020 | } | |
1021 | ||
303ddd92 | 1022 | ret = xc_set_signal_source(priv, priv->rf_mode); |
859ae7f0 | 1023 | if (ret != 0) { |
d7009cdc | 1024 | printk(KERN_ERR |
303ddd92 | 1025 | "xc5000: xc_set_signal_source(%d) failed\n", |
d7009cdc BILDB |
1026 | priv->rf_mode); |
1027 | return -EREMOTEIO; | |
1028 | } | |
1029 | ||
724dcbfa DB |
1030 | if ((priv->radio_input == XC5000_RADIO_FM1) || |
1031 | (priv->radio_input == XC5000_RADIO_FM2)) | |
1032 | xc_write_reg(priv, XREG_OUTPUT_AMP, 0x09); | |
1033 | else if (priv->radio_input == XC5000_RADIO_FM1_MONO) | |
1034 | xc_write_reg(priv, XREG_OUTPUT_AMP, 0x06); | |
1035 | ||
d7009cdc BILDB |
1036 | xc_tune_channel(priv, priv->freq_hz, XC_TUNE_ANALOG); |
1037 | ||
1038 | return 0; | |
1039 | } | |
1040 | ||
59b94f3e | 1041 | static int xc5000_set_params(struct dvb_frontend *fe) |
c3d6676b MCC |
1042 | { |
1043 | struct xc5000_priv *priv = fe->tuner_priv; | |
1044 | ||
5275a3b6 MCC |
1045 | if (xc_load_fw_and_init_tuner(fe, 0) != 0) { |
1046 | dprintk(1, "Unable to load firmware and init tuner\n"); | |
1047 | return -EINVAL; | |
1048 | } | |
1049 | ||
c3d6676b MCC |
1050 | switch (priv->mode) { |
1051 | case V4L2_TUNER_RADIO: | |
1052 | return xc5000_set_radio_freq(fe); | |
1053 | case V4L2_TUNER_ANALOG_TV: | |
1054 | return xc5000_set_tv_freq(fe); | |
1055 | case V4L2_TUNER_DIGITAL_TV: | |
1056 | return xc5000_tune_digital(fe); | |
1057 | } | |
1058 | ||
1059 | return 0; | |
1060 | } | |
1061 | ||
d7009cdc BILDB |
1062 | static int xc5000_set_analog_params(struct dvb_frontend *fe, |
1063 | struct analog_parameters *params) | |
1064 | { | |
1065 | struct xc5000_priv *priv = fe->tuner_priv; | |
c3d6676b | 1066 | int ret; |
d7009cdc BILDB |
1067 | |
1068 | if (priv->i2c_props.adap == NULL) | |
1069 | return -EINVAL; | |
1070 | ||
d7009cdc BILDB |
1071 | switch (params->mode) { |
1072 | case V4L2_TUNER_RADIO: | |
c3d6676b MCC |
1073 | ret = xc5000_config_radio(fe, params); |
1074 | if (ret) | |
1075 | return ret; | |
d7009cdc BILDB |
1076 | break; |
1077 | case V4L2_TUNER_ANALOG_TV: | |
c3d6676b MCC |
1078 | xc5000_config_tv(fe, params); |
1079 | break; | |
1080 | default: | |
d7009cdc BILDB |
1081 | break; |
1082 | } | |
c3d6676b | 1083 | priv->mode = params->mode; |
d7009cdc | 1084 | |
59b94f3e | 1085 | return xc5000_set_params(fe); |
d7009cdc BILDB |
1086 | } |
1087 | ||
aacb9d31 ST |
1088 | static int xc5000_get_frequency(struct dvb_frontend *fe, u32 *freq) |
1089 | { | |
1090 | struct xc5000_priv *priv = fe->tuner_priv; | |
271ddbf7 | 1091 | dprintk(1, "%s()\n", __func__); |
a3eec916 | 1092 | *freq = priv->freq_hz + priv->freq_offset; |
aacb9d31 ST |
1093 | return 0; |
1094 | } | |
1095 | ||
35621030 MCC |
1096 | static int xc5000_get_if_frequency(struct dvb_frontend *fe, u32 *freq) |
1097 | { | |
1098 | struct xc5000_priv *priv = fe->tuner_priv; | |
1099 | dprintk(1, "%s()\n", __func__); | |
1100 | *freq = priv->if_khz * 1000; | |
1101 | return 0; | |
1102 | } | |
1103 | ||
aacb9d31 ST |
1104 | static int xc5000_get_bandwidth(struct dvb_frontend *fe, u32 *bw) |
1105 | { | |
1106 | struct xc5000_priv *priv = fe->tuner_priv; | |
271ddbf7 | 1107 | dprintk(1, "%s()\n", __func__); |
27c685a4 | 1108 | |
aacb9d31 ST |
1109 | *bw = priv->bandwidth; |
1110 | return 0; | |
1111 | } | |
1112 | ||
1113 | static int xc5000_get_status(struct dvb_frontend *fe, u32 *status) | |
1114 | { | |
1115 | struct xc5000_priv *priv = fe->tuner_priv; | |
e12671cf | 1116 | u16 lock_status = 0; |
aacb9d31 ST |
1117 | |
1118 | xc_get_lock_status(priv, &lock_status); | |
1119 | ||
271ddbf7 | 1120 | dprintk(1, "%s() lock_status = 0x%08x\n", __func__, lock_status); |
aacb9d31 ST |
1121 | |
1122 | *status = lock_status; | |
1123 | ||
1124 | return 0; | |
1125 | } | |
1126 | ||
de49bc6e | 1127 | static int xc_load_fw_and_init_tuner(struct dvb_frontend *fe, int force) |
aacb9d31 ST |
1128 | { |
1129 | struct xc5000_priv *priv = fe->tuner_priv; | |
8604f355 MCC |
1130 | const struct xc5000_fw_cfg *desired_fw = xc5000_assign_firmware(priv->chip_id); |
1131 | const struct firmware *fw; | |
2621c0b3 | 1132 | int ret, i; |
de49bc6e | 1133 | u16 pll_lock_status; |
22d5c6f5 | 1134 | u16 fw_ck; |
de49bc6e | 1135 | |
f7a27ff1 MCC |
1136 | cancel_delayed_work(&priv->timer_sleep); |
1137 | ||
2621c0b3 MCC |
1138 | if (!force && xc5000_is_firmware_loaded(fe) == 0) |
1139 | return 0; | |
aacb9d31 | 1140 | |
5264a522 SK |
1141 | if (!priv->firmware) { |
1142 | ret = request_firmware(&fw, desired_fw->name, | |
1143 | priv->i2c_props.adap->dev.parent); | |
1144 | if (ret) { | |
1145 | pr_err("xc5000: Upload failed. rc %d\n", ret); | |
1146 | return ret; | |
1147 | } | |
1148 | dprintk(1, "firmware read %Zu bytes.\n", fw->size); | |
8604f355 | 1149 | |
5264a522 SK |
1150 | if (fw->size != desired_fw->size) { |
1151 | pr_err("xc5000: Firmware file with incorrect size\n"); | |
1152 | release_firmware(fw); | |
1153 | return -EINVAL; | |
1154 | } | |
1155 | priv->firmware = fw; | |
1156 | } else | |
1157 | fw = priv->firmware; | |
8604f355 | 1158 | |
2621c0b3 MCC |
1159 | /* Try up to 5 times to load firmware */ |
1160 | for (i = 0; i < 5; i++) { | |
ee67674a MCC |
1161 | if (i) |
1162 | printk(KERN_CONT " - retrying to upload firmware.\n"); | |
1163 | ||
8604f355 | 1164 | ret = xc5000_fwupload(fe, desired_fw, fw); |
859ae7f0 | 1165 | if (ret != 0) |
8604f355 | 1166 | goto err; |
aacb9d31 | 1167 | |
de49bc6e DH |
1168 | msleep(20); |
1169 | ||
22d5c6f5 | 1170 | if (priv->fw_checksum_supported) { |
2621c0b3 | 1171 | if (xc5000_readreg(priv, XREG_FW_CHECKSUM, &fw_ck)) { |
ee67674a MCC |
1172 | printk(KERN_ERR |
1173 | "xc5000: FW checksum reading failed."); | |
2621c0b3 | 1174 | continue; |
22d5c6f5 DH |
1175 | } |
1176 | ||
2621c0b3 | 1177 | if (!fw_ck) { |
ee67674a MCC |
1178 | printk(KERN_ERR |
1179 | "xc5000: FW checksum failed = 0x%04x.", | |
1180 | fw_ck); | |
2621c0b3 | 1181 | continue; |
22d5c6f5 DH |
1182 | } |
1183 | } | |
1184 | ||
fc7a74ba | 1185 | /* Start the tuner self-calibration process */ |
2621c0b3 MCC |
1186 | ret = xc_initialize(priv); |
1187 | if (ret) { | |
ee67674a MCC |
1188 | printk(KERN_ERR |
1189 | "xc5000: Can't request Self-callibration."); | |
2621c0b3 MCC |
1190 | continue; |
1191 | } | |
de49bc6e | 1192 | |
fc7a74ba DH |
1193 | /* Wait for calibration to complete. |
1194 | * We could continue but XC5000 will clock stretch subsequent | |
1195 | * I2C transactions until calibration is complete. This way we | |
1196 | * don't have to rely on clock stretching working. | |
1197 | */ | |
e5bf4a11 | 1198 | msleep(100); |
aacb9d31 | 1199 | |
22d5c6f5 | 1200 | if (priv->init_status_supported) { |
2621c0b3 | 1201 | if (xc5000_readreg(priv, XREG_INIT_STATUS, &fw_ck)) { |
ee67674a MCC |
1202 | printk(KERN_ERR |
1203 | "xc5000: FW failed reading init status."); | |
2621c0b3 | 1204 | continue; |
22d5c6f5 DH |
1205 | } |
1206 | ||
2621c0b3 | 1207 | if (!fw_ck) { |
ee67674a MCC |
1208 | printk(KERN_ERR |
1209 | "xc5000: FW init status failed = 0x%04x.", | |
1210 | fw_ck); | |
2621c0b3 | 1211 | continue; |
22d5c6f5 DH |
1212 | } |
1213 | } | |
1214 | ||
de49bc6e DH |
1215 | if (priv->pll_register_no) { |
1216 | xc5000_readreg(priv, priv->pll_register_no, | |
1217 | &pll_lock_status); | |
1218 | if (pll_lock_status > 63) { | |
1219 | /* PLL is unlocked, force reload of the firmware */ | |
ee67674a MCC |
1220 | printk(KERN_ERR |
1221 | "xc5000: PLL not running after fwload."); | |
2621c0b3 | 1222 | continue; |
de49bc6e DH |
1223 | } |
1224 | } | |
1225 | ||
fc7a74ba | 1226 | /* Default to "CABLE" mode */ |
2621c0b3 | 1227 | ret = xc_write_reg(priv, XREG_SIGNALSOURCE, XC_RF_MODE_CABLE); |
ee67674a MCC |
1228 | if (!ret) |
1229 | break; | |
1230 | printk(KERN_ERR "xc5000: can't set to cable mode."); | |
fc7a74ba | 1231 | } |
aacb9d31 | 1232 | |
8604f355 | 1233 | err: |
ee67674a MCC |
1234 | if (!ret) |
1235 | printk(KERN_INFO "xc5000: Firmware %s loaded and running.\n", | |
1236 | desired_fw->name); | |
1237 | else | |
1238 | printk(KERN_CONT " - too many retries. Giving up\n"); | |
1239 | ||
aacb9d31 ST |
1240 | return ret; |
1241 | } | |
1242 | ||
f7a27ff1 | 1243 | static void xc5000_do_timer_sleep(struct work_struct *timer_sleep) |
e12671cf | 1244 | { |
f7a27ff1 MCC |
1245 | struct xc5000_priv *priv =container_of(timer_sleep, struct xc5000_priv, |
1246 | timer_sleep.work); | |
1247 | struct dvb_frontend *fe = priv->fe; | |
27c685a4 ST |
1248 | int ret; |
1249 | ||
271ddbf7 | 1250 | dprintk(1, "%s()\n", __func__); |
e12671cf | 1251 | |
7f05b530 DH |
1252 | /* According to Xceive technical support, the "powerdown" register |
1253 | was removed in newer versions of the firmware. The "supported" | |
1254 | way to sleep the tuner is to pull the reset pin low for 10ms */ | |
303ddd92 | 1255 | ret = xc5000_tuner_reset(fe); |
f7a27ff1 | 1256 | if (ret != 0) |
27c685a4 ST |
1257 | printk(KERN_ERR |
1258 | "xc5000: %s() unable to shutdown tuner\n", | |
271ddbf7 | 1259 | __func__); |
f7a27ff1 MCC |
1260 | } |
1261 | ||
1262 | static int xc5000_sleep(struct dvb_frontend *fe) | |
1263 | { | |
1264 | struct xc5000_priv *priv = fe->tuner_priv; | |
1265 | ||
1266 | dprintk(1, "%s()\n", __func__); | |
1267 | ||
1268 | /* Avoid firmware reload on slow devices */ | |
1269 | if (no_poweroff) | |
859ae7f0 | 1270 | return 0; |
f7a27ff1 MCC |
1271 | |
1272 | schedule_delayed_work(&priv->timer_sleep, | |
1273 | msecs_to_jiffies(XC5000_SLEEP_TIME)); | |
1274 | ||
1275 | return 0; | |
e12671cf ST |
1276 | } |
1277 | ||
91a5307c MCC |
1278 | static int xc5000_suspend(struct dvb_frontend *fe) |
1279 | { | |
1280 | struct xc5000_priv *priv = fe->tuner_priv; | |
1281 | int ret; | |
1282 | ||
1283 | dprintk(1, "%s()\n", __func__); | |
1284 | ||
1285 | cancel_delayed_work(&priv->timer_sleep); | |
1286 | ||
1287 | ret = xc5000_tuner_reset(fe); | |
1288 | if (ret != 0) | |
1289 | printk(KERN_ERR | |
1290 | "xc5000: %s() unable to shutdown tuner\n", | |
1291 | __func__); | |
1292 | ||
1293 | return 0; | |
1294 | } | |
1295 | ||
27ccd694 SK |
1296 | static int xc5000_resume(struct dvb_frontend *fe) |
1297 | { | |
1298 | struct xc5000_priv *priv = fe->tuner_priv; | |
1299 | ||
1300 | dprintk(1, "%s()\n", __func__); | |
1301 | ||
1302 | /* suspended before firmware is loaded. | |
1303 | Avoid firmware load in resume path. */ | |
1304 | if (!priv->firmware) | |
1305 | return 0; | |
1306 | ||
1307 | return xc5000_set_params(fe); | |
1308 | } | |
1309 | ||
aacb9d31 ST |
1310 | static int xc5000_init(struct dvb_frontend *fe) |
1311 | { | |
1312 | struct xc5000_priv *priv = fe->tuner_priv; | |
271ddbf7 | 1313 | dprintk(1, "%s()\n", __func__); |
aacb9d31 | 1314 | |
859ae7f0 | 1315 | if (xc_load_fw_and_init_tuner(fe, 0) != 0) { |
e12671cf ST |
1316 | printk(KERN_ERR "xc5000: Unable to initialise tuner\n"); |
1317 | return -EREMOTEIO; | |
1318 | } | |
1319 | ||
1320 | if (debug) | |
1321 | xc_debug_dump(priv); | |
aacb9d31 ST |
1322 | |
1323 | return 0; | |
1324 | } | |
1325 | ||
1326 | static int xc5000_release(struct dvb_frontend *fe) | |
1327 | { | |
89fd2854 MK |
1328 | struct xc5000_priv *priv = fe->tuner_priv; |
1329 | ||
271ddbf7 | 1330 | dprintk(1, "%s()\n", __func__); |
89fd2854 MK |
1331 | |
1332 | mutex_lock(&xc5000_list_mutex); | |
1333 | ||
f7a27ff1 MCC |
1334 | if (priv) { |
1335 | cancel_delayed_work(&priv->timer_sleep); | |
5264a522 SK |
1336 | if (priv->firmware) |
1337 | release_firmware(priv->firmware); | |
4961a532 | 1338 | hybrid_tuner_release_state(priv); |
f7a27ff1 | 1339 | } |
89fd2854 MK |
1340 | |
1341 | mutex_unlock(&xc5000_list_mutex); | |
1342 | ||
aacb9d31 | 1343 | fe->tuner_priv = NULL; |
89fd2854 | 1344 | |
aacb9d31 ST |
1345 | return 0; |
1346 | } | |
1347 | ||
724dcbfa DB |
1348 | static int xc5000_set_config(struct dvb_frontend *fe, void *priv_cfg) |
1349 | { | |
1350 | struct xc5000_priv *priv = fe->tuner_priv; | |
1351 | struct xc5000_config *p = priv_cfg; | |
1352 | ||
1353 | dprintk(1, "%s()\n", __func__); | |
1354 | ||
1355 | if (p->if_khz) | |
1356 | priv->if_khz = p->if_khz; | |
1357 | ||
1358 | if (p->radio_input) | |
1359 | priv->radio_input = p->radio_input; | |
1360 | ||
1361 | return 0; | |
1362 | } | |
1363 | ||
1364 | ||
aacb9d31 ST |
1365 | static const struct dvb_tuner_ops xc5000_tuner_ops = { |
1366 | .info = { | |
1367 | .name = "Xceive XC5000", | |
1368 | .frequency_min = 1000000, | |
1369 | .frequency_max = 1023000000, | |
1370 | .frequency_step = 50000, | |
1371 | }, | |
1372 | ||
27c685a4 ST |
1373 | .release = xc5000_release, |
1374 | .init = xc5000_init, | |
1375 | .sleep = xc5000_sleep, | |
91a5307c | 1376 | .suspend = xc5000_suspend, |
27ccd694 | 1377 | .resume = xc5000_resume, |
aacb9d31 | 1378 | |
724dcbfa | 1379 | .set_config = xc5000_set_config, |
59b94f3e | 1380 | .set_params = xc5000_set_digital_params, |
27c685a4 ST |
1381 | .set_analog_params = xc5000_set_analog_params, |
1382 | .get_frequency = xc5000_get_frequency, | |
35621030 | 1383 | .get_if_frequency = xc5000_get_if_frequency, |
27c685a4 ST |
1384 | .get_bandwidth = xc5000_get_bandwidth, |
1385 | .get_status = xc5000_get_status | |
aacb9d31 ST |
1386 | }; |
1387 | ||
48723543 MK |
1388 | struct dvb_frontend *xc5000_attach(struct dvb_frontend *fe, |
1389 | struct i2c_adapter *i2c, | |
2e4e98e7 | 1390 | const struct xc5000_config *cfg) |
aacb9d31 ST |
1391 | { |
1392 | struct xc5000_priv *priv = NULL; | |
89fd2854 | 1393 | int instance; |
aacb9d31 ST |
1394 | u16 id = 0; |
1395 | ||
89fd2854 MK |
1396 | dprintk(1, "%s(%d-%04x)\n", __func__, |
1397 | i2c ? i2c_adapter_id(i2c) : -1, | |
1398 | cfg ? cfg->i2c_address : -1); | |
aacb9d31 | 1399 | |
89fd2854 | 1400 | mutex_lock(&xc5000_list_mutex); |
aacb9d31 | 1401 | |
89fd2854 MK |
1402 | instance = hybrid_tuner_request_state(struct xc5000_priv, priv, |
1403 | hybrid_tuner_instance_list, | |
1404 | i2c, cfg->i2c_address, "xc5000"); | |
1405 | switch (instance) { | |
1406 | case 0: | |
1407 | goto fail; | |
89fd2854 MK |
1408 | case 1: |
1409 | /* new tuner instance */ | |
c6f56e7d | 1410 | priv->bandwidth = 6000000; |
89fd2854 | 1411 | fe->tuner_priv = priv; |
f7a27ff1 MCC |
1412 | priv->fe = fe; |
1413 | INIT_DELAYED_WORK(&priv->timer_sleep, xc5000_do_timer_sleep); | |
89fd2854 MK |
1414 | break; |
1415 | default: | |
1416 | /* existing tuner instance */ | |
1417 | fe->tuner_priv = priv; | |
1418 | break; | |
1419 | } | |
aacb9d31 | 1420 | |
ea227863 DH |
1421 | if (priv->if_khz == 0) { |
1422 | /* If the IF hasn't been set yet, use the value provided by | |
1423 | the caller (occurs in hybrid devices where the analog | |
1424 | call to xc5000_attach occurs before the digital side) */ | |
1425 | priv->if_khz = cfg->if_khz; | |
1426 | } | |
1427 | ||
7d3d0d8d MK |
1428 | if (priv->xtal_khz == 0) |
1429 | priv->xtal_khz = cfg->xtal_khz; | |
1430 | ||
496e9057 DH |
1431 | if (priv->radio_input == 0) |
1432 | priv->radio_input = cfg->radio_input; | |
1433 | ||
6fab81df | 1434 | /* don't override chip id if it's already been set |
76efb0ba | 1435 | unless explicitly specified */ |
6fab81df MK |
1436 | if ((priv->chip_id == 0) || (cfg->chip_id)) |
1437 | /* use default chip id if none specified, set to 0 so | |
1438 | it can be overridden if this is a hybrid driver */ | |
1439 | priv->chip_id = (cfg->chip_id) ? cfg->chip_id : 0; | |
76efb0ba | 1440 | |
27c685a4 ST |
1441 | /* Check if firmware has been loaded. It is possible that another |
1442 | instance of the driver has loaded the firmware. | |
1443 | */ | |
859ae7f0 | 1444 | if (xc5000_readreg(priv, XREG_PRODUCT_ID, &id) != 0) |
89fd2854 | 1445 | goto fail; |
aacb9d31 | 1446 | |
8f3cd530 | 1447 | switch (id) { |
27c685a4 ST |
1448 | case XC_PRODUCT_ID_FW_LOADED: |
1449 | printk(KERN_INFO | |
1450 | "xc5000: Successfully identified at address 0x%02x\n", | |
1451 | cfg->i2c_address); | |
1452 | printk(KERN_INFO | |
1453 | "xc5000: Firmware has been loaded previously\n"); | |
27c685a4 ST |
1454 | break; |
1455 | case XC_PRODUCT_ID_FW_NOT_LOADED: | |
1456 | printk(KERN_INFO | |
1457 | "xc5000: Successfully identified at address 0x%02x\n", | |
1458 | cfg->i2c_address); | |
1459 | printk(KERN_INFO | |
1460 | "xc5000: Firmware has not been loaded previously\n"); | |
27c685a4 ST |
1461 | break; |
1462 | default: | |
aacb9d31 ST |
1463 | printk(KERN_ERR |
1464 | "xc5000: Device not found at addr 0x%02x (0x%x)\n", | |
1465 | cfg->i2c_address, id); | |
89fd2854 | 1466 | goto fail; |
aacb9d31 ST |
1467 | } |
1468 | ||
89fd2854 MK |
1469 | mutex_unlock(&xc5000_list_mutex); |
1470 | ||
aacb9d31 ST |
1471 | memcpy(&fe->ops.tuner_ops, &xc5000_tuner_ops, |
1472 | sizeof(struct dvb_tuner_ops)); | |
1473 | ||
aacb9d31 | 1474 | return fe; |
89fd2854 MK |
1475 | fail: |
1476 | mutex_unlock(&xc5000_list_mutex); | |
1477 | ||
1478 | xc5000_release(fe); | |
1479 | return NULL; | |
aacb9d31 ST |
1480 | } |
1481 | EXPORT_SYMBOL(xc5000_attach); | |
1482 | ||
1483 | MODULE_AUTHOR("Steven Toth"); | |
e12671cf | 1484 | MODULE_DESCRIPTION("Xceive xc5000 silicon tuner driver"); |
aacb9d31 | 1485 | MODULE_LICENSE("GPL"); |
3422f2a6 TG |
1486 | MODULE_FIRMWARE(XC5000A_FIRMWARE); |
1487 | MODULE_FIRMWARE(XC5000C_FIRMWARE); |