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Commit | Line | Data |
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e0d3bafd | 1 | /* |
b9255176 SD |
2 | cx231xx-core.c - driver for Conexant Cx23100/101/102 |
3 | USB video capture devices | |
e0d3bafd SD |
4 | |
5 | Copyright (C) 2008 <srinivasa.deevi at conexant dot com> | |
b9255176 | 6 | Based on em28xx driver |
e0d3bafd SD |
7 | |
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
589dadf2 | 23 | #include "cx231xx.h" |
e0d3bafd SD |
24 | #include <linux/init.h> |
25 | #include <linux/list.h> | |
26 | #include <linux/module.h> | |
5a0e3ad6 | 27 | #include <linux/slab.h> |
e0d3bafd SD |
28 | #include <linux/vmalloc.h> |
29 | #include <media/v4l2-common.h> | |
64fbf444 | 30 | #include <media/tuner.h> |
e0d3bafd | 31 | |
e0d3bafd SD |
32 | #include "cx231xx-reg.h" |
33 | ||
34 | /* #define ENABLE_DEBUG_ISOC_FRAMES */ | |
35 | ||
36 | static unsigned int core_debug; | |
84b5dbf3 MCC |
37 | module_param(core_debug, int, 0644); |
38 | MODULE_PARM_DESC(core_debug, "enable debug messages [core]"); | |
e0d3bafd SD |
39 | |
40 | #define cx231xx_coredbg(fmt, arg...) do {\ | |
41 | if (core_debug) \ | |
42 | printk(KERN_INFO "%s %s :"fmt, \ | |
43 | dev->name, __func__ , ##arg); } while (0) | |
44 | ||
45 | static unsigned int reg_debug; | |
84b5dbf3 MCC |
46 | module_param(reg_debug, int, 0644); |
47 | MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]"); | |
e0d3bafd | 48 | |
e0d3bafd SD |
49 | static int alt = CX231XX_PINOUT; |
50 | module_param(alt, int, 0644); | |
51 | MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint"); | |
52 | ||
e0d3bafd SD |
53 | #define cx231xx_isocdbg(fmt, arg...) do {\ |
54 | if (core_debug) \ | |
55 | printk(KERN_INFO "%s %s :"fmt, \ | |
56 | dev->name, __func__ , ##arg); } while (0) | |
57 | ||
b9255176 SD |
58 | /***************************************************************** |
59 | * Device control list functions * | |
60 | ******************************************************************/ | |
e0d3bafd | 61 | |
64fbf444 | 62 | LIST_HEAD(cx231xx_devlist); |
e0d3bafd SD |
63 | static DEFINE_MUTEX(cx231xx_devlist_mutex); |
64 | ||
e0d3bafd SD |
65 | /* |
66 | * cx231xx_realease_resources() | |
67 | * unregisters the v4l2,i2c and usb devices | |
68 | * called when the device gets disconected or at module unload | |
69 | */ | |
70 | void cx231xx_remove_from_devlist(struct cx231xx *dev) | |
71 | { | |
64fbf444 PB |
72 | if (dev == NULL) |
73 | return; | |
74 | if (dev->udev == NULL) | |
75 | return; | |
76 | ||
77 | if (atomic_read(&dev->devlist_count) > 0) { | |
78 | mutex_lock(&cx231xx_devlist_mutex); | |
79 | list_del(&dev->devlist); | |
80 | atomic_dec(&dev->devlist_count); | |
81 | mutex_unlock(&cx231xx_devlist_mutex); | |
82 | } | |
e0d3bafd SD |
83 | }; |
84 | ||
85 | void cx231xx_add_into_devlist(struct cx231xx *dev) | |
86 | { | |
87 | mutex_lock(&cx231xx_devlist_mutex); | |
88 | list_add_tail(&dev->devlist, &cx231xx_devlist); | |
64fbf444 | 89 | atomic_inc(&dev->devlist_count); |
e0d3bafd SD |
90 | mutex_unlock(&cx231xx_devlist_mutex); |
91 | }; | |
92 | ||
e0d3bafd | 93 | static LIST_HEAD(cx231xx_extension_devlist); |
e0d3bafd SD |
94 | |
95 | int cx231xx_register_extension(struct cx231xx_ops *ops) | |
96 | { | |
97 | struct cx231xx *dev = NULL; | |
98 | ||
99 | mutex_lock(&cx231xx_devlist_mutex); | |
e0d3bafd | 100 | list_add_tail(&ops->next, &cx231xx_extension_devlist); |
fb1817e4 | 101 | list_for_each_entry(dev, &cx231xx_devlist, devlist) { |
a9fac6b1 | 102 | ops->init(dev); |
336fea92 | 103 | dev_info(dev->dev, "%s initialized\n", ops->name); |
fb1817e4 | 104 | } |
e0d3bafd SD |
105 | mutex_unlock(&cx231xx_devlist_mutex); |
106 | return 0; | |
107 | } | |
108 | EXPORT_SYMBOL(cx231xx_register_extension); | |
109 | ||
110 | void cx231xx_unregister_extension(struct cx231xx_ops *ops) | |
111 | { | |
112 | struct cx231xx *dev = NULL; | |
113 | ||
114 | mutex_lock(&cx231xx_devlist_mutex); | |
fb1817e4 | 115 | list_for_each_entry(dev, &cx231xx_devlist, devlist) { |
a9fac6b1 | 116 | ops->fini(dev); |
336fea92 | 117 | dev_info(dev->dev, "%s removed\n", ops->name); |
fb1817e4 | 118 | } |
e0d3bafd | 119 | |
e0d3bafd | 120 | list_del(&ops->next); |
e0d3bafd SD |
121 | mutex_unlock(&cx231xx_devlist_mutex); |
122 | } | |
84b5dbf3 | 123 | EXPORT_SYMBOL(cx231xx_unregister_extension); |
e0d3bafd SD |
124 | |
125 | void cx231xx_init_extension(struct cx231xx *dev) | |
126 | { | |
127 | struct cx231xx_ops *ops = NULL; | |
128 | ||
761f6cf6 | 129 | mutex_lock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
130 | if (!list_empty(&cx231xx_extension_devlist)) { |
131 | list_for_each_entry(ops, &cx231xx_extension_devlist, next) { | |
132 | if (ops->init) | |
133 | ops->init(dev); | |
134 | } | |
135 | } | |
761f6cf6 | 136 | mutex_unlock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
137 | } |
138 | ||
139 | void cx231xx_close_extension(struct cx231xx *dev) | |
140 | { | |
141 | struct cx231xx_ops *ops = NULL; | |
142 | ||
761f6cf6 | 143 | mutex_lock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
144 | if (!list_empty(&cx231xx_extension_devlist)) { |
145 | list_for_each_entry(ops, &cx231xx_extension_devlist, next) { | |
146 | if (ops->fini) | |
147 | ops->fini(dev); | |
148 | } | |
149 | } | |
761f6cf6 | 150 | mutex_unlock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
151 | } |
152 | ||
b9255176 SD |
153 | /**************************************************************** |
154 | * U S B related functions * | |
155 | *****************************************************************/ | |
e0d3bafd | 156 | int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus, |
84b5dbf3 | 157 | struct cx231xx_i2c_xfer_data *req_data) |
e0d3bafd | 158 | { |
84b5dbf3 MCC |
159 | int status = 0; |
160 | struct cx231xx *dev = i2c_bus->dev; | |
b9255176 | 161 | struct VENDOR_REQUEST_IN ven_req; |
84b5dbf3 MCC |
162 | |
163 | u8 saddr_len = 0; | |
164 | u8 _i2c_period = 0; | |
165 | u8 _i2c_nostop = 0; | |
166 | u8 _i2c_reserve = 0; | |
167 | ||
7528cd27 MCC |
168 | if (dev->state & DEV_DISCONNECTED) |
169 | return -ENODEV; | |
170 | ||
84b5dbf3 MCC |
171 | /* Get the I2C period, nostop and reserve parameters */ |
172 | _i2c_period = i2c_bus->i2c_period; | |
173 | _i2c_nostop = i2c_bus->i2c_nostop; | |
174 | _i2c_reserve = i2c_bus->i2c_reserve; | |
175 | ||
176 | saddr_len = req_data->saddr_len; | |
177 | ||
178 | /* Set wValue */ | |
9713883b NMG |
179 | ven_req.wValue = (req_data->dev_addr << 9 | _i2c_period << 4 | |
180 | saddr_len << 2 | _i2c_nostop << 1 | I2C_SYNC | | |
181 | _i2c_reserve << 6); | |
84b5dbf3 MCC |
182 | |
183 | /* set channel number */ | |
b9255176 SD |
184 | if (req_data->direction & I2C_M_RD) { |
185 | /* channel number, for read,spec required channel_num +4 */ | |
186 | ven_req.bRequest = i2c_bus->nr + 4; | |
187 | } else | |
84b5dbf3 MCC |
188 | ven_req.bRequest = i2c_bus->nr; /* channel number, */ |
189 | ||
190 | /* set index value */ | |
191 | switch (saddr_len) { | |
192 | case 0: | |
193 | ven_req.wIndex = 0; /* need check */ | |
194 | break; | |
195 | case 1: | |
196 | ven_req.wIndex = (req_data->saddr_dat & 0xff); | |
197 | break; | |
198 | case 2: | |
199 | ven_req.wIndex = req_data->saddr_dat; | |
200 | break; | |
201 | } | |
202 | ||
203 | /* set wLength value */ | |
204 | ven_req.wLength = req_data->buf_size; | |
205 | ||
206 | /* set bData value */ | |
207 | ven_req.bData = 0; | |
208 | ||
209 | /* set the direction */ | |
210 | if (req_data->direction) { | |
211 | ven_req.direction = USB_DIR_IN; | |
212 | memset(req_data->p_buffer, 0x00, ven_req.wLength); | |
213 | } else | |
214 | ven_req.direction = USB_DIR_OUT; | |
215 | ||
216 | /* set the buffer for read / write */ | |
217 | ven_req.pBuff = req_data->p_buffer; | |
218 | ||
219 | ||
220 | /* call common vendor command request */ | |
221 | status = cx231xx_send_vendor_cmd(dev, &ven_req); | |
77e97ba2 | 222 | if (status < 0 && !dev->i2c_scan_running) { |
336fea92 | 223 | dev_err(dev->dev, "%s: failed with status -%d\n", |
ed0e3729 | 224 | __func__, status); |
84b5dbf3 MCC |
225 | } |
226 | ||
227 | return status; | |
e0d3bafd | 228 | } |
e0d3bafd | 229 | EXPORT_SYMBOL_GPL(cx231xx_send_usb_command); |
b9255176 | 230 | |
24c80b65 MCC |
231 | /* |
232 | * Sends/Receives URB control messages, assuring to use a kalloced buffer | |
233 | * for all operations (dev->urb_buf), to avoid using stacked buffers, as | |
234 | * they aren't safe for usage with USB, due to DMA restrictions. | |
235 | * Also implements the debug code for control URB's. | |
236 | */ | |
237 | static int __usb_control_msg(struct cx231xx *dev, unsigned int pipe, | |
238 | __u8 request, __u8 requesttype, __u16 value, __u16 index, | |
239 | void *data, __u16 size, int timeout) | |
240 | { | |
241 | int rc, i; | |
242 | ||
243 | if (reg_debug) { | |
ba1da97e | 244 | printk(KERN_DEBUG "%s: (pipe 0x%08x): %s: %02x %02x %02x %02x %02x %02x %02x %02x ", |
24c80b65 MCC |
245 | dev->name, |
246 | pipe, | |
247 | (requesttype & USB_DIR_IN) ? "IN" : "OUT", | |
248 | requesttype, | |
249 | request, | |
250 | value & 0xff, value >> 8, | |
251 | index & 0xff, index >> 8, | |
252 | size & 0xff, size >> 8); | |
253 | if (!(requesttype & USB_DIR_IN)) { | |
254 | printk(KERN_CONT ">>>"); | |
255 | for (i = 0; i < size; i++) | |
256 | printk(KERN_CONT " %02x", | |
257 | ((unsigned char *)data)[i]); | |
258 | } | |
259 | } | |
260 | ||
261 | /* Do the real call to usb_control_msg */ | |
262 | mutex_lock(&dev->ctrl_urb_lock); | |
263 | if (!(requesttype & USB_DIR_IN) && size) | |
264 | memcpy(dev->urb_buf, data, size); | |
265 | rc = usb_control_msg(dev->udev, pipe, request, requesttype, value, | |
266 | index, dev->urb_buf, size, timeout); | |
267 | if ((requesttype & USB_DIR_IN) && size) | |
268 | memcpy(data, dev->urb_buf, size); | |
269 | mutex_unlock(&dev->ctrl_urb_lock); | |
270 | ||
271 | if (reg_debug) { | |
272 | if (unlikely(rc < 0)) { | |
273 | printk(KERN_CONT "FAILED!\n"); | |
274 | return rc; | |
275 | } | |
276 | ||
277 | if ((requesttype & USB_DIR_IN)) { | |
278 | printk(KERN_CONT "<<<"); | |
279 | for (i = 0; i < size; i++) | |
280 | printk(KERN_CONT " %02x", | |
281 | ((unsigned char *)data)[i]); | |
282 | } | |
283 | printk(KERN_CONT "\n"); | |
284 | } | |
285 | ||
286 | return rc; | |
287 | } | |
288 | ||
289 | ||
e0d3bafd SD |
290 | /* |
291 | * cx231xx_read_ctrl_reg() | |
292 | * reads data from the usb device specifying bRequest and wValue | |
293 | */ | |
294 | int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, | |
84b5dbf3 | 295 | char *buf, int len) |
e0d3bafd | 296 | { |
84b5dbf3 | 297 | u8 val = 0; |
e0d3bafd SD |
298 | int ret; |
299 | int pipe = usb_rcvctrlpipe(dev->udev, 0); | |
300 | ||
301 | if (dev->state & DEV_DISCONNECTED) | |
302 | return -ENODEV; | |
303 | ||
304 | if (len > URB_MAX_CTRL_SIZE) | |
305 | return -EINVAL; | |
306 | ||
84b5dbf3 MCC |
307 | switch (len) { |
308 | case 1: | |
309 | val = ENABLE_ONE_BYTE; | |
310 | break; | |
311 | case 2: | |
312 | val = ENABLE_TWE_BYTE; | |
313 | break; | |
314 | case 3: | |
315 | val = ENABLE_THREE_BYTE; | |
316 | break; | |
317 | case 4: | |
318 | val = ENABLE_FOUR_BYTE; | |
319 | break; | |
320 | default: | |
321 | val = 0xFF; /* invalid option */ | |
322 | } | |
323 | ||
324 | if (val == 0xFF) | |
325 | return -EINVAL; | |
e0d3bafd | 326 | |
24c80b65 | 327 | ret = __usb_control_msg(dev, pipe, req, |
e0d3bafd | 328 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
24c80b65 | 329 | val, reg, buf, len, HZ); |
e0d3bafd SD |
330 | return ret; |
331 | } | |
332 | ||
b9255176 SD |
333 | int cx231xx_send_vendor_cmd(struct cx231xx *dev, |
334 | struct VENDOR_REQUEST_IN *ven_req) | |
e0d3bafd | 335 | { |
84b5dbf3 | 336 | int ret; |
e0d3bafd | 337 | int pipe = 0; |
64fbf444 PB |
338 | int unsend_size = 0; |
339 | u8 *pdata; | |
e0d3bafd SD |
340 | |
341 | if (dev->state & DEV_DISCONNECTED) | |
342 | return -ENODEV; | |
343 | ||
344 | if ((ven_req->wLength > URB_MAX_CTRL_SIZE)) | |
345 | return -EINVAL; | |
346 | ||
84b5dbf3 MCC |
347 | if (ven_req->direction) |
348 | pipe = usb_rcvctrlpipe(dev->udev, 0); | |
349 | else | |
350 | pipe = usb_sndctrlpipe(dev->udev, 0); | |
e0d3bafd | 351 | |
24c80b65 MCC |
352 | /* |
353 | * If the cx23102 read more than 4 bytes with i2c bus, | |
354 | * need chop to 4 byte per request | |
355 | */ | |
64fbf444 PB |
356 | if ((ven_req->wLength > 4) && ((ven_req->bRequest == 0x4) || |
357 | (ven_req->bRequest == 0x5) || | |
6c5da803 OK |
358 | (ven_req->bRequest == 0x6) || |
359 | ||
360 | /* Internal Master 3 Bus can send | |
361 | * and receive only 4 bytes per time | |
362 | */ | |
363 | (ven_req->bRequest == 0x2))) { | |
64fbf444 PB |
364 | unsend_size = 0; |
365 | pdata = ven_req->pBuff; | |
366 | ||
367 | ||
368 | unsend_size = ven_req->wLength; | |
369 | ||
24c80b65 | 370 | /* the first package */ |
64fbf444 PB |
371 | ven_req->wValue = ven_req->wValue & 0xFFFB; |
372 | ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x2; | |
24c80b65 MCC |
373 | ret = __usb_control_msg(dev, pipe, ven_req->bRequest, |
374 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
64fbf444 PB |
375 | ven_req->wValue, ven_req->wIndex, pdata, |
376 | 0x0004, HZ); | |
377 | unsend_size = unsend_size - 4; | |
64fbf444 | 378 | |
24c80b65 | 379 | /* the middle package */ |
64fbf444 PB |
380 | ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x42; |
381 | while (unsend_size - 4 > 0) { | |
382 | pdata = pdata + 4; | |
24c80b65 | 383 | ret = __usb_control_msg(dev, pipe, |
64fbf444 | 384 | ven_req->bRequest, |
24c80b65 | 385 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
64fbf444 PB |
386 | ven_req->wValue, ven_req->wIndex, pdata, |
387 | 0x0004, HZ); | |
64fbf444 PB |
388 | unsend_size = unsend_size - 4; |
389 | } | |
390 | ||
24c80b65 | 391 | /* the last package */ |
64fbf444 PB |
392 | ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x40; |
393 | pdata = pdata + 4; | |
24c80b65 MCC |
394 | ret = __usb_control_msg(dev, pipe, ven_req->bRequest, |
395 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
64fbf444 PB |
396 | ven_req->wValue, ven_req->wIndex, pdata, |
397 | unsend_size, HZ); | |
64fbf444 | 398 | } else { |
24c80b65 MCC |
399 | ret = __usb_control_msg(dev, pipe, ven_req->bRequest, |
400 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
64fbf444 | 401 | ven_req->wValue, ven_req->wIndex, |
24c80b65 | 402 | ven_req->pBuff, ven_req->wLength, HZ); |
64fbf444 | 403 | } |
e0d3bafd SD |
404 | |
405 | return ret; | |
406 | } | |
407 | ||
408 | /* | |
409 | * cx231xx_write_ctrl_reg() | |
410 | * sends data to the usb device, specifying bRequest | |
411 | */ | |
412 | int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, char *buf, | |
84b5dbf3 | 413 | int len) |
e0d3bafd | 414 | { |
84b5dbf3 | 415 | u8 val = 0; |
e0d3bafd SD |
416 | int ret; |
417 | int pipe = usb_sndctrlpipe(dev->udev, 0); | |
418 | ||
419 | if (dev->state & DEV_DISCONNECTED) | |
420 | return -ENODEV; | |
421 | ||
422 | if ((len < 1) || (len > URB_MAX_CTRL_SIZE)) | |
423 | return -EINVAL; | |
424 | ||
84b5dbf3 MCC |
425 | switch (len) { |
426 | case 1: | |
427 | val = ENABLE_ONE_BYTE; | |
428 | break; | |
429 | case 2: | |
430 | val = ENABLE_TWE_BYTE; | |
431 | break; | |
432 | case 3: | |
433 | val = ENABLE_THREE_BYTE; | |
434 | break; | |
435 | case 4: | |
436 | val = ENABLE_FOUR_BYTE; | |
437 | break; | |
438 | default: | |
439 | val = 0xFF; /* invalid option */ | |
440 | } | |
441 | ||
442 | if (val == 0xFF) | |
443 | return -EINVAL; | |
e0d3bafd SD |
444 | |
445 | if (reg_debug) { | |
446 | int byte; | |
447 | ||
ba1da97e | 448 | cx231xx_isocdbg("(pipe 0x%08x): OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>", |
b9255176 SD |
449 | pipe, |
450 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
451 | req, 0, val, reg & 0xff, | |
452 | reg >> 8, len & 0xff, len >> 8); | |
e0d3bafd SD |
453 | |
454 | for (byte = 0; byte < len; byte++) | |
455 | cx231xx_isocdbg(" %02x", (unsigned char)buf[byte]); | |
456 | cx231xx_isocdbg("\n"); | |
457 | } | |
458 | ||
24c80b65 | 459 | ret = __usb_control_msg(dev, pipe, req, |
e0d3bafd | 460 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
24c80b65 | 461 | val, reg, buf, len, HZ); |
e0d3bafd SD |
462 | |
463 | return ret; | |
464 | } | |
465 | ||
b9255176 SD |
466 | /**************************************************************** |
467 | * USB Alternate Setting functions * | |
468 | *****************************************************************/ | |
e0d3bafd SD |
469 | |
470 | int cx231xx_set_video_alternate(struct cx231xx *dev) | |
471 | { | |
472 | int errCode, prev_alt = dev->video_mode.alt; | |
473 | unsigned int min_pkt_size = dev->width * 2 + 4; | |
84b5dbf3 | 474 | u32 usb_interface_index = 0; |
e0d3bafd SD |
475 | |
476 | /* When image size is bigger than a certain value, | |
477 | the frame size should be increased, otherwise, only | |
478 | green screen will be received. | |
479 | */ | |
480 | if (dev->width * 2 * dev->height > 720 * 240 * 2) | |
481 | min_pkt_size *= 2; | |
482 | ||
84b5dbf3 MCC |
483 | if (dev->width > 360) { |
484 | /* resolutions: 720,704,640 */ | |
485 | dev->video_mode.alt = 3; | |
486 | } else if (dev->width > 180) { | |
487 | /* resolutions: 360,352,320,240 */ | |
488 | dev->video_mode.alt = 2; | |
489 | } else if (dev->width > 0) { | |
490 | /* resolutions: 180,176,160,128,88 */ | |
491 | dev->video_mode.alt = 1; | |
492 | } else { | |
493 | /* Change to alt0 BULK to release USB bandwidth */ | |
494 | dev->video_mode.alt = 0; | |
495 | } | |
496 | ||
64fbf444 PB |
497 | if (dev->USE_ISO == 0) |
498 | dev->video_mode.alt = 0; | |
499 | ||
d5a1754d | 500 | cx231xx_coredbg("dev->video_mode.alt= %d\n", dev->video_mode.alt); |
64fbf444 | 501 | |
84b5dbf3 MCC |
502 | /* Get the correct video interface Index */ |
503 | usb_interface_index = | |
504 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
505 | video_index + 1; | |
e0d3bafd SD |
506 | |
507 | if (dev->video_mode.alt != prev_alt) { | |
508 | cx231xx_coredbg("minimum isoc packet size: %u (alt=%d)\n", | |
509 | min_pkt_size, dev->video_mode.alt); | |
64fbf444 PB |
510 | |
511 | if (dev->video_mode.alt_max_pkt_size != NULL) | |
512 | dev->video_mode.max_pkt_size = | |
513 | dev->video_mode.alt_max_pkt_size[dev->video_mode.alt]; | |
e0d3bafd | 514 | cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n", |
84b5dbf3 MCC |
515 | dev->video_mode.alt, |
516 | dev->video_mode.max_pkt_size); | |
84b5dbf3 MCC |
517 | errCode = |
518 | usb_set_interface(dev->udev, usb_interface_index, | |
519 | dev->video_mode.alt); | |
e0d3bafd | 520 | if (errCode < 0) { |
336fea92 | 521 | dev_err(dev->dev, |
b7085c08 | 522 | "cannot change alt number to %d (error=%i)\n", |
ed0e3729 | 523 | dev->video_mode.alt, errCode); |
e0d3bafd SD |
524 | return errCode; |
525 | } | |
526 | } | |
527 | return 0; | |
528 | } | |
529 | ||
530 | int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt) | |
531 | { | |
84b5dbf3 MCC |
532 | int status = 0; |
533 | u32 usb_interface_index = 0; | |
534 | u32 max_pkt_size = 0; | |
535 | ||
536 | switch (index) { | |
537 | case INDEX_TS1: | |
538 | usb_interface_index = | |
539 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
540 | ts1_index + 1; | |
64fbf444 | 541 | dev->ts1_mode.alt = alt; |
84b5dbf3 MCC |
542 | if (dev->ts1_mode.alt_max_pkt_size != NULL) |
543 | max_pkt_size = dev->ts1_mode.max_pkt_size = | |
544 | dev->ts1_mode.alt_max_pkt_size[dev->ts1_mode.alt]; | |
545 | break; | |
546 | case INDEX_TS2: | |
547 | usb_interface_index = | |
548 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
549 | ts2_index + 1; | |
550 | break; | |
551 | case INDEX_AUDIO: | |
552 | usb_interface_index = | |
553 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
554 | audio_index + 1; | |
555 | dev->adev.alt = alt; | |
556 | if (dev->adev.alt_max_pkt_size != NULL) | |
557 | max_pkt_size = dev->adev.max_pkt_size = | |
558 | dev->adev.alt_max_pkt_size[dev->adev.alt]; | |
559 | break; | |
560 | case INDEX_VIDEO: | |
561 | usb_interface_index = | |
562 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
563 | video_index + 1; | |
564 | dev->video_mode.alt = alt; | |
565 | if (dev->video_mode.alt_max_pkt_size != NULL) | |
566 | max_pkt_size = dev->video_mode.max_pkt_size = | |
567 | dev->video_mode.alt_max_pkt_size[dev->video_mode. | |
568 | alt]; | |
569 | break; | |
570 | case INDEX_VANC: | |
2f861387 MCC |
571 | if (dev->board.no_alt_vanc) |
572 | return 0; | |
84b5dbf3 MCC |
573 | usb_interface_index = |
574 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
575 | vanc_index + 1; | |
576 | dev->vbi_mode.alt = alt; | |
577 | if (dev->vbi_mode.alt_max_pkt_size != NULL) | |
578 | max_pkt_size = dev->vbi_mode.max_pkt_size = | |
579 | dev->vbi_mode.alt_max_pkt_size[dev->vbi_mode.alt]; | |
580 | break; | |
581 | case INDEX_HANC: | |
582 | usb_interface_index = | |
583 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
584 | hanc_index + 1; | |
585 | dev->sliced_cc_mode.alt = alt; | |
586 | if (dev->sliced_cc_mode.alt_max_pkt_size != NULL) | |
587 | max_pkt_size = dev->sliced_cc_mode.max_pkt_size = | |
588 | dev->sliced_cc_mode.alt_max_pkt_size[dev-> | |
589 | sliced_cc_mode. | |
590 | alt]; | |
591 | break; | |
592 | default: | |
593 | break; | |
594 | } | |
595 | ||
596 | if (alt > 0 && max_pkt_size == 0) { | |
336fea92 | 597 | dev_err(dev->dev, |
b7085c08 | 598 | "can't change interface %d alt no. to %d: Max. Pkt size = 0\n", |
ed0e3729 | 599 | usb_interface_index, alt); |
64fbf444 PB |
600 | /*To workaround error number=-71 on EP0 for videograbber, |
601 | need add following codes.*/ | |
2f861387 | 602 | if (dev->board.no_alt_vanc) |
64fbf444 | 603 | return -1; |
84b5dbf3 MCC |
604 | } |
605 | ||
ba1da97e MCC |
606 | cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u,Interface = %d\n", |
607 | alt, max_pkt_size, | |
d5a1754d | 608 | usb_interface_index); |
84b5dbf3 MCC |
609 | |
610 | if (usb_interface_index > 0) { | |
611 | status = usb_set_interface(dev->udev, usb_interface_index, alt); | |
e0d3bafd | 612 | if (status < 0) { |
336fea92 | 613 | dev_err(dev->dev, |
b7085c08 | 614 | "can't change interface %d alt no. to %d (err=%i)\n", |
ed0e3729 | 615 | usb_interface_index, alt, status); |
e0d3bafd SD |
616 | return status; |
617 | } | |
84b5dbf3 | 618 | } |
e0d3bafd | 619 | |
84b5dbf3 | 620 | return status; |
e0d3bafd SD |
621 | } |
622 | EXPORT_SYMBOL_GPL(cx231xx_set_alt_setting); | |
623 | ||
624 | int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio) | |
625 | { | |
626 | int rc = 0; | |
627 | ||
628 | if (!gpio) | |
629 | return rc; | |
630 | ||
631 | /* Send GPIO reset sequences specified at board entry */ | |
632 | while (gpio->sleep >= 0) { | |
84b5dbf3 MCC |
633 | rc = cx231xx_set_gpio_value(dev, gpio->bit, gpio->val); |
634 | if (rc < 0) | |
635 | return rc; | |
e0d3bafd SD |
636 | |
637 | if (gpio->sleep > 0) | |
638 | msleep(gpio->sleep); | |
639 | ||
640 | gpio++; | |
641 | } | |
642 | return rc; | |
643 | } | |
644 | ||
64fbf444 PB |
645 | int cx231xx_demod_reset(struct cx231xx *dev) |
646 | { | |
647 | ||
648 | u8 status = 0; | |
649 | u8 value[4] = { 0, 0, 0, 0 }; | |
650 | ||
651 | status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, | |
652 | value, 4); | |
64fbf444 | 653 | |
d5a1754d DH |
654 | cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, |
655 | value[0], value[1], value[2], value[3]); | |
656 | ||
657 | cx231xx_coredbg("Enter cx231xx_demod_reset()\n"); | |
658 | ||
69626853 MCC |
659 | value[1] = (u8) 0x3; |
660 | status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
661 | PWR_CTL_EN, value, 4); | |
662 | msleep(10); | |
663 | ||
664 | value[1] = (u8) 0x0; | |
665 | status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
666 | PWR_CTL_EN, value, 4); | |
667 | msleep(10); | |
668 | ||
669 | value[1] = (u8) 0x3; | |
670 | status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
671 | PWR_CTL_EN, value, 4); | |
672 | msleep(10); | |
64fbf444 PB |
673 | |
674 | status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, | |
675 | value, 4); | |
d5a1754d DH |
676 | |
677 | cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, | |
678 | value[0], value[1], value[2], value[3]); | |
64fbf444 PB |
679 | |
680 | return status; | |
681 | } | |
682 | EXPORT_SYMBOL_GPL(cx231xx_demod_reset); | |
683 | int is_fw_load(struct cx231xx *dev) | |
684 | { | |
685 | return cx231xx_check_fw(dev); | |
686 | } | |
687 | EXPORT_SYMBOL_GPL(is_fw_load); | |
688 | ||
e0d3bafd SD |
689 | int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode) |
690 | { | |
64fbf444 PB |
691 | int errCode = 0; |
692 | ||
e0d3bafd SD |
693 | if (dev->mode == set_mode) |
694 | return 0; | |
695 | ||
696 | if (set_mode == CX231XX_SUSPEND) { | |
84b5dbf3 | 697 | /* Set the chip in power saving mode */ |
e0d3bafd SD |
698 | dev->mode = set_mode; |
699 | } | |
700 | ||
701 | /* Resource is locked */ | |
702 | if (dev->mode != CX231XX_SUSPEND) | |
703 | return -EINVAL; | |
704 | ||
705 | dev->mode = set_mode; | |
706 | ||
64fbf444 PB |
707 | if (dev->mode == CX231XX_DIGITAL_MODE)/* Set Digital power mode */ { |
708 | /* set AGC mode to Digital */ | |
709 | switch (dev->model) { | |
710 | case CX231XX_BOARD_CNXT_CARRAERA: | |
711 | case CX231XX_BOARD_CNXT_RDE_250: | |
712 | case CX231XX_BOARD_CNXT_SHELBY: | |
713 | case CX231XX_BOARD_CNXT_RDU_250: | |
714 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); | |
715 | break; | |
716 | case CX231XX_BOARD_CNXT_RDE_253S: | |
717 | case CX231XX_BOARD_CNXT_RDU_253S: | |
24b923f0 | 718 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
b88ba619 DH |
719 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); |
720 | break; | |
1a50fdde | 721 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
dd2e7dd2 | 722 | case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx: |
b88ba619 DH |
723 | errCode = cx231xx_set_power_mode(dev, |
724 | POLARIS_AVMODE_DIGITAL); | |
64fbf444 PB |
725 | break; |
726 | default: | |
727 | break; | |
728 | } | |
729 | } else/* Set Analog Power mode */ { | |
730 | /* set AGC mode to Analog */ | |
731 | switch (dev->model) { | |
732 | case CX231XX_BOARD_CNXT_CARRAERA: | |
733 | case CX231XX_BOARD_CNXT_RDE_250: | |
734 | case CX231XX_BOARD_CNXT_SHELBY: | |
735 | case CX231XX_BOARD_CNXT_RDU_250: | |
736 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); | |
737 | break; | |
738 | case CX231XX_BOARD_CNXT_RDE_253S: | |
739 | case CX231XX_BOARD_CNXT_RDU_253S: | |
1a50fdde | 740 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
dd2e7dd2 | 741 | case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx: |
9417bc6d | 742 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
de8ae0d5 PM |
743 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL: |
744 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC: | |
24b923f0 | 745 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); |
64fbf444 PB |
746 | break; |
747 | default: | |
748 | break; | |
749 | } | |
750 | } | |
b9255176 | 751 | |
dc4af782 MCC |
752 | if (errCode < 0) { |
753 | dev_err(dev->dev, "Failed to set devmode to %s: error: %i", | |
754 | dev->mode == CX231XX_DIGITAL_MODE ? "digital" : "analog", | |
755 | errCode); | |
756 | return errCode; | |
757 | } | |
758 | ||
759 | return 0; | |
e0d3bafd SD |
760 | } |
761 | EXPORT_SYMBOL_GPL(cx231xx_set_mode); | |
762 | ||
64fbf444 PB |
763 | int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size) |
764 | { | |
765 | int errCode = 0; | |
20e01b26 DC |
766 | int actlen = -1; |
767 | int ret = -ENOMEM; | |
64fbf444 PB |
768 | u32 *buffer; |
769 | ||
da983503 | 770 | buffer = kzalloc(4096, GFP_KERNEL); |
ed0e3729 | 771 | if (buffer == NULL) |
64fbf444 | 772 | return -ENOMEM; |
64fbf444 PB |
773 | memcpy(&buffer[0], firmware, 4096); |
774 | ||
775 | ret = usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, 5), | |
da983503 | 776 | buffer, 4096, &actlen, 2000); |
64fbf444 PB |
777 | |
778 | if (ret) | |
336fea92 | 779 | dev_err(dev->dev, |
b7085c08 MCC |
780 | "bulk message failed: %d (%d/%d)", ret, |
781 | size, actlen); | |
64fbf444 PB |
782 | else { |
783 | errCode = actlen != size ? -1 : 0; | |
784 | } | |
da983503 HV |
785 | kfree(buffer); |
786 | return errCode; | |
64fbf444 PB |
787 | } |
788 | ||
b9255176 SD |
789 | /***************************************************************** |
790 | * URB Streaming functions * | |
791 | ******************************************************************/ | |
e0d3bafd SD |
792 | |
793 | /* | |
794 | * IRQ callback, called by URB callback | |
795 | */ | |
64fbf444 | 796 | static void cx231xx_isoc_irq_callback(struct urb *urb) |
e0d3bafd | 797 | { |
84b5dbf3 MCC |
798 | struct cx231xx_dmaqueue *dma_q = urb->context; |
799 | struct cx231xx_video_mode *vmode = | |
800 | container_of(dma_q, struct cx231xx_video_mode, vidq); | |
801 | struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode); | |
da983503 | 802 | int i; |
e0d3bafd | 803 | |
84b5dbf3 MCC |
804 | switch (urb->status) { |
805 | case 0: /* success */ | |
806 | case -ETIMEDOUT: /* NAK */ | |
807 | break; | |
808 | case -ECONNRESET: /* kill */ | |
809 | case -ENOENT: | |
810 | case -ESHUTDOWN: | |
811 | return; | |
812 | default: /* error */ | |
69b17abf | 813 | cx231xx_isocdbg("urb completion error %d.\n", urb->status); |
84b5dbf3 | 814 | break; |
e0d3bafd SD |
815 | } |
816 | ||
817 | /* Copy data from URB */ | |
818 | spin_lock(&dev->video_mode.slock); | |
da983503 | 819 | dev->video_mode.isoc_ctl.isoc_copy(dev, urb); |
e0d3bafd SD |
820 | spin_unlock(&dev->video_mode.slock); |
821 | ||
822 | /* Reset urb buffers */ | |
823 | for (i = 0; i < urb->number_of_packets; i++) { | |
824 | urb->iso_frame_desc[i].status = 0; | |
825 | urb->iso_frame_desc[i].actual_length = 0; | |
826 | } | |
e0d3bafd SD |
827 | |
828 | urb->status = usb_submit_urb(urb, GFP_ATOMIC); | |
829 | if (urb->status) { | |
830 | cx231xx_isocdbg("urb resubmit failed (error=%i)\n", | |
84b5dbf3 | 831 | urb->status); |
e0d3bafd SD |
832 | } |
833 | } | |
64fbf444 PB |
834 | /***************************************************************** |
835 | * URB Streaming functions * | |
836 | ******************************************************************/ | |
837 | ||
838 | /* | |
839 | * IRQ callback, called by URB callback | |
840 | */ | |
841 | static void cx231xx_bulk_irq_callback(struct urb *urb) | |
842 | { | |
843 | struct cx231xx_dmaqueue *dma_q = urb->context; | |
844 | struct cx231xx_video_mode *vmode = | |
845 | container_of(dma_q, struct cx231xx_video_mode, vidq); | |
846 | struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode); | |
64fbf444 PB |
847 | |
848 | switch (urb->status) { | |
849 | case 0: /* success */ | |
850 | case -ETIMEDOUT: /* NAK */ | |
851 | break; | |
852 | case -ECONNRESET: /* kill */ | |
853 | case -ENOENT: | |
854 | case -ESHUTDOWN: | |
855 | return; | |
69b17abf TH |
856 | case -EPIPE: /* stall */ |
857 | cx231xx_isocdbg("urb completion error - device is stalled.\n"); | |
858 | return; | |
64fbf444 | 859 | default: /* error */ |
69b17abf | 860 | cx231xx_isocdbg("urb completion error %d.\n", urb->status); |
64fbf444 PB |
861 | break; |
862 | } | |
863 | ||
864 | /* Copy data from URB */ | |
865 | spin_lock(&dev->video_mode.slock); | |
da983503 | 866 | dev->video_mode.bulk_ctl.bulk_copy(dev, urb); |
64fbf444 | 867 | spin_unlock(&dev->video_mode.slock); |
e0d3bafd | 868 | |
64fbf444 | 869 | /* Reset urb buffers */ |
64fbf444 PB |
870 | urb->status = usb_submit_urb(urb, GFP_ATOMIC); |
871 | if (urb->status) { | |
872 | cx231xx_isocdbg("urb resubmit failed (error=%i)\n", | |
873 | urb->status); | |
874 | } | |
875 | } | |
e0d3bafd SD |
876 | /* |
877 | * Stop and Deallocate URBs | |
878 | */ | |
879 | void cx231xx_uninit_isoc(struct cx231xx *dev) | |
880 | { | |
64fbf444 | 881 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; |
e0d3bafd SD |
882 | struct urb *urb; |
883 | int i; | |
69b17abf | 884 | bool broken_pipe = false; |
e0d3bafd SD |
885 | |
886 | cx231xx_isocdbg("cx231xx: called cx231xx_uninit_isoc\n"); | |
887 | ||
888 | dev->video_mode.isoc_ctl.nfields = -1; | |
889 | for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { | |
890 | urb = dev->video_mode.isoc_ctl.urb[i]; | |
891 | if (urb) { | |
84b5dbf3 MCC |
892 | if (!irqs_disabled()) |
893 | usb_kill_urb(urb); | |
894 | else | |
895 | usb_unlink_urb(urb); | |
e0d3bafd SD |
896 | |
897 | if (dev->video_mode.isoc_ctl.transfer_buffer[i]) { | |
997ea58e DM |
898 | usb_free_coherent(dev->udev, |
899 | urb->transfer_buffer_length, | |
900 | dev->video_mode.isoc_ctl. | |
901 | transfer_buffer[i], | |
902 | urb->transfer_dma); | |
e0d3bafd | 903 | } |
69b17abf TH |
904 | if (urb->status == -EPIPE) { |
905 | broken_pipe = true; | |
906 | } | |
e0d3bafd SD |
907 | usb_free_urb(urb); |
908 | dev->video_mode.isoc_ctl.urb[i] = NULL; | |
909 | } | |
910 | dev->video_mode.isoc_ctl.transfer_buffer[i] = NULL; | |
911 | } | |
912 | ||
69b17abf TH |
913 | if (broken_pipe) { |
914 | cx231xx_isocdbg("Reset endpoint to recover broken pipe."); | |
915 | usb_reset_endpoint(dev->udev, dev->video_mode.end_point_addr); | |
916 | } | |
e0d3bafd SD |
917 | kfree(dev->video_mode.isoc_ctl.urb); |
918 | kfree(dev->video_mode.isoc_ctl.transfer_buffer); | |
64fbf444 | 919 | kfree(dma_q->p_left_data); |
e0d3bafd SD |
920 | |
921 | dev->video_mode.isoc_ctl.urb = NULL; | |
922 | dev->video_mode.isoc_ctl.transfer_buffer = NULL; | |
923 | dev->video_mode.isoc_ctl.num_bufs = 0; | |
64fbf444 PB |
924 | dma_q->p_left_data = NULL; |
925 | ||
926 | if (dev->mode_tv == 0) | |
927 | cx231xx_capture_start(dev, 0, Raw_Video); | |
928 | else | |
929 | cx231xx_capture_start(dev, 0, TS1_serial_mode); | |
930 | ||
e0d3bafd | 931 | |
e0d3bafd SD |
932 | } |
933 | EXPORT_SYMBOL_GPL(cx231xx_uninit_isoc); | |
934 | ||
64fbf444 PB |
935 | /* |
936 | * Stop and Deallocate URBs | |
937 | */ | |
938 | void cx231xx_uninit_bulk(struct cx231xx *dev) | |
939 | { | |
ce3556bd | 940 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; |
64fbf444 PB |
941 | struct urb *urb; |
942 | int i; | |
69b17abf | 943 | bool broken_pipe = false; |
64fbf444 PB |
944 | |
945 | cx231xx_isocdbg("cx231xx: called cx231xx_uninit_bulk\n"); | |
946 | ||
947 | dev->video_mode.bulk_ctl.nfields = -1; | |
948 | for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { | |
949 | urb = dev->video_mode.bulk_ctl.urb[i]; | |
950 | if (urb) { | |
951 | if (!irqs_disabled()) | |
952 | usb_kill_urb(urb); | |
953 | else | |
954 | usb_unlink_urb(urb); | |
955 | ||
956 | if (dev->video_mode.bulk_ctl.transfer_buffer[i]) { | |
957 | usb_free_coherent(dev->udev, | |
958 | urb->transfer_buffer_length, | |
ce3556bd | 959 | dev->video_mode.bulk_ctl. |
64fbf444 PB |
960 | transfer_buffer[i], |
961 | urb->transfer_dma); | |
962 | } | |
69b17abf TH |
963 | if (urb->status == -EPIPE) { |
964 | broken_pipe = true; | |
965 | } | |
64fbf444 PB |
966 | usb_free_urb(urb); |
967 | dev->video_mode.bulk_ctl.urb[i] = NULL; | |
968 | } | |
969 | dev->video_mode.bulk_ctl.transfer_buffer[i] = NULL; | |
970 | } | |
971 | ||
69b17abf TH |
972 | if (broken_pipe) { |
973 | cx231xx_isocdbg("Reset endpoint to recover broken pipe."); | |
974 | usb_reset_endpoint(dev->udev, dev->video_mode.end_point_addr); | |
975 | } | |
64fbf444 PB |
976 | kfree(dev->video_mode.bulk_ctl.urb); |
977 | kfree(dev->video_mode.bulk_ctl.transfer_buffer); | |
ce3556bd | 978 | kfree(dma_q->p_left_data); |
64fbf444 PB |
979 | |
980 | dev->video_mode.bulk_ctl.urb = NULL; | |
981 | dev->video_mode.bulk_ctl.transfer_buffer = NULL; | |
982 | dev->video_mode.bulk_ctl.num_bufs = 0; | |
ce3556bd | 983 | dma_q->p_left_data = NULL; |
64fbf444 PB |
984 | |
985 | if (dev->mode_tv == 0) | |
986 | cx231xx_capture_start(dev, 0, Raw_Video); | |
987 | else | |
988 | cx231xx_capture_start(dev, 0, TS1_serial_mode); | |
989 | ||
990 | ||
991 | } | |
992 | EXPORT_SYMBOL_GPL(cx231xx_uninit_bulk); | |
993 | ||
e0d3bafd SD |
994 | /* |
995 | * Allocate URBs and start IRQ | |
996 | */ | |
997 | int cx231xx_init_isoc(struct cx231xx *dev, int max_packets, | |
84b5dbf3 | 998 | int num_bufs, int max_pkt_size, |
b9255176 | 999 | int (*isoc_copy) (struct cx231xx *dev, struct urb *urb)) |
e0d3bafd SD |
1000 | { |
1001 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; | |
1002 | int i; | |
1003 | int sb_size, pipe; | |
1004 | struct urb *urb; | |
1005 | int j, k; | |
1006 | int rc; | |
1007 | ||
e0d3bafd SD |
1008 | /* De-allocates all pending stuff */ |
1009 | cx231xx_uninit_isoc(dev); | |
1010 | ||
64fbf444 | 1011 | dma_q->p_left_data = kzalloc(4096, GFP_KERNEL); |
ed0e3729 | 1012 | if (dma_q->p_left_data == NULL) |
64fbf444 | 1013 | return -ENOMEM; |
64fbf444 | 1014 | |
e0d3bafd SD |
1015 | dev->video_mode.isoc_ctl.isoc_copy = isoc_copy; |
1016 | dev->video_mode.isoc_ctl.num_bufs = num_bufs; | |
84b5dbf3 MCC |
1017 | dma_q->pos = 0; |
1018 | dma_q->is_partial_line = 0; | |
1019 | dma_q->last_sav = 0; | |
1020 | dma_q->current_field = -1; | |
1021 | dma_q->field1_done = 0; | |
1022 | dma_q->lines_per_field = dev->height / 2; | |
1023 | dma_q->bytes_left_in_line = dev->width << 1; | |
1024 | dma_q->lines_completed = 0; | |
64fbf444 PB |
1025 | dma_q->mpeg_buffer_done = 0; |
1026 | dma_q->left_data_count = 0; | |
1027 | dma_q->mpeg_buffer_completed = 0; | |
1028 | dma_q->add_ps_package_head = CX231XX_NEED_ADD_PS_PACKAGE_HEAD; | |
1029 | dma_q->ps_head[0] = 0x00; | |
1030 | dma_q->ps_head[1] = 0x00; | |
1031 | dma_q->ps_head[2] = 0x01; | |
1032 | dma_q->ps_head[3] = 0xBA; | |
84b5dbf3 MCC |
1033 | for (i = 0; i < 8; i++) |
1034 | dma_q->partial_buf[i] = 0; | |
1035 | ||
1036 | dev->video_mode.isoc_ctl.urb = | |
1037 | kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL); | |
e0d3bafd | 1038 | if (!dev->video_mode.isoc_ctl.urb) { |
336fea92 | 1039 | dev_err(dev->dev, |
b7085c08 | 1040 | "cannot alloc memory for usb buffers\n"); |
e0d3bafd SD |
1041 | return -ENOMEM; |
1042 | } | |
1043 | ||
84b5dbf3 MCC |
1044 | dev->video_mode.isoc_ctl.transfer_buffer = |
1045 | kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL); | |
e0d3bafd | 1046 | if (!dev->video_mode.isoc_ctl.transfer_buffer) { |
336fea92 | 1047 | dev_err(dev->dev, |
b7085c08 | 1048 | "cannot allocate memory for usbtransfer\n"); |
e0d3bafd SD |
1049 | kfree(dev->video_mode.isoc_ctl.urb); |
1050 | return -ENOMEM; | |
1051 | } | |
1052 | ||
1053 | dev->video_mode.isoc_ctl.max_pkt_size = max_pkt_size; | |
1054 | dev->video_mode.isoc_ctl.buf = NULL; | |
1055 | ||
1056 | sb_size = max_packets * dev->video_mode.isoc_ctl.max_pkt_size; | |
1057 | ||
64fbf444 PB |
1058 | if (dev->mode_tv == 1) |
1059 | dev->video_mode.end_point_addr = 0x81; | |
1060 | else | |
1061 | dev->video_mode.end_point_addr = 0x84; | |
1062 | ||
1063 | ||
e0d3bafd SD |
1064 | /* allocate urbs and transfer buffers */ |
1065 | for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { | |
1066 | urb = usb_alloc_urb(max_packets, GFP_KERNEL); | |
1067 | if (!urb) { | |
e0d3bafd SD |
1068 | cx231xx_uninit_isoc(dev); |
1069 | return -ENOMEM; | |
1070 | } | |
1071 | dev->video_mode.isoc_ctl.urb[i] = urb; | |
1072 | ||
84b5dbf3 | 1073 | dev->video_mode.isoc_ctl.transfer_buffer[i] = |
997ea58e DM |
1074 | usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL, |
1075 | &urb->transfer_dma); | |
e0d3bafd | 1076 | if (!dev->video_mode.isoc_ctl.transfer_buffer[i]) { |
336fea92 | 1077 | dev_err(dev->dev, |
b7085c08 | 1078 | "unable to allocate %i bytes for transfer buffer %i%s\n", |
ed0e3729 MCC |
1079 | sb_size, i, |
1080 | in_interrupt() ? " while in int" : ""); | |
e0d3bafd SD |
1081 | cx231xx_uninit_isoc(dev); |
1082 | return -ENOMEM; | |
1083 | } | |
1084 | memset(dev->video_mode.isoc_ctl.transfer_buffer[i], 0, sb_size); | |
1085 | ||
84b5dbf3 MCC |
1086 | pipe = |
1087 | usb_rcvisocpipe(dev->udev, dev->video_mode.end_point_addr); | |
e0d3bafd SD |
1088 | |
1089 | usb_fill_int_urb(urb, dev->udev, pipe, | |
84b5dbf3 | 1090 | dev->video_mode.isoc_ctl.transfer_buffer[i], |
64fbf444 | 1091 | sb_size, cx231xx_isoc_irq_callback, dma_q, 1); |
e0d3bafd SD |
1092 | |
1093 | urb->number_of_packets = max_packets; | |
7a6f6c29 | 1094 | urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP; |
e0d3bafd SD |
1095 | |
1096 | k = 0; | |
1097 | for (j = 0; j < max_packets; j++) { | |
1098 | urb->iso_frame_desc[j].offset = k; | |
1099 | urb->iso_frame_desc[j].length = | |
84b5dbf3 | 1100 | dev->video_mode.isoc_ctl.max_pkt_size; |
e0d3bafd SD |
1101 | k += dev->video_mode.isoc_ctl.max_pkt_size; |
1102 | } | |
1103 | } | |
1104 | ||
1105 | init_waitqueue_head(&dma_q->wq); | |
1106 | ||
e0d3bafd SD |
1107 | /* submit urbs and enables IRQ */ |
1108 | for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { | |
84b5dbf3 MCC |
1109 | rc = usb_submit_urb(dev->video_mode.isoc_ctl.urb[i], |
1110 | GFP_ATOMIC); | |
e0d3bafd | 1111 | if (rc) { |
336fea92 | 1112 | dev_err(dev->dev, |
b7085c08 | 1113 | "submit of urb %i failed (error=%i)\n", i, |
ed0e3729 | 1114 | rc); |
e0d3bafd SD |
1115 | cx231xx_uninit_isoc(dev); |
1116 | return rc; | |
1117 | } | |
1118 | } | |
1119 | ||
64fbf444 PB |
1120 | if (dev->mode_tv == 0) |
1121 | cx231xx_capture_start(dev, 1, Raw_Video); | |
1122 | else | |
1123 | cx231xx_capture_start(dev, 1, TS1_serial_mode); | |
e0d3bafd SD |
1124 | |
1125 | return 0; | |
1126 | } | |
1127 | EXPORT_SYMBOL_GPL(cx231xx_init_isoc); | |
1128 | ||
64fbf444 PB |
1129 | /* |
1130 | * Allocate URBs and start IRQ | |
1131 | */ | |
1132 | int cx231xx_init_bulk(struct cx231xx *dev, int max_packets, | |
1133 | int num_bufs, int max_pkt_size, | |
1134 | int (*bulk_copy) (struct cx231xx *dev, struct urb *urb)) | |
1135 | { | |
1136 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; | |
1137 | int i; | |
1138 | int sb_size, pipe; | |
1139 | struct urb *urb; | |
1140 | int rc; | |
1141 | ||
1142 | dev->video_input = dev->video_input > 2 ? 2 : dev->video_input; | |
1143 | ||
d5a1754d DH |
1144 | cx231xx_coredbg("Setting Video mux to %d\n", dev->video_input); |
1145 | ||
64fbf444 PB |
1146 | video_mux(dev, dev->video_input); |
1147 | ||
1148 | /* De-allocates all pending stuff */ | |
1149 | cx231xx_uninit_bulk(dev); | |
1150 | ||
1151 | dev->video_mode.bulk_ctl.bulk_copy = bulk_copy; | |
1152 | dev->video_mode.bulk_ctl.num_bufs = num_bufs; | |
1153 | dma_q->pos = 0; | |
1154 | dma_q->is_partial_line = 0; | |
1155 | dma_q->last_sav = 0; | |
1156 | dma_q->current_field = -1; | |
1157 | dma_q->field1_done = 0; | |
1158 | dma_q->lines_per_field = dev->height / 2; | |
1159 | dma_q->bytes_left_in_line = dev->width << 1; | |
1160 | dma_q->lines_completed = 0; | |
1161 | dma_q->mpeg_buffer_done = 0; | |
1162 | dma_q->left_data_count = 0; | |
1163 | dma_q->mpeg_buffer_completed = 0; | |
1164 | dma_q->ps_head[0] = 0x00; | |
1165 | dma_q->ps_head[1] = 0x00; | |
1166 | dma_q->ps_head[2] = 0x01; | |
1167 | dma_q->ps_head[3] = 0xBA; | |
1168 | for (i = 0; i < 8; i++) | |
1169 | dma_q->partial_buf[i] = 0; | |
1170 | ||
1171 | dev->video_mode.bulk_ctl.urb = | |
1172 | kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL); | |
1173 | if (!dev->video_mode.bulk_ctl.urb) { | |
336fea92 | 1174 | dev_err(dev->dev, |
b7085c08 | 1175 | "cannot alloc memory for usb buffers\n"); |
64fbf444 PB |
1176 | return -ENOMEM; |
1177 | } | |
1178 | ||
1179 | dev->video_mode.bulk_ctl.transfer_buffer = | |
1180 | kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL); | |
1181 | if (!dev->video_mode.bulk_ctl.transfer_buffer) { | |
336fea92 | 1182 | dev_err(dev->dev, |
b7085c08 | 1183 | "cannot allocate memory for usbtransfer\n"); |
64fbf444 PB |
1184 | kfree(dev->video_mode.bulk_ctl.urb); |
1185 | return -ENOMEM; | |
1186 | } | |
1187 | ||
1188 | dev->video_mode.bulk_ctl.max_pkt_size = max_pkt_size; | |
1189 | dev->video_mode.bulk_ctl.buf = NULL; | |
1190 | ||
1191 | sb_size = max_packets * dev->video_mode.bulk_ctl.max_pkt_size; | |
1192 | ||
1193 | if (dev->mode_tv == 1) | |
1194 | dev->video_mode.end_point_addr = 0x81; | |
1195 | else | |
1196 | dev->video_mode.end_point_addr = 0x84; | |
1197 | ||
1198 | ||
1199 | /* allocate urbs and transfer buffers */ | |
1200 | for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { | |
1201 | urb = usb_alloc_urb(0, GFP_KERNEL); | |
1202 | if (!urb) { | |
64fbf444 PB |
1203 | cx231xx_uninit_bulk(dev); |
1204 | return -ENOMEM; | |
1205 | } | |
1206 | dev->video_mode.bulk_ctl.urb[i] = urb; | |
7a6f6c29 | 1207 | urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP; |
64fbf444 PB |
1208 | |
1209 | dev->video_mode.bulk_ctl.transfer_buffer[i] = | |
1210 | usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL, | |
1211 | &urb->transfer_dma); | |
1212 | if (!dev->video_mode.bulk_ctl.transfer_buffer[i]) { | |
336fea92 | 1213 | dev_err(dev->dev, |
b7085c08 | 1214 | "unable to allocate %i bytes for transfer buffer %i%s\n", |
ed0e3729 MCC |
1215 | sb_size, i, |
1216 | in_interrupt() ? " while in int" : ""); | |
64fbf444 PB |
1217 | cx231xx_uninit_bulk(dev); |
1218 | return -ENOMEM; | |
1219 | } | |
1220 | memset(dev->video_mode.bulk_ctl.transfer_buffer[i], 0, sb_size); | |
1221 | ||
1222 | pipe = usb_rcvbulkpipe(dev->udev, | |
1223 | dev->video_mode.end_point_addr); | |
1224 | usb_fill_bulk_urb(urb, dev->udev, pipe, | |
1225 | dev->video_mode.bulk_ctl.transfer_buffer[i], | |
1226 | sb_size, cx231xx_bulk_irq_callback, dma_q); | |
1227 | } | |
1228 | ||
ce3556bd TH |
1229 | /* clear halt */ |
1230 | rc = usb_clear_halt(dev->udev, dev->video_mode.bulk_ctl.urb[0]->pipe); | |
1231 | if (rc < 0) { | |
1232 | dev_err(dev->dev, | |
1233 | "failed to clear USB bulk endpoint stall/halt condition (error=%i)\n", | |
1234 | rc); | |
1235 | cx231xx_uninit_bulk(dev); | |
1236 | return rc; | |
1237 | } | |
1238 | ||
64fbf444 PB |
1239 | init_waitqueue_head(&dma_q->wq); |
1240 | ||
1241 | /* submit urbs and enables IRQ */ | |
1242 | for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { | |
1243 | rc = usb_submit_urb(dev->video_mode.bulk_ctl.urb[i], | |
1244 | GFP_ATOMIC); | |
1245 | if (rc) { | |
336fea92 | 1246 | dev_err(dev->dev, |
b7085c08 | 1247 | "submit of urb %i failed (error=%i)\n", i, rc); |
64fbf444 PB |
1248 | cx231xx_uninit_bulk(dev); |
1249 | return rc; | |
1250 | } | |
1251 | } | |
1252 | ||
1253 | if (dev->mode_tv == 0) | |
1254 | cx231xx_capture_start(dev, 1, Raw_Video); | |
1255 | else | |
1256 | cx231xx_capture_start(dev, 1, TS1_serial_mode); | |
1257 | ||
1258 | return 0; | |
1259 | } | |
1260 | EXPORT_SYMBOL_GPL(cx231xx_init_bulk); | |
1261 | void cx231xx_stop_TS1(struct cx231xx *dev) | |
1262 | { | |
64fbf444 PB |
1263 | u8 val[4] = { 0, 0, 0, 0 }; |
1264 | ||
da983503 HV |
1265 | val[0] = 0x00; |
1266 | val[1] = 0x03; | |
1267 | val[2] = 0x00; | |
1268 | val[3] = 0x00; | |
1269 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1270 | TS_MODE_REG, val, 4); | |
1271 | ||
1272 | val[0] = 0x00; | |
1273 | val[1] = 0x70; | |
1274 | val[2] = 0x04; | |
1275 | val[3] = 0x00; | |
1276 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1277 | TS1_CFG_REG, val, 4); | |
64fbf444 PB |
1278 | } |
1279 | /* EXPORT_SYMBOL_GPL(cx231xx_stop_TS1); */ | |
1280 | void cx231xx_start_TS1(struct cx231xx *dev) | |
1281 | { | |
64fbf444 PB |
1282 | u8 val[4] = { 0, 0, 0, 0 }; |
1283 | ||
da983503 HV |
1284 | val[0] = 0x03; |
1285 | val[1] = 0x03; | |
1286 | val[2] = 0x00; | |
1287 | val[3] = 0x00; | |
1288 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1289 | TS_MODE_REG, val, 4); | |
1290 | ||
1291 | val[0] = 0x04; | |
1292 | val[1] = 0xA3; | |
1293 | val[2] = 0x3B; | |
1294 | val[3] = 0x00; | |
1295 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1296 | TS1_CFG_REG, val, 4); | |
64fbf444 PB |
1297 | } |
1298 | /* EXPORT_SYMBOL_GPL(cx231xx_start_TS1); */ | |
b9255176 SD |
1299 | /***************************************************************** |
1300 | * Device Init/UnInit functions * | |
1301 | ******************************************************************/ | |
e0d3bafd SD |
1302 | int cx231xx_dev_init(struct cx231xx *dev) |
1303 | { | |
84b5dbf3 | 1304 | int errCode = 0; |
e0d3bafd | 1305 | |
84b5dbf3 | 1306 | /* Initialize I2C bus */ |
e0d3bafd SD |
1307 | |
1308 | /* External Master 1 Bus */ | |
1309 | dev->i2c_bus[0].nr = 0; | |
1310 | dev->i2c_bus[0].dev = dev; | |
1a50fdde | 1311 | dev->i2c_bus[0].i2c_period = I2C_SPEED_100K; /* 100 KHz */ |
84b5dbf3 MCC |
1312 | dev->i2c_bus[0].i2c_nostop = 0; |
1313 | dev->i2c_bus[0].i2c_reserve = 0; | |
e0d3bafd SD |
1314 | |
1315 | /* External Master 2 Bus */ | |
1316 | dev->i2c_bus[1].nr = 1; | |
1317 | dev->i2c_bus[1].dev = dev; | |
1a50fdde | 1318 | dev->i2c_bus[1].i2c_period = I2C_SPEED_100K; /* 100 KHz */ |
84b5dbf3 MCC |
1319 | dev->i2c_bus[1].i2c_nostop = 0; |
1320 | dev->i2c_bus[1].i2c_reserve = 0; | |
e0d3bafd SD |
1321 | |
1322 | /* Internal Master 3 Bus */ | |
1323 | dev->i2c_bus[2].nr = 2; | |
1324 | dev->i2c_bus[2].dev = dev; | |
9ab66912 | 1325 | dev->i2c_bus[2].i2c_period = I2C_SPEED_100K; /* 100kHz */ |
84b5dbf3 MCC |
1326 | dev->i2c_bus[2].i2c_nostop = 0; |
1327 | dev->i2c_bus[2].i2c_reserve = 0; | |
e0d3bafd | 1328 | |
84b5dbf3 | 1329 | /* register I2C buses */ |
461af077 MCC |
1330 | errCode = cx231xx_i2c_register(&dev->i2c_bus[0]); |
1331 | if (errCode < 0) | |
1332 | return errCode; | |
1333 | errCode = cx231xx_i2c_register(&dev->i2c_bus[1]); | |
1334 | if (errCode < 0) | |
1335 | return errCode; | |
1336 | errCode = cx231xx_i2c_register(&dev->i2c_bus[2]); | |
1337 | if (errCode < 0) | |
1338 | return errCode; | |
e0d3bafd | 1339 | |
05e0dfd0 | 1340 | errCode = cx231xx_i2c_mux_create(dev); |
461af077 MCC |
1341 | if (errCode < 0) { |
1342 | dev_err(dev->dev, | |
1343 | "%s: Failed to create I2C mux\n", __func__); | |
1344 | return errCode; | |
1345 | } | |
1346 | errCode = cx231xx_i2c_mux_register(dev, 0); | |
1347 | if (errCode < 0) | |
1348 | return errCode; | |
1349 | ||
1350 | errCode = cx231xx_i2c_mux_register(dev, 1); | |
05e0dfd0 PR |
1351 | if (errCode < 0) |
1352 | return errCode; | |
15c212dd | 1353 | |
e4de03f2 MS |
1354 | /* scan the real bus segments in the order of physical port numbers */ |
1355 | cx231xx_do_i2c_scan(dev, I2C_0); | |
1356 | cx231xx_do_i2c_scan(dev, I2C_1_MUX_1); | |
1357 | cx231xx_do_i2c_scan(dev, I2C_2); | |
1358 | cx231xx_do_i2c_scan(dev, I2C_1_MUX_3); | |
1359 | ||
84b5dbf3 | 1360 | /* init hardware */ |
b9255176 | 1361 | /* Note : with out calling set power mode function, |
ecc67d10 | 1362 | afe can not be set up correctly */ |
2f861387 | 1363 | if (dev->board.external_av) { |
64fbf444 PB |
1364 | errCode = cx231xx_set_power_mode(dev, |
1365 | POLARIS_AVMODE_ENXTERNAL_AV); | |
1366 | if (errCode < 0) { | |
336fea92 | 1367 | dev_err(dev->dev, |
b7085c08 | 1368 | "%s: Failed to set Power - errCode [%d]!\n", |
ed0e3729 | 1369 | __func__, errCode); |
64fbf444 PB |
1370 | return errCode; |
1371 | } | |
1372 | } else { | |
1373 | errCode = cx231xx_set_power_mode(dev, | |
1374 | POLARIS_AVMODE_ANALOGT_TV); | |
1375 | if (errCode < 0) { | |
336fea92 | 1376 | dev_err(dev->dev, |
b7085c08 | 1377 | "%s: Failed to set Power - errCode [%d]!\n", |
ed0e3729 | 1378 | __func__, errCode); |
64fbf444 PB |
1379 | return errCode; |
1380 | } | |
e0d3bafd SD |
1381 | } |
1382 | ||
2f861387 MCC |
1383 | /* reset the Tuner, if it is a Xceive tuner */ |
1384 | if ((dev->board.tuner_type == TUNER_XC5000) || | |
1385 | (dev->board.tuner_type == TUNER_XC2028)) | |
64fbf444 PB |
1386 | cx231xx_gpio_set(dev, dev->board.tuner_gpio); |
1387 | ||
84b5dbf3 | 1388 | /* initialize Colibri block */ |
ecc67d10 | 1389 | errCode = cx231xx_afe_init_super_block(dev, 0x23c); |
e0d3bafd | 1390 | if (errCode < 0) { |
336fea92 | 1391 | dev_err(dev->dev, |
b7085c08 | 1392 | "%s: cx231xx_afe init super block - errCode [%d]!\n", |
ed0e3729 | 1393 | __func__, errCode); |
e0d3bafd SD |
1394 | return errCode; |
1395 | } | |
ecc67d10 | 1396 | errCode = cx231xx_afe_init_channels(dev); |
84b5dbf3 | 1397 | if (errCode < 0) { |
336fea92 | 1398 | dev_err(dev->dev, |
b7085c08 | 1399 | "%s: cx231xx_afe init channels - errCode [%d]!\n", |
ed0e3729 | 1400 | __func__, errCode); |
e0d3bafd SD |
1401 | return errCode; |
1402 | } | |
1403 | ||
84b5dbf3 MCC |
1404 | /* Set DIF in By pass mode */ |
1405 | errCode = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); | |
1406 | if (errCode < 0) { | |
336fea92 | 1407 | dev_err(dev->dev, |
b7085c08 | 1408 | "%s: cx231xx_dif set to By pass mode - errCode [%d]!\n", |
ed0e3729 | 1409 | __func__, errCode); |
e0d3bafd SD |
1410 | return errCode; |
1411 | } | |
1412 | ||
ecc67d10 SD |
1413 | /* I2S block related functions */ |
1414 | errCode = cx231xx_i2s_blk_initialize(dev); | |
84b5dbf3 | 1415 | if (errCode < 0) { |
336fea92 | 1416 | dev_err(dev->dev, |
b7085c08 | 1417 | "%s: cx231xx_i2s block initialize - errCode [%d]!\n", |
ed0e3729 | 1418 | __func__, errCode); |
e0d3bafd SD |
1419 | return errCode; |
1420 | } | |
1421 | ||
84b5dbf3 MCC |
1422 | /* init control pins */ |
1423 | errCode = cx231xx_init_ctrl_pin_status(dev); | |
1424 | if (errCode < 0) { | |
336fea92 | 1425 | dev_err(dev->dev, |
b7085c08 | 1426 | "%s: cx231xx_init ctrl pins - errCode [%d]!\n", |
ed0e3729 | 1427 | __func__, errCode); |
e0d3bafd SD |
1428 | return errCode; |
1429 | } | |
1430 | ||
84b5dbf3 | 1431 | /* set AGC mode to Analog */ |
64fbf444 PB |
1432 | switch (dev->model) { |
1433 | case CX231XX_BOARD_CNXT_CARRAERA: | |
1434 | case CX231XX_BOARD_CNXT_RDE_250: | |
1435 | case CX231XX_BOARD_CNXT_SHELBY: | |
1436 | case CX231XX_BOARD_CNXT_RDU_250: | |
84b5dbf3 | 1437 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); |
64fbf444 PB |
1438 | break; |
1439 | case CX231XX_BOARD_CNXT_RDE_253S: | |
1440 | case CX231XX_BOARD_CNXT_RDU_253S: | |
1a50fdde | 1441 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
dd2e7dd2 | 1442 | case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx: |
9417bc6d | 1443 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
de8ae0d5 PM |
1444 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL: |
1445 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC: | |
64fbf444 PB |
1446 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); |
1447 | break; | |
1448 | default: | |
1449 | break; | |
1450 | } | |
84b5dbf3 | 1451 | if (errCode < 0) { |
336fea92 | 1452 | dev_err(dev->dev, |
b7085c08 | 1453 | "%s: cx231xx_AGC mode to Analog - errCode [%d]!\n", |
ed0e3729 | 1454 | __func__, errCode); |
e0d3bafd SD |
1455 | return errCode; |
1456 | } | |
1457 | ||
84b5dbf3 MCC |
1458 | /* set all alternate settings to zero initially */ |
1459 | cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0); | |
1460 | cx231xx_set_alt_setting(dev, INDEX_VANC, 0); | |
1461 | cx231xx_set_alt_setting(dev, INDEX_HANC, 0); | |
1462 | if (dev->board.has_dvb) | |
1463 | cx231xx_set_alt_setting(dev, INDEX_TS1, 0); | |
e0d3bafd | 1464 | |
660acd54 | 1465 | errCode = 0; |
e0d3bafd SD |
1466 | return errCode; |
1467 | } | |
1468 | EXPORT_SYMBOL_GPL(cx231xx_dev_init); | |
1469 | ||
1470 | void cx231xx_dev_uninit(struct cx231xx *dev) | |
1471 | { | |
84b5dbf3 | 1472 | /* Un Initialize I2C bus */ |
05e0dfd0 | 1473 | cx231xx_i2c_mux_unregister(dev); |
e0d3bafd SD |
1474 | cx231xx_i2c_unregister(&dev->i2c_bus[2]); |
1475 | cx231xx_i2c_unregister(&dev->i2c_bus[1]); | |
1476 | cx231xx_i2c_unregister(&dev->i2c_bus[0]); | |
1477 | } | |
84b5dbf3 | 1478 | EXPORT_SYMBOL_GPL(cx231xx_dev_uninit); |
e0d3bafd | 1479 | |
b9255176 SD |
1480 | /***************************************************************** |
1481 | * G P I O related functions * | |
1482 | ******************************************************************/ | |
64fbf444 | 1483 | int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val, |
84b5dbf3 | 1484 | u8 len, u8 request, u8 direction) |
e0d3bafd | 1485 | { |
84b5dbf3 | 1486 | int status = 0; |
b9255176 | 1487 | struct VENDOR_REQUEST_IN ven_req; |
84b5dbf3 MCC |
1488 | |
1489 | /* Set wValue */ | |
1490 | ven_req.wValue = (u16) (gpio_bit >> 16 & 0xffff); | |
1491 | ||
1492 | /* set request */ | |
1493 | if (!request) { | |
1494 | if (direction) | |
7adc7998 | 1495 | ven_req.bRequest = VRT_GET_GPIO; /* 0x9 gpio */ |
84b5dbf3 | 1496 | else |
7adc7998 | 1497 | ven_req.bRequest = VRT_SET_GPIO; /* 0x8 gpio */ |
84b5dbf3 MCC |
1498 | } else { |
1499 | if (direction) | |
7adc7998 | 1500 | ven_req.bRequest = VRT_GET_GPIE; /* 0xb gpie */ |
84b5dbf3 | 1501 | else |
7adc7998 | 1502 | ven_req.bRequest = VRT_SET_GPIE; /* 0xa gpie */ |
84b5dbf3 | 1503 | } |
e0d3bafd | 1504 | |
84b5dbf3 MCC |
1505 | /* set index value */ |
1506 | ven_req.wIndex = (u16) (gpio_bit & 0xffff); | |
e0d3bafd | 1507 | |
84b5dbf3 MCC |
1508 | /* set wLength value */ |
1509 | ven_req.wLength = len; | |
e0d3bafd | 1510 | |
84b5dbf3 MCC |
1511 | /* set bData value */ |
1512 | ven_req.bData = 0; | |
e0d3bafd | 1513 | |
84b5dbf3 MCC |
1514 | /* set the buffer for read / write */ |
1515 | ven_req.pBuff = gpio_val; | |
1516 | ||
1517 | /* set the direction */ | |
1518 | if (direction) { | |
1519 | ven_req.direction = USB_DIR_IN; | |
1520 | memset(ven_req.pBuff, 0x00, ven_req.wLength); | |
1521 | } else | |
1522 | ven_req.direction = USB_DIR_OUT; | |
1523 | ||
1524 | ||
1525 | /* call common vendor command request */ | |
1526 | status = cx231xx_send_vendor_cmd(dev, &ven_req); | |
1527 | if (status < 0) { | |
336fea92 | 1528 | dev_err(dev->dev, "%s: failed with status -%d\n", |
ed0e3729 | 1529 | __func__, status); |
84b5dbf3 | 1530 | } |
e0d3bafd | 1531 | |
84b5dbf3 | 1532 | return status; |
e0d3bafd | 1533 | } |
e0d3bafd SD |
1534 | EXPORT_SYMBOL_GPL(cx231xx_send_gpio_cmd); |
1535 | ||
b9255176 SD |
1536 | /***************************************************************** |
1537 | * C O N T R O L - Register R E A D / W R I T E functions * | |
1538 | *****************************************************************/ | |
e0d3bafd SD |
1539 | int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode) |
1540 | { | |
84b5dbf3 MCC |
1541 | u8 value[4] = { 0x0, 0x0, 0x0, 0x0 }; |
1542 | u32 tmp = 0; | |
1543 | int status = 0; | |
e0d3bafd | 1544 | |
84b5dbf3 MCC |
1545 | status = |
1546 | cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, address, value, 4); | |
1547 | if (status < 0) | |
1548 | return status; | |
e0d3bafd | 1549 | |
3f9280a8 | 1550 | tmp = le32_to_cpu(*((__le32 *) value)); |
84b5dbf3 | 1551 | tmp |= mode; |
e0d3bafd | 1552 | |
84b5dbf3 MCC |
1553 | value[0] = (u8) tmp; |
1554 | value[1] = (u8) (tmp >> 8); | |
1555 | value[2] = (u8) (tmp >> 16); | |
1556 | value[3] = (u8) (tmp >> 24); | |
e0d3bafd | 1557 | |
84b5dbf3 MCC |
1558 | status = |
1559 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, address, value, 4); | |
e0d3bafd | 1560 | |
84b5dbf3 | 1561 | return status; |
e0d3bafd SD |
1562 | } |
1563 | ||
b9255176 SD |
1564 | /***************************************************************** |
1565 | * I 2 C Internal C O N T R O L functions * | |
1566 | *****************************************************************/ | |
64fbf444 PB |
1567 | int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, |
1568 | u8 saddr_len, u32 *data, u8 data_len, int master) | |
1569 | { | |
1570 | int status = 0; | |
1571 | struct cx231xx_i2c_xfer_data req_data; | |
1572 | u8 value[64] = "0"; | |
1573 | ||
1574 | if (saddr_len == 0) | |
1575 | saddr = 0; | |
fe041646 | 1576 | else if (saddr_len == 1) |
64fbf444 PB |
1577 | saddr &= 0xff; |
1578 | ||
1579 | /* prepare xfer_data struct */ | |
1580 | req_data.dev_addr = dev_addr >> 1; | |
1581 | req_data.direction = I2C_M_RD; | |
1582 | req_data.saddr_len = saddr_len; | |
1583 | req_data.saddr_dat = saddr; | |
1584 | req_data.buf_size = data_len; | |
1585 | req_data.p_buffer = (u8 *) value; | |
1586 | ||
1587 | /* usb send command */ | |
1588 | if (master == 0) | |
1589 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], | |
1590 | &req_data); | |
1591 | else if (master == 1) | |
1592 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1], | |
1593 | &req_data); | |
1594 | else if (master == 2) | |
1595 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2], | |
1596 | &req_data); | |
1597 | ||
1598 | if (status >= 0) { | |
1599 | /* Copy the data read back to main buffer */ | |
1600 | if (data_len == 1) | |
1601 | *data = value[0]; | |
1602 | else if (data_len == 4) | |
1603 | *data = | |
1604 | value[0] | value[1] << 8 | value[2] << 16 | value[3] | |
1605 | << 24; | |
1606 | else if (data_len > 4) | |
1607 | *data = value[saddr]; | |
1608 | } | |
1609 | ||
1610 | return status; | |
1611 | } | |
1612 | ||
1613 | int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, | |
1614 | u8 saddr_len, u32 data, u8 data_len, int master) | |
1615 | { | |
1616 | int status = 0; | |
1617 | u8 value[4] = { 0, 0, 0, 0 }; | |
1618 | struct cx231xx_i2c_xfer_data req_data; | |
1619 | ||
1620 | value[0] = (u8) data; | |
1621 | value[1] = (u8) (data >> 8); | |
1622 | value[2] = (u8) (data >> 16); | |
1623 | value[3] = (u8) (data >> 24); | |
1624 | ||
1625 | if (saddr_len == 0) | |
1626 | saddr = 0; | |
fe041646 | 1627 | else if (saddr_len == 1) |
64fbf444 PB |
1628 | saddr &= 0xff; |
1629 | ||
1630 | /* prepare xfer_data struct */ | |
1631 | req_data.dev_addr = dev_addr >> 1; | |
1632 | req_data.direction = 0; | |
1633 | req_data.saddr_len = saddr_len; | |
1634 | req_data.saddr_dat = saddr; | |
1635 | req_data.buf_size = data_len; | |
1636 | req_data.p_buffer = value; | |
1637 | ||
1638 | /* usb send command */ | |
1639 | if (master == 0) | |
1640 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], | |
1641 | &req_data); | |
1642 | else if (master == 1) | |
1643 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1], | |
1644 | &req_data); | |
1645 | else if (master == 2) | |
1646 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2], | |
1647 | &req_data); | |
1648 | ||
1649 | return status; | |
1650 | } | |
1651 | ||
e0d3bafd | 1652 | int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr, |
b9255176 | 1653 | u8 saddr_len, u32 *data, u8 data_len) |
e0d3bafd | 1654 | { |
84b5dbf3 MCC |
1655 | int status = 0; |
1656 | struct cx231xx_i2c_xfer_data req_data; | |
1657 | u8 value[4] = { 0, 0, 0, 0 }; | |
1658 | ||
1659 | if (saddr_len == 0) | |
1660 | saddr = 0; | |
fe041646 | 1661 | else if (saddr_len == 1) |
84b5dbf3 MCC |
1662 | saddr &= 0xff; |
1663 | ||
1664 | /* prepare xfer_data struct */ | |
1665 | req_data.dev_addr = dev_addr >> 1; | |
1666 | req_data.direction = I2C_M_RD; | |
1667 | req_data.saddr_len = saddr_len; | |
1668 | req_data.saddr_dat = saddr; | |
1669 | req_data.buf_size = data_len; | |
1670 | req_data.p_buffer = (u8 *) value; | |
1671 | ||
1672 | /* usb send command */ | |
1673 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data); | |
1674 | ||
1675 | if (status >= 0) { | |
1676 | /* Copy the data read back to main buffer */ | |
1677 | if (data_len == 1) | |
1678 | *data = value[0]; | |
1679 | else | |
1680 | *data = | |
1681 | value[0] | value[1] << 8 | value[2] << 16 | value[3] | |
1682 | << 24; | |
1683 | } | |
1684 | ||
1685 | return status; | |
e0d3bafd SD |
1686 | } |
1687 | ||
1688 | int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr, | |
84b5dbf3 | 1689 | u8 saddr_len, u32 data, u8 data_len) |
e0d3bafd | 1690 | { |
84b5dbf3 MCC |
1691 | int status = 0; |
1692 | u8 value[4] = { 0, 0, 0, 0 }; | |
1693 | struct cx231xx_i2c_xfer_data req_data; | |
1694 | ||
1695 | value[0] = (u8) data; | |
1696 | value[1] = (u8) (data >> 8); | |
1697 | value[2] = (u8) (data >> 16); | |
1698 | value[3] = (u8) (data >> 24); | |
1699 | ||
1700 | if (saddr_len == 0) | |
1701 | saddr = 0; | |
fe041646 | 1702 | else if (saddr_len == 1) |
84b5dbf3 MCC |
1703 | saddr &= 0xff; |
1704 | ||
1705 | /* prepare xfer_data struct */ | |
1706 | req_data.dev_addr = dev_addr >> 1; | |
1707 | req_data.direction = 0; | |
1708 | req_data.saddr_len = saddr_len; | |
1709 | req_data.saddr_dat = saddr; | |
1710 | req_data.buf_size = data_len; | |
1711 | req_data.p_buffer = value; | |
1712 | ||
1713 | /* usb send command */ | |
1714 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data); | |
1715 | ||
1716 | return status; | |
e0d3bafd SD |
1717 | } |
1718 | ||
84b5dbf3 MCC |
1719 | int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size, |
1720 | u16 register_address, u8 bit_start, u8 bit_end, | |
1721 | u32 value) | |
e0d3bafd | 1722 | { |
84b5dbf3 MCC |
1723 | int status = 0; |
1724 | u32 tmp; | |
1725 | u32 mask = 0; | |
1726 | int i; | |
1727 | ||
b9255176 | 1728 | if (bit_start > (size - 1) || bit_end > (size - 1)) |
84b5dbf3 | 1729 | return -1; |
e0d3bafd | 1730 | |
84b5dbf3 MCC |
1731 | if (size == 8) { |
1732 | status = | |
1733 | cx231xx_read_i2c_data(dev, dev_addr, register_address, 2, | |
1734 | &tmp, 1); | |
1735 | } else { | |
1736 | status = | |
1737 | cx231xx_read_i2c_data(dev, dev_addr, register_address, 2, | |
1738 | &tmp, 4); | |
1739 | } | |
e0d3bafd | 1740 | |
b9255176 | 1741 | if (status < 0) |
84b5dbf3 | 1742 | return status; |
84b5dbf3 MCC |
1743 | |
1744 | mask = 1 << bit_end; | |
b9255176 | 1745 | for (i = bit_end; i > bit_start && i > 0; i--) |
84b5dbf3 | 1746 | mask = mask + (1 << (i - 1)); |
84b5dbf3 MCC |
1747 | |
1748 | value <<= bit_start; | |
1749 | ||
1750 | if (size == 8) { | |
1751 | tmp &= ~mask; | |
1752 | tmp |= value; | |
1753 | tmp &= 0xff; | |
1754 | status = | |
1755 | cx231xx_write_i2c_data(dev, dev_addr, register_address, 2, | |
1756 | tmp, 1); | |
1757 | } else { | |
1758 | tmp &= ~mask; | |
1759 | tmp |= value; | |
1760 | status = | |
1761 | cx231xx_write_i2c_data(dev, dev_addr, register_address, 2, | |
1762 | tmp, 4); | |
1763 | } | |
1764 | ||
1765 | return status; | |
1766 | } | |
e0d3bafd SD |
1767 | |
1768 | int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr, | |
84b5dbf3 | 1769 | u16 saddr, u32 mask, u32 value) |
e0d3bafd | 1770 | { |
84b5dbf3 MCC |
1771 | u32 temp; |
1772 | int status = 0; | |
e0d3bafd | 1773 | |
84b5dbf3 | 1774 | status = cx231xx_read_i2c_data(dev, dev_addr, saddr, 2, &temp, 4); |
e0d3bafd | 1775 | |
84b5dbf3 MCC |
1776 | if (status < 0) |
1777 | return status; | |
e0d3bafd | 1778 | |
84b5dbf3 MCC |
1779 | temp &= ~mask; |
1780 | temp |= value; | |
e0d3bafd | 1781 | |
84b5dbf3 | 1782 | status = cx231xx_write_i2c_data(dev, dev_addr, saddr, 2, temp, 4); |
e0d3bafd | 1783 | |
84b5dbf3 | 1784 | return status; |
e0d3bafd SD |
1785 | } |
1786 | ||
1787 | u32 cx231xx_set_field(u32 field_mask, u32 data) | |
1788 | { | |
84b5dbf3 | 1789 | u32 temp; |
e0d3bafd | 1790 | |
b9255176 | 1791 | for (temp = field_mask; (temp & 1) == 0; temp >>= 1) |
84b5dbf3 | 1792 | data <<= 1; |
e0d3bafd | 1793 | |
84b5dbf3 | 1794 | return data; |
e0d3bafd | 1795 | } |