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Commit | Line | Data |
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e0d3bafd | 1 | /* |
b9255176 SD |
2 | cx231xx-core.c - driver for Conexant Cx23100/101/102 |
3 | USB video capture devices | |
e0d3bafd SD |
4 | |
5 | Copyright (C) 2008 <srinivasa.deevi at conexant dot com> | |
b9255176 | 6 | Based on em28xx driver |
e0d3bafd SD |
7 | |
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
589dadf2 | 23 | #include "cx231xx.h" |
e0d3bafd SD |
24 | #include <linux/init.h> |
25 | #include <linux/list.h> | |
26 | #include <linux/module.h> | |
5a0e3ad6 | 27 | #include <linux/slab.h> |
e0d3bafd SD |
28 | #include <linux/usb.h> |
29 | #include <linux/vmalloc.h> | |
30 | #include <media/v4l2-common.h> | |
64fbf444 | 31 | #include <media/tuner.h> |
e0d3bafd | 32 | |
e0d3bafd SD |
33 | #include "cx231xx-reg.h" |
34 | ||
35 | /* #define ENABLE_DEBUG_ISOC_FRAMES */ | |
36 | ||
37 | static unsigned int core_debug; | |
84b5dbf3 MCC |
38 | module_param(core_debug, int, 0644); |
39 | MODULE_PARM_DESC(core_debug, "enable debug messages [core]"); | |
e0d3bafd SD |
40 | |
41 | #define cx231xx_coredbg(fmt, arg...) do {\ | |
42 | if (core_debug) \ | |
43 | printk(KERN_INFO "%s %s :"fmt, \ | |
44 | dev->name, __func__ , ##arg); } while (0) | |
45 | ||
46 | static unsigned int reg_debug; | |
84b5dbf3 MCC |
47 | module_param(reg_debug, int, 0644); |
48 | MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]"); | |
e0d3bafd | 49 | |
e0d3bafd SD |
50 | static int alt = CX231XX_PINOUT; |
51 | module_param(alt, int, 0644); | |
52 | MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint"); | |
53 | ||
e0d3bafd SD |
54 | #define cx231xx_isocdbg(fmt, arg...) do {\ |
55 | if (core_debug) \ | |
56 | printk(KERN_INFO "%s %s :"fmt, \ | |
57 | dev->name, __func__ , ##arg); } while (0) | |
58 | ||
b9255176 SD |
59 | /***************************************************************** |
60 | * Device control list functions * | |
61 | ******************************************************************/ | |
e0d3bafd | 62 | |
64fbf444 | 63 | LIST_HEAD(cx231xx_devlist); |
e0d3bafd SD |
64 | static DEFINE_MUTEX(cx231xx_devlist_mutex); |
65 | ||
e0d3bafd SD |
66 | /* |
67 | * cx231xx_realease_resources() | |
68 | * unregisters the v4l2,i2c and usb devices | |
69 | * called when the device gets disconected or at module unload | |
70 | */ | |
71 | void cx231xx_remove_from_devlist(struct cx231xx *dev) | |
72 | { | |
64fbf444 PB |
73 | if (dev == NULL) |
74 | return; | |
75 | if (dev->udev == NULL) | |
76 | return; | |
77 | ||
78 | if (atomic_read(&dev->devlist_count) > 0) { | |
79 | mutex_lock(&cx231xx_devlist_mutex); | |
80 | list_del(&dev->devlist); | |
81 | atomic_dec(&dev->devlist_count); | |
82 | mutex_unlock(&cx231xx_devlist_mutex); | |
83 | } | |
e0d3bafd SD |
84 | }; |
85 | ||
86 | void cx231xx_add_into_devlist(struct cx231xx *dev) | |
87 | { | |
88 | mutex_lock(&cx231xx_devlist_mutex); | |
89 | list_add_tail(&dev->devlist, &cx231xx_devlist); | |
64fbf444 | 90 | atomic_inc(&dev->devlist_count); |
e0d3bafd SD |
91 | mutex_unlock(&cx231xx_devlist_mutex); |
92 | }; | |
93 | ||
e0d3bafd | 94 | static LIST_HEAD(cx231xx_extension_devlist); |
e0d3bafd SD |
95 | |
96 | int cx231xx_register_extension(struct cx231xx_ops *ops) | |
97 | { | |
98 | struct cx231xx *dev = NULL; | |
99 | ||
100 | mutex_lock(&cx231xx_devlist_mutex); | |
e0d3bafd | 101 | list_add_tail(&ops->next, &cx231xx_extension_devlist); |
a9fac6b1 DC |
102 | list_for_each_entry(dev, &cx231xx_devlist, devlist) |
103 | ops->init(dev); | |
104 | ||
4be1ad36 | 105 | printk(KERN_INFO DRIVER_NAME ": %s initialized\n", ops->name); |
e0d3bafd SD |
106 | mutex_unlock(&cx231xx_devlist_mutex); |
107 | return 0; | |
108 | } | |
109 | EXPORT_SYMBOL(cx231xx_register_extension); | |
110 | ||
111 | void cx231xx_unregister_extension(struct cx231xx_ops *ops) | |
112 | { | |
113 | struct cx231xx *dev = NULL; | |
114 | ||
115 | mutex_lock(&cx231xx_devlist_mutex); | |
a9fac6b1 DC |
116 | list_for_each_entry(dev, &cx231xx_devlist, devlist) |
117 | ops->fini(dev); | |
e0d3bafd | 118 | |
64fbf444 | 119 | |
4be1ad36 | 120 | printk(KERN_INFO DRIVER_NAME ": %s removed\n", ops->name); |
e0d3bafd | 121 | list_del(&ops->next); |
e0d3bafd SD |
122 | mutex_unlock(&cx231xx_devlist_mutex); |
123 | } | |
84b5dbf3 | 124 | EXPORT_SYMBOL(cx231xx_unregister_extension); |
e0d3bafd SD |
125 | |
126 | void cx231xx_init_extension(struct cx231xx *dev) | |
127 | { | |
128 | struct cx231xx_ops *ops = NULL; | |
129 | ||
761f6cf6 | 130 | mutex_lock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
131 | if (!list_empty(&cx231xx_extension_devlist)) { |
132 | list_for_each_entry(ops, &cx231xx_extension_devlist, next) { | |
133 | if (ops->init) | |
134 | ops->init(dev); | |
135 | } | |
136 | } | |
761f6cf6 | 137 | mutex_unlock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
138 | } |
139 | ||
140 | void cx231xx_close_extension(struct cx231xx *dev) | |
141 | { | |
142 | struct cx231xx_ops *ops = NULL; | |
143 | ||
761f6cf6 | 144 | mutex_lock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
145 | if (!list_empty(&cx231xx_extension_devlist)) { |
146 | list_for_each_entry(ops, &cx231xx_extension_devlist, next) { | |
147 | if (ops->fini) | |
148 | ops->fini(dev); | |
149 | } | |
150 | } | |
761f6cf6 | 151 | mutex_unlock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
152 | } |
153 | ||
b9255176 SD |
154 | /**************************************************************** |
155 | * U S B related functions * | |
156 | *****************************************************************/ | |
e0d3bafd | 157 | int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus, |
84b5dbf3 | 158 | struct cx231xx_i2c_xfer_data *req_data) |
e0d3bafd | 159 | { |
84b5dbf3 MCC |
160 | int status = 0; |
161 | struct cx231xx *dev = i2c_bus->dev; | |
b9255176 | 162 | struct VENDOR_REQUEST_IN ven_req; |
84b5dbf3 MCC |
163 | |
164 | u8 saddr_len = 0; | |
165 | u8 _i2c_period = 0; | |
166 | u8 _i2c_nostop = 0; | |
167 | u8 _i2c_reserve = 0; | |
168 | ||
7528cd27 MCC |
169 | if (dev->state & DEV_DISCONNECTED) |
170 | return -ENODEV; | |
171 | ||
84b5dbf3 MCC |
172 | /* Get the I2C period, nostop and reserve parameters */ |
173 | _i2c_period = i2c_bus->i2c_period; | |
174 | _i2c_nostop = i2c_bus->i2c_nostop; | |
175 | _i2c_reserve = i2c_bus->i2c_reserve; | |
176 | ||
177 | saddr_len = req_data->saddr_len; | |
178 | ||
179 | /* Set wValue */ | |
180 | if (saddr_len == 1) /* need check saddr_len == 0 */ | |
181 | ven_req.wValue = | |
182 | req_data-> | |
183 | dev_addr << 9 | _i2c_period << 4 | saddr_len << 2 | | |
184 | _i2c_nostop << 1 | I2C_SYNC | _i2c_reserve << 6; | |
185 | else | |
186 | ven_req.wValue = | |
187 | req_data-> | |
188 | dev_addr << 9 | _i2c_period << 4 | saddr_len << 2 | | |
189 | _i2c_nostop << 1 | I2C_SYNC | _i2c_reserve << 6; | |
190 | ||
191 | /* set channel number */ | |
b9255176 SD |
192 | if (req_data->direction & I2C_M_RD) { |
193 | /* channel number, for read,spec required channel_num +4 */ | |
194 | ven_req.bRequest = i2c_bus->nr + 4; | |
195 | } else | |
84b5dbf3 MCC |
196 | ven_req.bRequest = i2c_bus->nr; /* channel number, */ |
197 | ||
198 | /* set index value */ | |
199 | switch (saddr_len) { | |
200 | case 0: | |
201 | ven_req.wIndex = 0; /* need check */ | |
202 | break; | |
203 | case 1: | |
204 | ven_req.wIndex = (req_data->saddr_dat & 0xff); | |
205 | break; | |
206 | case 2: | |
207 | ven_req.wIndex = req_data->saddr_dat; | |
208 | break; | |
209 | } | |
210 | ||
211 | /* set wLength value */ | |
212 | ven_req.wLength = req_data->buf_size; | |
213 | ||
214 | /* set bData value */ | |
215 | ven_req.bData = 0; | |
216 | ||
217 | /* set the direction */ | |
218 | if (req_data->direction) { | |
219 | ven_req.direction = USB_DIR_IN; | |
220 | memset(req_data->p_buffer, 0x00, ven_req.wLength); | |
221 | } else | |
222 | ven_req.direction = USB_DIR_OUT; | |
223 | ||
224 | /* set the buffer for read / write */ | |
225 | ven_req.pBuff = req_data->p_buffer; | |
226 | ||
227 | ||
228 | /* call common vendor command request */ | |
229 | status = cx231xx_send_vendor_cmd(dev, &ven_req); | |
230 | if (status < 0) { | |
589dadf2 | 231 | pr_info |
b9255176 | 232 | ("UsbInterface::sendCommand, failed with status -%d\n", |
84b5dbf3 MCC |
233 | status); |
234 | } | |
235 | ||
236 | return status; | |
e0d3bafd | 237 | } |
e0d3bafd | 238 | EXPORT_SYMBOL_GPL(cx231xx_send_usb_command); |
b9255176 | 239 | |
24c80b65 MCC |
240 | /* |
241 | * Sends/Receives URB control messages, assuring to use a kalloced buffer | |
242 | * for all operations (dev->urb_buf), to avoid using stacked buffers, as | |
243 | * they aren't safe for usage with USB, due to DMA restrictions. | |
244 | * Also implements the debug code for control URB's. | |
245 | */ | |
246 | static int __usb_control_msg(struct cx231xx *dev, unsigned int pipe, | |
247 | __u8 request, __u8 requesttype, __u16 value, __u16 index, | |
248 | void *data, __u16 size, int timeout) | |
249 | { | |
250 | int rc, i; | |
251 | ||
252 | if (reg_debug) { | |
253 | printk(KERN_DEBUG "%s: (pipe 0x%08x): " | |
254 | "%s: %02x %02x %02x %02x %02x %02x %02x %02x ", | |
255 | dev->name, | |
256 | pipe, | |
257 | (requesttype & USB_DIR_IN) ? "IN" : "OUT", | |
258 | requesttype, | |
259 | request, | |
260 | value & 0xff, value >> 8, | |
261 | index & 0xff, index >> 8, | |
262 | size & 0xff, size >> 8); | |
263 | if (!(requesttype & USB_DIR_IN)) { | |
264 | printk(KERN_CONT ">>>"); | |
265 | for (i = 0; i < size; i++) | |
266 | printk(KERN_CONT " %02x", | |
267 | ((unsigned char *)data)[i]); | |
268 | } | |
269 | } | |
270 | ||
271 | /* Do the real call to usb_control_msg */ | |
272 | mutex_lock(&dev->ctrl_urb_lock); | |
273 | if (!(requesttype & USB_DIR_IN) && size) | |
274 | memcpy(dev->urb_buf, data, size); | |
275 | rc = usb_control_msg(dev->udev, pipe, request, requesttype, value, | |
276 | index, dev->urb_buf, size, timeout); | |
277 | if ((requesttype & USB_DIR_IN) && size) | |
278 | memcpy(data, dev->urb_buf, size); | |
279 | mutex_unlock(&dev->ctrl_urb_lock); | |
280 | ||
281 | if (reg_debug) { | |
282 | if (unlikely(rc < 0)) { | |
283 | printk(KERN_CONT "FAILED!\n"); | |
284 | return rc; | |
285 | } | |
286 | ||
287 | if ((requesttype & USB_DIR_IN)) { | |
288 | printk(KERN_CONT "<<<"); | |
289 | for (i = 0; i < size; i++) | |
290 | printk(KERN_CONT " %02x", | |
291 | ((unsigned char *)data)[i]); | |
292 | } | |
293 | printk(KERN_CONT "\n"); | |
294 | } | |
295 | ||
296 | return rc; | |
297 | } | |
298 | ||
299 | ||
e0d3bafd SD |
300 | /* |
301 | * cx231xx_read_ctrl_reg() | |
302 | * reads data from the usb device specifying bRequest and wValue | |
303 | */ | |
304 | int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, | |
84b5dbf3 | 305 | char *buf, int len) |
e0d3bafd | 306 | { |
84b5dbf3 | 307 | u8 val = 0; |
e0d3bafd SD |
308 | int ret; |
309 | int pipe = usb_rcvctrlpipe(dev->udev, 0); | |
310 | ||
311 | if (dev->state & DEV_DISCONNECTED) | |
312 | return -ENODEV; | |
313 | ||
314 | if (len > URB_MAX_CTRL_SIZE) | |
315 | return -EINVAL; | |
316 | ||
84b5dbf3 MCC |
317 | switch (len) { |
318 | case 1: | |
319 | val = ENABLE_ONE_BYTE; | |
320 | break; | |
321 | case 2: | |
322 | val = ENABLE_TWE_BYTE; | |
323 | break; | |
324 | case 3: | |
325 | val = ENABLE_THREE_BYTE; | |
326 | break; | |
327 | case 4: | |
328 | val = ENABLE_FOUR_BYTE; | |
329 | break; | |
330 | default: | |
331 | val = 0xFF; /* invalid option */ | |
332 | } | |
333 | ||
334 | if (val == 0xFF) | |
335 | return -EINVAL; | |
e0d3bafd | 336 | |
24c80b65 | 337 | ret = __usb_control_msg(dev, pipe, req, |
e0d3bafd | 338 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
24c80b65 | 339 | val, reg, buf, len, HZ); |
e0d3bafd SD |
340 | return ret; |
341 | } | |
342 | ||
b9255176 SD |
343 | int cx231xx_send_vendor_cmd(struct cx231xx *dev, |
344 | struct VENDOR_REQUEST_IN *ven_req) | |
e0d3bafd | 345 | { |
84b5dbf3 | 346 | int ret; |
e0d3bafd | 347 | int pipe = 0; |
64fbf444 PB |
348 | int unsend_size = 0; |
349 | u8 *pdata; | |
e0d3bafd SD |
350 | |
351 | if (dev->state & DEV_DISCONNECTED) | |
352 | return -ENODEV; | |
353 | ||
354 | if ((ven_req->wLength > URB_MAX_CTRL_SIZE)) | |
355 | return -EINVAL; | |
356 | ||
84b5dbf3 MCC |
357 | if (ven_req->direction) |
358 | pipe = usb_rcvctrlpipe(dev->udev, 0); | |
359 | else | |
360 | pipe = usb_sndctrlpipe(dev->udev, 0); | |
e0d3bafd | 361 | |
24c80b65 MCC |
362 | /* |
363 | * If the cx23102 read more than 4 bytes with i2c bus, | |
364 | * need chop to 4 byte per request | |
365 | */ | |
64fbf444 PB |
366 | if ((ven_req->wLength > 4) && ((ven_req->bRequest == 0x4) || |
367 | (ven_req->bRequest == 0x5) || | |
368 | (ven_req->bRequest == 0x6))) { | |
369 | unsend_size = 0; | |
370 | pdata = ven_req->pBuff; | |
371 | ||
372 | ||
373 | unsend_size = ven_req->wLength; | |
374 | ||
24c80b65 | 375 | /* the first package */ |
64fbf444 PB |
376 | ven_req->wValue = ven_req->wValue & 0xFFFB; |
377 | ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x2; | |
24c80b65 MCC |
378 | ret = __usb_control_msg(dev, pipe, ven_req->bRequest, |
379 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
64fbf444 PB |
380 | ven_req->wValue, ven_req->wIndex, pdata, |
381 | 0x0004, HZ); | |
382 | unsend_size = unsend_size - 4; | |
64fbf444 | 383 | |
24c80b65 | 384 | /* the middle package */ |
64fbf444 PB |
385 | ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x42; |
386 | while (unsend_size - 4 > 0) { | |
387 | pdata = pdata + 4; | |
24c80b65 | 388 | ret = __usb_control_msg(dev, pipe, |
64fbf444 | 389 | ven_req->bRequest, |
24c80b65 | 390 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
64fbf444 PB |
391 | ven_req->wValue, ven_req->wIndex, pdata, |
392 | 0x0004, HZ); | |
64fbf444 PB |
393 | unsend_size = unsend_size - 4; |
394 | } | |
395 | ||
24c80b65 | 396 | /* the last package */ |
64fbf444 PB |
397 | ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x40; |
398 | pdata = pdata + 4; | |
24c80b65 MCC |
399 | ret = __usb_control_msg(dev, pipe, ven_req->bRequest, |
400 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
64fbf444 PB |
401 | ven_req->wValue, ven_req->wIndex, pdata, |
402 | unsend_size, HZ); | |
64fbf444 | 403 | } else { |
24c80b65 MCC |
404 | ret = __usb_control_msg(dev, pipe, ven_req->bRequest, |
405 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
64fbf444 | 406 | ven_req->wValue, ven_req->wIndex, |
24c80b65 | 407 | ven_req->pBuff, ven_req->wLength, HZ); |
64fbf444 | 408 | } |
e0d3bafd SD |
409 | |
410 | return ret; | |
411 | } | |
412 | ||
413 | /* | |
414 | * cx231xx_write_ctrl_reg() | |
415 | * sends data to the usb device, specifying bRequest | |
416 | */ | |
417 | int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, char *buf, | |
84b5dbf3 | 418 | int len) |
e0d3bafd | 419 | { |
84b5dbf3 | 420 | u8 val = 0; |
e0d3bafd SD |
421 | int ret; |
422 | int pipe = usb_sndctrlpipe(dev->udev, 0); | |
423 | ||
424 | if (dev->state & DEV_DISCONNECTED) | |
425 | return -ENODEV; | |
426 | ||
427 | if ((len < 1) || (len > URB_MAX_CTRL_SIZE)) | |
428 | return -EINVAL; | |
429 | ||
84b5dbf3 MCC |
430 | switch (len) { |
431 | case 1: | |
432 | val = ENABLE_ONE_BYTE; | |
433 | break; | |
434 | case 2: | |
435 | val = ENABLE_TWE_BYTE; | |
436 | break; | |
437 | case 3: | |
438 | val = ENABLE_THREE_BYTE; | |
439 | break; | |
440 | case 4: | |
441 | val = ENABLE_FOUR_BYTE; | |
442 | break; | |
443 | default: | |
444 | val = 0xFF; /* invalid option */ | |
445 | } | |
446 | ||
447 | if (val == 0xFF) | |
448 | return -EINVAL; | |
e0d3bafd SD |
449 | |
450 | if (reg_debug) { | |
451 | int byte; | |
452 | ||
453 | cx231xx_isocdbg("(pipe 0x%08x): " | |
b9255176 SD |
454 | "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>", |
455 | pipe, | |
456 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
457 | req, 0, val, reg & 0xff, | |
458 | reg >> 8, len & 0xff, len >> 8); | |
e0d3bafd SD |
459 | |
460 | for (byte = 0; byte < len; byte++) | |
461 | cx231xx_isocdbg(" %02x", (unsigned char)buf[byte]); | |
462 | cx231xx_isocdbg("\n"); | |
463 | } | |
464 | ||
24c80b65 | 465 | ret = __usb_control_msg(dev, pipe, req, |
e0d3bafd | 466 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
24c80b65 | 467 | val, reg, buf, len, HZ); |
e0d3bafd SD |
468 | |
469 | return ret; | |
470 | } | |
471 | ||
b9255176 SD |
472 | /**************************************************************** |
473 | * USB Alternate Setting functions * | |
474 | *****************************************************************/ | |
e0d3bafd SD |
475 | |
476 | int cx231xx_set_video_alternate(struct cx231xx *dev) | |
477 | { | |
478 | int errCode, prev_alt = dev->video_mode.alt; | |
479 | unsigned int min_pkt_size = dev->width * 2 + 4; | |
84b5dbf3 | 480 | u32 usb_interface_index = 0; |
e0d3bafd SD |
481 | |
482 | /* When image size is bigger than a certain value, | |
483 | the frame size should be increased, otherwise, only | |
484 | green screen will be received. | |
485 | */ | |
486 | if (dev->width * 2 * dev->height > 720 * 240 * 2) | |
487 | min_pkt_size *= 2; | |
488 | ||
84b5dbf3 MCC |
489 | if (dev->width > 360) { |
490 | /* resolutions: 720,704,640 */ | |
491 | dev->video_mode.alt = 3; | |
492 | } else if (dev->width > 180) { | |
493 | /* resolutions: 360,352,320,240 */ | |
494 | dev->video_mode.alt = 2; | |
495 | } else if (dev->width > 0) { | |
496 | /* resolutions: 180,176,160,128,88 */ | |
497 | dev->video_mode.alt = 1; | |
498 | } else { | |
499 | /* Change to alt0 BULK to release USB bandwidth */ | |
500 | dev->video_mode.alt = 0; | |
501 | } | |
502 | ||
64fbf444 PB |
503 | if (dev->USE_ISO == 0) |
504 | dev->video_mode.alt = 0; | |
505 | ||
d5a1754d | 506 | cx231xx_coredbg("dev->video_mode.alt= %d\n", dev->video_mode.alt); |
64fbf444 | 507 | |
84b5dbf3 MCC |
508 | /* Get the correct video interface Index */ |
509 | usb_interface_index = | |
510 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
511 | video_index + 1; | |
e0d3bafd SD |
512 | |
513 | if (dev->video_mode.alt != prev_alt) { | |
514 | cx231xx_coredbg("minimum isoc packet size: %u (alt=%d)\n", | |
515 | min_pkt_size, dev->video_mode.alt); | |
64fbf444 PB |
516 | |
517 | if (dev->video_mode.alt_max_pkt_size != NULL) | |
518 | dev->video_mode.max_pkt_size = | |
519 | dev->video_mode.alt_max_pkt_size[dev->video_mode.alt]; | |
e0d3bafd | 520 | cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n", |
84b5dbf3 MCC |
521 | dev->video_mode.alt, |
522 | dev->video_mode.max_pkt_size); | |
84b5dbf3 MCC |
523 | errCode = |
524 | usb_set_interface(dev->udev, usb_interface_index, | |
525 | dev->video_mode.alt); | |
e0d3bafd | 526 | if (errCode < 0) { |
589dadf2 | 527 | pr_err |
b9255176 | 528 | ("cannot change alt number to %d (error=%i)\n", |
84b5dbf3 | 529 | dev->video_mode.alt, errCode); |
e0d3bafd SD |
530 | return errCode; |
531 | } | |
532 | } | |
533 | return 0; | |
534 | } | |
535 | ||
536 | int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt) | |
537 | { | |
84b5dbf3 MCC |
538 | int status = 0; |
539 | u32 usb_interface_index = 0; | |
540 | u32 max_pkt_size = 0; | |
541 | ||
542 | switch (index) { | |
543 | case INDEX_TS1: | |
544 | usb_interface_index = | |
545 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
546 | ts1_index + 1; | |
64fbf444 | 547 | dev->ts1_mode.alt = alt; |
84b5dbf3 MCC |
548 | if (dev->ts1_mode.alt_max_pkt_size != NULL) |
549 | max_pkt_size = dev->ts1_mode.max_pkt_size = | |
550 | dev->ts1_mode.alt_max_pkt_size[dev->ts1_mode.alt]; | |
551 | break; | |
552 | case INDEX_TS2: | |
553 | usb_interface_index = | |
554 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
555 | ts2_index + 1; | |
556 | break; | |
557 | case INDEX_AUDIO: | |
558 | usb_interface_index = | |
559 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
560 | audio_index + 1; | |
561 | dev->adev.alt = alt; | |
562 | if (dev->adev.alt_max_pkt_size != NULL) | |
563 | max_pkt_size = dev->adev.max_pkt_size = | |
564 | dev->adev.alt_max_pkt_size[dev->adev.alt]; | |
565 | break; | |
566 | case INDEX_VIDEO: | |
567 | usb_interface_index = | |
568 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
569 | video_index + 1; | |
570 | dev->video_mode.alt = alt; | |
571 | if (dev->video_mode.alt_max_pkt_size != NULL) | |
572 | max_pkt_size = dev->video_mode.max_pkt_size = | |
573 | dev->video_mode.alt_max_pkt_size[dev->video_mode. | |
574 | alt]; | |
575 | break; | |
576 | case INDEX_VANC: | |
2f861387 MCC |
577 | if (dev->board.no_alt_vanc) |
578 | return 0; | |
84b5dbf3 MCC |
579 | usb_interface_index = |
580 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
581 | vanc_index + 1; | |
582 | dev->vbi_mode.alt = alt; | |
583 | if (dev->vbi_mode.alt_max_pkt_size != NULL) | |
584 | max_pkt_size = dev->vbi_mode.max_pkt_size = | |
585 | dev->vbi_mode.alt_max_pkt_size[dev->vbi_mode.alt]; | |
586 | break; | |
587 | case INDEX_HANC: | |
588 | usb_interface_index = | |
589 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
590 | hanc_index + 1; | |
591 | dev->sliced_cc_mode.alt = alt; | |
592 | if (dev->sliced_cc_mode.alt_max_pkt_size != NULL) | |
593 | max_pkt_size = dev->sliced_cc_mode.max_pkt_size = | |
594 | dev->sliced_cc_mode.alt_max_pkt_size[dev-> | |
595 | sliced_cc_mode. | |
596 | alt]; | |
597 | break; | |
598 | default: | |
599 | break; | |
600 | } | |
601 | ||
602 | if (alt > 0 && max_pkt_size == 0) { | |
589dadf2 | 603 | pr_err |
b9255176 SD |
604 | ("can't change interface %d alt no. to %d: Max. Pkt size = 0\n", |
605 | usb_interface_index, alt); | |
64fbf444 PB |
606 | /*To workaround error number=-71 on EP0 for videograbber, |
607 | need add following codes.*/ | |
2f861387 | 608 | if (dev->board.no_alt_vanc) |
64fbf444 | 609 | return -1; |
84b5dbf3 MCC |
610 | } |
611 | ||
d5a1754d DH |
612 | cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u," |
613 | "Interface = %d\n", alt, max_pkt_size, | |
614 | usb_interface_index); | |
84b5dbf3 MCC |
615 | |
616 | if (usb_interface_index > 0) { | |
617 | status = usb_set_interface(dev->udev, usb_interface_index, alt); | |
e0d3bafd | 618 | if (status < 0) { |
589dadf2 | 619 | pr_err |
b9255176 SD |
620 | ("can't change interface %d alt no. to %d (err=%i)\n", |
621 | usb_interface_index, alt, status); | |
e0d3bafd SD |
622 | return status; |
623 | } | |
84b5dbf3 | 624 | } |
e0d3bafd | 625 | |
84b5dbf3 | 626 | return status; |
e0d3bafd SD |
627 | } |
628 | EXPORT_SYMBOL_GPL(cx231xx_set_alt_setting); | |
629 | ||
630 | int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio) | |
631 | { | |
632 | int rc = 0; | |
633 | ||
634 | if (!gpio) | |
635 | return rc; | |
636 | ||
637 | /* Send GPIO reset sequences specified at board entry */ | |
638 | while (gpio->sleep >= 0) { | |
84b5dbf3 MCC |
639 | rc = cx231xx_set_gpio_value(dev, gpio->bit, gpio->val); |
640 | if (rc < 0) | |
641 | return rc; | |
e0d3bafd SD |
642 | |
643 | if (gpio->sleep > 0) | |
644 | msleep(gpio->sleep); | |
645 | ||
646 | gpio++; | |
647 | } | |
648 | return rc; | |
649 | } | |
650 | ||
64fbf444 PB |
651 | int cx231xx_demod_reset(struct cx231xx *dev) |
652 | { | |
653 | ||
654 | u8 status = 0; | |
655 | u8 value[4] = { 0, 0, 0, 0 }; | |
656 | ||
657 | status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, | |
658 | value, 4); | |
64fbf444 | 659 | |
d5a1754d DH |
660 | cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, |
661 | value[0], value[1], value[2], value[3]); | |
662 | ||
663 | cx231xx_coredbg("Enter cx231xx_demod_reset()\n"); | |
664 | ||
64fbf444 PB |
665 | value[1] = (u8) 0x3; |
666 | status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
667 | PWR_CTL_EN, value, 4); | |
668 | msleep(10); | |
669 | ||
670 | value[1] = (u8) 0x0; | |
671 | status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
672 | PWR_CTL_EN, value, 4); | |
673 | msleep(10); | |
674 | ||
675 | value[1] = (u8) 0x3; | |
676 | status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
677 | PWR_CTL_EN, value, 4); | |
678 | msleep(10); | |
679 | ||
680 | ||
681 | ||
682 | status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, | |
683 | value, 4); | |
d5a1754d DH |
684 | |
685 | cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, | |
686 | value[0], value[1], value[2], value[3]); | |
64fbf444 PB |
687 | |
688 | return status; | |
689 | } | |
690 | EXPORT_SYMBOL_GPL(cx231xx_demod_reset); | |
691 | int is_fw_load(struct cx231xx *dev) | |
692 | { | |
693 | return cx231xx_check_fw(dev); | |
694 | } | |
695 | EXPORT_SYMBOL_GPL(is_fw_load); | |
696 | ||
e0d3bafd SD |
697 | int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode) |
698 | { | |
64fbf444 PB |
699 | int errCode = 0; |
700 | ||
e0d3bafd SD |
701 | if (dev->mode == set_mode) |
702 | return 0; | |
703 | ||
704 | if (set_mode == CX231XX_SUSPEND) { | |
84b5dbf3 | 705 | /* Set the chip in power saving mode */ |
e0d3bafd SD |
706 | dev->mode = set_mode; |
707 | } | |
708 | ||
709 | /* Resource is locked */ | |
710 | if (dev->mode != CX231XX_SUSPEND) | |
711 | return -EINVAL; | |
712 | ||
713 | dev->mode = set_mode; | |
714 | ||
64fbf444 PB |
715 | if (dev->mode == CX231XX_DIGITAL_MODE)/* Set Digital power mode */ { |
716 | /* set AGC mode to Digital */ | |
717 | switch (dev->model) { | |
718 | case CX231XX_BOARD_CNXT_CARRAERA: | |
719 | case CX231XX_BOARD_CNXT_RDE_250: | |
720 | case CX231XX_BOARD_CNXT_SHELBY: | |
721 | case CX231XX_BOARD_CNXT_RDU_250: | |
722 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); | |
723 | break; | |
724 | case CX231XX_BOARD_CNXT_RDE_253S: | |
725 | case CX231XX_BOARD_CNXT_RDU_253S: | |
b88ba619 DH |
726 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); |
727 | break; | |
1a50fdde | 728 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
dd2e7dd2 | 729 | case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx: |
b88ba619 DH |
730 | errCode = cx231xx_set_power_mode(dev, |
731 | POLARIS_AVMODE_DIGITAL); | |
64fbf444 PB |
732 | break; |
733 | default: | |
734 | break; | |
735 | } | |
736 | } else/* Set Analog Power mode */ { | |
737 | /* set AGC mode to Analog */ | |
738 | switch (dev->model) { | |
739 | case CX231XX_BOARD_CNXT_CARRAERA: | |
740 | case CX231XX_BOARD_CNXT_RDE_250: | |
741 | case CX231XX_BOARD_CNXT_SHELBY: | |
742 | case CX231XX_BOARD_CNXT_RDU_250: | |
743 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); | |
744 | break; | |
745 | case CX231XX_BOARD_CNXT_RDE_253S: | |
746 | case CX231XX_BOARD_CNXT_RDU_253S: | |
1a50fdde | 747 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
dd2e7dd2 | 748 | case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx: |
9417bc6d | 749 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
de8ae0d5 PM |
750 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL: |
751 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC: | |
64fbf444 PB |
752 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); |
753 | break; | |
754 | default: | |
755 | break; | |
756 | } | |
757 | } | |
b9255176 | 758 | |
da983503 | 759 | return errCode ? -EINVAL : 0; |
e0d3bafd SD |
760 | } |
761 | EXPORT_SYMBOL_GPL(cx231xx_set_mode); | |
762 | ||
64fbf444 PB |
763 | int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size) |
764 | { | |
765 | int errCode = 0; | |
766 | int actlen, ret = -ENOMEM; | |
767 | u32 *buffer; | |
768 | ||
da983503 | 769 | buffer = kzalloc(4096, GFP_KERNEL); |
64fbf444 | 770 | if (buffer == NULL) { |
589dadf2 | 771 | pr_info("out of mem\n"); |
64fbf444 PB |
772 | return -ENOMEM; |
773 | } | |
774 | memcpy(&buffer[0], firmware, 4096); | |
775 | ||
776 | ret = usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, 5), | |
da983503 | 777 | buffer, 4096, &actlen, 2000); |
64fbf444 PB |
778 | |
779 | if (ret) | |
589dadf2 | 780 | pr_info("bulk message failed: %d (%d/%d)", ret, |
da983503 | 781 | size, actlen); |
64fbf444 PB |
782 | else { |
783 | errCode = actlen != size ? -1 : 0; | |
784 | } | |
da983503 HV |
785 | kfree(buffer); |
786 | return errCode; | |
64fbf444 PB |
787 | } |
788 | ||
b9255176 SD |
789 | /***************************************************************** |
790 | * URB Streaming functions * | |
791 | ******************************************************************/ | |
e0d3bafd SD |
792 | |
793 | /* | |
794 | * IRQ callback, called by URB callback | |
795 | */ | |
64fbf444 | 796 | static void cx231xx_isoc_irq_callback(struct urb *urb) |
e0d3bafd | 797 | { |
84b5dbf3 MCC |
798 | struct cx231xx_dmaqueue *dma_q = urb->context; |
799 | struct cx231xx_video_mode *vmode = | |
800 | container_of(dma_q, struct cx231xx_video_mode, vidq); | |
801 | struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode); | |
da983503 | 802 | int i; |
e0d3bafd | 803 | |
84b5dbf3 MCC |
804 | switch (urb->status) { |
805 | case 0: /* success */ | |
806 | case -ETIMEDOUT: /* NAK */ | |
807 | break; | |
808 | case -ECONNRESET: /* kill */ | |
809 | case -ENOENT: | |
810 | case -ESHUTDOWN: | |
811 | return; | |
812 | default: /* error */ | |
813 | cx231xx_isocdbg("urb completition error %d.\n", urb->status); | |
814 | break; | |
e0d3bafd SD |
815 | } |
816 | ||
817 | /* Copy data from URB */ | |
818 | spin_lock(&dev->video_mode.slock); | |
da983503 | 819 | dev->video_mode.isoc_ctl.isoc_copy(dev, urb); |
e0d3bafd SD |
820 | spin_unlock(&dev->video_mode.slock); |
821 | ||
822 | /* Reset urb buffers */ | |
823 | for (i = 0; i < urb->number_of_packets; i++) { | |
824 | urb->iso_frame_desc[i].status = 0; | |
825 | urb->iso_frame_desc[i].actual_length = 0; | |
826 | } | |
e0d3bafd SD |
827 | |
828 | urb->status = usb_submit_urb(urb, GFP_ATOMIC); | |
829 | if (urb->status) { | |
830 | cx231xx_isocdbg("urb resubmit failed (error=%i)\n", | |
84b5dbf3 | 831 | urb->status); |
e0d3bafd SD |
832 | } |
833 | } | |
64fbf444 PB |
834 | /***************************************************************** |
835 | * URB Streaming functions * | |
836 | ******************************************************************/ | |
837 | ||
838 | /* | |
839 | * IRQ callback, called by URB callback | |
840 | */ | |
841 | static void cx231xx_bulk_irq_callback(struct urb *urb) | |
842 | { | |
843 | struct cx231xx_dmaqueue *dma_q = urb->context; | |
844 | struct cx231xx_video_mode *vmode = | |
845 | container_of(dma_q, struct cx231xx_video_mode, vidq); | |
846 | struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode); | |
64fbf444 PB |
847 | |
848 | switch (urb->status) { | |
849 | case 0: /* success */ | |
850 | case -ETIMEDOUT: /* NAK */ | |
851 | break; | |
852 | case -ECONNRESET: /* kill */ | |
853 | case -ENOENT: | |
854 | case -ESHUTDOWN: | |
855 | return; | |
856 | default: /* error */ | |
857 | cx231xx_isocdbg("urb completition error %d.\n", urb->status); | |
858 | break; | |
859 | } | |
860 | ||
861 | /* Copy data from URB */ | |
862 | spin_lock(&dev->video_mode.slock); | |
da983503 | 863 | dev->video_mode.bulk_ctl.bulk_copy(dev, urb); |
64fbf444 | 864 | spin_unlock(&dev->video_mode.slock); |
e0d3bafd | 865 | |
64fbf444 | 866 | /* Reset urb buffers */ |
64fbf444 PB |
867 | urb->status = usb_submit_urb(urb, GFP_ATOMIC); |
868 | if (urb->status) { | |
869 | cx231xx_isocdbg("urb resubmit failed (error=%i)\n", | |
870 | urb->status); | |
871 | } | |
872 | } | |
e0d3bafd SD |
873 | /* |
874 | * Stop and Deallocate URBs | |
875 | */ | |
876 | void cx231xx_uninit_isoc(struct cx231xx *dev) | |
877 | { | |
64fbf444 | 878 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; |
e0d3bafd SD |
879 | struct urb *urb; |
880 | int i; | |
881 | ||
882 | cx231xx_isocdbg("cx231xx: called cx231xx_uninit_isoc\n"); | |
883 | ||
884 | dev->video_mode.isoc_ctl.nfields = -1; | |
885 | for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { | |
886 | urb = dev->video_mode.isoc_ctl.urb[i]; | |
887 | if (urb) { | |
84b5dbf3 MCC |
888 | if (!irqs_disabled()) |
889 | usb_kill_urb(urb); | |
890 | else | |
891 | usb_unlink_urb(urb); | |
e0d3bafd SD |
892 | |
893 | if (dev->video_mode.isoc_ctl.transfer_buffer[i]) { | |
997ea58e DM |
894 | usb_free_coherent(dev->udev, |
895 | urb->transfer_buffer_length, | |
896 | dev->video_mode.isoc_ctl. | |
897 | transfer_buffer[i], | |
898 | urb->transfer_dma); | |
e0d3bafd SD |
899 | } |
900 | usb_free_urb(urb); | |
901 | dev->video_mode.isoc_ctl.urb[i] = NULL; | |
902 | } | |
903 | dev->video_mode.isoc_ctl.transfer_buffer[i] = NULL; | |
904 | } | |
905 | ||
906 | kfree(dev->video_mode.isoc_ctl.urb); | |
907 | kfree(dev->video_mode.isoc_ctl.transfer_buffer); | |
64fbf444 | 908 | kfree(dma_q->p_left_data); |
e0d3bafd SD |
909 | |
910 | dev->video_mode.isoc_ctl.urb = NULL; | |
911 | dev->video_mode.isoc_ctl.transfer_buffer = NULL; | |
912 | dev->video_mode.isoc_ctl.num_bufs = 0; | |
64fbf444 PB |
913 | dma_q->p_left_data = NULL; |
914 | ||
915 | if (dev->mode_tv == 0) | |
916 | cx231xx_capture_start(dev, 0, Raw_Video); | |
917 | else | |
918 | cx231xx_capture_start(dev, 0, TS1_serial_mode); | |
919 | ||
e0d3bafd | 920 | |
e0d3bafd SD |
921 | } |
922 | EXPORT_SYMBOL_GPL(cx231xx_uninit_isoc); | |
923 | ||
64fbf444 PB |
924 | /* |
925 | * Stop and Deallocate URBs | |
926 | */ | |
927 | void cx231xx_uninit_bulk(struct cx231xx *dev) | |
928 | { | |
929 | struct urb *urb; | |
930 | int i; | |
931 | ||
932 | cx231xx_isocdbg("cx231xx: called cx231xx_uninit_bulk\n"); | |
933 | ||
934 | dev->video_mode.bulk_ctl.nfields = -1; | |
935 | for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { | |
936 | urb = dev->video_mode.bulk_ctl.urb[i]; | |
937 | if (urb) { | |
938 | if (!irqs_disabled()) | |
939 | usb_kill_urb(urb); | |
940 | else | |
941 | usb_unlink_urb(urb); | |
942 | ||
943 | if (dev->video_mode.bulk_ctl.transfer_buffer[i]) { | |
944 | usb_free_coherent(dev->udev, | |
945 | urb->transfer_buffer_length, | |
946 | dev->video_mode.isoc_ctl. | |
947 | transfer_buffer[i], | |
948 | urb->transfer_dma); | |
949 | } | |
950 | usb_free_urb(urb); | |
951 | dev->video_mode.bulk_ctl.urb[i] = NULL; | |
952 | } | |
953 | dev->video_mode.bulk_ctl.transfer_buffer[i] = NULL; | |
954 | } | |
955 | ||
956 | kfree(dev->video_mode.bulk_ctl.urb); | |
957 | kfree(dev->video_mode.bulk_ctl.transfer_buffer); | |
958 | ||
959 | dev->video_mode.bulk_ctl.urb = NULL; | |
960 | dev->video_mode.bulk_ctl.transfer_buffer = NULL; | |
961 | dev->video_mode.bulk_ctl.num_bufs = 0; | |
962 | ||
963 | if (dev->mode_tv == 0) | |
964 | cx231xx_capture_start(dev, 0, Raw_Video); | |
965 | else | |
966 | cx231xx_capture_start(dev, 0, TS1_serial_mode); | |
967 | ||
968 | ||
969 | } | |
970 | EXPORT_SYMBOL_GPL(cx231xx_uninit_bulk); | |
971 | ||
e0d3bafd SD |
972 | /* |
973 | * Allocate URBs and start IRQ | |
974 | */ | |
975 | int cx231xx_init_isoc(struct cx231xx *dev, int max_packets, | |
84b5dbf3 | 976 | int num_bufs, int max_pkt_size, |
b9255176 | 977 | int (*isoc_copy) (struct cx231xx *dev, struct urb *urb)) |
e0d3bafd SD |
978 | { |
979 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; | |
980 | int i; | |
981 | int sb_size, pipe; | |
982 | struct urb *urb; | |
983 | int j, k; | |
984 | int rc; | |
985 | ||
e0d3bafd SD |
986 | /* De-allocates all pending stuff */ |
987 | cx231xx_uninit_isoc(dev); | |
988 | ||
64fbf444 PB |
989 | dma_q->p_left_data = kzalloc(4096, GFP_KERNEL); |
990 | if (dma_q->p_left_data == NULL) { | |
589dadf2 | 991 | pr_info("out of mem\n"); |
64fbf444 PB |
992 | return -ENOMEM; |
993 | } | |
994 | ||
995 | ||
996 | ||
e0d3bafd SD |
997 | dev->video_mode.isoc_ctl.isoc_copy = isoc_copy; |
998 | dev->video_mode.isoc_ctl.num_bufs = num_bufs; | |
84b5dbf3 MCC |
999 | dma_q->pos = 0; |
1000 | dma_q->is_partial_line = 0; | |
1001 | dma_q->last_sav = 0; | |
1002 | dma_q->current_field = -1; | |
1003 | dma_q->field1_done = 0; | |
1004 | dma_q->lines_per_field = dev->height / 2; | |
1005 | dma_q->bytes_left_in_line = dev->width << 1; | |
1006 | dma_q->lines_completed = 0; | |
64fbf444 PB |
1007 | dma_q->mpeg_buffer_done = 0; |
1008 | dma_q->left_data_count = 0; | |
1009 | dma_q->mpeg_buffer_completed = 0; | |
1010 | dma_q->add_ps_package_head = CX231XX_NEED_ADD_PS_PACKAGE_HEAD; | |
1011 | dma_q->ps_head[0] = 0x00; | |
1012 | dma_q->ps_head[1] = 0x00; | |
1013 | dma_q->ps_head[2] = 0x01; | |
1014 | dma_q->ps_head[3] = 0xBA; | |
84b5dbf3 MCC |
1015 | for (i = 0; i < 8; i++) |
1016 | dma_q->partial_buf[i] = 0; | |
1017 | ||
1018 | dev->video_mode.isoc_ctl.urb = | |
1019 | kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL); | |
e0d3bafd | 1020 | if (!dev->video_mode.isoc_ctl.urb) { |
589dadf2 | 1021 | pr_err("cannot alloc memory for usb buffers\n"); |
e0d3bafd SD |
1022 | return -ENOMEM; |
1023 | } | |
1024 | ||
84b5dbf3 MCC |
1025 | dev->video_mode.isoc_ctl.transfer_buffer = |
1026 | kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL); | |
e0d3bafd | 1027 | if (!dev->video_mode.isoc_ctl.transfer_buffer) { |
589dadf2 | 1028 | pr_err("cannot allocate memory for usbtransfer\n"); |
e0d3bafd SD |
1029 | kfree(dev->video_mode.isoc_ctl.urb); |
1030 | return -ENOMEM; | |
1031 | } | |
1032 | ||
1033 | dev->video_mode.isoc_ctl.max_pkt_size = max_pkt_size; | |
1034 | dev->video_mode.isoc_ctl.buf = NULL; | |
1035 | ||
1036 | sb_size = max_packets * dev->video_mode.isoc_ctl.max_pkt_size; | |
1037 | ||
64fbf444 PB |
1038 | if (dev->mode_tv == 1) |
1039 | dev->video_mode.end_point_addr = 0x81; | |
1040 | else | |
1041 | dev->video_mode.end_point_addr = 0x84; | |
1042 | ||
1043 | ||
e0d3bafd SD |
1044 | /* allocate urbs and transfer buffers */ |
1045 | for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { | |
1046 | urb = usb_alloc_urb(max_packets, GFP_KERNEL); | |
1047 | if (!urb) { | |
589dadf2 | 1048 | pr_err("cannot alloc isoc_ctl.urb %i\n", i); |
e0d3bafd SD |
1049 | cx231xx_uninit_isoc(dev); |
1050 | return -ENOMEM; | |
1051 | } | |
1052 | dev->video_mode.isoc_ctl.urb[i] = urb; | |
1053 | ||
84b5dbf3 | 1054 | dev->video_mode.isoc_ctl.transfer_buffer[i] = |
997ea58e DM |
1055 | usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL, |
1056 | &urb->transfer_dma); | |
e0d3bafd | 1057 | if (!dev->video_mode.isoc_ctl.transfer_buffer[i]) { |
589dadf2 | 1058 | pr_err("unable to allocate %i bytes for transfer" |
84b5dbf3 MCC |
1059 | " buffer %i%s\n", |
1060 | sb_size, i, | |
b9255176 | 1061 | in_interrupt() ? " while in int" : ""); |
e0d3bafd SD |
1062 | cx231xx_uninit_isoc(dev); |
1063 | return -ENOMEM; | |
1064 | } | |
1065 | memset(dev->video_mode.isoc_ctl.transfer_buffer[i], 0, sb_size); | |
1066 | ||
84b5dbf3 MCC |
1067 | pipe = |
1068 | usb_rcvisocpipe(dev->udev, dev->video_mode.end_point_addr); | |
e0d3bafd SD |
1069 | |
1070 | usb_fill_int_urb(urb, dev->udev, pipe, | |
84b5dbf3 | 1071 | dev->video_mode.isoc_ctl.transfer_buffer[i], |
64fbf444 | 1072 | sb_size, cx231xx_isoc_irq_callback, dma_q, 1); |
e0d3bafd SD |
1073 | |
1074 | urb->number_of_packets = max_packets; | |
7a6f6c29 | 1075 | urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP; |
e0d3bafd SD |
1076 | |
1077 | k = 0; | |
1078 | for (j = 0; j < max_packets; j++) { | |
1079 | urb->iso_frame_desc[j].offset = k; | |
1080 | urb->iso_frame_desc[j].length = | |
84b5dbf3 | 1081 | dev->video_mode.isoc_ctl.max_pkt_size; |
e0d3bafd SD |
1082 | k += dev->video_mode.isoc_ctl.max_pkt_size; |
1083 | } | |
1084 | } | |
1085 | ||
1086 | init_waitqueue_head(&dma_q->wq); | |
1087 | ||
e0d3bafd SD |
1088 | /* submit urbs and enables IRQ */ |
1089 | for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { | |
84b5dbf3 MCC |
1090 | rc = usb_submit_urb(dev->video_mode.isoc_ctl.urb[i], |
1091 | GFP_ATOMIC); | |
e0d3bafd | 1092 | if (rc) { |
589dadf2 | 1093 | pr_err("submit of urb %i failed (error=%i)\n", i, |
84b5dbf3 | 1094 | rc); |
e0d3bafd SD |
1095 | cx231xx_uninit_isoc(dev); |
1096 | return rc; | |
1097 | } | |
1098 | } | |
1099 | ||
64fbf444 PB |
1100 | if (dev->mode_tv == 0) |
1101 | cx231xx_capture_start(dev, 1, Raw_Video); | |
1102 | else | |
1103 | cx231xx_capture_start(dev, 1, TS1_serial_mode); | |
e0d3bafd SD |
1104 | |
1105 | return 0; | |
1106 | } | |
1107 | EXPORT_SYMBOL_GPL(cx231xx_init_isoc); | |
1108 | ||
64fbf444 PB |
1109 | /* |
1110 | * Allocate URBs and start IRQ | |
1111 | */ | |
1112 | int cx231xx_init_bulk(struct cx231xx *dev, int max_packets, | |
1113 | int num_bufs, int max_pkt_size, | |
1114 | int (*bulk_copy) (struct cx231xx *dev, struct urb *urb)) | |
1115 | { | |
1116 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; | |
1117 | int i; | |
1118 | int sb_size, pipe; | |
1119 | struct urb *urb; | |
1120 | int rc; | |
1121 | ||
1122 | dev->video_input = dev->video_input > 2 ? 2 : dev->video_input; | |
1123 | ||
d5a1754d DH |
1124 | cx231xx_coredbg("Setting Video mux to %d\n", dev->video_input); |
1125 | ||
64fbf444 PB |
1126 | video_mux(dev, dev->video_input); |
1127 | ||
1128 | /* De-allocates all pending stuff */ | |
1129 | cx231xx_uninit_bulk(dev); | |
1130 | ||
1131 | dev->video_mode.bulk_ctl.bulk_copy = bulk_copy; | |
1132 | dev->video_mode.bulk_ctl.num_bufs = num_bufs; | |
1133 | dma_q->pos = 0; | |
1134 | dma_q->is_partial_line = 0; | |
1135 | dma_q->last_sav = 0; | |
1136 | dma_q->current_field = -1; | |
1137 | dma_q->field1_done = 0; | |
1138 | dma_q->lines_per_field = dev->height / 2; | |
1139 | dma_q->bytes_left_in_line = dev->width << 1; | |
1140 | dma_q->lines_completed = 0; | |
1141 | dma_q->mpeg_buffer_done = 0; | |
1142 | dma_q->left_data_count = 0; | |
1143 | dma_q->mpeg_buffer_completed = 0; | |
1144 | dma_q->ps_head[0] = 0x00; | |
1145 | dma_q->ps_head[1] = 0x00; | |
1146 | dma_q->ps_head[2] = 0x01; | |
1147 | dma_q->ps_head[3] = 0xBA; | |
1148 | for (i = 0; i < 8; i++) | |
1149 | dma_q->partial_buf[i] = 0; | |
1150 | ||
1151 | dev->video_mode.bulk_ctl.urb = | |
1152 | kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL); | |
1153 | if (!dev->video_mode.bulk_ctl.urb) { | |
589dadf2 | 1154 | pr_err("cannot alloc memory for usb buffers\n"); |
64fbf444 PB |
1155 | return -ENOMEM; |
1156 | } | |
1157 | ||
1158 | dev->video_mode.bulk_ctl.transfer_buffer = | |
1159 | kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL); | |
1160 | if (!dev->video_mode.bulk_ctl.transfer_buffer) { | |
589dadf2 | 1161 | pr_err("cannot allocate memory for usbtransfer\n"); |
64fbf444 PB |
1162 | kfree(dev->video_mode.bulk_ctl.urb); |
1163 | return -ENOMEM; | |
1164 | } | |
1165 | ||
1166 | dev->video_mode.bulk_ctl.max_pkt_size = max_pkt_size; | |
1167 | dev->video_mode.bulk_ctl.buf = NULL; | |
1168 | ||
1169 | sb_size = max_packets * dev->video_mode.bulk_ctl.max_pkt_size; | |
1170 | ||
1171 | if (dev->mode_tv == 1) | |
1172 | dev->video_mode.end_point_addr = 0x81; | |
1173 | else | |
1174 | dev->video_mode.end_point_addr = 0x84; | |
1175 | ||
1176 | ||
1177 | /* allocate urbs and transfer buffers */ | |
1178 | for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { | |
1179 | urb = usb_alloc_urb(0, GFP_KERNEL); | |
1180 | if (!urb) { | |
589dadf2 | 1181 | pr_err("cannot alloc bulk_ctl.urb %i\n", i); |
64fbf444 PB |
1182 | cx231xx_uninit_bulk(dev); |
1183 | return -ENOMEM; | |
1184 | } | |
1185 | dev->video_mode.bulk_ctl.urb[i] = urb; | |
7a6f6c29 | 1186 | urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP; |
64fbf444 PB |
1187 | |
1188 | dev->video_mode.bulk_ctl.transfer_buffer[i] = | |
1189 | usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL, | |
1190 | &urb->transfer_dma); | |
1191 | if (!dev->video_mode.bulk_ctl.transfer_buffer[i]) { | |
589dadf2 | 1192 | pr_err("unable to allocate %i bytes for transfer" |
64fbf444 PB |
1193 | " buffer %i%s\n", |
1194 | sb_size, i, | |
1195 | in_interrupt() ? " while in int" : ""); | |
1196 | cx231xx_uninit_bulk(dev); | |
1197 | return -ENOMEM; | |
1198 | } | |
1199 | memset(dev->video_mode.bulk_ctl.transfer_buffer[i], 0, sb_size); | |
1200 | ||
1201 | pipe = usb_rcvbulkpipe(dev->udev, | |
1202 | dev->video_mode.end_point_addr); | |
1203 | usb_fill_bulk_urb(urb, dev->udev, pipe, | |
1204 | dev->video_mode.bulk_ctl.transfer_buffer[i], | |
1205 | sb_size, cx231xx_bulk_irq_callback, dma_q); | |
1206 | } | |
1207 | ||
1208 | init_waitqueue_head(&dma_q->wq); | |
1209 | ||
1210 | /* submit urbs and enables IRQ */ | |
1211 | for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { | |
1212 | rc = usb_submit_urb(dev->video_mode.bulk_ctl.urb[i], | |
1213 | GFP_ATOMIC); | |
1214 | if (rc) { | |
589dadf2 | 1215 | pr_err("submit of urb %i failed (error=%i)\n", i, |
64fbf444 PB |
1216 | rc); |
1217 | cx231xx_uninit_bulk(dev); | |
1218 | return rc; | |
1219 | } | |
1220 | } | |
1221 | ||
1222 | if (dev->mode_tv == 0) | |
1223 | cx231xx_capture_start(dev, 1, Raw_Video); | |
1224 | else | |
1225 | cx231xx_capture_start(dev, 1, TS1_serial_mode); | |
1226 | ||
1227 | return 0; | |
1228 | } | |
1229 | EXPORT_SYMBOL_GPL(cx231xx_init_bulk); | |
1230 | void cx231xx_stop_TS1(struct cx231xx *dev) | |
1231 | { | |
64fbf444 PB |
1232 | u8 val[4] = { 0, 0, 0, 0 }; |
1233 | ||
da983503 HV |
1234 | val[0] = 0x00; |
1235 | val[1] = 0x03; | |
1236 | val[2] = 0x00; | |
1237 | val[3] = 0x00; | |
1238 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1239 | TS_MODE_REG, val, 4); | |
1240 | ||
1241 | val[0] = 0x00; | |
1242 | val[1] = 0x70; | |
1243 | val[2] = 0x04; | |
1244 | val[3] = 0x00; | |
1245 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1246 | TS1_CFG_REG, val, 4); | |
64fbf444 PB |
1247 | } |
1248 | /* EXPORT_SYMBOL_GPL(cx231xx_stop_TS1); */ | |
1249 | void cx231xx_start_TS1(struct cx231xx *dev) | |
1250 | { | |
64fbf444 PB |
1251 | u8 val[4] = { 0, 0, 0, 0 }; |
1252 | ||
da983503 HV |
1253 | val[0] = 0x03; |
1254 | val[1] = 0x03; | |
1255 | val[2] = 0x00; | |
1256 | val[3] = 0x00; | |
1257 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1258 | TS_MODE_REG, val, 4); | |
1259 | ||
1260 | val[0] = 0x04; | |
1261 | val[1] = 0xA3; | |
1262 | val[2] = 0x3B; | |
1263 | val[3] = 0x00; | |
1264 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1265 | TS1_CFG_REG, val, 4); | |
64fbf444 PB |
1266 | } |
1267 | /* EXPORT_SYMBOL_GPL(cx231xx_start_TS1); */ | |
b9255176 SD |
1268 | /***************************************************************** |
1269 | * Device Init/UnInit functions * | |
1270 | ******************************************************************/ | |
e0d3bafd SD |
1271 | int cx231xx_dev_init(struct cx231xx *dev) |
1272 | { | |
84b5dbf3 | 1273 | int errCode = 0; |
e0d3bafd | 1274 | |
84b5dbf3 | 1275 | /* Initialize I2C bus */ |
e0d3bafd SD |
1276 | |
1277 | /* External Master 1 Bus */ | |
1278 | dev->i2c_bus[0].nr = 0; | |
1279 | dev->i2c_bus[0].dev = dev; | |
1a50fdde | 1280 | dev->i2c_bus[0].i2c_period = I2C_SPEED_100K; /* 100 KHz */ |
84b5dbf3 MCC |
1281 | dev->i2c_bus[0].i2c_nostop = 0; |
1282 | dev->i2c_bus[0].i2c_reserve = 0; | |
e0d3bafd SD |
1283 | |
1284 | /* External Master 2 Bus */ | |
1285 | dev->i2c_bus[1].nr = 1; | |
1286 | dev->i2c_bus[1].dev = dev; | |
1a50fdde | 1287 | dev->i2c_bus[1].i2c_period = I2C_SPEED_100K; /* 100 KHz */ |
84b5dbf3 MCC |
1288 | dev->i2c_bus[1].i2c_nostop = 0; |
1289 | dev->i2c_bus[1].i2c_reserve = 0; | |
e0d3bafd SD |
1290 | |
1291 | /* Internal Master 3 Bus */ | |
1292 | dev->i2c_bus[2].nr = 2; | |
1293 | dev->i2c_bus[2].dev = dev; | |
9ab66912 | 1294 | dev->i2c_bus[2].i2c_period = I2C_SPEED_100K; /* 100kHz */ |
84b5dbf3 MCC |
1295 | dev->i2c_bus[2].i2c_nostop = 0; |
1296 | dev->i2c_bus[2].i2c_reserve = 0; | |
e0d3bafd | 1297 | |
84b5dbf3 | 1298 | /* register I2C buses */ |
e0d3bafd SD |
1299 | cx231xx_i2c_register(&dev->i2c_bus[0]); |
1300 | cx231xx_i2c_register(&dev->i2c_bus[1]); | |
1301 | cx231xx_i2c_register(&dev->i2c_bus[2]); | |
1302 | ||
15c212dd MS |
1303 | cx231xx_i2c_mux_register(dev, 0); |
1304 | cx231xx_i2c_mux_register(dev, 1); | |
1305 | ||
e4de03f2 MS |
1306 | /* scan the real bus segments in the order of physical port numbers */ |
1307 | cx231xx_do_i2c_scan(dev, I2C_0); | |
1308 | cx231xx_do_i2c_scan(dev, I2C_1_MUX_1); | |
1309 | cx231xx_do_i2c_scan(dev, I2C_2); | |
1310 | cx231xx_do_i2c_scan(dev, I2C_1_MUX_3); | |
1311 | ||
84b5dbf3 | 1312 | /* init hardware */ |
b9255176 | 1313 | /* Note : with out calling set power mode function, |
ecc67d10 | 1314 | afe can not be set up correctly */ |
2f861387 | 1315 | if (dev->board.external_av) { |
64fbf444 PB |
1316 | errCode = cx231xx_set_power_mode(dev, |
1317 | POLARIS_AVMODE_ENXTERNAL_AV); | |
1318 | if (errCode < 0) { | |
589dadf2 | 1319 | pr_err |
64fbf444 PB |
1320 | ("%s: Failed to set Power - errCode [%d]!\n", |
1321 | __func__, errCode); | |
1322 | return errCode; | |
1323 | } | |
1324 | } else { | |
1325 | errCode = cx231xx_set_power_mode(dev, | |
1326 | POLARIS_AVMODE_ANALOGT_TV); | |
1327 | if (errCode < 0) { | |
589dadf2 | 1328 | pr_err |
64fbf444 PB |
1329 | ("%s: Failed to set Power - errCode [%d]!\n", |
1330 | __func__, errCode); | |
1331 | return errCode; | |
1332 | } | |
e0d3bafd SD |
1333 | } |
1334 | ||
2f861387 MCC |
1335 | /* reset the Tuner, if it is a Xceive tuner */ |
1336 | if ((dev->board.tuner_type == TUNER_XC5000) || | |
1337 | (dev->board.tuner_type == TUNER_XC2028)) | |
64fbf444 PB |
1338 | cx231xx_gpio_set(dev, dev->board.tuner_gpio); |
1339 | ||
84b5dbf3 | 1340 | /* initialize Colibri block */ |
ecc67d10 | 1341 | errCode = cx231xx_afe_init_super_block(dev, 0x23c); |
e0d3bafd | 1342 | if (errCode < 0) { |
589dadf2 | 1343 | pr_err |
ecc67d10 | 1344 | ("%s: cx231xx_afe init super block - errCode [%d]!\n", |
84b5dbf3 | 1345 | __func__, errCode); |
e0d3bafd SD |
1346 | return errCode; |
1347 | } | |
ecc67d10 | 1348 | errCode = cx231xx_afe_init_channels(dev); |
84b5dbf3 | 1349 | if (errCode < 0) { |
589dadf2 | 1350 | pr_err |
ecc67d10 | 1351 | ("%s: cx231xx_afe init channels - errCode [%d]!\n", |
84b5dbf3 | 1352 | __func__, errCode); |
e0d3bafd SD |
1353 | return errCode; |
1354 | } | |
1355 | ||
84b5dbf3 MCC |
1356 | /* Set DIF in By pass mode */ |
1357 | errCode = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); | |
1358 | if (errCode < 0) { | |
589dadf2 | 1359 | pr_err |
84b5dbf3 MCC |
1360 | ("%s: cx231xx_dif set to By pass mode - errCode [%d]!\n", |
1361 | __func__, errCode); | |
e0d3bafd SD |
1362 | return errCode; |
1363 | } | |
1364 | ||
ecc67d10 SD |
1365 | /* I2S block related functions */ |
1366 | errCode = cx231xx_i2s_blk_initialize(dev); | |
84b5dbf3 | 1367 | if (errCode < 0) { |
589dadf2 | 1368 | pr_err |
ecc67d10 | 1369 | ("%s: cx231xx_i2s block initialize - errCode [%d]!\n", |
84b5dbf3 | 1370 | __func__, errCode); |
e0d3bafd SD |
1371 | return errCode; |
1372 | } | |
1373 | ||
84b5dbf3 MCC |
1374 | /* init control pins */ |
1375 | errCode = cx231xx_init_ctrl_pin_status(dev); | |
1376 | if (errCode < 0) { | |
589dadf2 | 1377 | pr_err("%s: cx231xx_init ctrl pins - errCode [%d]!\n", |
84b5dbf3 | 1378 | __func__, errCode); |
e0d3bafd SD |
1379 | return errCode; |
1380 | } | |
1381 | ||
84b5dbf3 | 1382 | /* set AGC mode to Analog */ |
64fbf444 PB |
1383 | switch (dev->model) { |
1384 | case CX231XX_BOARD_CNXT_CARRAERA: | |
1385 | case CX231XX_BOARD_CNXT_RDE_250: | |
1386 | case CX231XX_BOARD_CNXT_SHELBY: | |
1387 | case CX231XX_BOARD_CNXT_RDU_250: | |
84b5dbf3 | 1388 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); |
64fbf444 PB |
1389 | break; |
1390 | case CX231XX_BOARD_CNXT_RDE_253S: | |
1391 | case CX231XX_BOARD_CNXT_RDU_253S: | |
1a50fdde | 1392 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
dd2e7dd2 | 1393 | case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx: |
9417bc6d | 1394 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
de8ae0d5 PM |
1395 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL: |
1396 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC: | |
64fbf444 PB |
1397 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); |
1398 | break; | |
1399 | default: | |
1400 | break; | |
1401 | } | |
84b5dbf3 | 1402 | if (errCode < 0) { |
589dadf2 | 1403 | pr_err |
84b5dbf3 MCC |
1404 | ("%s: cx231xx_AGC mode to Analog - errCode [%d]!\n", |
1405 | __func__, errCode); | |
e0d3bafd SD |
1406 | return errCode; |
1407 | } | |
1408 | ||
84b5dbf3 MCC |
1409 | /* set all alternate settings to zero initially */ |
1410 | cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0); | |
1411 | cx231xx_set_alt_setting(dev, INDEX_VANC, 0); | |
1412 | cx231xx_set_alt_setting(dev, INDEX_HANC, 0); | |
1413 | if (dev->board.has_dvb) | |
1414 | cx231xx_set_alt_setting(dev, INDEX_TS1, 0); | |
e0d3bafd | 1415 | |
660acd54 | 1416 | errCode = 0; |
e0d3bafd SD |
1417 | return errCode; |
1418 | } | |
1419 | EXPORT_SYMBOL_GPL(cx231xx_dev_init); | |
1420 | ||
1421 | void cx231xx_dev_uninit(struct cx231xx *dev) | |
1422 | { | |
84b5dbf3 | 1423 | /* Un Initialize I2C bus */ |
15c212dd MS |
1424 | cx231xx_i2c_mux_unregister(dev, 1); |
1425 | cx231xx_i2c_mux_unregister(dev, 0); | |
e0d3bafd SD |
1426 | cx231xx_i2c_unregister(&dev->i2c_bus[2]); |
1427 | cx231xx_i2c_unregister(&dev->i2c_bus[1]); | |
1428 | cx231xx_i2c_unregister(&dev->i2c_bus[0]); | |
1429 | } | |
84b5dbf3 | 1430 | EXPORT_SYMBOL_GPL(cx231xx_dev_uninit); |
e0d3bafd | 1431 | |
b9255176 SD |
1432 | /***************************************************************** |
1433 | * G P I O related functions * | |
1434 | ******************************************************************/ | |
64fbf444 | 1435 | int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val, |
84b5dbf3 | 1436 | u8 len, u8 request, u8 direction) |
e0d3bafd | 1437 | { |
84b5dbf3 | 1438 | int status = 0; |
b9255176 | 1439 | struct VENDOR_REQUEST_IN ven_req; |
84b5dbf3 MCC |
1440 | |
1441 | /* Set wValue */ | |
1442 | ven_req.wValue = (u16) (gpio_bit >> 16 & 0xffff); | |
1443 | ||
1444 | /* set request */ | |
1445 | if (!request) { | |
1446 | if (direction) | |
1447 | ven_req.bRequest = VRT_GET_GPIO; /* 0x8 gpio */ | |
1448 | else | |
1449 | ven_req.bRequest = VRT_SET_GPIO; /* 0x9 gpio */ | |
1450 | } else { | |
1451 | if (direction) | |
1452 | ven_req.bRequest = VRT_GET_GPIE; /* 0xa gpie */ | |
1453 | else | |
1454 | ven_req.bRequest = VRT_SET_GPIE; /* 0xb gpie */ | |
1455 | } | |
e0d3bafd | 1456 | |
84b5dbf3 MCC |
1457 | /* set index value */ |
1458 | ven_req.wIndex = (u16) (gpio_bit & 0xffff); | |
e0d3bafd | 1459 | |
84b5dbf3 MCC |
1460 | /* set wLength value */ |
1461 | ven_req.wLength = len; | |
e0d3bafd | 1462 | |
84b5dbf3 MCC |
1463 | /* set bData value */ |
1464 | ven_req.bData = 0; | |
e0d3bafd | 1465 | |
84b5dbf3 MCC |
1466 | /* set the buffer for read / write */ |
1467 | ven_req.pBuff = gpio_val; | |
1468 | ||
1469 | /* set the direction */ | |
1470 | if (direction) { | |
1471 | ven_req.direction = USB_DIR_IN; | |
1472 | memset(ven_req.pBuff, 0x00, ven_req.wLength); | |
1473 | } else | |
1474 | ven_req.direction = USB_DIR_OUT; | |
1475 | ||
1476 | ||
1477 | /* call common vendor command request */ | |
1478 | status = cx231xx_send_vendor_cmd(dev, &ven_req); | |
1479 | if (status < 0) { | |
589dadf2 | 1480 | pr_info |
b9255176 | 1481 | ("UsbInterface::sendCommand, failed with status -%d\n", |
84b5dbf3 MCC |
1482 | status); |
1483 | } | |
e0d3bafd | 1484 | |
84b5dbf3 | 1485 | return status; |
e0d3bafd | 1486 | } |
e0d3bafd SD |
1487 | EXPORT_SYMBOL_GPL(cx231xx_send_gpio_cmd); |
1488 | ||
b9255176 SD |
1489 | /***************************************************************** |
1490 | * C O N T R O L - Register R E A D / W R I T E functions * | |
1491 | *****************************************************************/ | |
e0d3bafd SD |
1492 | int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode) |
1493 | { | |
84b5dbf3 MCC |
1494 | u8 value[4] = { 0x0, 0x0, 0x0, 0x0 }; |
1495 | u32 tmp = 0; | |
1496 | int status = 0; | |
e0d3bafd | 1497 | |
84b5dbf3 MCC |
1498 | status = |
1499 | cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, address, value, 4); | |
1500 | if (status < 0) | |
1501 | return status; | |
e0d3bafd | 1502 | |
3f9280a8 | 1503 | tmp = le32_to_cpu(*((__le32 *) value)); |
84b5dbf3 | 1504 | tmp |= mode; |
e0d3bafd | 1505 | |
84b5dbf3 MCC |
1506 | value[0] = (u8) tmp; |
1507 | value[1] = (u8) (tmp >> 8); | |
1508 | value[2] = (u8) (tmp >> 16); | |
1509 | value[3] = (u8) (tmp >> 24); | |
e0d3bafd | 1510 | |
84b5dbf3 MCC |
1511 | status = |
1512 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, address, value, 4); | |
e0d3bafd | 1513 | |
84b5dbf3 | 1514 | return status; |
e0d3bafd SD |
1515 | } |
1516 | ||
b9255176 SD |
1517 | /***************************************************************** |
1518 | * I 2 C Internal C O N T R O L functions * | |
1519 | *****************************************************************/ | |
64fbf444 PB |
1520 | int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, |
1521 | u8 saddr_len, u32 *data, u8 data_len, int master) | |
1522 | { | |
1523 | int status = 0; | |
1524 | struct cx231xx_i2c_xfer_data req_data; | |
1525 | u8 value[64] = "0"; | |
1526 | ||
1527 | if (saddr_len == 0) | |
1528 | saddr = 0; | |
fe041646 | 1529 | else if (saddr_len == 1) |
64fbf444 PB |
1530 | saddr &= 0xff; |
1531 | ||
1532 | /* prepare xfer_data struct */ | |
1533 | req_data.dev_addr = dev_addr >> 1; | |
1534 | req_data.direction = I2C_M_RD; | |
1535 | req_data.saddr_len = saddr_len; | |
1536 | req_data.saddr_dat = saddr; | |
1537 | req_data.buf_size = data_len; | |
1538 | req_data.p_buffer = (u8 *) value; | |
1539 | ||
1540 | /* usb send command */ | |
1541 | if (master == 0) | |
1542 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], | |
1543 | &req_data); | |
1544 | else if (master == 1) | |
1545 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1], | |
1546 | &req_data); | |
1547 | else if (master == 2) | |
1548 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2], | |
1549 | &req_data); | |
1550 | ||
1551 | if (status >= 0) { | |
1552 | /* Copy the data read back to main buffer */ | |
1553 | if (data_len == 1) | |
1554 | *data = value[0]; | |
1555 | else if (data_len == 4) | |
1556 | *data = | |
1557 | value[0] | value[1] << 8 | value[2] << 16 | value[3] | |
1558 | << 24; | |
1559 | else if (data_len > 4) | |
1560 | *data = value[saddr]; | |
1561 | } | |
1562 | ||
1563 | return status; | |
1564 | } | |
1565 | ||
1566 | int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, | |
1567 | u8 saddr_len, u32 data, u8 data_len, int master) | |
1568 | { | |
1569 | int status = 0; | |
1570 | u8 value[4] = { 0, 0, 0, 0 }; | |
1571 | struct cx231xx_i2c_xfer_data req_data; | |
1572 | ||
1573 | value[0] = (u8) data; | |
1574 | value[1] = (u8) (data >> 8); | |
1575 | value[2] = (u8) (data >> 16); | |
1576 | value[3] = (u8) (data >> 24); | |
1577 | ||
1578 | if (saddr_len == 0) | |
1579 | saddr = 0; | |
fe041646 | 1580 | else if (saddr_len == 1) |
64fbf444 PB |
1581 | saddr &= 0xff; |
1582 | ||
1583 | /* prepare xfer_data struct */ | |
1584 | req_data.dev_addr = dev_addr >> 1; | |
1585 | req_data.direction = 0; | |
1586 | req_data.saddr_len = saddr_len; | |
1587 | req_data.saddr_dat = saddr; | |
1588 | req_data.buf_size = data_len; | |
1589 | req_data.p_buffer = value; | |
1590 | ||
1591 | /* usb send command */ | |
1592 | if (master == 0) | |
1593 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], | |
1594 | &req_data); | |
1595 | else if (master == 1) | |
1596 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1], | |
1597 | &req_data); | |
1598 | else if (master == 2) | |
1599 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2], | |
1600 | &req_data); | |
1601 | ||
1602 | return status; | |
1603 | } | |
1604 | ||
e0d3bafd | 1605 | int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr, |
b9255176 | 1606 | u8 saddr_len, u32 *data, u8 data_len) |
e0d3bafd | 1607 | { |
84b5dbf3 MCC |
1608 | int status = 0; |
1609 | struct cx231xx_i2c_xfer_data req_data; | |
1610 | u8 value[4] = { 0, 0, 0, 0 }; | |
1611 | ||
1612 | if (saddr_len == 0) | |
1613 | saddr = 0; | |
fe041646 | 1614 | else if (saddr_len == 1) |
84b5dbf3 MCC |
1615 | saddr &= 0xff; |
1616 | ||
1617 | /* prepare xfer_data struct */ | |
1618 | req_data.dev_addr = dev_addr >> 1; | |
1619 | req_data.direction = I2C_M_RD; | |
1620 | req_data.saddr_len = saddr_len; | |
1621 | req_data.saddr_dat = saddr; | |
1622 | req_data.buf_size = data_len; | |
1623 | req_data.p_buffer = (u8 *) value; | |
1624 | ||
1625 | /* usb send command */ | |
1626 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data); | |
1627 | ||
1628 | if (status >= 0) { | |
1629 | /* Copy the data read back to main buffer */ | |
1630 | if (data_len == 1) | |
1631 | *data = value[0]; | |
1632 | else | |
1633 | *data = | |
1634 | value[0] | value[1] << 8 | value[2] << 16 | value[3] | |
1635 | << 24; | |
1636 | } | |
1637 | ||
1638 | return status; | |
e0d3bafd SD |
1639 | } |
1640 | ||
1641 | int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr, | |
84b5dbf3 | 1642 | u8 saddr_len, u32 data, u8 data_len) |
e0d3bafd | 1643 | { |
84b5dbf3 MCC |
1644 | int status = 0; |
1645 | u8 value[4] = { 0, 0, 0, 0 }; | |
1646 | struct cx231xx_i2c_xfer_data req_data; | |
1647 | ||
1648 | value[0] = (u8) data; | |
1649 | value[1] = (u8) (data >> 8); | |
1650 | value[2] = (u8) (data >> 16); | |
1651 | value[3] = (u8) (data >> 24); | |
1652 | ||
1653 | if (saddr_len == 0) | |
1654 | saddr = 0; | |
fe041646 | 1655 | else if (saddr_len == 1) |
84b5dbf3 MCC |
1656 | saddr &= 0xff; |
1657 | ||
1658 | /* prepare xfer_data struct */ | |
1659 | req_data.dev_addr = dev_addr >> 1; | |
1660 | req_data.direction = 0; | |
1661 | req_data.saddr_len = saddr_len; | |
1662 | req_data.saddr_dat = saddr; | |
1663 | req_data.buf_size = data_len; | |
1664 | req_data.p_buffer = value; | |
1665 | ||
1666 | /* usb send command */ | |
1667 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data); | |
1668 | ||
1669 | return status; | |
e0d3bafd SD |
1670 | } |
1671 | ||
84b5dbf3 MCC |
1672 | int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size, |
1673 | u16 register_address, u8 bit_start, u8 bit_end, | |
1674 | u32 value) | |
e0d3bafd | 1675 | { |
84b5dbf3 MCC |
1676 | int status = 0; |
1677 | u32 tmp; | |
1678 | u32 mask = 0; | |
1679 | int i; | |
1680 | ||
b9255176 | 1681 | if (bit_start > (size - 1) || bit_end > (size - 1)) |
84b5dbf3 | 1682 | return -1; |
e0d3bafd | 1683 | |
84b5dbf3 MCC |
1684 | if (size == 8) { |
1685 | status = | |
1686 | cx231xx_read_i2c_data(dev, dev_addr, register_address, 2, | |
1687 | &tmp, 1); | |
1688 | } else { | |
1689 | status = | |
1690 | cx231xx_read_i2c_data(dev, dev_addr, register_address, 2, | |
1691 | &tmp, 4); | |
1692 | } | |
e0d3bafd | 1693 | |
b9255176 | 1694 | if (status < 0) |
84b5dbf3 | 1695 | return status; |
84b5dbf3 MCC |
1696 | |
1697 | mask = 1 << bit_end; | |
b9255176 | 1698 | for (i = bit_end; i > bit_start && i > 0; i--) |
84b5dbf3 | 1699 | mask = mask + (1 << (i - 1)); |
84b5dbf3 MCC |
1700 | |
1701 | value <<= bit_start; | |
1702 | ||
1703 | if (size == 8) { | |
1704 | tmp &= ~mask; | |
1705 | tmp |= value; | |
1706 | tmp &= 0xff; | |
1707 | status = | |
1708 | cx231xx_write_i2c_data(dev, dev_addr, register_address, 2, | |
1709 | tmp, 1); | |
1710 | } else { | |
1711 | tmp &= ~mask; | |
1712 | tmp |= value; | |
1713 | status = | |
1714 | cx231xx_write_i2c_data(dev, dev_addr, register_address, 2, | |
1715 | tmp, 4); | |
1716 | } | |
1717 | ||
1718 | return status; | |
1719 | } | |
e0d3bafd SD |
1720 | |
1721 | int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr, | |
84b5dbf3 | 1722 | u16 saddr, u32 mask, u32 value) |
e0d3bafd | 1723 | { |
84b5dbf3 MCC |
1724 | u32 temp; |
1725 | int status = 0; | |
e0d3bafd | 1726 | |
84b5dbf3 | 1727 | status = cx231xx_read_i2c_data(dev, dev_addr, saddr, 2, &temp, 4); |
e0d3bafd | 1728 | |
84b5dbf3 MCC |
1729 | if (status < 0) |
1730 | return status; | |
e0d3bafd | 1731 | |
84b5dbf3 MCC |
1732 | temp &= ~mask; |
1733 | temp |= value; | |
e0d3bafd | 1734 | |
84b5dbf3 | 1735 | status = cx231xx_write_i2c_data(dev, dev_addr, saddr, 2, temp, 4); |
e0d3bafd | 1736 | |
84b5dbf3 | 1737 | return status; |
e0d3bafd SD |
1738 | } |
1739 | ||
1740 | u32 cx231xx_set_field(u32 field_mask, u32 data) | |
1741 | { | |
84b5dbf3 | 1742 | u32 temp; |
e0d3bafd | 1743 | |
b9255176 | 1744 | for (temp = field_mask; (temp & 1) == 0; temp >>= 1) |
84b5dbf3 | 1745 | data <<= 1; |
e0d3bafd | 1746 | |
84b5dbf3 | 1747 | return data; |
e0d3bafd | 1748 | } |