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[media] cx231xx: simplify I2C scan debug messages
[mirror_ubuntu-artful-kernel.git] / drivers / media / usb / cx231xx / cx231xx-core.c
CommitLineData
e0d3bafd 1/*
b9255176
SD		 2 cx231xx-core.c - driver for Conexant Cx23100/101/102
3 USB video capture devices
e0d3bafd
SD		 4
5 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
b9255176 6 Based on em28xx driver
e0d3bafd
SD		 7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
17
18 You should have received a copy of the GNU General Public License
19 along with this program; if not, write to the Free Software
20 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
589dadf2 23#include "cx231xx.h"
e0d3bafd
SD		 24#include <linux/init.h>
25#include <linux/list.h>
26#include <linux/module.h>
5a0e3ad6 27#include <linux/slab.h>
e0d3bafd
SD		 28#include <linux/vmalloc.h>
29#include <media/v4l2-common.h>
64fbf444 30#include <media/tuner.h>
e0d3bafd 31
e0d3bafd
SD		 32#include "cx231xx-reg.h"
33
34/* #define ENABLE_DEBUG_ISOC_FRAMES */
35
36static unsigned int core_debug;
84b5dbf3
MCC		 37module_param(core_debug, int, 0644);
38MODULE_PARM_DESC(core_debug, "enable debug messages [core]");
e0d3bafd
SD		 39
40#define cx231xx_coredbg(fmt, arg...) do {\
41 if (core_debug) \
42 printk(KERN_INFO "%s %s :"fmt, \
43 dev->name, __func__ , ##arg); } while (0)
44
45static unsigned int reg_debug;
84b5dbf3
MCC		 46module_param(reg_debug, int, 0644);
47MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]");
e0d3bafd 48
e0d3bafd
SD		 49static int alt = CX231XX_PINOUT;
50module_param(alt, int, 0644);
51MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint");
52
e0d3bafd
SD		 53#define cx231xx_isocdbg(fmt, arg...) do {\
54 if (core_debug) \
55 printk(KERN_INFO "%s %s :"fmt, \
56 dev->name, __func__ , ##arg); } while (0)
57
b9255176
SD		 58/*****************************************************************
59* Device control list functions *
60******************************************************************/
e0d3bafd 61
64fbf444 62LIST_HEAD(cx231xx_devlist);
e0d3bafd
SD		 63static DEFINE_MUTEX(cx231xx_devlist_mutex);
64
e0d3bafd
SD		 65/*
66 * cx231xx_realease_resources()
67 * unregisters the v4l2,i2c and usb devices
68 * called when the device gets disconected or at module unload
69*/
70void cx231xx_remove_from_devlist(struct cx231xx *dev)
71{
64fbf444
PB		 72 if (dev == NULL)
73 return;
74 if (dev->udev == NULL)
75 return;
76
77 if (atomic_read(&dev->devlist_count) > 0) {
78 mutex_lock(&cx231xx_devlist_mutex);
79 list_del(&dev->devlist);
80 atomic_dec(&dev->devlist_count);
81 mutex_unlock(&cx231xx_devlist_mutex);
82 }
e0d3bafd
SD		 83};
84
85void cx231xx_add_into_devlist(struct cx231xx *dev)
86{
87 mutex_lock(&cx231xx_devlist_mutex);
88 list_add_tail(&dev->devlist, &cx231xx_devlist);
64fbf444 89 atomic_inc(&dev->devlist_count);
e0d3bafd
SD		 90 mutex_unlock(&cx231xx_devlist_mutex);
91};
92
e0d3bafd 93static LIST_HEAD(cx231xx_extension_devlist);
e0d3bafd
SD		 94
95int cx231xx_register_extension(struct cx231xx_ops *ops)
96{
97 struct cx231xx *dev = NULL;
98
99 mutex_lock(&cx231xx_devlist_mutex);
e0d3bafd 100 list_add_tail(&ops->next, &cx231xx_extension_devlist);
fb1817e4 101 list_for_each_entry(dev, &cx231xx_devlist, devlist) {
a9fac6b1 102 ops->init(dev);
fb1817e4
MCC		 103 dev_info(&dev->udev->dev, "%s initialized\n", ops->name);
104 }
e0d3bafd
SD		 105 mutex_unlock(&cx231xx_devlist_mutex);
106 return 0;
107}
108EXPORT_SYMBOL(cx231xx_register_extension);
109
110void cx231xx_unregister_extension(struct cx231xx_ops *ops)
111{
112 struct cx231xx *dev = NULL;
113
114 mutex_lock(&cx231xx_devlist_mutex);
fb1817e4 115 list_for_each_entry(dev, &cx231xx_devlist, devlist) {
a9fac6b1 116 ops->fini(dev);
fb1817e4
MCC		 117 dev_info(&dev->udev->dev, "%s removed\n", ops->name);
118 }
e0d3bafd 119
e0d3bafd 120 list_del(&ops->next);
e0d3bafd
SD		 121 mutex_unlock(&cx231xx_devlist_mutex);
122}
84b5dbf3 123EXPORT_SYMBOL(cx231xx_unregister_extension);
e0d3bafd
SD		 124
125void cx231xx_init_extension(struct cx231xx *dev)
126{
127 struct cx231xx_ops *ops = NULL;
128
761f6cf6 129 mutex_lock(&cx231xx_devlist_mutex);
e0d3bafd
SD		 130 if (!list_empty(&cx231xx_extension_devlist)) {
131 list_for_each_entry(ops, &cx231xx_extension_devlist, next) {
132 if (ops->init)
133 ops->init(dev);
134 }
135 }
761f6cf6 136 mutex_unlock(&cx231xx_devlist_mutex);
e0d3bafd
SD		 137}
138
139void cx231xx_close_extension(struct cx231xx *dev)
140{
141 struct cx231xx_ops *ops = NULL;
142
761f6cf6 143 mutex_lock(&cx231xx_devlist_mutex);
e0d3bafd
SD		 144 if (!list_empty(&cx231xx_extension_devlist)) {
145 list_for_each_entry(ops, &cx231xx_extension_devlist, next) {
146 if (ops->fini)
147 ops->fini(dev);
148 }
149 }
761f6cf6 150 mutex_unlock(&cx231xx_devlist_mutex);
e0d3bafd
SD		 151}
152
b9255176
SD		 153/****************************************************************
154* U S B related functions *
155*****************************************************************/
e0d3bafd 156int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus,
84b5dbf3 157 struct cx231xx_i2c_xfer_data *req_data)
e0d3bafd 158{
84b5dbf3
MCC		 159 int status = 0;
160 struct cx231xx *dev = i2c_bus->dev;
b9255176 161 struct VENDOR_REQUEST_IN ven_req;
84b5dbf3
MCC		 162
163 u8 saddr_len = 0;
164 u8 _i2c_period = 0;
165 u8 _i2c_nostop = 0;
166 u8 _i2c_reserve = 0;
167
7528cd27
MCC		 168 if (dev->state & DEV_DISCONNECTED)
169 return -ENODEV;
170
84b5dbf3
MCC		 171 /* Get the I2C period, nostop and reserve parameters */
172 _i2c_period = i2c_bus->i2c_period;
173 _i2c_nostop = i2c_bus->i2c_nostop;
174 _i2c_reserve = i2c_bus->i2c_reserve;
175
176 saddr_len = req_data->saddr_len;
177
178 /* Set wValue */
179 if (saddr_len == 1) /* need check saddr_len == 0 */
180 ven_req.wValue =
181 req_data->
182 dev_addr << 9 | _i2c_period << 4 | saddr_len << 2 |
183 _i2c_nostop << 1 | I2C_SYNC | _i2c_reserve << 6;
184 else
185 ven_req.wValue =
186 req_data->
187 dev_addr << 9 | _i2c_period << 4 | saddr_len << 2 |
188 _i2c_nostop << 1 | I2C_SYNC | _i2c_reserve << 6;
189
190 /* set channel number */
b9255176
SD		 191 if (req_data->direction & I2C_M_RD) {
192 /* channel number, for read,spec required channel_num +4 */
193 ven_req.bRequest = i2c_bus->nr + 4;
194 } else
84b5dbf3
MCC		 195 ven_req.bRequest = i2c_bus->nr; /* channel number, */
196
197 /* set index value */
198 switch (saddr_len) {
199 case 0:
200 ven_req.wIndex = 0; /* need check */
201 break;
202 case 1:
203 ven_req.wIndex = (req_data->saddr_dat & 0xff);
204 break;
205 case 2:
206 ven_req.wIndex = req_data->saddr_dat;
207 break;
208 }
209
210 /* set wLength value */
211 ven_req.wLength = req_data->buf_size;
212
213 /* set bData value */
214 ven_req.bData = 0;
215
216 /* set the direction */
217 if (req_data->direction) {
218 ven_req.direction = USB_DIR_IN;
219 memset(req_data->p_buffer, 0x00, ven_req.wLength);
220 } else
221 ven_req.direction = USB_DIR_OUT;
222
223 /* set the buffer for read / write */
224 ven_req.pBuff = req_data->p_buffer;
225
226
227 /* call common vendor command request */
228 status = cx231xx_send_vendor_cmd(dev, &ven_req);
77e97ba2 229 if (status < 0 && !dev->i2c_scan_running) {
b7085c08 230 dev_err(&dev->udev->dev, "%s: failed with status -%d\n",
ed0e3729 231 __func__, status);
84b5dbf3
MCC		 232 }
233
234 return status;
e0d3bafd 235}
e0d3bafd 236EXPORT_SYMBOL_GPL(cx231xx_send_usb_command);
b9255176 237
24c80b65
MCC		 238/*
239 * Sends/Receives URB control messages, assuring to use a kalloced buffer
240 * for all operations (dev->urb_buf), to avoid using stacked buffers, as
241 * they aren't safe for usage with USB, due to DMA restrictions.
242 * Also implements the debug code for control URB's.
243 */
244static int __usb_control_msg(struct cx231xx *dev, unsigned int pipe,
245 __u8 request, __u8 requesttype, __u16 value, __u16 index,
246 void *data, __u16 size, int timeout)
247{
248 int rc, i;
249
250 if (reg_debug) {
251 printk(KERN_DEBUG "%s: (pipe 0x%08x): "
252 "%s: %02x %02x %02x %02x %02x %02x %02x %02x ",
253 dev->name,
254 pipe,
255 (requesttype & USB_DIR_IN) ? "IN" : "OUT",
256 requesttype,
257 request,
258 value & 0xff, value >> 8,
259 index & 0xff, index >> 8,
260 size & 0xff, size >> 8);
261 if (!(requesttype & USB_DIR_IN)) {
262 printk(KERN_CONT ">>>");
263 for (i = 0; i < size; i++)
264 printk(KERN_CONT " %02x",
265 ((unsigned char *)data)[i]);
266 }
267 }
268
269 /* Do the real call to usb_control_msg */
270 mutex_lock(&dev->ctrl_urb_lock);
271 if (!(requesttype & USB_DIR_IN) && size)
272 memcpy(dev->urb_buf, data, size);
273 rc = usb_control_msg(dev->udev, pipe, request, requesttype, value,
274 index, dev->urb_buf, size, timeout);
275 if ((requesttype & USB_DIR_IN) && size)
276 memcpy(data, dev->urb_buf, size);
277 mutex_unlock(&dev->ctrl_urb_lock);
278
279 if (reg_debug) {
280 if (unlikely(rc < 0)) {
281 printk(KERN_CONT "FAILED!\n");
282 return rc;
283 }
284
285 if ((requesttype & USB_DIR_IN)) {
286 printk(KERN_CONT "<<<");
287 for (i = 0; i < size; i++)
288 printk(KERN_CONT " %02x",
289 ((unsigned char *)data)[i]);
290 }
291 printk(KERN_CONT "\n");
292 }
293
294 return rc;
295}
296
297
e0d3bafd
SD		 298/*
299 * cx231xx_read_ctrl_reg()
300 * reads data from the usb device specifying bRequest and wValue
301 */
302int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 303 char *buf, int len)
e0d3bafd 304{
84b5dbf3 305 u8 val = 0;
e0d3bafd
SD		 306 int ret;
307 int pipe = usb_rcvctrlpipe(dev->udev, 0);
308
309 if (dev->state & DEV_DISCONNECTED)
310 return -ENODEV;
311
312 if (len > URB_MAX_CTRL_SIZE)
313 return -EINVAL;
314
84b5dbf3
MCC		 315 switch (len) {
316 case 1:
317 val = ENABLE_ONE_BYTE;
318 break;
319 case 2:
320 val = ENABLE_TWE_BYTE;
321 break;
322 case 3:
323 val = ENABLE_THREE_BYTE;
324 break;
325 case 4:
326 val = ENABLE_FOUR_BYTE;
327 break;
328 default:
329 val = 0xFF; /* invalid option */
330 }
331
332 if (val == 0xFF)
333 return -EINVAL;
e0d3bafd 334
24c80b65 335 ret = __usb_control_msg(dev, pipe, req,
e0d3bafd 336 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
24c80b65 337 val, reg, buf, len, HZ);
e0d3bafd
SD		 338 return ret;
339}
340
b9255176
SD		 341int cx231xx_send_vendor_cmd(struct cx231xx *dev,
342 struct VENDOR_REQUEST_IN *ven_req)
e0d3bafd 343{
84b5dbf3 344 int ret;
e0d3bafd 345 int pipe = 0;
64fbf444
PB		 346 int unsend_size = 0;
347 u8 *pdata;
e0d3bafd
SD		 348
349 if (dev->state & DEV_DISCONNECTED)
350 return -ENODEV;
351
352 if ((ven_req->wLength > URB_MAX_CTRL_SIZE))
353 return -EINVAL;
354
84b5dbf3
MCC		 355 if (ven_req->direction)
356 pipe = usb_rcvctrlpipe(dev->udev, 0);
357 else
358 pipe = usb_sndctrlpipe(dev->udev, 0);
e0d3bafd 359
24c80b65
MCC		 360 /*
361 * If the cx23102 read more than 4 bytes with i2c bus,
362 * need chop to 4 byte per request
363 */
64fbf444
PB		 364 if ((ven_req->wLength > 4) && ((ven_req->bRequest == 0x4) ||
365 (ven_req->bRequest == 0x5) ||
366 (ven_req->bRequest == 0x6))) {
367 unsend_size = 0;
368 pdata = ven_req->pBuff;
369
370
371 unsend_size = ven_req->wLength;
372
24c80b65 373 /* the first package */
64fbf444
PB		 374 ven_req->wValue = ven_req->wValue & 0xFFFB;
375 ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x2;
24c80b65
MCC		 376 ret = __usb_control_msg(dev, pipe, ven_req->bRequest,
377 ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
64fbf444
PB		 378 ven_req->wValue, ven_req->wIndex, pdata,
379 0x0004, HZ);
380 unsend_size = unsend_size - 4;
64fbf444 381
24c80b65 382 /* the middle package */
64fbf444
PB		 383 ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x42;
384 while (unsend_size - 4 > 0) {
385 pdata = pdata + 4;
24c80b65 386 ret = __usb_control_msg(dev, pipe,
64fbf444 387 ven_req->bRequest,
24c80b65 388 ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
64fbf444
PB		 389 ven_req->wValue, ven_req->wIndex, pdata,
390 0x0004, HZ);
64fbf444
PB		 391 unsend_size = unsend_size - 4;
392 }
393
24c80b65 394 /* the last package */
64fbf444
PB		 395 ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x40;
396 pdata = pdata + 4;
24c80b65
MCC		 397 ret = __usb_control_msg(dev, pipe, ven_req->bRequest,
398 ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
64fbf444
PB		 399 ven_req->wValue, ven_req->wIndex, pdata,
400 unsend_size, HZ);
64fbf444 401 } else {
24c80b65
MCC		 402 ret = __usb_control_msg(dev, pipe, ven_req->bRequest,
403 ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
64fbf444 404 ven_req->wValue, ven_req->wIndex,
24c80b65 405 ven_req->pBuff, ven_req->wLength, HZ);
64fbf444 406 }
e0d3bafd
SD		 407
408 return ret;
409}
410
411/*
412 * cx231xx_write_ctrl_reg()
413 * sends data to the usb device, specifying bRequest
414 */
415int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, char *buf,
84b5dbf3 416 int len)
e0d3bafd 417{
84b5dbf3 418 u8 val = 0;
e0d3bafd
SD		 419 int ret;
420 int pipe = usb_sndctrlpipe(dev->udev, 0);
421
422 if (dev->state & DEV_DISCONNECTED)
423 return -ENODEV;
424
425 if ((len < 1) || (len > URB_MAX_CTRL_SIZE))
426 return -EINVAL;
427
84b5dbf3
MCC		 428 switch (len) {
429 case 1:
430 val = ENABLE_ONE_BYTE;
431 break;
432 case 2:
433 val = ENABLE_TWE_BYTE;
434 break;
435 case 3:
436 val = ENABLE_THREE_BYTE;
437 break;
438 case 4:
439 val = ENABLE_FOUR_BYTE;
440 break;
441 default:
442 val = 0xFF; /* invalid option */
443 }
444
445 if (val == 0xFF)
446 return -EINVAL;
e0d3bafd
SD		 447
448 if (reg_debug) {
449 int byte;
450
451 cx231xx_isocdbg("(pipe 0x%08x): "
b9255176
SD		 452 "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>",
453 pipe,
454 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
455 req, 0, val, reg & 0xff,
456 reg >> 8, len & 0xff, len >> 8);
e0d3bafd
SD		 457
458 for (byte = 0; byte < len; byte++)
459 cx231xx_isocdbg(" %02x", (unsigned char)buf[byte]);
460 cx231xx_isocdbg("\n");
461 }
462
24c80b65 463 ret = __usb_control_msg(dev, pipe, req,
e0d3bafd 464 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
24c80b65 465 val, reg, buf, len, HZ);
e0d3bafd
SD		 466
467 return ret;
468}
469
b9255176
SD		 470/****************************************************************
471* USB Alternate Setting functions *
472*****************************************************************/
e0d3bafd
SD		 473
474int cx231xx_set_video_alternate(struct cx231xx *dev)
475{
476 int errCode, prev_alt = dev->video_mode.alt;
477 unsigned int min_pkt_size = dev->width * 2 + 4;
84b5dbf3 478 u32 usb_interface_index = 0;
e0d3bafd
SD		 479
480 /* When image size is bigger than a certain value,
481 the frame size should be increased, otherwise, only
482 green screen will be received.
483 */
484 if (dev->width * 2 * dev->height > 720 * 240 * 2)
485 min_pkt_size *= 2;
486
84b5dbf3
MCC		 487 if (dev->width > 360) {
488 /* resolutions: 720,704,640 */
489 dev->video_mode.alt = 3;
490 } else if (dev->width > 180) {
491 /* resolutions: 360,352,320,240 */
492 dev->video_mode.alt = 2;
493 } else if (dev->width > 0) {
494 /* resolutions: 180,176,160,128,88 */
495 dev->video_mode.alt = 1;
496 } else {
497 /* Change to alt0 BULK to release USB bandwidth */
498 dev->video_mode.alt = 0;
499 }
500
64fbf444
PB		 501 if (dev->USE_ISO == 0)
502 dev->video_mode.alt = 0;
503
d5a1754d 504 cx231xx_coredbg("dev->video_mode.alt= %d\n", dev->video_mode.alt);
64fbf444 505
84b5dbf3
MCC		 506 /* Get the correct video interface Index */
507 usb_interface_index =
508 dev->current_pcb_config.hs_config_info[0].interface_info.
509 video_index + 1;
e0d3bafd
SD		 510
511 if (dev->video_mode.alt != prev_alt) {
512 cx231xx_coredbg("minimum isoc packet size: %u (alt=%d)\n",
513 min_pkt_size, dev->video_mode.alt);
64fbf444
PB		 514
515 if (dev->video_mode.alt_max_pkt_size != NULL)
516 dev->video_mode.max_pkt_size =
517 dev->video_mode.alt_max_pkt_size[dev->video_mode.alt];
e0d3bafd 518 cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n",
84b5dbf3
MCC		 519 dev->video_mode.alt,
520 dev->video_mode.max_pkt_size);
84b5dbf3
MCC		 521 errCode =
522 usb_set_interface(dev->udev, usb_interface_index,
523 dev->video_mode.alt);
e0d3bafd 524 if (errCode < 0) {
b7085c08
MCC		 525 dev_err(&dev->udev->dev,
526 "cannot change alt number to %d (error=%i)\n",
ed0e3729 527 dev->video_mode.alt, errCode);
e0d3bafd
SD		 528 return errCode;
529 }
530 }
531 return 0;
532}
533
534int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt)
535{
84b5dbf3
MCC		 536 int status = 0;
537 u32 usb_interface_index = 0;
538 u32 max_pkt_size = 0;
539
540 switch (index) {
541 case INDEX_TS1:
542 usb_interface_index =
543 dev->current_pcb_config.hs_config_info[0].interface_info.
544 ts1_index + 1;
64fbf444 545 dev->ts1_mode.alt = alt;
84b5dbf3
MCC		 546 if (dev->ts1_mode.alt_max_pkt_size != NULL)
547 max_pkt_size = dev->ts1_mode.max_pkt_size =
548 dev->ts1_mode.alt_max_pkt_size[dev->ts1_mode.alt];
549 break;
550 case INDEX_TS2:
551 usb_interface_index =
552 dev->current_pcb_config.hs_config_info[0].interface_info.
553 ts2_index + 1;
554 break;
555 case INDEX_AUDIO:
556 usb_interface_index =
557 dev->current_pcb_config.hs_config_info[0].interface_info.
558 audio_index + 1;
559 dev->adev.alt = alt;
560 if (dev->adev.alt_max_pkt_size != NULL)
561 max_pkt_size = dev->adev.max_pkt_size =
562 dev->adev.alt_max_pkt_size[dev->adev.alt];
563 break;
564 case INDEX_VIDEO:
565 usb_interface_index =
566 dev->current_pcb_config.hs_config_info[0].interface_info.
567 video_index + 1;
568 dev->video_mode.alt = alt;
569 if (dev->video_mode.alt_max_pkt_size != NULL)
570 max_pkt_size = dev->video_mode.max_pkt_size =
571 dev->video_mode.alt_max_pkt_size[dev->video_mode.
572 alt];
573 break;
574 case INDEX_VANC:
2f861387
MCC		 575 if (dev->board.no_alt_vanc)
576 return 0;
84b5dbf3
MCC		 577 usb_interface_index =
578 dev->current_pcb_config.hs_config_info[0].interface_info.
579 vanc_index + 1;
580 dev->vbi_mode.alt = alt;
581 if (dev->vbi_mode.alt_max_pkt_size != NULL)
582 max_pkt_size = dev->vbi_mode.max_pkt_size =
583 dev->vbi_mode.alt_max_pkt_size[dev->vbi_mode.alt];
584 break;
585 case INDEX_HANC:
586 usb_interface_index =
587 dev->current_pcb_config.hs_config_info[0].interface_info.
588 hanc_index + 1;
589 dev->sliced_cc_mode.alt = alt;
590 if (dev->sliced_cc_mode.alt_max_pkt_size != NULL)
591 max_pkt_size = dev->sliced_cc_mode.max_pkt_size =
592 dev->sliced_cc_mode.alt_max_pkt_size[dev->
593 sliced_cc_mode.
594 alt];
595 break;
596 default:
597 break;
598 }
599
600 if (alt > 0 && max_pkt_size == 0) {
b7085c08
MCC		 601 dev_err(&dev->udev->dev,
602 "can't change interface %d alt no. to %d: Max. Pkt size = 0\n",
ed0e3729 603 usb_interface_index, alt);
64fbf444
PB		 604 /*To workaround error number=-71 on EP0 for videograbber,
605 need add following codes.*/
2f861387 606 if (dev->board.no_alt_vanc)
64fbf444 607 return -1;
84b5dbf3
MCC		 608 }
609
d5a1754d
DH		 610 cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u,"
611 "Interface = %d\n", alt, max_pkt_size,
612 usb_interface_index);
84b5dbf3
MCC		 613
614 if (usb_interface_index > 0) {
615 status = usb_set_interface(dev->udev, usb_interface_index, alt);
e0d3bafd 616 if (status < 0) {
b7085c08
MCC		 617 dev_err(&dev->udev->dev,
618 "can't change interface %d alt no. to %d (err=%i)\n",
ed0e3729 619 usb_interface_index, alt, status);
e0d3bafd
SD		 620 return status;
621 }
84b5dbf3 622 }
e0d3bafd 623
84b5dbf3 624 return status;
e0d3bafd
SD		 625}
626EXPORT_SYMBOL_GPL(cx231xx_set_alt_setting);
627
628int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio)
629{
630 int rc = 0;
631
632 if (!gpio)
633 return rc;
634
635 /* Send GPIO reset sequences specified at board entry */
636 while (gpio->sleep >= 0) {
84b5dbf3
MCC		 637 rc = cx231xx_set_gpio_value(dev, gpio->bit, gpio->val);
638 if (rc < 0)
639 return rc;
e0d3bafd
SD		 640
641 if (gpio->sleep > 0)
642 msleep(gpio->sleep);
643
644 gpio++;
645 }
646 return rc;
647}
648
64fbf444
PB		 649int cx231xx_demod_reset(struct cx231xx *dev)
650{
651
652 u8 status = 0;
653 u8 value[4] = { 0, 0, 0, 0 };
654
655 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,
656 value, 4);
64fbf444 657
d5a1754d
DH		 658 cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN,
659 value[0], value[1], value[2], value[3]);
660
661 cx231xx_coredbg("Enter cx231xx_demod_reset()\n");
662
64fbf444
PB		 663 value[1] = (u8) 0x3;
664 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
665 PWR_CTL_EN, value, 4);
666 msleep(10);
667
668 value[1] = (u8) 0x0;
669 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
670 PWR_CTL_EN, value, 4);
671 msleep(10);
672
673 value[1] = (u8) 0x3;
674 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
675 PWR_CTL_EN, value, 4);
676 msleep(10);
677
678
679
680 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN,
681 value, 4);
d5a1754d
DH		 682
683 cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN,
684 value[0], value[1], value[2], value[3]);
64fbf444
PB		 685
686 return status;
687}
688EXPORT_SYMBOL_GPL(cx231xx_demod_reset);
689int is_fw_load(struct cx231xx *dev)
690{
691 return cx231xx_check_fw(dev);
692}
693EXPORT_SYMBOL_GPL(is_fw_load);
694
e0d3bafd
SD		 695int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode)
696{
64fbf444
PB		 697 int errCode = 0;
698
e0d3bafd
SD		 699 if (dev->mode == set_mode)
700 return 0;
701
702 if (set_mode == CX231XX_SUSPEND) {
84b5dbf3 703 /* Set the chip in power saving mode */
e0d3bafd
SD		 704 dev->mode = set_mode;
705 }
706
707 /* Resource is locked */
708 if (dev->mode != CX231XX_SUSPEND)
709 return -EINVAL;
710
711 dev->mode = set_mode;
712
64fbf444
PB		 713 if (dev->mode == CX231XX_DIGITAL_MODE)/* Set Digital power mode */ {
714 /* set AGC mode to Digital */
715 switch (dev->model) {
716 case CX231XX_BOARD_CNXT_CARRAERA:
717 case CX231XX_BOARD_CNXT_RDE_250:
718 case CX231XX_BOARD_CNXT_SHELBY:
719 case CX231XX_BOARD_CNXT_RDU_250:
720 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0);
721 break;
722 case CX231XX_BOARD_CNXT_RDE_253S:
723 case CX231XX_BOARD_CNXT_RDU_253S:
b88ba619
DH		 724 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1);
725 break;
1a50fdde 726 case CX231XX_BOARD_HAUPPAUGE_EXETER:
dd2e7dd2 727 case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx:
b88ba619
DH		 728 errCode = cx231xx_set_power_mode(dev,
729 POLARIS_AVMODE_DIGITAL);
64fbf444
PB		 730 break;
731 default:
732 break;
733 }
734 } else/* Set Analog Power mode */ {
735 /* set AGC mode to Analog */
736 switch (dev->model) {
737 case CX231XX_BOARD_CNXT_CARRAERA:
738 case CX231XX_BOARD_CNXT_RDE_250:
739 case CX231XX_BOARD_CNXT_SHELBY:
740 case CX231XX_BOARD_CNXT_RDU_250:
741 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1);
742 break;
743 case CX231XX_BOARD_CNXT_RDE_253S:
744 case CX231XX_BOARD_CNXT_RDU_253S:
1a50fdde 745 case CX231XX_BOARD_HAUPPAUGE_EXETER:
dd2e7dd2 746 case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx:
9417bc6d 747 case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID:
de8ae0d5
PM		 748 case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL:
749 case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC:
64fbf444
PB		 750 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0);
751 break;
752 default:
753 break;
754 }
755 }
b9255176 756
da983503 757 return errCode ? -EINVAL : 0;
e0d3bafd
SD		 758}
759EXPORT_SYMBOL_GPL(cx231xx_set_mode);
760
64fbf444
PB		 761int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size)
762{
763 int errCode = 0;
764 int actlen, ret = -ENOMEM;
765 u32 *buffer;
766
da983503 767 buffer = kzalloc(4096, GFP_KERNEL);
ed0e3729 768 if (buffer == NULL)
64fbf444 769 return -ENOMEM;
64fbf444
PB		 770 memcpy(&buffer[0], firmware, 4096);
771
772 ret = usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, 5),
da983503 773 buffer, 4096, &actlen, 2000);
64fbf444
PB		 774
775 if (ret)
b7085c08
MCC		 776 dev_err(&dev->udev->dev,
777 "bulk message failed: %d (%d/%d)", ret,
778 size, actlen);
64fbf444
PB		 779 else {
780 errCode = actlen != size ? -1 : 0;
781 }
da983503
HV		 782 kfree(buffer);
783 return errCode;
64fbf444
PB		 784}
785
b9255176
SD		 786/*****************************************************************
787* URB Streaming functions *
788******************************************************************/
e0d3bafd
SD		 789
790/*
791 * IRQ callback, called by URB callback
792 */
64fbf444 793static void cx231xx_isoc_irq_callback(struct urb *urb)
e0d3bafd 794{
84b5dbf3
MCC		 795 struct cx231xx_dmaqueue *dma_q = urb->context;
796 struct cx231xx_video_mode *vmode =
797 container_of(dma_q, struct cx231xx_video_mode, vidq);
798 struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode);
da983503 799 int i;
e0d3bafd 800
84b5dbf3
MCC		 801 switch (urb->status) {
802 case 0: /* success */
803 case -ETIMEDOUT: /* NAK */
804 break;
805 case -ECONNRESET: /* kill */
806 case -ENOENT:
807 case -ESHUTDOWN:
808 return;
809 default: /* error */
810 cx231xx_isocdbg("urb completition error %d.\n", urb->status);
811 break;
e0d3bafd
SD		 812 }
813
814 /* Copy data from URB */
815 spin_lock(&dev->video_mode.slock);
da983503 816 dev->video_mode.isoc_ctl.isoc_copy(dev, urb);
e0d3bafd
SD		 817 spin_unlock(&dev->video_mode.slock);
818
819 /* Reset urb buffers */
820 for (i = 0; i < urb->number_of_packets; i++) {
821 urb->iso_frame_desc[i].status = 0;
822 urb->iso_frame_desc[i].actual_length = 0;
823 }
e0d3bafd
SD		 824
825 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
826 if (urb->status) {
827 cx231xx_isocdbg("urb resubmit failed (error=%i)\n",
84b5dbf3 828 urb->status);
e0d3bafd
SD		 829 }
830}
64fbf444
PB		 831/*****************************************************************
832* URB Streaming functions *
833******************************************************************/
834
835/*
836 * IRQ callback, called by URB callback
837 */
838static void cx231xx_bulk_irq_callback(struct urb *urb)
839{
840 struct cx231xx_dmaqueue *dma_q = urb->context;
841 struct cx231xx_video_mode *vmode =
842 container_of(dma_q, struct cx231xx_video_mode, vidq);
843 struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode);
64fbf444
PB		 844
845 switch (urb->status) {
846 case 0: /* success */
847 case -ETIMEDOUT: /* NAK */
848 break;
849 case -ECONNRESET: /* kill */
850 case -ENOENT:
851 case -ESHUTDOWN:
852 return;
853 default: /* error */
854 cx231xx_isocdbg("urb completition error %d.\n", urb->status);
855 break;
856 }
857
858 /* Copy data from URB */
859 spin_lock(&dev->video_mode.slock);
da983503 860 dev->video_mode.bulk_ctl.bulk_copy(dev, urb);
64fbf444 861 spin_unlock(&dev->video_mode.slock);
e0d3bafd 862
64fbf444 863 /* Reset urb buffers */
64fbf444
PB		 864 urb->status = usb_submit_urb(urb, GFP_ATOMIC);
865 if (urb->status) {
866 cx231xx_isocdbg("urb resubmit failed (error=%i)\n",
867 urb->status);
868 }
869}
e0d3bafd
SD		 870/*
871 * Stop and Deallocate URBs
872 */
873void cx231xx_uninit_isoc(struct cx231xx *dev)
874{
64fbf444 875 struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq;
e0d3bafd
SD		 876 struct urb *urb;
877 int i;
878
879 cx231xx_isocdbg("cx231xx: called cx231xx_uninit_isoc\n");
880
881 dev->video_mode.isoc_ctl.nfields = -1;
882 for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) {
883 urb = dev->video_mode.isoc_ctl.urb[i];
884 if (urb) {
84b5dbf3
MCC		 885 if (!irqs_disabled())
886 usb_kill_urb(urb);
887 else
888 usb_unlink_urb(urb);
e0d3bafd
SD		 889
890 if (dev->video_mode.isoc_ctl.transfer_buffer[i]) {
997ea58e
DM		 891 usb_free_coherent(dev->udev,
892 urb->transfer_buffer_length,
893 dev->video_mode.isoc_ctl.
894 transfer_buffer[i],
895 urb->transfer_dma);
e0d3bafd
SD		 896 }
897 usb_free_urb(urb);
898 dev->video_mode.isoc_ctl.urb[i] = NULL;
899 }
900 dev->video_mode.isoc_ctl.transfer_buffer[i] = NULL;
901 }
902
903 kfree(dev->video_mode.isoc_ctl.urb);
904 kfree(dev->video_mode.isoc_ctl.transfer_buffer);
64fbf444 905 kfree(dma_q->p_left_data);
e0d3bafd
SD		 906
907 dev->video_mode.isoc_ctl.urb = NULL;
908 dev->video_mode.isoc_ctl.transfer_buffer = NULL;
909 dev->video_mode.isoc_ctl.num_bufs = 0;
64fbf444
PB		 910 dma_q->p_left_data = NULL;
911
912 if (dev->mode_tv == 0)
913 cx231xx_capture_start(dev, 0, Raw_Video);
914 else
915 cx231xx_capture_start(dev, 0, TS1_serial_mode);
916
e0d3bafd 917
e0d3bafd
SD		 918}
919EXPORT_SYMBOL_GPL(cx231xx_uninit_isoc);
920
64fbf444
PB		 921/*
922 * Stop and Deallocate URBs
923 */
924void cx231xx_uninit_bulk(struct cx231xx *dev)
925{
926 struct urb *urb;
927 int i;
928
929 cx231xx_isocdbg("cx231xx: called cx231xx_uninit_bulk\n");
930
931 dev->video_mode.bulk_ctl.nfields = -1;
932 for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) {
933 urb = dev->video_mode.bulk_ctl.urb[i];
934 if (urb) {
935 if (!irqs_disabled())
936 usb_kill_urb(urb);
937 else
938 usb_unlink_urb(urb);
939
940 if (dev->video_mode.bulk_ctl.transfer_buffer[i]) {
941 usb_free_coherent(dev->udev,
942 urb->transfer_buffer_length,
943 dev->video_mode.isoc_ctl.
944 transfer_buffer[i],
945 urb->transfer_dma);
946 }
947 usb_free_urb(urb);
948 dev->video_mode.bulk_ctl.urb[i] = NULL;
949 }
950 dev->video_mode.bulk_ctl.transfer_buffer[i] = NULL;
951 }
952
953 kfree(dev->video_mode.bulk_ctl.urb);
954 kfree(dev->video_mode.bulk_ctl.transfer_buffer);
955
956 dev->video_mode.bulk_ctl.urb = NULL;
957 dev->video_mode.bulk_ctl.transfer_buffer = NULL;
958 dev->video_mode.bulk_ctl.num_bufs = 0;
959
960 if (dev->mode_tv == 0)
961 cx231xx_capture_start(dev, 0, Raw_Video);
962 else
963 cx231xx_capture_start(dev, 0, TS1_serial_mode);
964
965
966}
967EXPORT_SYMBOL_GPL(cx231xx_uninit_bulk);
968
e0d3bafd
SD		 969/*
970 * Allocate URBs and start IRQ
971 */
972int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
84b5dbf3 973 int num_bufs, int max_pkt_size,
b9255176 974 int (*isoc_copy) (struct cx231xx *dev, struct urb *urb))
e0d3bafd
SD		 975{
976 struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq;
977 int i;
978 int sb_size, pipe;
979 struct urb *urb;
980 int j, k;
981 int rc;
982
e0d3bafd
SD		 983 /* De-allocates all pending stuff */
984 cx231xx_uninit_isoc(dev);
985
64fbf444 986 dma_q->p_left_data = kzalloc(4096, GFP_KERNEL);
ed0e3729 987 if (dma_q->p_left_data == NULL)
64fbf444 988 return -ENOMEM;
64fbf444 989
e0d3bafd
SD		 990 dev->video_mode.isoc_ctl.isoc_copy = isoc_copy;
991 dev->video_mode.isoc_ctl.num_bufs = num_bufs;
84b5dbf3
MCC		 992 dma_q->pos = 0;
993 dma_q->is_partial_line = 0;
994 dma_q->last_sav = 0;
995 dma_q->current_field = -1;
996 dma_q->field1_done = 0;
997 dma_q->lines_per_field = dev->height / 2;
998 dma_q->bytes_left_in_line = dev->width << 1;
999 dma_q->lines_completed = 0;
64fbf444
PB		 1000 dma_q->mpeg_buffer_done = 0;
1001 dma_q->left_data_count = 0;
1002 dma_q->mpeg_buffer_completed = 0;
1003 dma_q->add_ps_package_head = CX231XX_NEED_ADD_PS_PACKAGE_HEAD;
1004 dma_q->ps_head[0] = 0x00;
1005 dma_q->ps_head[1] = 0x00;
1006 dma_q->ps_head[2] = 0x01;
1007 dma_q->ps_head[3] = 0xBA;
84b5dbf3
MCC		 1008 for (i = 0; i < 8; i++)
1009 dma_q->partial_buf[i] = 0;
1010
1011 dev->video_mode.isoc_ctl.urb =
1012 kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL);
e0d3bafd 1013 if (!dev->video_mode.isoc_ctl.urb) {
b7085c08
MCC		 1014 dev_err(&dev->udev->dev,
1015 "cannot alloc memory for usb buffers\n");
e0d3bafd
SD		 1016 return -ENOMEM;
1017 }
1018
84b5dbf3
MCC		 1019 dev->video_mode.isoc_ctl.transfer_buffer =
1020 kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL);
e0d3bafd 1021 if (!dev->video_mode.isoc_ctl.transfer_buffer) {
b7085c08
MCC		 1022 dev_err(&dev->udev->dev,
1023 "cannot allocate memory for usbtransfer\n");
e0d3bafd
SD		 1024 kfree(dev->video_mode.isoc_ctl.urb);
1025 return -ENOMEM;
1026 }
1027
1028 dev->video_mode.isoc_ctl.max_pkt_size = max_pkt_size;
1029 dev->video_mode.isoc_ctl.buf = NULL;
1030
1031 sb_size = max_packets * dev->video_mode.isoc_ctl.max_pkt_size;
1032
64fbf444
PB		 1033 if (dev->mode_tv == 1)
1034 dev->video_mode.end_point_addr = 0x81;
1035 else
1036 dev->video_mode.end_point_addr = 0x84;
1037
1038
e0d3bafd
SD		 1039 /* allocate urbs and transfer buffers */
1040 for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) {
1041 urb = usb_alloc_urb(max_packets, GFP_KERNEL);
1042 if (!urb) {
b7085c08
MCC		 1043 dev_err(&dev->udev->dev,
1044 "cannot alloc isoc_ctl.urb %i\n", i);
e0d3bafd
SD		 1045 cx231xx_uninit_isoc(dev);
1046 return -ENOMEM;
1047 }
1048 dev->video_mode.isoc_ctl.urb[i] = urb;
1049
84b5dbf3 1050 dev->video_mode.isoc_ctl.transfer_buffer[i] =
997ea58e
DM		 1051 usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL,
1052 &urb->transfer_dma);
e0d3bafd 1053 if (!dev->video_mode.isoc_ctl.transfer_buffer[i]) {
b7085c08
MCC		 1054 dev_err(&dev->udev->dev,
1055 "unable to allocate %i bytes for transfer buffer %i%s\n",
ed0e3729
MCC		 1056 sb_size, i,
1057 in_interrupt() ? " while in int" : "");
e0d3bafd
SD		 1058 cx231xx_uninit_isoc(dev);
1059 return -ENOMEM;
1060 }
1061 memset(dev->video_mode.isoc_ctl.transfer_buffer[i], 0, sb_size);
1062
84b5dbf3
MCC		 1063 pipe =
1064 usb_rcvisocpipe(dev->udev, dev->video_mode.end_point_addr);
e0d3bafd
SD		 1065
1066 usb_fill_int_urb(urb, dev->udev, pipe,
84b5dbf3 1067 dev->video_mode.isoc_ctl.transfer_buffer[i],
64fbf444 1068 sb_size, cx231xx_isoc_irq_callback, dma_q, 1);
e0d3bafd
SD		 1069
1070 urb->number_of_packets = max_packets;
7a6f6c29 1071 urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP;
e0d3bafd
SD		 1072
1073 k = 0;
1074 for (j = 0; j < max_packets; j++) {
1075 urb->iso_frame_desc[j].offset = k;
1076 urb->iso_frame_desc[j].length =
84b5dbf3 1077 dev->video_mode.isoc_ctl.max_pkt_size;
e0d3bafd
SD		 1078 k += dev->video_mode.isoc_ctl.max_pkt_size;
1079 }
1080 }
1081
1082 init_waitqueue_head(&dma_q->wq);
1083
e0d3bafd
SD		 1084 /* submit urbs and enables IRQ */
1085 for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) {
84b5dbf3
MCC		 1086 rc = usb_submit_urb(dev->video_mode.isoc_ctl.urb[i],
1087 GFP_ATOMIC);
e0d3bafd 1088 if (rc) {
b7085c08
MCC		 1089 dev_err(&dev->udev->dev,
1090 "submit of urb %i failed (error=%i)\n", i,
ed0e3729 1091 rc);
e0d3bafd
SD		 1092 cx231xx_uninit_isoc(dev);
1093 return rc;
1094 }
1095 }
1096
64fbf444
PB		 1097 if (dev->mode_tv == 0)
1098 cx231xx_capture_start(dev, 1, Raw_Video);
1099 else
1100 cx231xx_capture_start(dev, 1, TS1_serial_mode);
e0d3bafd
SD		 1101
1102 return 0;
1103}
1104EXPORT_SYMBOL_GPL(cx231xx_init_isoc);
1105
64fbf444
PB		 1106/*
1107 * Allocate URBs and start IRQ
1108 */
1109int cx231xx_init_bulk(struct cx231xx *dev, int max_packets,
1110 int num_bufs, int max_pkt_size,
1111 int (*bulk_copy) (struct cx231xx *dev, struct urb *urb))
1112{
1113 struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq;
1114 int i;
1115 int sb_size, pipe;
1116 struct urb *urb;
1117 int rc;
1118
1119 dev->video_input = dev->video_input > 2 ? 2 : dev->video_input;
1120
d5a1754d
DH		 1121 cx231xx_coredbg("Setting Video mux to %d\n", dev->video_input);
1122
64fbf444
PB		 1123 video_mux(dev, dev->video_input);
1124
1125 /* De-allocates all pending stuff */
1126 cx231xx_uninit_bulk(dev);
1127
1128 dev->video_mode.bulk_ctl.bulk_copy = bulk_copy;
1129 dev->video_mode.bulk_ctl.num_bufs = num_bufs;
1130 dma_q->pos = 0;
1131 dma_q->is_partial_line = 0;
1132 dma_q->last_sav = 0;
1133 dma_q->current_field = -1;
1134 dma_q->field1_done = 0;
1135 dma_q->lines_per_field = dev->height / 2;
1136 dma_q->bytes_left_in_line = dev->width << 1;
1137 dma_q->lines_completed = 0;
1138 dma_q->mpeg_buffer_done = 0;
1139 dma_q->left_data_count = 0;
1140 dma_q->mpeg_buffer_completed = 0;
1141 dma_q->ps_head[0] = 0x00;
1142 dma_q->ps_head[1] = 0x00;
1143 dma_q->ps_head[2] = 0x01;
1144 dma_q->ps_head[3] = 0xBA;
1145 for (i = 0; i < 8; i++)
1146 dma_q->partial_buf[i] = 0;
1147
1148 dev->video_mode.bulk_ctl.urb =
1149 kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL);
1150 if (!dev->video_mode.bulk_ctl.urb) {
b7085c08
MCC		 1151 dev_err(&dev->udev->dev,
1152 "cannot alloc memory for usb buffers\n");
64fbf444
PB		 1153 return -ENOMEM;
1154 }
1155
1156 dev->video_mode.bulk_ctl.transfer_buffer =
1157 kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL);
1158 if (!dev->video_mode.bulk_ctl.transfer_buffer) {
b7085c08
MCC		 1159 dev_err(&dev->udev->dev,
1160 "cannot allocate memory for usbtransfer\n");
64fbf444
PB		 1161 kfree(dev->video_mode.bulk_ctl.urb);
1162 return -ENOMEM;
1163 }
1164
1165 dev->video_mode.bulk_ctl.max_pkt_size = max_pkt_size;
1166 dev->video_mode.bulk_ctl.buf = NULL;
1167
1168 sb_size = max_packets * dev->video_mode.bulk_ctl.max_pkt_size;
1169
1170 if (dev->mode_tv == 1)
1171 dev->video_mode.end_point_addr = 0x81;
1172 else
1173 dev->video_mode.end_point_addr = 0x84;
1174
1175
1176 /* allocate urbs and transfer buffers */
1177 for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) {
1178 urb = usb_alloc_urb(0, GFP_KERNEL);
1179 if (!urb) {
b7085c08
MCC		 1180 dev_err(&dev->udev->dev,
1181 "cannot alloc bulk_ctl.urb %i\n", i);
64fbf444
PB		 1182 cx231xx_uninit_bulk(dev);
1183 return -ENOMEM;
1184 }
1185 dev->video_mode.bulk_ctl.urb[i] = urb;
7a6f6c29 1186 urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP;
64fbf444
PB		 1187
1188 dev->video_mode.bulk_ctl.transfer_buffer[i] =
1189 usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL,
1190 &urb->transfer_dma);
1191 if (!dev->video_mode.bulk_ctl.transfer_buffer[i]) {
b7085c08
MCC		 1192 dev_err(&dev->udev->dev,
1193 "unable to allocate %i bytes for transfer buffer %i%s\n",
ed0e3729
MCC		 1194 sb_size, i,
1195 in_interrupt() ? " while in int" : "");
64fbf444
PB		 1196 cx231xx_uninit_bulk(dev);
1197 return -ENOMEM;
1198 }
1199 memset(dev->video_mode.bulk_ctl.transfer_buffer[i], 0, sb_size);
1200
1201 pipe = usb_rcvbulkpipe(dev->udev,
1202 dev->video_mode.end_point_addr);
1203 usb_fill_bulk_urb(urb, dev->udev, pipe,
1204 dev->video_mode.bulk_ctl.transfer_buffer[i],
1205 sb_size, cx231xx_bulk_irq_callback, dma_q);
1206 }
1207
1208 init_waitqueue_head(&dma_q->wq);
1209
1210 /* submit urbs and enables IRQ */
1211 for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) {
1212 rc = usb_submit_urb(dev->video_mode.bulk_ctl.urb[i],
1213 GFP_ATOMIC);
1214 if (rc) {
b7085c08
MCC		 1215 dev_err(&dev->udev->dev,
1216 "submit of urb %i failed (error=%i)\n", i, rc);
64fbf444
PB		 1217 cx231xx_uninit_bulk(dev);
1218 return rc;
1219 }
1220 }
1221
1222 if (dev->mode_tv == 0)
1223 cx231xx_capture_start(dev, 1, Raw_Video);
1224 else
1225 cx231xx_capture_start(dev, 1, TS1_serial_mode);
1226
1227 return 0;
1228}
1229EXPORT_SYMBOL_GPL(cx231xx_init_bulk);
1230void cx231xx_stop_TS1(struct cx231xx *dev)
1231{
64fbf444
PB		 1232 u8 val[4] = { 0, 0, 0, 0 };
1233
da983503
HV		 1234 val[0] = 0x00;
1235 val[1] = 0x03;
1236 val[2] = 0x00;
1237 val[3] = 0x00;
1238 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1239 TS_MODE_REG, val, 4);
1240
1241 val[0] = 0x00;
1242 val[1] = 0x70;
1243 val[2] = 0x04;
1244 val[3] = 0x00;
1245 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1246 TS1_CFG_REG, val, 4);
64fbf444
PB		 1247}
1248/* EXPORT_SYMBOL_GPL(cx231xx_stop_TS1); */
1249void cx231xx_start_TS1(struct cx231xx *dev)
1250{
64fbf444
PB		 1251 u8 val[4] = { 0, 0, 0, 0 };
1252
da983503
HV		 1253 val[0] = 0x03;
1254 val[1] = 0x03;
1255 val[2] = 0x00;
1256 val[3] = 0x00;
1257 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1258 TS_MODE_REG, val, 4);
1259
1260 val[0] = 0x04;
1261 val[1] = 0xA3;
1262 val[2] = 0x3B;
1263 val[3] = 0x00;
1264 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER,
1265 TS1_CFG_REG, val, 4);
64fbf444
PB		 1266}
1267/* EXPORT_SYMBOL_GPL(cx231xx_start_TS1); */
b9255176
SD		 1268/*****************************************************************
1269* Device Init/UnInit functions *
1270******************************************************************/
e0d3bafd
SD		 1271int cx231xx_dev_init(struct cx231xx *dev)
1272{
84b5dbf3 1273 int errCode = 0;
e0d3bafd 1274
84b5dbf3 1275 /* Initialize I2C bus */
e0d3bafd
SD		 1276
1277 /* External Master 1 Bus */
1278 dev->i2c_bus[0].nr = 0;
1279 dev->i2c_bus[0].dev = dev;
1a50fdde 1280 dev->i2c_bus[0].i2c_period = I2C_SPEED_100K; /* 100 KHz */
84b5dbf3
MCC		 1281 dev->i2c_bus[0].i2c_nostop = 0;
1282 dev->i2c_bus[0].i2c_reserve = 0;
e0d3bafd
SD		 1283
1284 /* External Master 2 Bus */
1285 dev->i2c_bus[1].nr = 1;
1286 dev->i2c_bus[1].dev = dev;
1a50fdde 1287 dev->i2c_bus[1].i2c_period = I2C_SPEED_100K; /* 100 KHz */
84b5dbf3
MCC		 1288 dev->i2c_bus[1].i2c_nostop = 0;
1289 dev->i2c_bus[1].i2c_reserve = 0;
e0d3bafd
SD		 1290
1291 /* Internal Master 3 Bus */
1292 dev->i2c_bus[2].nr = 2;
1293 dev->i2c_bus[2].dev = dev;
9ab66912 1294 dev->i2c_bus[2].i2c_period = I2C_SPEED_100K; /* 100kHz */
84b5dbf3
MCC		 1295 dev->i2c_bus[2].i2c_nostop = 0;
1296 dev->i2c_bus[2].i2c_reserve = 0;
e0d3bafd 1297
84b5dbf3 1298 /* register I2C buses */
e0d3bafd
SD		 1299 cx231xx_i2c_register(&dev->i2c_bus[0]);
1300 cx231xx_i2c_register(&dev->i2c_bus[1]);
1301 cx231xx_i2c_register(&dev->i2c_bus[2]);
1302
15c212dd
MS		 1303 cx231xx_i2c_mux_register(dev, 0);
1304 cx231xx_i2c_mux_register(dev, 1);
1305
e4de03f2
MS		 1306 /* scan the real bus segments in the order of physical port numbers */
1307 cx231xx_do_i2c_scan(dev, I2C_0);
1308 cx231xx_do_i2c_scan(dev, I2C_1_MUX_1);
1309 cx231xx_do_i2c_scan(dev, I2C_2);
1310 cx231xx_do_i2c_scan(dev, I2C_1_MUX_3);
1311
84b5dbf3 1312 /* init hardware */
b9255176 1313 /* Note : with out calling set power mode function,
ecc67d10 1314 afe can not be set up correctly */
2f861387 1315 if (dev->board.external_av) {
64fbf444
PB		 1316 errCode = cx231xx_set_power_mode(dev,
1317 POLARIS_AVMODE_ENXTERNAL_AV);
1318 if (errCode < 0) {
b7085c08
MCC		 1319 dev_err(&dev->udev->dev,
1320 "%s: Failed to set Power - errCode [%d]!\n",
ed0e3729 1321 __func__, errCode);
64fbf444
PB		 1322 return errCode;
1323 }
1324 } else {
1325 errCode = cx231xx_set_power_mode(dev,
1326 POLARIS_AVMODE_ANALOGT_TV);
1327 if (errCode < 0) {
b7085c08
MCC		 1328 dev_err(&dev->udev->dev,
1329 "%s: Failed to set Power - errCode [%d]!\n",
ed0e3729 1330 __func__, errCode);
64fbf444
PB		 1331 return errCode;
1332 }
e0d3bafd
SD		 1333 }
1334
2f861387
MCC		 1335 /* reset the Tuner, if it is a Xceive tuner */
1336 if ((dev->board.tuner_type == TUNER_XC5000) ||
1337 (dev->board.tuner_type == TUNER_XC2028))
64fbf444
PB		 1338 cx231xx_gpio_set(dev, dev->board.tuner_gpio);
1339
84b5dbf3 1340 /* initialize Colibri block */
ecc67d10 1341 errCode = cx231xx_afe_init_super_block(dev, 0x23c);
e0d3bafd 1342 if (errCode < 0) {
b7085c08
MCC		 1343 dev_err(&dev->udev->dev,
1344 "%s: cx231xx_afe init super block - errCode [%d]!\n",
ed0e3729 1345 __func__, errCode);
e0d3bafd
SD		 1346 return errCode;
1347 }
ecc67d10 1348 errCode = cx231xx_afe_init_channels(dev);
84b5dbf3 1349 if (errCode < 0) {
b7085c08
MCC		 1350 dev_err(&dev->udev->dev,
1351 "%s: cx231xx_afe init channels - errCode [%d]!\n",
ed0e3729 1352 __func__, errCode);
e0d3bafd
SD		 1353 return errCode;
1354 }
1355
84b5dbf3
MCC		 1356 /* Set DIF in By pass mode */
1357 errCode = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND);
1358 if (errCode < 0) {
b7085c08
MCC		 1359 dev_err(&dev->udev->dev,
1360 "%s: cx231xx_dif set to By pass mode - errCode [%d]!\n",
ed0e3729 1361 __func__, errCode);
e0d3bafd
SD		 1362 return errCode;
1363 }
1364
ecc67d10
SD		 1365 /* I2S block related functions */
1366 errCode = cx231xx_i2s_blk_initialize(dev);
84b5dbf3 1367 if (errCode < 0) {
b7085c08
MCC		 1368 dev_err(&dev->udev->dev,
1369 "%s: cx231xx_i2s block initialize - errCode [%d]!\n",
ed0e3729 1370 __func__, errCode);
e0d3bafd
SD		 1371 return errCode;
1372 }
1373
84b5dbf3
MCC		 1374 /* init control pins */
1375 errCode = cx231xx_init_ctrl_pin_status(dev);
1376 if (errCode < 0) {
b7085c08
MCC		 1377 dev_err(&dev->udev->dev,
1378 "%s: cx231xx_init ctrl pins - errCode [%d]!\n",
ed0e3729 1379 __func__, errCode);
e0d3bafd
SD		 1380 return errCode;
1381 }
1382
84b5dbf3 1383 /* set AGC mode to Analog */
64fbf444
PB		 1384 switch (dev->model) {
1385 case CX231XX_BOARD_CNXT_CARRAERA:
1386 case CX231XX_BOARD_CNXT_RDE_250:
1387 case CX231XX_BOARD_CNXT_SHELBY:
1388 case CX231XX_BOARD_CNXT_RDU_250:
84b5dbf3 1389 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1);
64fbf444
PB		 1390 break;
1391 case CX231XX_BOARD_CNXT_RDE_253S:
1392 case CX231XX_BOARD_CNXT_RDU_253S:
1a50fdde 1393 case CX231XX_BOARD_HAUPPAUGE_EXETER:
dd2e7dd2 1394 case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx:
9417bc6d 1395 case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID:
de8ae0d5
PM		 1396 case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL:
1397 case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC:
64fbf444
PB		 1398 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0);
1399 break;
1400 default:
1401 break;
1402 }
84b5dbf3 1403 if (errCode < 0) {
b7085c08
MCC		 1404 dev_err(&dev->udev->dev,
1405 "%s: cx231xx_AGC mode to Analog - errCode [%d]!\n",
ed0e3729 1406 __func__, errCode);
e0d3bafd
SD		 1407 return errCode;
1408 }
1409
84b5dbf3
MCC		 1410 /* set all alternate settings to zero initially */
1411 cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0);
1412 cx231xx_set_alt_setting(dev, INDEX_VANC, 0);
1413 cx231xx_set_alt_setting(dev, INDEX_HANC, 0);
1414 if (dev->board.has_dvb)
1415 cx231xx_set_alt_setting(dev, INDEX_TS1, 0);
e0d3bafd 1416
660acd54 1417 errCode = 0;
e0d3bafd
SD		 1418 return errCode;
1419}
1420EXPORT_SYMBOL_GPL(cx231xx_dev_init);
1421
1422void cx231xx_dev_uninit(struct cx231xx *dev)
1423{
84b5dbf3 1424 /* Un Initialize I2C bus */
15c212dd
MS		 1425 cx231xx_i2c_mux_unregister(dev, 1);
1426 cx231xx_i2c_mux_unregister(dev, 0);
e0d3bafd
SD		 1427 cx231xx_i2c_unregister(&dev->i2c_bus[2]);
1428 cx231xx_i2c_unregister(&dev->i2c_bus[1]);
1429 cx231xx_i2c_unregister(&dev->i2c_bus[0]);
1430}
84b5dbf3 1431EXPORT_SYMBOL_GPL(cx231xx_dev_uninit);
e0d3bafd 1432
b9255176
SD		 1433/*****************************************************************
1434* G P I O related functions *
1435******************************************************************/
64fbf444 1436int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val,
84b5dbf3 1437 u8 len, u8 request, u8 direction)
e0d3bafd 1438{
84b5dbf3 1439 int status = 0;
b9255176 1440 struct VENDOR_REQUEST_IN ven_req;
84b5dbf3
MCC		 1441
1442 /* Set wValue */
1443 ven_req.wValue = (u16) (gpio_bit >> 16 & 0xffff);
1444
1445 /* set request */
1446 if (!request) {
1447 if (direction)
1448 ven_req.bRequest = VRT_GET_GPIO; /* 0x8 gpio */
1449 else
1450 ven_req.bRequest = VRT_SET_GPIO; /* 0x9 gpio */
1451 } else {
1452 if (direction)
1453 ven_req.bRequest = VRT_GET_GPIE; /* 0xa gpie */
1454 else
1455 ven_req.bRequest = VRT_SET_GPIE; /* 0xb gpie */
1456 }
e0d3bafd 1457
84b5dbf3
MCC		 1458 /* set index value */
1459 ven_req.wIndex = (u16) (gpio_bit & 0xffff);
e0d3bafd 1460
84b5dbf3
MCC		 1461 /* set wLength value */
1462 ven_req.wLength = len;
e0d3bafd 1463
84b5dbf3
MCC		 1464 /* set bData value */
1465 ven_req.bData = 0;
e0d3bafd 1466
84b5dbf3
MCC		 1467 /* set the buffer for read / write */
1468 ven_req.pBuff = gpio_val;
1469
1470 /* set the direction */
1471 if (direction) {
1472 ven_req.direction = USB_DIR_IN;
1473 memset(ven_req.pBuff, 0x00, ven_req.wLength);
1474 } else
1475 ven_req.direction = USB_DIR_OUT;
1476
1477
1478 /* call common vendor command request */
1479 status = cx231xx_send_vendor_cmd(dev, &ven_req);
1480 if (status < 0) {
b7085c08 1481 dev_err(&dev->udev->dev, "%s: failed with status -%d\n",
ed0e3729 1482 __func__, status);
84b5dbf3 1483 }
e0d3bafd 1484
84b5dbf3 1485 return status;
e0d3bafd 1486}
e0d3bafd
SD		 1487EXPORT_SYMBOL_GPL(cx231xx_send_gpio_cmd);
1488
b9255176
SD		 1489/*****************************************************************
1490 * C O N T R O L - Register R E A D / W R I T E functions *
1491 *****************************************************************/
e0d3bafd
SD		 1492int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode)
1493{
84b5dbf3
MCC		 1494 u8 value[4] = { 0x0, 0x0, 0x0, 0x0 };
1495 u32 tmp = 0;
1496 int status = 0;
e0d3bafd 1497
84b5dbf3
MCC		 1498 status =
1499 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, address, value, 4);
1500 if (status < 0)
1501 return status;
e0d3bafd 1502
3f9280a8 1503 tmp = le32_to_cpu(*((__le32 *) value));
84b5dbf3 1504 tmp |= mode;
e0d3bafd 1505
84b5dbf3
MCC		 1506 value[0] = (u8) tmp;
1507 value[1] = (u8) (tmp >> 8);
1508 value[2] = (u8) (tmp >> 16);
1509 value[3] = (u8) (tmp >> 24);
e0d3bafd 1510
84b5dbf3
MCC		 1511 status =
1512 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, address, value, 4);
e0d3bafd 1513
84b5dbf3 1514 return status;
e0d3bafd
SD		 1515}
1516
b9255176
SD		 1517/*****************************************************************
1518 * I 2 C Internal C O N T R O L functions *
1519 *****************************************************************/
64fbf444
PB		 1520int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
1521 u8 saddr_len, u32 *data, u8 data_len, int master)
1522{
1523 int status = 0;
1524 struct cx231xx_i2c_xfer_data req_data;
1525 u8 value[64] = "0";
1526
1527 if (saddr_len == 0)
1528 saddr = 0;
fe041646 1529 else if (saddr_len == 1)
64fbf444
PB		 1530 saddr &= 0xff;
1531
1532 /* prepare xfer_data struct */
1533 req_data.dev_addr = dev_addr >> 1;
1534 req_data.direction = I2C_M_RD;
1535 req_data.saddr_len = saddr_len;
1536 req_data.saddr_dat = saddr;
1537 req_data.buf_size = data_len;
1538 req_data.p_buffer = (u8 *) value;
1539
1540 /* usb send command */
1541 if (master == 0)
1542 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0],
1543 &req_data);
1544 else if (master == 1)
1545 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1],
1546 &req_data);
1547 else if (master == 2)
1548 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2],
1549 &req_data);
1550
1551 if (status >= 0) {
1552 /* Copy the data read back to main buffer */
1553 if (data_len == 1)
1554 *data = value[0];
1555 else if (data_len == 4)
1556 *data =
1557 value[0] | value[1] << 8 | value[2] << 16 | value[3]
1558 << 24;
1559 else if (data_len > 4)
1560 *data = value[saddr];
1561 }
1562
1563 return status;
1564}
1565
1566int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
1567 u8 saddr_len, u32 data, u8 data_len, int master)
1568{
1569 int status = 0;
1570 u8 value[4] = { 0, 0, 0, 0 };
1571 struct cx231xx_i2c_xfer_data req_data;
1572
1573 value[0] = (u8) data;
1574 value[1] = (u8) (data >> 8);
1575 value[2] = (u8) (data >> 16);
1576 value[3] = (u8) (data >> 24);
1577
1578 if (saddr_len == 0)
1579 saddr = 0;
fe041646 1580 else if (saddr_len == 1)
64fbf444
PB		 1581 saddr &= 0xff;
1582
1583 /* prepare xfer_data struct */
1584 req_data.dev_addr = dev_addr >> 1;
1585 req_data.direction = 0;
1586 req_data.saddr_len = saddr_len;
1587 req_data.saddr_dat = saddr;
1588 req_data.buf_size = data_len;
1589 req_data.p_buffer = value;
1590
1591 /* usb send command */
1592 if (master == 0)
1593 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0],
1594 &req_data);
1595 else if (master == 1)
1596 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1],
1597 &req_data);
1598 else if (master == 2)
1599 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2],
1600 &req_data);
1601
1602 return status;
1603}
1604
e0d3bafd 1605int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr,
b9255176 1606 u8 saddr_len, u32 *data, u8 data_len)
e0d3bafd 1607{
84b5dbf3
MCC		 1608 int status = 0;
1609 struct cx231xx_i2c_xfer_data req_data;
1610 u8 value[4] = { 0, 0, 0, 0 };
1611
1612 if (saddr_len == 0)
1613 saddr = 0;
fe041646 1614 else if (saddr_len == 1)
84b5dbf3
MCC		 1615 saddr &= 0xff;
1616
1617 /* prepare xfer_data struct */
1618 req_data.dev_addr = dev_addr >> 1;
1619 req_data.direction = I2C_M_RD;
1620 req_data.saddr_len = saddr_len;
1621 req_data.saddr_dat = saddr;
1622 req_data.buf_size = data_len;
1623 req_data.p_buffer = (u8 *) value;
1624
1625 /* usb send command */
1626 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data);
1627
1628 if (status >= 0) {
1629 /* Copy the data read back to main buffer */
1630 if (data_len == 1)
1631 *data = value[0];
1632 else
1633 *data =
1634 value[0] | value[1] << 8 | value[2] << 16 | value[3]
1635 << 24;
1636 }
1637
1638 return status;
e0d3bafd
SD		 1639}
1640
1641int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr,
84b5dbf3 1642 u8 saddr_len, u32 data, u8 data_len)
e0d3bafd 1643{
84b5dbf3
MCC		 1644 int status = 0;
1645 u8 value[4] = { 0, 0, 0, 0 };
1646 struct cx231xx_i2c_xfer_data req_data;
1647
1648 value[0] = (u8) data;
1649 value[1] = (u8) (data >> 8);
1650 value[2] = (u8) (data >> 16);
1651 value[3] = (u8) (data >> 24);
1652
1653 if (saddr_len == 0)
1654 saddr = 0;
fe041646 1655 else if (saddr_len == 1)
84b5dbf3
MCC		 1656 saddr &= 0xff;
1657
1658 /* prepare xfer_data struct */
1659 req_data.dev_addr = dev_addr >> 1;
1660 req_data.direction = 0;
1661 req_data.saddr_len = saddr_len;
1662 req_data.saddr_dat = saddr;
1663 req_data.buf_size = data_len;
1664 req_data.p_buffer = value;
1665
1666 /* usb send command */
1667 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data);
1668
1669 return status;
e0d3bafd
SD		 1670}
1671
84b5dbf3
MCC		 1672int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size,
1673 u16 register_address, u8 bit_start, u8 bit_end,
1674 u32 value)
e0d3bafd 1675{
84b5dbf3
MCC		 1676 int status = 0;
1677 u32 tmp;
1678 u32 mask = 0;
1679 int i;
1680
b9255176 1681 if (bit_start > (size - 1) || bit_end > (size - 1))
84b5dbf3 1682 return -1;
e0d3bafd 1683
84b5dbf3
MCC		 1684 if (size == 8) {
1685 status =
1686 cx231xx_read_i2c_data(dev, dev_addr, register_address, 2,
1687 &tmp, 1);
1688 } else {
1689 status =
1690 cx231xx_read_i2c_data(dev, dev_addr, register_address, 2,
1691 &tmp, 4);
1692 }
e0d3bafd 1693
b9255176 1694 if (status < 0)
84b5dbf3 1695 return status;
84b5dbf3
MCC		 1696
1697 mask = 1 << bit_end;
b9255176 1698 for (i = bit_end; i > bit_start && i > 0; i--)
84b5dbf3 1699 mask = mask + (1 << (i - 1));
84b5dbf3
MCC		 1700
1701 value <<= bit_start;
1702
1703 if (size == 8) {
1704 tmp &= ~mask;
1705 tmp |= value;
1706 tmp &= 0xff;
1707 status =
1708 cx231xx_write_i2c_data(dev, dev_addr, register_address, 2,
1709 tmp, 1);
1710 } else {
1711 tmp &= ~mask;
1712 tmp |= value;
1713 status =
1714 cx231xx_write_i2c_data(dev, dev_addr, register_address, 2,
1715 tmp, 4);
1716 }
1717
1718 return status;
1719}
e0d3bafd
SD		 1720
1721int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr,
84b5dbf3 1722 u16 saddr, u32 mask, u32 value)
e0d3bafd 1723{
84b5dbf3
MCC		 1724 u32 temp;
1725 int status = 0;
e0d3bafd 1726
84b5dbf3 1727 status = cx231xx_read_i2c_data(dev, dev_addr, saddr, 2, &temp, 4);
e0d3bafd 1728
84b5dbf3
MCC		 1729 if (status < 0)
1730 return status;
e0d3bafd 1731
84b5dbf3
MCC		 1732 temp &= ~mask;
1733 temp |= value;
e0d3bafd 1734
84b5dbf3 1735 status = cx231xx_write_i2c_data(dev, dev_addr, saddr, 2, temp, 4);
e0d3bafd 1736
84b5dbf3 1737 return status;
e0d3bafd
SD		 1738}
1739
1740u32 cx231xx_set_field(u32 field_mask, u32 data)
1741{
84b5dbf3 1742 u32 temp;
e0d3bafd 1743
b9255176 1744 for (temp = field_mask; (temp & 1) == 0; temp >>= 1)
84b5dbf3 1745 data <<= 1;
e0d3bafd 1746
84b5dbf3 1747 return data;
e0d3bafd 1748}
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