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Commit | Line | Data |
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e0d3bafd | 1 | /* |
b9255176 SD |
2 | cx231xx-core.c - driver for Conexant Cx23100/101/102 |
3 | USB video capture devices | |
e0d3bafd SD |
4 | |
5 | Copyright (C) 2008 <srinivasa.deevi at conexant dot com> | |
b9255176 | 6 | Based on em28xx driver |
e0d3bafd SD |
7 | |
8 | This program is free software; you can redistribute it and/or modify | |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
589dadf2 | 23 | #include "cx231xx.h" |
e0d3bafd SD |
24 | #include <linux/init.h> |
25 | #include <linux/list.h> | |
26 | #include <linux/module.h> | |
5a0e3ad6 | 27 | #include <linux/slab.h> |
e0d3bafd SD |
28 | #include <linux/vmalloc.h> |
29 | #include <media/v4l2-common.h> | |
64fbf444 | 30 | #include <media/tuner.h> |
e0d3bafd | 31 | |
e0d3bafd SD |
32 | #include "cx231xx-reg.h" |
33 | ||
34 | /* #define ENABLE_DEBUG_ISOC_FRAMES */ | |
35 | ||
36 | static unsigned int core_debug; | |
84b5dbf3 MCC |
37 | module_param(core_debug, int, 0644); |
38 | MODULE_PARM_DESC(core_debug, "enable debug messages [core]"); | |
e0d3bafd SD |
39 | |
40 | #define cx231xx_coredbg(fmt, arg...) do {\ | |
41 | if (core_debug) \ | |
42 | printk(KERN_INFO "%s %s :"fmt, \ | |
43 | dev->name, __func__ , ##arg); } while (0) | |
44 | ||
45 | static unsigned int reg_debug; | |
84b5dbf3 MCC |
46 | module_param(reg_debug, int, 0644); |
47 | MODULE_PARM_DESC(reg_debug, "enable debug messages [URB reg]"); | |
e0d3bafd | 48 | |
e0d3bafd SD |
49 | static int alt = CX231XX_PINOUT; |
50 | module_param(alt, int, 0644); | |
51 | MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint"); | |
52 | ||
e0d3bafd SD |
53 | #define cx231xx_isocdbg(fmt, arg...) do {\ |
54 | if (core_debug) \ | |
55 | printk(KERN_INFO "%s %s :"fmt, \ | |
56 | dev->name, __func__ , ##arg); } while (0) | |
57 | ||
b9255176 SD |
58 | /***************************************************************** |
59 | * Device control list functions * | |
60 | ******************************************************************/ | |
e0d3bafd | 61 | |
64fbf444 | 62 | LIST_HEAD(cx231xx_devlist); |
e0d3bafd SD |
63 | static DEFINE_MUTEX(cx231xx_devlist_mutex); |
64 | ||
e0d3bafd SD |
65 | /* |
66 | * cx231xx_realease_resources() | |
67 | * unregisters the v4l2,i2c and usb devices | |
68 | * called when the device gets disconected or at module unload | |
69 | */ | |
70 | void cx231xx_remove_from_devlist(struct cx231xx *dev) | |
71 | { | |
64fbf444 PB |
72 | if (dev == NULL) |
73 | return; | |
74 | if (dev->udev == NULL) | |
75 | return; | |
76 | ||
77 | if (atomic_read(&dev->devlist_count) > 0) { | |
78 | mutex_lock(&cx231xx_devlist_mutex); | |
79 | list_del(&dev->devlist); | |
80 | atomic_dec(&dev->devlist_count); | |
81 | mutex_unlock(&cx231xx_devlist_mutex); | |
82 | } | |
e0d3bafd SD |
83 | }; |
84 | ||
85 | void cx231xx_add_into_devlist(struct cx231xx *dev) | |
86 | { | |
87 | mutex_lock(&cx231xx_devlist_mutex); | |
88 | list_add_tail(&dev->devlist, &cx231xx_devlist); | |
64fbf444 | 89 | atomic_inc(&dev->devlist_count); |
e0d3bafd SD |
90 | mutex_unlock(&cx231xx_devlist_mutex); |
91 | }; | |
92 | ||
e0d3bafd | 93 | static LIST_HEAD(cx231xx_extension_devlist); |
e0d3bafd SD |
94 | |
95 | int cx231xx_register_extension(struct cx231xx_ops *ops) | |
96 | { | |
97 | struct cx231xx *dev = NULL; | |
98 | ||
99 | mutex_lock(&cx231xx_devlist_mutex); | |
e0d3bafd | 100 | list_add_tail(&ops->next, &cx231xx_extension_devlist); |
fb1817e4 | 101 | list_for_each_entry(dev, &cx231xx_devlist, devlist) { |
a9fac6b1 | 102 | ops->init(dev); |
336fea92 | 103 | dev_info(dev->dev, "%s initialized\n", ops->name); |
fb1817e4 | 104 | } |
e0d3bafd SD |
105 | mutex_unlock(&cx231xx_devlist_mutex); |
106 | return 0; | |
107 | } | |
108 | EXPORT_SYMBOL(cx231xx_register_extension); | |
109 | ||
110 | void cx231xx_unregister_extension(struct cx231xx_ops *ops) | |
111 | { | |
112 | struct cx231xx *dev = NULL; | |
113 | ||
114 | mutex_lock(&cx231xx_devlist_mutex); | |
fb1817e4 | 115 | list_for_each_entry(dev, &cx231xx_devlist, devlist) { |
a9fac6b1 | 116 | ops->fini(dev); |
336fea92 | 117 | dev_info(dev->dev, "%s removed\n", ops->name); |
fb1817e4 | 118 | } |
e0d3bafd | 119 | |
e0d3bafd | 120 | list_del(&ops->next); |
e0d3bafd SD |
121 | mutex_unlock(&cx231xx_devlist_mutex); |
122 | } | |
84b5dbf3 | 123 | EXPORT_SYMBOL(cx231xx_unregister_extension); |
e0d3bafd SD |
124 | |
125 | void cx231xx_init_extension(struct cx231xx *dev) | |
126 | { | |
127 | struct cx231xx_ops *ops = NULL; | |
128 | ||
761f6cf6 | 129 | mutex_lock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
130 | if (!list_empty(&cx231xx_extension_devlist)) { |
131 | list_for_each_entry(ops, &cx231xx_extension_devlist, next) { | |
132 | if (ops->init) | |
133 | ops->init(dev); | |
134 | } | |
135 | } | |
761f6cf6 | 136 | mutex_unlock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
137 | } |
138 | ||
139 | void cx231xx_close_extension(struct cx231xx *dev) | |
140 | { | |
141 | struct cx231xx_ops *ops = NULL; | |
142 | ||
761f6cf6 | 143 | mutex_lock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
144 | if (!list_empty(&cx231xx_extension_devlist)) { |
145 | list_for_each_entry(ops, &cx231xx_extension_devlist, next) { | |
146 | if (ops->fini) | |
147 | ops->fini(dev); | |
148 | } | |
149 | } | |
761f6cf6 | 150 | mutex_unlock(&cx231xx_devlist_mutex); |
e0d3bafd SD |
151 | } |
152 | ||
b9255176 SD |
153 | /**************************************************************** |
154 | * U S B related functions * | |
155 | *****************************************************************/ | |
e0d3bafd | 156 | int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus, |
84b5dbf3 | 157 | struct cx231xx_i2c_xfer_data *req_data) |
e0d3bafd | 158 | { |
84b5dbf3 MCC |
159 | int status = 0; |
160 | struct cx231xx *dev = i2c_bus->dev; | |
b9255176 | 161 | struct VENDOR_REQUEST_IN ven_req; |
84b5dbf3 MCC |
162 | |
163 | u8 saddr_len = 0; | |
164 | u8 _i2c_period = 0; | |
165 | u8 _i2c_nostop = 0; | |
166 | u8 _i2c_reserve = 0; | |
167 | ||
7528cd27 MCC |
168 | if (dev->state & DEV_DISCONNECTED) |
169 | return -ENODEV; | |
170 | ||
84b5dbf3 MCC |
171 | /* Get the I2C period, nostop and reserve parameters */ |
172 | _i2c_period = i2c_bus->i2c_period; | |
173 | _i2c_nostop = i2c_bus->i2c_nostop; | |
174 | _i2c_reserve = i2c_bus->i2c_reserve; | |
175 | ||
176 | saddr_len = req_data->saddr_len; | |
177 | ||
178 | /* Set wValue */ | |
9713883b NMG |
179 | ven_req.wValue = (req_data->dev_addr << 9 | _i2c_period << 4 | |
180 | saddr_len << 2 | _i2c_nostop << 1 | I2C_SYNC | | |
181 | _i2c_reserve << 6); | |
84b5dbf3 MCC |
182 | |
183 | /* set channel number */ | |
b9255176 SD |
184 | if (req_data->direction & I2C_M_RD) { |
185 | /* channel number, for read,spec required channel_num +4 */ | |
186 | ven_req.bRequest = i2c_bus->nr + 4; | |
187 | } else | |
84b5dbf3 MCC |
188 | ven_req.bRequest = i2c_bus->nr; /* channel number, */ |
189 | ||
190 | /* set index value */ | |
191 | switch (saddr_len) { | |
192 | case 0: | |
193 | ven_req.wIndex = 0; /* need check */ | |
194 | break; | |
195 | case 1: | |
196 | ven_req.wIndex = (req_data->saddr_dat & 0xff); | |
197 | break; | |
198 | case 2: | |
199 | ven_req.wIndex = req_data->saddr_dat; | |
200 | break; | |
201 | } | |
202 | ||
203 | /* set wLength value */ | |
204 | ven_req.wLength = req_data->buf_size; | |
205 | ||
206 | /* set bData value */ | |
207 | ven_req.bData = 0; | |
208 | ||
209 | /* set the direction */ | |
210 | if (req_data->direction) { | |
211 | ven_req.direction = USB_DIR_IN; | |
212 | memset(req_data->p_buffer, 0x00, ven_req.wLength); | |
213 | } else | |
214 | ven_req.direction = USB_DIR_OUT; | |
215 | ||
216 | /* set the buffer for read / write */ | |
217 | ven_req.pBuff = req_data->p_buffer; | |
218 | ||
219 | ||
220 | /* call common vendor command request */ | |
221 | status = cx231xx_send_vendor_cmd(dev, &ven_req); | |
77e97ba2 | 222 | if (status < 0 && !dev->i2c_scan_running) { |
336fea92 | 223 | dev_err(dev->dev, "%s: failed with status -%d\n", |
ed0e3729 | 224 | __func__, status); |
84b5dbf3 MCC |
225 | } |
226 | ||
227 | return status; | |
e0d3bafd | 228 | } |
e0d3bafd | 229 | EXPORT_SYMBOL_GPL(cx231xx_send_usb_command); |
b9255176 | 230 | |
24c80b65 MCC |
231 | /* |
232 | * Sends/Receives URB control messages, assuring to use a kalloced buffer | |
233 | * for all operations (dev->urb_buf), to avoid using stacked buffers, as | |
234 | * they aren't safe for usage with USB, due to DMA restrictions. | |
235 | * Also implements the debug code for control URB's. | |
236 | */ | |
237 | static int __usb_control_msg(struct cx231xx *dev, unsigned int pipe, | |
238 | __u8 request, __u8 requesttype, __u16 value, __u16 index, | |
239 | void *data, __u16 size, int timeout) | |
240 | { | |
241 | int rc, i; | |
242 | ||
243 | if (reg_debug) { | |
244 | printk(KERN_DEBUG "%s: (pipe 0x%08x): " | |
245 | "%s: %02x %02x %02x %02x %02x %02x %02x %02x ", | |
246 | dev->name, | |
247 | pipe, | |
248 | (requesttype & USB_DIR_IN) ? "IN" : "OUT", | |
249 | requesttype, | |
250 | request, | |
251 | value & 0xff, value >> 8, | |
252 | index & 0xff, index >> 8, | |
253 | size & 0xff, size >> 8); | |
254 | if (!(requesttype & USB_DIR_IN)) { | |
255 | printk(KERN_CONT ">>>"); | |
256 | for (i = 0; i < size; i++) | |
257 | printk(KERN_CONT " %02x", | |
258 | ((unsigned char *)data)[i]); | |
259 | } | |
260 | } | |
261 | ||
262 | /* Do the real call to usb_control_msg */ | |
263 | mutex_lock(&dev->ctrl_urb_lock); | |
264 | if (!(requesttype & USB_DIR_IN) && size) | |
265 | memcpy(dev->urb_buf, data, size); | |
266 | rc = usb_control_msg(dev->udev, pipe, request, requesttype, value, | |
267 | index, dev->urb_buf, size, timeout); | |
268 | if ((requesttype & USB_DIR_IN) && size) | |
269 | memcpy(data, dev->urb_buf, size); | |
270 | mutex_unlock(&dev->ctrl_urb_lock); | |
271 | ||
272 | if (reg_debug) { | |
273 | if (unlikely(rc < 0)) { | |
274 | printk(KERN_CONT "FAILED!\n"); | |
275 | return rc; | |
276 | } | |
277 | ||
278 | if ((requesttype & USB_DIR_IN)) { | |
279 | printk(KERN_CONT "<<<"); | |
280 | for (i = 0; i < size; i++) | |
281 | printk(KERN_CONT " %02x", | |
282 | ((unsigned char *)data)[i]); | |
283 | } | |
284 | printk(KERN_CONT "\n"); | |
285 | } | |
286 | ||
287 | return rc; | |
288 | } | |
289 | ||
290 | ||
e0d3bafd SD |
291 | /* |
292 | * cx231xx_read_ctrl_reg() | |
293 | * reads data from the usb device specifying bRequest and wValue | |
294 | */ | |
295 | int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, | |
84b5dbf3 | 296 | char *buf, int len) |
e0d3bafd | 297 | { |
84b5dbf3 | 298 | u8 val = 0; |
e0d3bafd SD |
299 | int ret; |
300 | int pipe = usb_rcvctrlpipe(dev->udev, 0); | |
301 | ||
302 | if (dev->state & DEV_DISCONNECTED) | |
303 | return -ENODEV; | |
304 | ||
305 | if (len > URB_MAX_CTRL_SIZE) | |
306 | return -EINVAL; | |
307 | ||
84b5dbf3 MCC |
308 | switch (len) { |
309 | case 1: | |
310 | val = ENABLE_ONE_BYTE; | |
311 | break; | |
312 | case 2: | |
313 | val = ENABLE_TWE_BYTE; | |
314 | break; | |
315 | case 3: | |
316 | val = ENABLE_THREE_BYTE; | |
317 | break; | |
318 | case 4: | |
319 | val = ENABLE_FOUR_BYTE; | |
320 | break; | |
321 | default: | |
322 | val = 0xFF; /* invalid option */ | |
323 | } | |
324 | ||
325 | if (val == 0xFF) | |
326 | return -EINVAL; | |
e0d3bafd | 327 | |
24c80b65 | 328 | ret = __usb_control_msg(dev, pipe, req, |
e0d3bafd | 329 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
24c80b65 | 330 | val, reg, buf, len, HZ); |
e0d3bafd SD |
331 | return ret; |
332 | } | |
333 | ||
b9255176 SD |
334 | int cx231xx_send_vendor_cmd(struct cx231xx *dev, |
335 | struct VENDOR_REQUEST_IN *ven_req) | |
e0d3bafd | 336 | { |
84b5dbf3 | 337 | int ret; |
e0d3bafd | 338 | int pipe = 0; |
64fbf444 PB |
339 | int unsend_size = 0; |
340 | u8 *pdata; | |
e0d3bafd SD |
341 | |
342 | if (dev->state & DEV_DISCONNECTED) | |
343 | return -ENODEV; | |
344 | ||
345 | if ((ven_req->wLength > URB_MAX_CTRL_SIZE)) | |
346 | return -EINVAL; | |
347 | ||
84b5dbf3 MCC |
348 | if (ven_req->direction) |
349 | pipe = usb_rcvctrlpipe(dev->udev, 0); | |
350 | else | |
351 | pipe = usb_sndctrlpipe(dev->udev, 0); | |
e0d3bafd | 352 | |
24c80b65 MCC |
353 | /* |
354 | * If the cx23102 read more than 4 bytes with i2c bus, | |
355 | * need chop to 4 byte per request | |
356 | */ | |
64fbf444 PB |
357 | if ((ven_req->wLength > 4) && ((ven_req->bRequest == 0x4) || |
358 | (ven_req->bRequest == 0x5) || | |
359 | (ven_req->bRequest == 0x6))) { | |
360 | unsend_size = 0; | |
361 | pdata = ven_req->pBuff; | |
362 | ||
363 | ||
364 | unsend_size = ven_req->wLength; | |
365 | ||
24c80b65 | 366 | /* the first package */ |
64fbf444 PB |
367 | ven_req->wValue = ven_req->wValue & 0xFFFB; |
368 | ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x2; | |
24c80b65 MCC |
369 | ret = __usb_control_msg(dev, pipe, ven_req->bRequest, |
370 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
64fbf444 PB |
371 | ven_req->wValue, ven_req->wIndex, pdata, |
372 | 0x0004, HZ); | |
373 | unsend_size = unsend_size - 4; | |
64fbf444 | 374 | |
24c80b65 | 375 | /* the middle package */ |
64fbf444 PB |
376 | ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x42; |
377 | while (unsend_size - 4 > 0) { | |
378 | pdata = pdata + 4; | |
24c80b65 | 379 | ret = __usb_control_msg(dev, pipe, |
64fbf444 | 380 | ven_req->bRequest, |
24c80b65 | 381 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
64fbf444 PB |
382 | ven_req->wValue, ven_req->wIndex, pdata, |
383 | 0x0004, HZ); | |
64fbf444 PB |
384 | unsend_size = unsend_size - 4; |
385 | } | |
386 | ||
24c80b65 | 387 | /* the last package */ |
64fbf444 PB |
388 | ven_req->wValue = (ven_req->wValue & 0xFFBD) | 0x40; |
389 | pdata = pdata + 4; | |
24c80b65 MCC |
390 | ret = __usb_control_msg(dev, pipe, ven_req->bRequest, |
391 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
64fbf444 PB |
392 | ven_req->wValue, ven_req->wIndex, pdata, |
393 | unsend_size, HZ); | |
64fbf444 | 394 | } else { |
24c80b65 MCC |
395 | ret = __usb_control_msg(dev, pipe, ven_req->bRequest, |
396 | ven_req->direction | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
64fbf444 | 397 | ven_req->wValue, ven_req->wIndex, |
24c80b65 | 398 | ven_req->pBuff, ven_req->wLength, HZ); |
64fbf444 | 399 | } |
e0d3bafd SD |
400 | |
401 | return ret; | |
402 | } | |
403 | ||
404 | /* | |
405 | * cx231xx_write_ctrl_reg() | |
406 | * sends data to the usb device, specifying bRequest | |
407 | */ | |
408 | int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, char *buf, | |
84b5dbf3 | 409 | int len) |
e0d3bafd | 410 | { |
84b5dbf3 | 411 | u8 val = 0; |
e0d3bafd SD |
412 | int ret; |
413 | int pipe = usb_sndctrlpipe(dev->udev, 0); | |
414 | ||
415 | if (dev->state & DEV_DISCONNECTED) | |
416 | return -ENODEV; | |
417 | ||
418 | if ((len < 1) || (len > URB_MAX_CTRL_SIZE)) | |
419 | return -EINVAL; | |
420 | ||
84b5dbf3 MCC |
421 | switch (len) { |
422 | case 1: | |
423 | val = ENABLE_ONE_BYTE; | |
424 | break; | |
425 | case 2: | |
426 | val = ENABLE_TWE_BYTE; | |
427 | break; | |
428 | case 3: | |
429 | val = ENABLE_THREE_BYTE; | |
430 | break; | |
431 | case 4: | |
432 | val = ENABLE_FOUR_BYTE; | |
433 | break; | |
434 | default: | |
435 | val = 0xFF; /* invalid option */ | |
436 | } | |
437 | ||
438 | if (val == 0xFF) | |
439 | return -EINVAL; | |
e0d3bafd SD |
440 | |
441 | if (reg_debug) { | |
442 | int byte; | |
443 | ||
444 | cx231xx_isocdbg("(pipe 0x%08x): " | |
b9255176 SD |
445 | "OUT: %02x %02x %02x %02x %02x %02x %02x %02x >>>", |
446 | pipe, | |
447 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
448 | req, 0, val, reg & 0xff, | |
449 | reg >> 8, len & 0xff, len >> 8); | |
e0d3bafd SD |
450 | |
451 | for (byte = 0; byte < len; byte++) | |
452 | cx231xx_isocdbg(" %02x", (unsigned char)buf[byte]); | |
453 | cx231xx_isocdbg("\n"); | |
454 | } | |
455 | ||
24c80b65 | 456 | ret = __usb_control_msg(dev, pipe, req, |
e0d3bafd | 457 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, |
24c80b65 | 458 | val, reg, buf, len, HZ); |
e0d3bafd SD |
459 | |
460 | return ret; | |
461 | } | |
462 | ||
b9255176 SD |
463 | /**************************************************************** |
464 | * USB Alternate Setting functions * | |
465 | *****************************************************************/ | |
e0d3bafd SD |
466 | |
467 | int cx231xx_set_video_alternate(struct cx231xx *dev) | |
468 | { | |
469 | int errCode, prev_alt = dev->video_mode.alt; | |
470 | unsigned int min_pkt_size = dev->width * 2 + 4; | |
84b5dbf3 | 471 | u32 usb_interface_index = 0; |
e0d3bafd SD |
472 | |
473 | /* When image size is bigger than a certain value, | |
474 | the frame size should be increased, otherwise, only | |
475 | green screen will be received. | |
476 | */ | |
477 | if (dev->width * 2 * dev->height > 720 * 240 * 2) | |
478 | min_pkt_size *= 2; | |
479 | ||
84b5dbf3 MCC |
480 | if (dev->width > 360) { |
481 | /* resolutions: 720,704,640 */ | |
482 | dev->video_mode.alt = 3; | |
483 | } else if (dev->width > 180) { | |
484 | /* resolutions: 360,352,320,240 */ | |
485 | dev->video_mode.alt = 2; | |
486 | } else if (dev->width > 0) { | |
487 | /* resolutions: 180,176,160,128,88 */ | |
488 | dev->video_mode.alt = 1; | |
489 | } else { | |
490 | /* Change to alt0 BULK to release USB bandwidth */ | |
491 | dev->video_mode.alt = 0; | |
492 | } | |
493 | ||
64fbf444 PB |
494 | if (dev->USE_ISO == 0) |
495 | dev->video_mode.alt = 0; | |
496 | ||
d5a1754d | 497 | cx231xx_coredbg("dev->video_mode.alt= %d\n", dev->video_mode.alt); |
64fbf444 | 498 | |
84b5dbf3 MCC |
499 | /* Get the correct video interface Index */ |
500 | usb_interface_index = | |
501 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
502 | video_index + 1; | |
e0d3bafd SD |
503 | |
504 | if (dev->video_mode.alt != prev_alt) { | |
505 | cx231xx_coredbg("minimum isoc packet size: %u (alt=%d)\n", | |
506 | min_pkt_size, dev->video_mode.alt); | |
64fbf444 PB |
507 | |
508 | if (dev->video_mode.alt_max_pkt_size != NULL) | |
509 | dev->video_mode.max_pkt_size = | |
510 | dev->video_mode.alt_max_pkt_size[dev->video_mode.alt]; | |
e0d3bafd | 511 | cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n", |
84b5dbf3 MCC |
512 | dev->video_mode.alt, |
513 | dev->video_mode.max_pkt_size); | |
84b5dbf3 MCC |
514 | errCode = |
515 | usb_set_interface(dev->udev, usb_interface_index, | |
516 | dev->video_mode.alt); | |
e0d3bafd | 517 | if (errCode < 0) { |
336fea92 | 518 | dev_err(dev->dev, |
b7085c08 | 519 | "cannot change alt number to %d (error=%i)\n", |
ed0e3729 | 520 | dev->video_mode.alt, errCode); |
e0d3bafd SD |
521 | return errCode; |
522 | } | |
523 | } | |
524 | return 0; | |
525 | } | |
526 | ||
527 | int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt) | |
528 | { | |
84b5dbf3 MCC |
529 | int status = 0; |
530 | u32 usb_interface_index = 0; | |
531 | u32 max_pkt_size = 0; | |
532 | ||
533 | switch (index) { | |
534 | case INDEX_TS1: | |
535 | usb_interface_index = | |
536 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
537 | ts1_index + 1; | |
64fbf444 | 538 | dev->ts1_mode.alt = alt; |
84b5dbf3 MCC |
539 | if (dev->ts1_mode.alt_max_pkt_size != NULL) |
540 | max_pkt_size = dev->ts1_mode.max_pkt_size = | |
541 | dev->ts1_mode.alt_max_pkt_size[dev->ts1_mode.alt]; | |
542 | break; | |
543 | case INDEX_TS2: | |
544 | usb_interface_index = | |
545 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
546 | ts2_index + 1; | |
547 | break; | |
548 | case INDEX_AUDIO: | |
549 | usb_interface_index = | |
550 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
551 | audio_index + 1; | |
552 | dev->adev.alt = alt; | |
553 | if (dev->adev.alt_max_pkt_size != NULL) | |
554 | max_pkt_size = dev->adev.max_pkt_size = | |
555 | dev->adev.alt_max_pkt_size[dev->adev.alt]; | |
556 | break; | |
557 | case INDEX_VIDEO: | |
558 | usb_interface_index = | |
559 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
560 | video_index + 1; | |
561 | dev->video_mode.alt = alt; | |
562 | if (dev->video_mode.alt_max_pkt_size != NULL) | |
563 | max_pkt_size = dev->video_mode.max_pkt_size = | |
564 | dev->video_mode.alt_max_pkt_size[dev->video_mode. | |
565 | alt]; | |
566 | break; | |
567 | case INDEX_VANC: | |
2f861387 MCC |
568 | if (dev->board.no_alt_vanc) |
569 | return 0; | |
84b5dbf3 MCC |
570 | usb_interface_index = |
571 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
572 | vanc_index + 1; | |
573 | dev->vbi_mode.alt = alt; | |
574 | if (dev->vbi_mode.alt_max_pkt_size != NULL) | |
575 | max_pkt_size = dev->vbi_mode.max_pkt_size = | |
576 | dev->vbi_mode.alt_max_pkt_size[dev->vbi_mode.alt]; | |
577 | break; | |
578 | case INDEX_HANC: | |
579 | usb_interface_index = | |
580 | dev->current_pcb_config.hs_config_info[0].interface_info. | |
581 | hanc_index + 1; | |
582 | dev->sliced_cc_mode.alt = alt; | |
583 | if (dev->sliced_cc_mode.alt_max_pkt_size != NULL) | |
584 | max_pkt_size = dev->sliced_cc_mode.max_pkt_size = | |
585 | dev->sliced_cc_mode.alt_max_pkt_size[dev-> | |
586 | sliced_cc_mode. | |
587 | alt]; | |
588 | break; | |
589 | default: | |
590 | break; | |
591 | } | |
592 | ||
593 | if (alt > 0 && max_pkt_size == 0) { | |
336fea92 | 594 | dev_err(dev->dev, |
b7085c08 | 595 | "can't change interface %d alt no. to %d: Max. Pkt size = 0\n", |
ed0e3729 | 596 | usb_interface_index, alt); |
64fbf444 PB |
597 | /*To workaround error number=-71 on EP0 for videograbber, |
598 | need add following codes.*/ | |
2f861387 | 599 | if (dev->board.no_alt_vanc) |
64fbf444 | 600 | return -1; |
84b5dbf3 MCC |
601 | } |
602 | ||
d5a1754d DH |
603 | cx231xx_coredbg("setting alternate %d with wMaxPacketSize=%u," |
604 | "Interface = %d\n", alt, max_pkt_size, | |
605 | usb_interface_index); | |
84b5dbf3 MCC |
606 | |
607 | if (usb_interface_index > 0) { | |
608 | status = usb_set_interface(dev->udev, usb_interface_index, alt); | |
e0d3bafd | 609 | if (status < 0) { |
336fea92 | 610 | dev_err(dev->dev, |
b7085c08 | 611 | "can't change interface %d alt no. to %d (err=%i)\n", |
ed0e3729 | 612 | usb_interface_index, alt, status); |
e0d3bafd SD |
613 | return status; |
614 | } | |
84b5dbf3 | 615 | } |
e0d3bafd | 616 | |
84b5dbf3 | 617 | return status; |
e0d3bafd SD |
618 | } |
619 | EXPORT_SYMBOL_GPL(cx231xx_set_alt_setting); | |
620 | ||
621 | int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio) | |
622 | { | |
623 | int rc = 0; | |
624 | ||
625 | if (!gpio) | |
626 | return rc; | |
627 | ||
628 | /* Send GPIO reset sequences specified at board entry */ | |
629 | while (gpio->sleep >= 0) { | |
84b5dbf3 MCC |
630 | rc = cx231xx_set_gpio_value(dev, gpio->bit, gpio->val); |
631 | if (rc < 0) | |
632 | return rc; | |
e0d3bafd SD |
633 | |
634 | if (gpio->sleep > 0) | |
635 | msleep(gpio->sleep); | |
636 | ||
637 | gpio++; | |
638 | } | |
639 | return rc; | |
640 | } | |
641 | ||
64fbf444 PB |
642 | int cx231xx_demod_reset(struct cx231xx *dev) |
643 | { | |
644 | ||
645 | u8 status = 0; | |
646 | u8 value[4] = { 0, 0, 0, 0 }; | |
647 | ||
648 | status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, | |
649 | value, 4); | |
64fbf444 | 650 | |
d5a1754d DH |
651 | cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, |
652 | value[0], value[1], value[2], value[3]); | |
653 | ||
654 | cx231xx_coredbg("Enter cx231xx_demod_reset()\n"); | |
655 | ||
69626853 MCC |
656 | value[1] = (u8) 0x3; |
657 | status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
658 | PWR_CTL_EN, value, 4); | |
659 | msleep(10); | |
660 | ||
661 | value[1] = (u8) 0x0; | |
662 | status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
663 | PWR_CTL_EN, value, 4); | |
664 | msleep(10); | |
665 | ||
666 | value[1] = (u8) 0x3; | |
667 | status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
668 | PWR_CTL_EN, value, 4); | |
669 | msleep(10); | |
64fbf444 PB |
670 | |
671 | status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, | |
672 | value, 4); | |
d5a1754d DH |
673 | |
674 | cx231xx_coredbg("reg0x%x=0x%x 0x%x 0x%x 0x%x\n", PWR_CTL_EN, | |
675 | value[0], value[1], value[2], value[3]); | |
64fbf444 PB |
676 | |
677 | return status; | |
678 | } | |
679 | EXPORT_SYMBOL_GPL(cx231xx_demod_reset); | |
680 | int is_fw_load(struct cx231xx *dev) | |
681 | { | |
682 | return cx231xx_check_fw(dev); | |
683 | } | |
684 | EXPORT_SYMBOL_GPL(is_fw_load); | |
685 | ||
e0d3bafd SD |
686 | int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode) |
687 | { | |
64fbf444 PB |
688 | int errCode = 0; |
689 | ||
e0d3bafd SD |
690 | if (dev->mode == set_mode) |
691 | return 0; | |
692 | ||
693 | if (set_mode == CX231XX_SUSPEND) { | |
84b5dbf3 | 694 | /* Set the chip in power saving mode */ |
e0d3bafd SD |
695 | dev->mode = set_mode; |
696 | } | |
697 | ||
698 | /* Resource is locked */ | |
699 | if (dev->mode != CX231XX_SUSPEND) | |
700 | return -EINVAL; | |
701 | ||
702 | dev->mode = set_mode; | |
703 | ||
64fbf444 PB |
704 | if (dev->mode == CX231XX_DIGITAL_MODE)/* Set Digital power mode */ { |
705 | /* set AGC mode to Digital */ | |
706 | switch (dev->model) { | |
707 | case CX231XX_BOARD_CNXT_CARRAERA: | |
708 | case CX231XX_BOARD_CNXT_RDE_250: | |
709 | case CX231XX_BOARD_CNXT_SHELBY: | |
710 | case CX231XX_BOARD_CNXT_RDU_250: | |
711 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); | |
712 | break; | |
713 | case CX231XX_BOARD_CNXT_RDE_253S: | |
714 | case CX231XX_BOARD_CNXT_RDU_253S: | |
24b923f0 | 715 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
b88ba619 DH |
716 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); |
717 | break; | |
1a50fdde | 718 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
dd2e7dd2 | 719 | case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx: |
b88ba619 DH |
720 | errCode = cx231xx_set_power_mode(dev, |
721 | POLARIS_AVMODE_DIGITAL); | |
64fbf444 PB |
722 | break; |
723 | default: | |
724 | break; | |
725 | } | |
726 | } else/* Set Analog Power mode */ { | |
727 | /* set AGC mode to Analog */ | |
728 | switch (dev->model) { | |
729 | case CX231XX_BOARD_CNXT_CARRAERA: | |
730 | case CX231XX_BOARD_CNXT_RDE_250: | |
731 | case CX231XX_BOARD_CNXT_SHELBY: | |
732 | case CX231XX_BOARD_CNXT_RDU_250: | |
733 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); | |
734 | break; | |
735 | case CX231XX_BOARD_CNXT_RDE_253S: | |
736 | case CX231XX_BOARD_CNXT_RDU_253S: | |
1a50fdde | 737 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
dd2e7dd2 | 738 | case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx: |
9417bc6d | 739 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
de8ae0d5 PM |
740 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL: |
741 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC: | |
24b923f0 | 742 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); |
64fbf444 PB |
743 | break; |
744 | default: | |
745 | break; | |
746 | } | |
747 | } | |
b9255176 | 748 | |
dc4af782 MCC |
749 | if (errCode < 0) { |
750 | dev_err(dev->dev, "Failed to set devmode to %s: error: %i", | |
751 | dev->mode == CX231XX_DIGITAL_MODE ? "digital" : "analog", | |
752 | errCode); | |
753 | return errCode; | |
754 | } | |
755 | ||
756 | return 0; | |
e0d3bafd SD |
757 | } |
758 | EXPORT_SYMBOL_GPL(cx231xx_set_mode); | |
759 | ||
64fbf444 PB |
760 | int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size) |
761 | { | |
762 | int errCode = 0; | |
20e01b26 DC |
763 | int actlen = -1; |
764 | int ret = -ENOMEM; | |
64fbf444 PB |
765 | u32 *buffer; |
766 | ||
da983503 | 767 | buffer = kzalloc(4096, GFP_KERNEL); |
ed0e3729 | 768 | if (buffer == NULL) |
64fbf444 | 769 | return -ENOMEM; |
64fbf444 PB |
770 | memcpy(&buffer[0], firmware, 4096); |
771 | ||
772 | ret = usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, 5), | |
da983503 | 773 | buffer, 4096, &actlen, 2000); |
64fbf444 PB |
774 | |
775 | if (ret) | |
336fea92 | 776 | dev_err(dev->dev, |
b7085c08 MCC |
777 | "bulk message failed: %d (%d/%d)", ret, |
778 | size, actlen); | |
64fbf444 PB |
779 | else { |
780 | errCode = actlen != size ? -1 : 0; | |
781 | } | |
da983503 HV |
782 | kfree(buffer); |
783 | return errCode; | |
64fbf444 PB |
784 | } |
785 | ||
b9255176 SD |
786 | /***************************************************************** |
787 | * URB Streaming functions * | |
788 | ******************************************************************/ | |
e0d3bafd SD |
789 | |
790 | /* | |
791 | * IRQ callback, called by URB callback | |
792 | */ | |
64fbf444 | 793 | static void cx231xx_isoc_irq_callback(struct urb *urb) |
e0d3bafd | 794 | { |
84b5dbf3 MCC |
795 | struct cx231xx_dmaqueue *dma_q = urb->context; |
796 | struct cx231xx_video_mode *vmode = | |
797 | container_of(dma_q, struct cx231xx_video_mode, vidq); | |
798 | struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode); | |
da983503 | 799 | int i; |
e0d3bafd | 800 | |
84b5dbf3 MCC |
801 | switch (urb->status) { |
802 | case 0: /* success */ | |
803 | case -ETIMEDOUT: /* NAK */ | |
804 | break; | |
805 | case -ECONNRESET: /* kill */ | |
806 | case -ENOENT: | |
807 | case -ESHUTDOWN: | |
808 | return; | |
809 | default: /* error */ | |
69b17abf | 810 | cx231xx_isocdbg("urb completion error %d.\n", urb->status); |
84b5dbf3 | 811 | break; |
e0d3bafd SD |
812 | } |
813 | ||
814 | /* Copy data from URB */ | |
815 | spin_lock(&dev->video_mode.slock); | |
da983503 | 816 | dev->video_mode.isoc_ctl.isoc_copy(dev, urb); |
e0d3bafd SD |
817 | spin_unlock(&dev->video_mode.slock); |
818 | ||
819 | /* Reset urb buffers */ | |
820 | for (i = 0; i < urb->number_of_packets; i++) { | |
821 | urb->iso_frame_desc[i].status = 0; | |
822 | urb->iso_frame_desc[i].actual_length = 0; | |
823 | } | |
e0d3bafd SD |
824 | |
825 | urb->status = usb_submit_urb(urb, GFP_ATOMIC); | |
826 | if (urb->status) { | |
827 | cx231xx_isocdbg("urb resubmit failed (error=%i)\n", | |
84b5dbf3 | 828 | urb->status); |
e0d3bafd SD |
829 | } |
830 | } | |
64fbf444 PB |
831 | /***************************************************************** |
832 | * URB Streaming functions * | |
833 | ******************************************************************/ | |
834 | ||
835 | /* | |
836 | * IRQ callback, called by URB callback | |
837 | */ | |
838 | static void cx231xx_bulk_irq_callback(struct urb *urb) | |
839 | { | |
840 | struct cx231xx_dmaqueue *dma_q = urb->context; | |
841 | struct cx231xx_video_mode *vmode = | |
842 | container_of(dma_q, struct cx231xx_video_mode, vidq); | |
843 | struct cx231xx *dev = container_of(vmode, struct cx231xx, video_mode); | |
64fbf444 PB |
844 | |
845 | switch (urb->status) { | |
846 | case 0: /* success */ | |
847 | case -ETIMEDOUT: /* NAK */ | |
848 | break; | |
849 | case -ECONNRESET: /* kill */ | |
850 | case -ENOENT: | |
851 | case -ESHUTDOWN: | |
852 | return; | |
69b17abf TH |
853 | case -EPIPE: /* stall */ |
854 | cx231xx_isocdbg("urb completion error - device is stalled.\n"); | |
855 | return; | |
64fbf444 | 856 | default: /* error */ |
69b17abf | 857 | cx231xx_isocdbg("urb completion error %d.\n", urb->status); |
64fbf444 PB |
858 | break; |
859 | } | |
860 | ||
861 | /* Copy data from URB */ | |
862 | spin_lock(&dev->video_mode.slock); | |
da983503 | 863 | dev->video_mode.bulk_ctl.bulk_copy(dev, urb); |
64fbf444 | 864 | spin_unlock(&dev->video_mode.slock); |
e0d3bafd | 865 | |
64fbf444 | 866 | /* Reset urb buffers */ |
64fbf444 PB |
867 | urb->status = usb_submit_urb(urb, GFP_ATOMIC); |
868 | if (urb->status) { | |
869 | cx231xx_isocdbg("urb resubmit failed (error=%i)\n", | |
870 | urb->status); | |
871 | } | |
872 | } | |
e0d3bafd SD |
873 | /* |
874 | * Stop and Deallocate URBs | |
875 | */ | |
876 | void cx231xx_uninit_isoc(struct cx231xx *dev) | |
877 | { | |
64fbf444 | 878 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; |
e0d3bafd SD |
879 | struct urb *urb; |
880 | int i; | |
69b17abf | 881 | bool broken_pipe = false; |
e0d3bafd SD |
882 | |
883 | cx231xx_isocdbg("cx231xx: called cx231xx_uninit_isoc\n"); | |
884 | ||
885 | dev->video_mode.isoc_ctl.nfields = -1; | |
886 | for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { | |
887 | urb = dev->video_mode.isoc_ctl.urb[i]; | |
888 | if (urb) { | |
84b5dbf3 MCC |
889 | if (!irqs_disabled()) |
890 | usb_kill_urb(urb); | |
891 | else | |
892 | usb_unlink_urb(urb); | |
e0d3bafd SD |
893 | |
894 | if (dev->video_mode.isoc_ctl.transfer_buffer[i]) { | |
997ea58e DM |
895 | usb_free_coherent(dev->udev, |
896 | urb->transfer_buffer_length, | |
897 | dev->video_mode.isoc_ctl. | |
898 | transfer_buffer[i], | |
899 | urb->transfer_dma); | |
e0d3bafd | 900 | } |
69b17abf TH |
901 | if (urb->status == -EPIPE) { |
902 | broken_pipe = true; | |
903 | } | |
e0d3bafd SD |
904 | usb_free_urb(urb); |
905 | dev->video_mode.isoc_ctl.urb[i] = NULL; | |
906 | } | |
907 | dev->video_mode.isoc_ctl.transfer_buffer[i] = NULL; | |
908 | } | |
909 | ||
69b17abf TH |
910 | if (broken_pipe) { |
911 | cx231xx_isocdbg("Reset endpoint to recover broken pipe."); | |
912 | usb_reset_endpoint(dev->udev, dev->video_mode.end_point_addr); | |
913 | } | |
e0d3bafd SD |
914 | kfree(dev->video_mode.isoc_ctl.urb); |
915 | kfree(dev->video_mode.isoc_ctl.transfer_buffer); | |
64fbf444 | 916 | kfree(dma_q->p_left_data); |
e0d3bafd SD |
917 | |
918 | dev->video_mode.isoc_ctl.urb = NULL; | |
919 | dev->video_mode.isoc_ctl.transfer_buffer = NULL; | |
920 | dev->video_mode.isoc_ctl.num_bufs = 0; | |
64fbf444 PB |
921 | dma_q->p_left_data = NULL; |
922 | ||
923 | if (dev->mode_tv == 0) | |
924 | cx231xx_capture_start(dev, 0, Raw_Video); | |
925 | else | |
926 | cx231xx_capture_start(dev, 0, TS1_serial_mode); | |
927 | ||
e0d3bafd | 928 | |
e0d3bafd SD |
929 | } |
930 | EXPORT_SYMBOL_GPL(cx231xx_uninit_isoc); | |
931 | ||
64fbf444 PB |
932 | /* |
933 | * Stop and Deallocate URBs | |
934 | */ | |
935 | void cx231xx_uninit_bulk(struct cx231xx *dev) | |
936 | { | |
ce3556bd | 937 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; |
64fbf444 PB |
938 | struct urb *urb; |
939 | int i; | |
69b17abf | 940 | bool broken_pipe = false; |
64fbf444 PB |
941 | |
942 | cx231xx_isocdbg("cx231xx: called cx231xx_uninit_bulk\n"); | |
943 | ||
944 | dev->video_mode.bulk_ctl.nfields = -1; | |
945 | for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { | |
946 | urb = dev->video_mode.bulk_ctl.urb[i]; | |
947 | if (urb) { | |
948 | if (!irqs_disabled()) | |
949 | usb_kill_urb(urb); | |
950 | else | |
951 | usb_unlink_urb(urb); | |
952 | ||
953 | if (dev->video_mode.bulk_ctl.transfer_buffer[i]) { | |
954 | usb_free_coherent(dev->udev, | |
955 | urb->transfer_buffer_length, | |
ce3556bd | 956 | dev->video_mode.bulk_ctl. |
64fbf444 PB |
957 | transfer_buffer[i], |
958 | urb->transfer_dma); | |
959 | } | |
69b17abf TH |
960 | if (urb->status == -EPIPE) { |
961 | broken_pipe = true; | |
962 | } | |
64fbf444 PB |
963 | usb_free_urb(urb); |
964 | dev->video_mode.bulk_ctl.urb[i] = NULL; | |
965 | } | |
966 | dev->video_mode.bulk_ctl.transfer_buffer[i] = NULL; | |
967 | } | |
968 | ||
69b17abf TH |
969 | if (broken_pipe) { |
970 | cx231xx_isocdbg("Reset endpoint to recover broken pipe."); | |
971 | usb_reset_endpoint(dev->udev, dev->video_mode.end_point_addr); | |
972 | } | |
64fbf444 PB |
973 | kfree(dev->video_mode.bulk_ctl.urb); |
974 | kfree(dev->video_mode.bulk_ctl.transfer_buffer); | |
ce3556bd | 975 | kfree(dma_q->p_left_data); |
64fbf444 PB |
976 | |
977 | dev->video_mode.bulk_ctl.urb = NULL; | |
978 | dev->video_mode.bulk_ctl.transfer_buffer = NULL; | |
979 | dev->video_mode.bulk_ctl.num_bufs = 0; | |
ce3556bd | 980 | dma_q->p_left_data = NULL; |
64fbf444 PB |
981 | |
982 | if (dev->mode_tv == 0) | |
983 | cx231xx_capture_start(dev, 0, Raw_Video); | |
984 | else | |
985 | cx231xx_capture_start(dev, 0, TS1_serial_mode); | |
986 | ||
987 | ||
988 | } | |
989 | EXPORT_SYMBOL_GPL(cx231xx_uninit_bulk); | |
990 | ||
e0d3bafd SD |
991 | /* |
992 | * Allocate URBs and start IRQ | |
993 | */ | |
994 | int cx231xx_init_isoc(struct cx231xx *dev, int max_packets, | |
84b5dbf3 | 995 | int num_bufs, int max_pkt_size, |
b9255176 | 996 | int (*isoc_copy) (struct cx231xx *dev, struct urb *urb)) |
e0d3bafd SD |
997 | { |
998 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; | |
999 | int i; | |
1000 | int sb_size, pipe; | |
1001 | struct urb *urb; | |
1002 | int j, k; | |
1003 | int rc; | |
1004 | ||
e0d3bafd SD |
1005 | /* De-allocates all pending stuff */ |
1006 | cx231xx_uninit_isoc(dev); | |
1007 | ||
64fbf444 | 1008 | dma_q->p_left_data = kzalloc(4096, GFP_KERNEL); |
ed0e3729 | 1009 | if (dma_q->p_left_data == NULL) |
64fbf444 | 1010 | return -ENOMEM; |
64fbf444 | 1011 | |
e0d3bafd SD |
1012 | dev->video_mode.isoc_ctl.isoc_copy = isoc_copy; |
1013 | dev->video_mode.isoc_ctl.num_bufs = num_bufs; | |
84b5dbf3 MCC |
1014 | dma_q->pos = 0; |
1015 | dma_q->is_partial_line = 0; | |
1016 | dma_q->last_sav = 0; | |
1017 | dma_q->current_field = -1; | |
1018 | dma_q->field1_done = 0; | |
1019 | dma_q->lines_per_field = dev->height / 2; | |
1020 | dma_q->bytes_left_in_line = dev->width << 1; | |
1021 | dma_q->lines_completed = 0; | |
64fbf444 PB |
1022 | dma_q->mpeg_buffer_done = 0; |
1023 | dma_q->left_data_count = 0; | |
1024 | dma_q->mpeg_buffer_completed = 0; | |
1025 | dma_q->add_ps_package_head = CX231XX_NEED_ADD_PS_PACKAGE_HEAD; | |
1026 | dma_q->ps_head[0] = 0x00; | |
1027 | dma_q->ps_head[1] = 0x00; | |
1028 | dma_q->ps_head[2] = 0x01; | |
1029 | dma_q->ps_head[3] = 0xBA; | |
84b5dbf3 MCC |
1030 | for (i = 0; i < 8; i++) |
1031 | dma_q->partial_buf[i] = 0; | |
1032 | ||
1033 | dev->video_mode.isoc_ctl.urb = | |
1034 | kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL); | |
e0d3bafd | 1035 | if (!dev->video_mode.isoc_ctl.urb) { |
336fea92 | 1036 | dev_err(dev->dev, |
b7085c08 | 1037 | "cannot alloc memory for usb buffers\n"); |
e0d3bafd SD |
1038 | return -ENOMEM; |
1039 | } | |
1040 | ||
84b5dbf3 MCC |
1041 | dev->video_mode.isoc_ctl.transfer_buffer = |
1042 | kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL); | |
e0d3bafd | 1043 | if (!dev->video_mode.isoc_ctl.transfer_buffer) { |
336fea92 | 1044 | dev_err(dev->dev, |
b7085c08 | 1045 | "cannot allocate memory for usbtransfer\n"); |
e0d3bafd SD |
1046 | kfree(dev->video_mode.isoc_ctl.urb); |
1047 | return -ENOMEM; | |
1048 | } | |
1049 | ||
1050 | dev->video_mode.isoc_ctl.max_pkt_size = max_pkt_size; | |
1051 | dev->video_mode.isoc_ctl.buf = NULL; | |
1052 | ||
1053 | sb_size = max_packets * dev->video_mode.isoc_ctl.max_pkt_size; | |
1054 | ||
64fbf444 PB |
1055 | if (dev->mode_tv == 1) |
1056 | dev->video_mode.end_point_addr = 0x81; | |
1057 | else | |
1058 | dev->video_mode.end_point_addr = 0x84; | |
1059 | ||
1060 | ||
e0d3bafd SD |
1061 | /* allocate urbs and transfer buffers */ |
1062 | for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { | |
1063 | urb = usb_alloc_urb(max_packets, GFP_KERNEL); | |
1064 | if (!urb) { | |
e0d3bafd SD |
1065 | cx231xx_uninit_isoc(dev); |
1066 | return -ENOMEM; | |
1067 | } | |
1068 | dev->video_mode.isoc_ctl.urb[i] = urb; | |
1069 | ||
84b5dbf3 | 1070 | dev->video_mode.isoc_ctl.transfer_buffer[i] = |
997ea58e DM |
1071 | usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL, |
1072 | &urb->transfer_dma); | |
e0d3bafd | 1073 | if (!dev->video_mode.isoc_ctl.transfer_buffer[i]) { |
336fea92 | 1074 | dev_err(dev->dev, |
b7085c08 | 1075 | "unable to allocate %i bytes for transfer buffer %i%s\n", |
ed0e3729 MCC |
1076 | sb_size, i, |
1077 | in_interrupt() ? " while in int" : ""); | |
e0d3bafd SD |
1078 | cx231xx_uninit_isoc(dev); |
1079 | return -ENOMEM; | |
1080 | } | |
1081 | memset(dev->video_mode.isoc_ctl.transfer_buffer[i], 0, sb_size); | |
1082 | ||
84b5dbf3 MCC |
1083 | pipe = |
1084 | usb_rcvisocpipe(dev->udev, dev->video_mode.end_point_addr); | |
e0d3bafd SD |
1085 | |
1086 | usb_fill_int_urb(urb, dev->udev, pipe, | |
84b5dbf3 | 1087 | dev->video_mode.isoc_ctl.transfer_buffer[i], |
64fbf444 | 1088 | sb_size, cx231xx_isoc_irq_callback, dma_q, 1); |
e0d3bafd SD |
1089 | |
1090 | urb->number_of_packets = max_packets; | |
7a6f6c29 | 1091 | urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP; |
e0d3bafd SD |
1092 | |
1093 | k = 0; | |
1094 | for (j = 0; j < max_packets; j++) { | |
1095 | urb->iso_frame_desc[j].offset = k; | |
1096 | urb->iso_frame_desc[j].length = | |
84b5dbf3 | 1097 | dev->video_mode.isoc_ctl.max_pkt_size; |
e0d3bafd SD |
1098 | k += dev->video_mode.isoc_ctl.max_pkt_size; |
1099 | } | |
1100 | } | |
1101 | ||
1102 | init_waitqueue_head(&dma_q->wq); | |
1103 | ||
e0d3bafd SD |
1104 | /* submit urbs and enables IRQ */ |
1105 | for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { | |
84b5dbf3 MCC |
1106 | rc = usb_submit_urb(dev->video_mode.isoc_ctl.urb[i], |
1107 | GFP_ATOMIC); | |
e0d3bafd | 1108 | if (rc) { |
336fea92 | 1109 | dev_err(dev->dev, |
b7085c08 | 1110 | "submit of urb %i failed (error=%i)\n", i, |
ed0e3729 | 1111 | rc); |
e0d3bafd SD |
1112 | cx231xx_uninit_isoc(dev); |
1113 | return rc; | |
1114 | } | |
1115 | } | |
1116 | ||
64fbf444 PB |
1117 | if (dev->mode_tv == 0) |
1118 | cx231xx_capture_start(dev, 1, Raw_Video); | |
1119 | else | |
1120 | cx231xx_capture_start(dev, 1, TS1_serial_mode); | |
e0d3bafd SD |
1121 | |
1122 | return 0; | |
1123 | } | |
1124 | EXPORT_SYMBOL_GPL(cx231xx_init_isoc); | |
1125 | ||
64fbf444 PB |
1126 | /* |
1127 | * Allocate URBs and start IRQ | |
1128 | */ | |
1129 | int cx231xx_init_bulk(struct cx231xx *dev, int max_packets, | |
1130 | int num_bufs, int max_pkt_size, | |
1131 | int (*bulk_copy) (struct cx231xx *dev, struct urb *urb)) | |
1132 | { | |
1133 | struct cx231xx_dmaqueue *dma_q = &dev->video_mode.vidq; | |
1134 | int i; | |
1135 | int sb_size, pipe; | |
1136 | struct urb *urb; | |
1137 | int rc; | |
1138 | ||
1139 | dev->video_input = dev->video_input > 2 ? 2 : dev->video_input; | |
1140 | ||
d5a1754d DH |
1141 | cx231xx_coredbg("Setting Video mux to %d\n", dev->video_input); |
1142 | ||
64fbf444 PB |
1143 | video_mux(dev, dev->video_input); |
1144 | ||
1145 | /* De-allocates all pending stuff */ | |
1146 | cx231xx_uninit_bulk(dev); | |
1147 | ||
1148 | dev->video_mode.bulk_ctl.bulk_copy = bulk_copy; | |
1149 | dev->video_mode.bulk_ctl.num_bufs = num_bufs; | |
1150 | dma_q->pos = 0; | |
1151 | dma_q->is_partial_line = 0; | |
1152 | dma_q->last_sav = 0; | |
1153 | dma_q->current_field = -1; | |
1154 | dma_q->field1_done = 0; | |
1155 | dma_q->lines_per_field = dev->height / 2; | |
1156 | dma_q->bytes_left_in_line = dev->width << 1; | |
1157 | dma_q->lines_completed = 0; | |
1158 | dma_q->mpeg_buffer_done = 0; | |
1159 | dma_q->left_data_count = 0; | |
1160 | dma_q->mpeg_buffer_completed = 0; | |
1161 | dma_q->ps_head[0] = 0x00; | |
1162 | dma_q->ps_head[1] = 0x00; | |
1163 | dma_q->ps_head[2] = 0x01; | |
1164 | dma_q->ps_head[3] = 0xBA; | |
1165 | for (i = 0; i < 8; i++) | |
1166 | dma_q->partial_buf[i] = 0; | |
1167 | ||
1168 | dev->video_mode.bulk_ctl.urb = | |
1169 | kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL); | |
1170 | if (!dev->video_mode.bulk_ctl.urb) { | |
336fea92 | 1171 | dev_err(dev->dev, |
b7085c08 | 1172 | "cannot alloc memory for usb buffers\n"); |
64fbf444 PB |
1173 | return -ENOMEM; |
1174 | } | |
1175 | ||
1176 | dev->video_mode.bulk_ctl.transfer_buffer = | |
1177 | kzalloc(sizeof(void *) * num_bufs, GFP_KERNEL); | |
1178 | if (!dev->video_mode.bulk_ctl.transfer_buffer) { | |
336fea92 | 1179 | dev_err(dev->dev, |
b7085c08 | 1180 | "cannot allocate memory for usbtransfer\n"); |
64fbf444 PB |
1181 | kfree(dev->video_mode.bulk_ctl.urb); |
1182 | return -ENOMEM; | |
1183 | } | |
1184 | ||
1185 | dev->video_mode.bulk_ctl.max_pkt_size = max_pkt_size; | |
1186 | dev->video_mode.bulk_ctl.buf = NULL; | |
1187 | ||
1188 | sb_size = max_packets * dev->video_mode.bulk_ctl.max_pkt_size; | |
1189 | ||
1190 | if (dev->mode_tv == 1) | |
1191 | dev->video_mode.end_point_addr = 0x81; | |
1192 | else | |
1193 | dev->video_mode.end_point_addr = 0x84; | |
1194 | ||
1195 | ||
1196 | /* allocate urbs and transfer buffers */ | |
1197 | for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { | |
1198 | urb = usb_alloc_urb(0, GFP_KERNEL); | |
1199 | if (!urb) { | |
64fbf444 PB |
1200 | cx231xx_uninit_bulk(dev); |
1201 | return -ENOMEM; | |
1202 | } | |
1203 | dev->video_mode.bulk_ctl.urb[i] = urb; | |
7a6f6c29 | 1204 | urb->transfer_flags = URB_NO_TRANSFER_DMA_MAP; |
64fbf444 PB |
1205 | |
1206 | dev->video_mode.bulk_ctl.transfer_buffer[i] = | |
1207 | usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL, | |
1208 | &urb->transfer_dma); | |
1209 | if (!dev->video_mode.bulk_ctl.transfer_buffer[i]) { | |
336fea92 | 1210 | dev_err(dev->dev, |
b7085c08 | 1211 | "unable to allocate %i bytes for transfer buffer %i%s\n", |
ed0e3729 MCC |
1212 | sb_size, i, |
1213 | in_interrupt() ? " while in int" : ""); | |
64fbf444 PB |
1214 | cx231xx_uninit_bulk(dev); |
1215 | return -ENOMEM; | |
1216 | } | |
1217 | memset(dev->video_mode.bulk_ctl.transfer_buffer[i], 0, sb_size); | |
1218 | ||
1219 | pipe = usb_rcvbulkpipe(dev->udev, | |
1220 | dev->video_mode.end_point_addr); | |
1221 | usb_fill_bulk_urb(urb, dev->udev, pipe, | |
1222 | dev->video_mode.bulk_ctl.transfer_buffer[i], | |
1223 | sb_size, cx231xx_bulk_irq_callback, dma_q); | |
1224 | } | |
1225 | ||
ce3556bd TH |
1226 | /* clear halt */ |
1227 | rc = usb_clear_halt(dev->udev, dev->video_mode.bulk_ctl.urb[0]->pipe); | |
1228 | if (rc < 0) { | |
1229 | dev_err(dev->dev, | |
1230 | "failed to clear USB bulk endpoint stall/halt condition (error=%i)\n", | |
1231 | rc); | |
1232 | cx231xx_uninit_bulk(dev); | |
1233 | return rc; | |
1234 | } | |
1235 | ||
64fbf444 PB |
1236 | init_waitqueue_head(&dma_q->wq); |
1237 | ||
1238 | /* submit urbs and enables IRQ */ | |
1239 | for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { | |
1240 | rc = usb_submit_urb(dev->video_mode.bulk_ctl.urb[i], | |
1241 | GFP_ATOMIC); | |
1242 | if (rc) { | |
336fea92 | 1243 | dev_err(dev->dev, |
b7085c08 | 1244 | "submit of urb %i failed (error=%i)\n", i, rc); |
64fbf444 PB |
1245 | cx231xx_uninit_bulk(dev); |
1246 | return rc; | |
1247 | } | |
1248 | } | |
1249 | ||
1250 | if (dev->mode_tv == 0) | |
1251 | cx231xx_capture_start(dev, 1, Raw_Video); | |
1252 | else | |
1253 | cx231xx_capture_start(dev, 1, TS1_serial_mode); | |
1254 | ||
1255 | return 0; | |
1256 | } | |
1257 | EXPORT_SYMBOL_GPL(cx231xx_init_bulk); | |
1258 | void cx231xx_stop_TS1(struct cx231xx *dev) | |
1259 | { | |
64fbf444 PB |
1260 | u8 val[4] = { 0, 0, 0, 0 }; |
1261 | ||
da983503 HV |
1262 | val[0] = 0x00; |
1263 | val[1] = 0x03; | |
1264 | val[2] = 0x00; | |
1265 | val[3] = 0x00; | |
1266 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1267 | TS_MODE_REG, val, 4); | |
1268 | ||
1269 | val[0] = 0x00; | |
1270 | val[1] = 0x70; | |
1271 | val[2] = 0x04; | |
1272 | val[3] = 0x00; | |
1273 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1274 | TS1_CFG_REG, val, 4); | |
64fbf444 PB |
1275 | } |
1276 | /* EXPORT_SYMBOL_GPL(cx231xx_stop_TS1); */ | |
1277 | void cx231xx_start_TS1(struct cx231xx *dev) | |
1278 | { | |
64fbf444 PB |
1279 | u8 val[4] = { 0, 0, 0, 0 }; |
1280 | ||
da983503 HV |
1281 | val[0] = 0x03; |
1282 | val[1] = 0x03; | |
1283 | val[2] = 0x00; | |
1284 | val[3] = 0x00; | |
1285 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1286 | TS_MODE_REG, val, 4); | |
1287 | ||
1288 | val[0] = 0x04; | |
1289 | val[1] = 0xA3; | |
1290 | val[2] = 0x3B; | |
1291 | val[3] = 0x00; | |
1292 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, | |
1293 | TS1_CFG_REG, val, 4); | |
64fbf444 PB |
1294 | } |
1295 | /* EXPORT_SYMBOL_GPL(cx231xx_start_TS1); */ | |
b9255176 SD |
1296 | /***************************************************************** |
1297 | * Device Init/UnInit functions * | |
1298 | ******************************************************************/ | |
e0d3bafd SD |
1299 | int cx231xx_dev_init(struct cx231xx *dev) |
1300 | { | |
84b5dbf3 | 1301 | int errCode = 0; |
e0d3bafd | 1302 | |
84b5dbf3 | 1303 | /* Initialize I2C bus */ |
e0d3bafd SD |
1304 | |
1305 | /* External Master 1 Bus */ | |
1306 | dev->i2c_bus[0].nr = 0; | |
1307 | dev->i2c_bus[0].dev = dev; | |
1a50fdde | 1308 | dev->i2c_bus[0].i2c_period = I2C_SPEED_100K; /* 100 KHz */ |
84b5dbf3 MCC |
1309 | dev->i2c_bus[0].i2c_nostop = 0; |
1310 | dev->i2c_bus[0].i2c_reserve = 0; | |
e0d3bafd SD |
1311 | |
1312 | /* External Master 2 Bus */ | |
1313 | dev->i2c_bus[1].nr = 1; | |
1314 | dev->i2c_bus[1].dev = dev; | |
1a50fdde | 1315 | dev->i2c_bus[1].i2c_period = I2C_SPEED_100K; /* 100 KHz */ |
84b5dbf3 MCC |
1316 | dev->i2c_bus[1].i2c_nostop = 0; |
1317 | dev->i2c_bus[1].i2c_reserve = 0; | |
e0d3bafd SD |
1318 | |
1319 | /* Internal Master 3 Bus */ | |
1320 | dev->i2c_bus[2].nr = 2; | |
1321 | dev->i2c_bus[2].dev = dev; | |
9ab66912 | 1322 | dev->i2c_bus[2].i2c_period = I2C_SPEED_100K; /* 100kHz */ |
84b5dbf3 MCC |
1323 | dev->i2c_bus[2].i2c_nostop = 0; |
1324 | dev->i2c_bus[2].i2c_reserve = 0; | |
e0d3bafd | 1325 | |
84b5dbf3 | 1326 | /* register I2C buses */ |
e0d3bafd SD |
1327 | cx231xx_i2c_register(&dev->i2c_bus[0]); |
1328 | cx231xx_i2c_register(&dev->i2c_bus[1]); | |
1329 | cx231xx_i2c_register(&dev->i2c_bus[2]); | |
1330 | ||
05e0dfd0 PR |
1331 | errCode = cx231xx_i2c_mux_create(dev); |
1332 | if (errCode < 0) | |
1333 | return errCode; | |
15c212dd MS |
1334 | cx231xx_i2c_mux_register(dev, 0); |
1335 | cx231xx_i2c_mux_register(dev, 1); | |
1336 | ||
e4de03f2 MS |
1337 | /* scan the real bus segments in the order of physical port numbers */ |
1338 | cx231xx_do_i2c_scan(dev, I2C_0); | |
1339 | cx231xx_do_i2c_scan(dev, I2C_1_MUX_1); | |
1340 | cx231xx_do_i2c_scan(dev, I2C_2); | |
1341 | cx231xx_do_i2c_scan(dev, I2C_1_MUX_3); | |
1342 | ||
84b5dbf3 | 1343 | /* init hardware */ |
b9255176 | 1344 | /* Note : with out calling set power mode function, |
ecc67d10 | 1345 | afe can not be set up correctly */ |
2f861387 | 1346 | if (dev->board.external_av) { |
64fbf444 PB |
1347 | errCode = cx231xx_set_power_mode(dev, |
1348 | POLARIS_AVMODE_ENXTERNAL_AV); | |
1349 | if (errCode < 0) { | |
336fea92 | 1350 | dev_err(dev->dev, |
b7085c08 | 1351 | "%s: Failed to set Power - errCode [%d]!\n", |
ed0e3729 | 1352 | __func__, errCode); |
64fbf444 PB |
1353 | return errCode; |
1354 | } | |
1355 | } else { | |
1356 | errCode = cx231xx_set_power_mode(dev, | |
1357 | POLARIS_AVMODE_ANALOGT_TV); | |
1358 | if (errCode < 0) { | |
336fea92 | 1359 | dev_err(dev->dev, |
b7085c08 | 1360 | "%s: Failed to set Power - errCode [%d]!\n", |
ed0e3729 | 1361 | __func__, errCode); |
64fbf444 PB |
1362 | return errCode; |
1363 | } | |
e0d3bafd SD |
1364 | } |
1365 | ||
2f861387 MCC |
1366 | /* reset the Tuner, if it is a Xceive tuner */ |
1367 | if ((dev->board.tuner_type == TUNER_XC5000) || | |
1368 | (dev->board.tuner_type == TUNER_XC2028)) | |
64fbf444 PB |
1369 | cx231xx_gpio_set(dev, dev->board.tuner_gpio); |
1370 | ||
84b5dbf3 | 1371 | /* initialize Colibri block */ |
ecc67d10 | 1372 | errCode = cx231xx_afe_init_super_block(dev, 0x23c); |
e0d3bafd | 1373 | if (errCode < 0) { |
336fea92 | 1374 | dev_err(dev->dev, |
b7085c08 | 1375 | "%s: cx231xx_afe init super block - errCode [%d]!\n", |
ed0e3729 | 1376 | __func__, errCode); |
e0d3bafd SD |
1377 | return errCode; |
1378 | } | |
ecc67d10 | 1379 | errCode = cx231xx_afe_init_channels(dev); |
84b5dbf3 | 1380 | if (errCode < 0) { |
336fea92 | 1381 | dev_err(dev->dev, |
b7085c08 | 1382 | "%s: cx231xx_afe init channels - errCode [%d]!\n", |
ed0e3729 | 1383 | __func__, errCode); |
e0d3bafd SD |
1384 | return errCode; |
1385 | } | |
1386 | ||
84b5dbf3 MCC |
1387 | /* Set DIF in By pass mode */ |
1388 | errCode = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); | |
1389 | if (errCode < 0) { | |
336fea92 | 1390 | dev_err(dev->dev, |
b7085c08 | 1391 | "%s: cx231xx_dif set to By pass mode - errCode [%d]!\n", |
ed0e3729 | 1392 | __func__, errCode); |
e0d3bafd SD |
1393 | return errCode; |
1394 | } | |
1395 | ||
ecc67d10 SD |
1396 | /* I2S block related functions */ |
1397 | errCode = cx231xx_i2s_blk_initialize(dev); | |
84b5dbf3 | 1398 | if (errCode < 0) { |
336fea92 | 1399 | dev_err(dev->dev, |
b7085c08 | 1400 | "%s: cx231xx_i2s block initialize - errCode [%d]!\n", |
ed0e3729 | 1401 | __func__, errCode); |
e0d3bafd SD |
1402 | return errCode; |
1403 | } | |
1404 | ||
84b5dbf3 MCC |
1405 | /* init control pins */ |
1406 | errCode = cx231xx_init_ctrl_pin_status(dev); | |
1407 | if (errCode < 0) { | |
336fea92 | 1408 | dev_err(dev->dev, |
b7085c08 | 1409 | "%s: cx231xx_init ctrl pins - errCode [%d]!\n", |
ed0e3729 | 1410 | __func__, errCode); |
e0d3bafd SD |
1411 | return errCode; |
1412 | } | |
1413 | ||
84b5dbf3 | 1414 | /* set AGC mode to Analog */ |
64fbf444 PB |
1415 | switch (dev->model) { |
1416 | case CX231XX_BOARD_CNXT_CARRAERA: | |
1417 | case CX231XX_BOARD_CNXT_RDE_250: | |
1418 | case CX231XX_BOARD_CNXT_SHELBY: | |
1419 | case CX231XX_BOARD_CNXT_RDU_250: | |
84b5dbf3 | 1420 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); |
64fbf444 PB |
1421 | break; |
1422 | case CX231XX_BOARD_CNXT_RDE_253S: | |
1423 | case CX231XX_BOARD_CNXT_RDU_253S: | |
1a50fdde | 1424 | case CX231XX_BOARD_HAUPPAUGE_EXETER: |
dd2e7dd2 | 1425 | case CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx: |
9417bc6d | 1426 | case CX231XX_BOARD_PV_PLAYTV_USB_HYBRID: |
de8ae0d5 PM |
1427 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL: |
1428 | case CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC: | |
64fbf444 PB |
1429 | errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); |
1430 | break; | |
1431 | default: | |
1432 | break; | |
1433 | } | |
84b5dbf3 | 1434 | if (errCode < 0) { |
336fea92 | 1435 | dev_err(dev->dev, |
b7085c08 | 1436 | "%s: cx231xx_AGC mode to Analog - errCode [%d]!\n", |
ed0e3729 | 1437 | __func__, errCode); |
e0d3bafd SD |
1438 | return errCode; |
1439 | } | |
1440 | ||
84b5dbf3 MCC |
1441 | /* set all alternate settings to zero initially */ |
1442 | cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0); | |
1443 | cx231xx_set_alt_setting(dev, INDEX_VANC, 0); | |
1444 | cx231xx_set_alt_setting(dev, INDEX_HANC, 0); | |
1445 | if (dev->board.has_dvb) | |
1446 | cx231xx_set_alt_setting(dev, INDEX_TS1, 0); | |
e0d3bafd | 1447 | |
660acd54 | 1448 | errCode = 0; |
e0d3bafd SD |
1449 | return errCode; |
1450 | } | |
1451 | EXPORT_SYMBOL_GPL(cx231xx_dev_init); | |
1452 | ||
1453 | void cx231xx_dev_uninit(struct cx231xx *dev) | |
1454 | { | |
84b5dbf3 | 1455 | /* Un Initialize I2C bus */ |
05e0dfd0 | 1456 | cx231xx_i2c_mux_unregister(dev); |
e0d3bafd SD |
1457 | cx231xx_i2c_unregister(&dev->i2c_bus[2]); |
1458 | cx231xx_i2c_unregister(&dev->i2c_bus[1]); | |
1459 | cx231xx_i2c_unregister(&dev->i2c_bus[0]); | |
1460 | } | |
84b5dbf3 | 1461 | EXPORT_SYMBOL_GPL(cx231xx_dev_uninit); |
e0d3bafd | 1462 | |
b9255176 SD |
1463 | /***************************************************************** |
1464 | * G P I O related functions * | |
1465 | ******************************************************************/ | |
64fbf444 | 1466 | int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val, |
84b5dbf3 | 1467 | u8 len, u8 request, u8 direction) |
e0d3bafd | 1468 | { |
84b5dbf3 | 1469 | int status = 0; |
b9255176 | 1470 | struct VENDOR_REQUEST_IN ven_req; |
84b5dbf3 MCC |
1471 | |
1472 | /* Set wValue */ | |
1473 | ven_req.wValue = (u16) (gpio_bit >> 16 & 0xffff); | |
1474 | ||
1475 | /* set request */ | |
1476 | if (!request) { | |
1477 | if (direction) | |
1478 | ven_req.bRequest = VRT_GET_GPIO; /* 0x8 gpio */ | |
1479 | else | |
1480 | ven_req.bRequest = VRT_SET_GPIO; /* 0x9 gpio */ | |
1481 | } else { | |
1482 | if (direction) | |
1483 | ven_req.bRequest = VRT_GET_GPIE; /* 0xa gpie */ | |
1484 | else | |
1485 | ven_req.bRequest = VRT_SET_GPIE; /* 0xb gpie */ | |
1486 | } | |
e0d3bafd | 1487 | |
84b5dbf3 MCC |
1488 | /* set index value */ |
1489 | ven_req.wIndex = (u16) (gpio_bit & 0xffff); | |
e0d3bafd | 1490 | |
84b5dbf3 MCC |
1491 | /* set wLength value */ |
1492 | ven_req.wLength = len; | |
e0d3bafd | 1493 | |
84b5dbf3 MCC |
1494 | /* set bData value */ |
1495 | ven_req.bData = 0; | |
e0d3bafd | 1496 | |
84b5dbf3 MCC |
1497 | /* set the buffer for read / write */ |
1498 | ven_req.pBuff = gpio_val; | |
1499 | ||
1500 | /* set the direction */ | |
1501 | if (direction) { | |
1502 | ven_req.direction = USB_DIR_IN; | |
1503 | memset(ven_req.pBuff, 0x00, ven_req.wLength); | |
1504 | } else | |
1505 | ven_req.direction = USB_DIR_OUT; | |
1506 | ||
1507 | ||
1508 | /* call common vendor command request */ | |
1509 | status = cx231xx_send_vendor_cmd(dev, &ven_req); | |
1510 | if (status < 0) { | |
336fea92 | 1511 | dev_err(dev->dev, "%s: failed with status -%d\n", |
ed0e3729 | 1512 | __func__, status); |
84b5dbf3 | 1513 | } |
e0d3bafd | 1514 | |
84b5dbf3 | 1515 | return status; |
e0d3bafd | 1516 | } |
e0d3bafd SD |
1517 | EXPORT_SYMBOL_GPL(cx231xx_send_gpio_cmd); |
1518 | ||
b9255176 SD |
1519 | /***************************************************************** |
1520 | * C O N T R O L - Register R E A D / W R I T E functions * | |
1521 | *****************************************************************/ | |
e0d3bafd SD |
1522 | int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode) |
1523 | { | |
84b5dbf3 MCC |
1524 | u8 value[4] = { 0x0, 0x0, 0x0, 0x0 }; |
1525 | u32 tmp = 0; | |
1526 | int status = 0; | |
e0d3bafd | 1527 | |
84b5dbf3 MCC |
1528 | status = |
1529 | cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, address, value, 4); | |
1530 | if (status < 0) | |
1531 | return status; | |
e0d3bafd | 1532 | |
3f9280a8 | 1533 | tmp = le32_to_cpu(*((__le32 *) value)); |
84b5dbf3 | 1534 | tmp |= mode; |
e0d3bafd | 1535 | |
84b5dbf3 MCC |
1536 | value[0] = (u8) tmp; |
1537 | value[1] = (u8) (tmp >> 8); | |
1538 | value[2] = (u8) (tmp >> 16); | |
1539 | value[3] = (u8) (tmp >> 24); | |
e0d3bafd | 1540 | |
84b5dbf3 MCC |
1541 | status = |
1542 | cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, address, value, 4); | |
e0d3bafd | 1543 | |
84b5dbf3 | 1544 | return status; |
e0d3bafd SD |
1545 | } |
1546 | ||
b9255176 SD |
1547 | /***************************************************************** |
1548 | * I 2 C Internal C O N T R O L functions * | |
1549 | *****************************************************************/ | |
64fbf444 PB |
1550 | int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, |
1551 | u8 saddr_len, u32 *data, u8 data_len, int master) | |
1552 | { | |
1553 | int status = 0; | |
1554 | struct cx231xx_i2c_xfer_data req_data; | |
1555 | u8 value[64] = "0"; | |
1556 | ||
1557 | if (saddr_len == 0) | |
1558 | saddr = 0; | |
fe041646 | 1559 | else if (saddr_len == 1) |
64fbf444 PB |
1560 | saddr &= 0xff; |
1561 | ||
1562 | /* prepare xfer_data struct */ | |
1563 | req_data.dev_addr = dev_addr >> 1; | |
1564 | req_data.direction = I2C_M_RD; | |
1565 | req_data.saddr_len = saddr_len; | |
1566 | req_data.saddr_dat = saddr; | |
1567 | req_data.buf_size = data_len; | |
1568 | req_data.p_buffer = (u8 *) value; | |
1569 | ||
1570 | /* usb send command */ | |
1571 | if (master == 0) | |
1572 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], | |
1573 | &req_data); | |
1574 | else if (master == 1) | |
1575 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1], | |
1576 | &req_data); | |
1577 | else if (master == 2) | |
1578 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2], | |
1579 | &req_data); | |
1580 | ||
1581 | if (status >= 0) { | |
1582 | /* Copy the data read back to main buffer */ | |
1583 | if (data_len == 1) | |
1584 | *data = value[0]; | |
1585 | else if (data_len == 4) | |
1586 | *data = | |
1587 | value[0] | value[1] << 8 | value[2] << 16 | value[3] | |
1588 | << 24; | |
1589 | else if (data_len > 4) | |
1590 | *data = value[saddr]; | |
1591 | } | |
1592 | ||
1593 | return status; | |
1594 | } | |
1595 | ||
1596 | int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, | |
1597 | u8 saddr_len, u32 data, u8 data_len, int master) | |
1598 | { | |
1599 | int status = 0; | |
1600 | u8 value[4] = { 0, 0, 0, 0 }; | |
1601 | struct cx231xx_i2c_xfer_data req_data; | |
1602 | ||
1603 | value[0] = (u8) data; | |
1604 | value[1] = (u8) (data >> 8); | |
1605 | value[2] = (u8) (data >> 16); | |
1606 | value[3] = (u8) (data >> 24); | |
1607 | ||
1608 | if (saddr_len == 0) | |
1609 | saddr = 0; | |
fe041646 | 1610 | else if (saddr_len == 1) |
64fbf444 PB |
1611 | saddr &= 0xff; |
1612 | ||
1613 | /* prepare xfer_data struct */ | |
1614 | req_data.dev_addr = dev_addr >> 1; | |
1615 | req_data.direction = 0; | |
1616 | req_data.saddr_len = saddr_len; | |
1617 | req_data.saddr_dat = saddr; | |
1618 | req_data.buf_size = data_len; | |
1619 | req_data.p_buffer = value; | |
1620 | ||
1621 | /* usb send command */ | |
1622 | if (master == 0) | |
1623 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], | |
1624 | &req_data); | |
1625 | else if (master == 1) | |
1626 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1], | |
1627 | &req_data); | |
1628 | else if (master == 2) | |
1629 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2], | |
1630 | &req_data); | |
1631 | ||
1632 | return status; | |
1633 | } | |
1634 | ||
e0d3bafd | 1635 | int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr, |
b9255176 | 1636 | u8 saddr_len, u32 *data, u8 data_len) |
e0d3bafd | 1637 | { |
84b5dbf3 MCC |
1638 | int status = 0; |
1639 | struct cx231xx_i2c_xfer_data req_data; | |
1640 | u8 value[4] = { 0, 0, 0, 0 }; | |
1641 | ||
1642 | if (saddr_len == 0) | |
1643 | saddr = 0; | |
fe041646 | 1644 | else if (saddr_len == 1) |
84b5dbf3 MCC |
1645 | saddr &= 0xff; |
1646 | ||
1647 | /* prepare xfer_data struct */ | |
1648 | req_data.dev_addr = dev_addr >> 1; | |
1649 | req_data.direction = I2C_M_RD; | |
1650 | req_data.saddr_len = saddr_len; | |
1651 | req_data.saddr_dat = saddr; | |
1652 | req_data.buf_size = data_len; | |
1653 | req_data.p_buffer = (u8 *) value; | |
1654 | ||
1655 | /* usb send command */ | |
1656 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data); | |
1657 | ||
1658 | if (status >= 0) { | |
1659 | /* Copy the data read back to main buffer */ | |
1660 | if (data_len == 1) | |
1661 | *data = value[0]; | |
1662 | else | |
1663 | *data = | |
1664 | value[0] | value[1] << 8 | value[2] << 16 | value[3] | |
1665 | << 24; | |
1666 | } | |
1667 | ||
1668 | return status; | |
e0d3bafd SD |
1669 | } |
1670 | ||
1671 | int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, u16 saddr, | |
84b5dbf3 | 1672 | u8 saddr_len, u32 data, u8 data_len) |
e0d3bafd | 1673 | { |
84b5dbf3 MCC |
1674 | int status = 0; |
1675 | u8 value[4] = { 0, 0, 0, 0 }; | |
1676 | struct cx231xx_i2c_xfer_data req_data; | |
1677 | ||
1678 | value[0] = (u8) data; | |
1679 | value[1] = (u8) (data >> 8); | |
1680 | value[2] = (u8) (data >> 16); | |
1681 | value[3] = (u8) (data >> 24); | |
1682 | ||
1683 | if (saddr_len == 0) | |
1684 | saddr = 0; | |
fe041646 | 1685 | else if (saddr_len == 1) |
84b5dbf3 MCC |
1686 | saddr &= 0xff; |
1687 | ||
1688 | /* prepare xfer_data struct */ | |
1689 | req_data.dev_addr = dev_addr >> 1; | |
1690 | req_data.direction = 0; | |
1691 | req_data.saddr_len = saddr_len; | |
1692 | req_data.saddr_dat = saddr; | |
1693 | req_data.buf_size = data_len; | |
1694 | req_data.p_buffer = value; | |
1695 | ||
1696 | /* usb send command */ | |
1697 | status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data); | |
1698 | ||
1699 | return status; | |
e0d3bafd SD |
1700 | } |
1701 | ||
84b5dbf3 MCC |
1702 | int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size, |
1703 | u16 register_address, u8 bit_start, u8 bit_end, | |
1704 | u32 value) | |
e0d3bafd | 1705 | { |
84b5dbf3 MCC |
1706 | int status = 0; |
1707 | u32 tmp; | |
1708 | u32 mask = 0; | |
1709 | int i; | |
1710 | ||
b9255176 | 1711 | if (bit_start > (size - 1) || bit_end > (size - 1)) |
84b5dbf3 | 1712 | return -1; |
e0d3bafd | 1713 | |
84b5dbf3 MCC |
1714 | if (size == 8) { |
1715 | status = | |
1716 | cx231xx_read_i2c_data(dev, dev_addr, register_address, 2, | |
1717 | &tmp, 1); | |
1718 | } else { | |
1719 | status = | |
1720 | cx231xx_read_i2c_data(dev, dev_addr, register_address, 2, | |
1721 | &tmp, 4); | |
1722 | } | |
e0d3bafd | 1723 | |
b9255176 | 1724 | if (status < 0) |
84b5dbf3 | 1725 | return status; |
84b5dbf3 MCC |
1726 | |
1727 | mask = 1 << bit_end; | |
b9255176 | 1728 | for (i = bit_end; i > bit_start && i > 0; i--) |
84b5dbf3 | 1729 | mask = mask + (1 << (i - 1)); |
84b5dbf3 MCC |
1730 | |
1731 | value <<= bit_start; | |
1732 | ||
1733 | if (size == 8) { | |
1734 | tmp &= ~mask; | |
1735 | tmp |= value; | |
1736 | tmp &= 0xff; | |
1737 | status = | |
1738 | cx231xx_write_i2c_data(dev, dev_addr, register_address, 2, | |
1739 | tmp, 1); | |
1740 | } else { | |
1741 | tmp &= ~mask; | |
1742 | tmp |= value; | |
1743 | status = | |
1744 | cx231xx_write_i2c_data(dev, dev_addr, register_address, 2, | |
1745 | tmp, 4); | |
1746 | } | |
1747 | ||
1748 | return status; | |
1749 | } | |
e0d3bafd SD |
1750 | |
1751 | int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr, | |
84b5dbf3 | 1752 | u16 saddr, u32 mask, u32 value) |
e0d3bafd | 1753 | { |
84b5dbf3 MCC |
1754 | u32 temp; |
1755 | int status = 0; | |
e0d3bafd | 1756 | |
84b5dbf3 | 1757 | status = cx231xx_read_i2c_data(dev, dev_addr, saddr, 2, &temp, 4); |
e0d3bafd | 1758 | |
84b5dbf3 MCC |
1759 | if (status < 0) |
1760 | return status; | |
e0d3bafd | 1761 | |
84b5dbf3 MCC |
1762 | temp &= ~mask; |
1763 | temp |= value; | |
e0d3bafd | 1764 | |
84b5dbf3 | 1765 | status = cx231xx_write_i2c_data(dev, dev_addr, saddr, 2, temp, 4); |
e0d3bafd | 1766 | |
84b5dbf3 | 1767 | return status; |
e0d3bafd SD |
1768 | } |
1769 | ||
1770 | u32 cx231xx_set_field(u32 field_mask, u32 data) | |
1771 | { | |
84b5dbf3 | 1772 | u32 temp; |
e0d3bafd | 1773 | |
b9255176 | 1774 | for (temp = field_mask; (temp & 1) == 0; temp >>= 1) |
84b5dbf3 | 1775 | data <<= 1; |
e0d3bafd | 1776 | |
84b5dbf3 | 1777 | return data; |
e0d3bafd | 1778 | } |