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CommitLineData
e0d3bafd
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1/*
2 cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices
3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
84b5dbf3 5 Based on em28xx driver
e0d3bafd
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6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#ifndef _CX231XX_H
23#define _CX231XX_H
24
25#include <linux/videodev2.h>
b1196126
SD
26#include <linux/types.h>
27#include <linux/ioctl.h>
e0d3bafd 28#include <linux/i2c.h>
61b04cb2 29#include <linux/workqueue.h>
e0d3bafd 30#include <linux/mutex.h>
b7085c08 31#include <linux/usb.h>
b1196126 32
64fbf444 33#include <media/cx2341x.h>
b1196126
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34
35#include <media/videobuf-vmalloc.h>
36#include <media/v4l2-device.h>
d2370f8e 37#include <media/v4l2-ctrls.h>
1d08a4fa 38#include <media/v4l2-fh.h>
6bda9644 39#include <media/rc-core.h>
b5dcee22 40#include <media/i2c/ir-kbd-i2c.h>
e0d3bafd 41#include <media/videobuf-dvb.h>
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42
43#include "cx231xx-reg.h"
6e4f574b 44#include "cx231xx-pcb-cfg.h"
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45#include "cx231xx-conf-reg.h"
46
e0d3bafd 47#define DRIVER_NAME "cx231xx"
44ecf1df 48#define PWR_SLEEP_INTERVAL 10
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49
50/* I2C addresses for control block in Cx231xx */
ecc67d10
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51#define AFE_DEVICE_ADDRESS 0x60
52#define I2S_BLK_DEVICE_ADDRESS 0x98
53#define VID_BLK_I2C_ADDRESS 0x88
64fbf444 54#define VERVE_I2C_ADDRESS 0x40
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55#define DIF_USE_BASEBAND 0xFFFFFFFF
56
57/* Boards supported by driver */
58#define CX231XX_BOARD_UNKNOWN 0
955e6ed8
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59#define CX231XX_BOARD_CNXT_CARRAERA 1
60#define CX231XX_BOARD_CNXT_SHELBY 2
61#define CX231XX_BOARD_CNXT_RDE_253S 3
62#define CX231XX_BOARD_CNXT_RDU_253S 4
64fbf444 63#define CX231XX_BOARD_CNXT_VIDEO_GRABBER 5
955e6ed8
MCC
64#define CX231XX_BOARD_CNXT_RDE_250 6
65#define CX231XX_BOARD_CNXT_RDU_250 7
1a50fdde 66#define CX231XX_BOARD_HAUPPAUGE_EXETER 8
4270c3ca 67#define CX231XX_BOARD_HAUPPAUGE_USBLIVE2 9
9417bc6d 68#define CX231XX_BOARD_PV_PLAYTV_USB_HYBRID 10
4e105039 69#define CX231XX_BOARD_PV_XCAPTURE_USB 11
eeaaf817 70#define CX231XX_BOARD_KWORLD_UB430_USB_HYBRID 12
2a7b6a40 71#define CX231XX_BOARD_ICONBIT_U100 13
de8ae0d5
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72#define CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL 14
73#define CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC 15
68c97bf3 74#define CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2 16
3ead1ba3 75#define CX231XX_BOARD_OTG102 17
8b1255a2 76#define CX231XX_BOARD_KWORLD_UB445_USB_HYBRID 18
dd2e7dd2 77#define CX231XX_BOARD_HAUPPAUGE_930C_HD_1113xx 19
9e49f7c3 78#define CX231XX_BOARD_HAUPPAUGE_930C_HD_1114xx 20
809abdbf 79#define CX231XX_BOARD_HAUPPAUGE_955Q 21
eee1d06d 80#define CX231XX_BOARD_TERRATEC_GRABBY 22
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81
82/* Limits minimum and default number of buffers */
83#define CX231XX_MIN_BUF 4
84#define CX231XX_DEF_BUF 12
85#define CX231XX_DEF_VBI_BUF 6
86
87#define VBI_LINE_COUNT 17
88#define VBI_LINE_LENGTH 1440
89
90/*Limits the max URB message size */
91#define URB_MAX_CTRL_SIZE 80
92
93/* Params for validated field */
94#define CX231XX_BOARD_NOT_VALIDATED 1
84b5dbf3 95#define CX231XX_BOARD_VALIDATED 0
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96
97/* maximum number of cx231xx boards */
98#define CX231XX_MAXBOARDS 8
99
100/* maximum number of frames that can be queued */
101#define CX231XX_NUM_FRAMES 5
102
103/* number of buffers for isoc transfers */
104#define CX231XX_NUM_BUFS 8
105
106/* number of packets for each buffer
107 windows requests only 40 packets .. so we better do the same
108 this is what I found out for all alternate numbers there!
109 */
110#define CX231XX_NUM_PACKETS 40
111
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112/* default alternate; 0 means choose the best */
113#define CX231XX_PINOUT 0
114
115#define CX231XX_INTERLACED_DEFAULT 1
116
e0d3bafd 117/* time to wait when stopping the isoc transfer */
b9255176
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118#define CX231XX_URB_TIMEOUT \
119 msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS)
e0d3bafd 120
64fbf444
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121#define CX231xx_NORMS (\
122 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
123 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
124 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
125 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
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PB
126
127#define SLEEP_S5H1432 30
128#define CX23417_OSC_EN 8
129#define CX23417_RESET 9
130
131struct cx23417_fmt {
132 char *name;
133 u32 fourcc; /* v4l2 format id */
134 int depth;
135 int flags;
136 u32 cxformat;
137};
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138enum cx231xx_mode {
139 CX231XX_SUSPEND,
140 CX231XX_ANALOG_MODE,
141 CX231XX_DIGITAL_MODE,
142};
143
144enum cx231xx_std_mode {
145 CX231XX_TV_AIR = 0,
146 CX231XX_TV_CABLE
147};
148
149enum cx231xx_stream_state {
150 STREAM_OFF,
151 STREAM_INTERRUPT,
152 STREAM_ON,
153};
154
155struct cx231xx;
156
64fbf444 157struct cx231xx_isoc_ctl {
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158 /* max packet size of isoc transaction */
159 int max_pkt_size;
e0d3bafd 160
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161 /* number of allocated urbs */
162 int num_bufs;
e0d3bafd 163
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164 /* urb for isoc transfers */
165 struct urb **urb;
e0d3bafd 166
84b5dbf3
MCC
167 /* transfer buffers for isoc transfer */
168 char **transfer_buffer;
e0d3bafd 169
84b5dbf3
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170 /* Last buffer command and region */
171 u8 cmd;
172 int pos, size, pktsize;
e0d3bafd 173
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MCC
174 /* Last field: ODD or EVEN? */
175 int field;
e0d3bafd 176
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177 /* Stores incomplete commands */
178 u32 tmp_buf;
179 int tmp_buf_len;
e0d3bafd 180
84b5dbf3
MCC
181 /* Stores already requested buffers */
182 struct cx231xx_buffer *buf;
e0d3bafd 183
84b5dbf3
MCC
184 /* Stores the number of received fields */
185 int nfields;
e0d3bafd 186
84b5dbf3 187 /* isoc urb callback */
cde4362f 188 int (*isoc_copy) (struct cx231xx *dev, struct urb *urb);
e0d3bafd
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189};
190
64fbf444
PB
191struct cx231xx_bulk_ctl {
192 /* max packet size of bulk transaction */
193 int max_pkt_size;
194
195 /* number of allocated urbs */
196 int num_bufs;
197
198 /* urb for bulk transfers */
199 struct urb **urb;
200
201 /* transfer buffers for bulk transfer */
202 char **transfer_buffer;
203
204 /* Last buffer command and region */
205 u8 cmd;
206 int pos, size, pktsize;
207
208 /* Last field: ODD or EVEN? */
209 int field;
210
211 /* Stores incomplete commands */
212 u32 tmp_buf;
213 int tmp_buf_len;
214
215 /* Stores already requested buffers */
216 struct cx231xx_buffer *buf;
217
218 /* Stores the number of received fields */
219 int nfields;
220
221 /* bulk urb callback */
222 int (*bulk_copy) (struct cx231xx *dev, struct urb *urb);
223};
224
e0d3bafd 225struct cx231xx_fmt {
84b5dbf3
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226 char *name;
227 u32 fourcc; /* v4l2 format id */
228 int depth;
229 int reg;
e0d3bafd
SD
230};
231
232/* buffer for one video frame */
233struct cx231xx_buffer {
234 /* common v4l buffer stuff -- must be first */
235 struct videobuf_buffer vb;
236
237 struct list_head frame;
238 int top_field;
239 int receiving;
240};
241
64fbf444
PB
242enum ps_package_head {
243 CX231XX_NEED_ADD_PS_PACKAGE_HEAD = 0,
244 CX231XX_NONEED_PS_PACKAGE_HEAD
245};
246
e0d3bafd 247struct cx231xx_dmaqueue {
84b5dbf3
MCC
248 struct list_head active;
249 struct list_head queued;
e0d3bafd 250
84b5dbf3 251 wait_queue_head_t wq;
e0d3bafd
SD
252
253 /* Counters to control buffer fill */
84b5dbf3
MCC
254 int pos;
255 u8 is_partial_line;
256 u8 partial_buf[8];
257 u8 last_sav;
258 int current_field;
259 u32 bytes_left_in_line;
260 u32 lines_completed;
261 u8 field1_done;
262 u32 lines_per_field;
64fbf444
PB
263
264 /*Mpeg2 control buffer*/
265 u8 *p_left_data;
266 u32 left_data_count;
267 u8 mpeg_buffer_done;
268 u32 mpeg_buffer_completed;
269 enum ps_package_head add_ps_package_head;
270 char ps_head[10];
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271};
272
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273/* inputs */
274
275#define MAX_CX231XX_INPUT 4
276
277enum cx231xx_itype {
278 CX231XX_VMUX_COMPOSITE1 = 1,
279 CX231XX_VMUX_SVIDEO,
280 CX231XX_VMUX_TELEVISION,
84b5dbf3
MCC
281 CX231XX_VMUX_CABLE,
282 CX231XX_RADIO,
283 CX231XX_VMUX_DVB,
e0d3bafd
SD
284 CX231XX_VMUX_DEBUG
285};
286
287enum cx231xx_v_input {
84b5dbf3
MCC
288 CX231XX_VIN_1_1 = 0x1,
289 CX231XX_VIN_2_1,
290 CX231XX_VIN_3_1,
291 CX231XX_VIN_4_1,
292 CX231XX_VIN_1_2 = 0x01,
293 CX231XX_VIN_2_2,
294 CX231XX_VIN_3_2,
295 CX231XX_VIN_1_3 = 0x1,
296 CX231XX_VIN_2_3,
297 CX231XX_VIN_3_3,
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298};
299
300/* cx231xx has two audio inputs: tuner and line in */
301enum cx231xx_amux {
302 /* This is the only entry for cx231xx tuner input */
84b5dbf3 303 CX231XX_AMUX_VIDEO, /* cx231xx tuner */
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304 CX231XX_AMUX_LINE_IN, /* Line In */
305};
306
307struct cx231xx_reg_seq {
308 unsigned char bit;
84b5dbf3 309 unsigned char val;
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310 int sleep;
311};
312
313struct cx231xx_input {
314 enum cx231xx_itype type;
315 unsigned int vmux;
316 enum cx231xx_amux amux;
317 struct cx231xx_reg_seq *gpio;
318};
319
320#define INPUT(nr) (&cx231xx_boards[dev->model].input[nr])
321
322enum cx231xx_decoder {
323 CX231XX_NODECODER,
324 CX231XX_AVDECODER
325};
326
b9255176 327enum CX231XX_I2C_MASTER_PORT {
9abe3b89
MS
328 I2C_0 = 0, /* master 0 - internal connection */
329 I2C_1 = 1, /* master 1 - used with mux */
330 I2C_2 = 2, /* master 2 */
331 I2C_1_MUX_1 = 3, /* master 1 - port 1 (I2C_DEMOD_EN = 0) */
332 I2C_1_MUX_3 = 4 /* master 1 - port 3 (I2C_DEMOD_EN = 1) */
b9255176 333};
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SD
334
335struct cx231xx_board {
336 char *name;
337 int vchannels;
338 int tuner_type;
339 int tuner_addr;
84b5dbf3 340 v4l2_std_id norm; /* tv norm */
e0d3bafd 341
84b5dbf3
MCC
342 /* demod related */
343 int demod_addr;
344 u8 demod_xfer_mode; /* 0 - Serial; 1 - parallel */
e0d3bafd
SD
345
346 /* GPIO Pins */
347 struct cx231xx_reg_seq *dvb_gpio;
348 struct cx231xx_reg_seq *suspend_gpio;
349 struct cx231xx_reg_seq *tuner_gpio;
78bb6df6
MCC
350 /* Negative means don't use it */
351 s8 tuner_sif_gpio;
352 s8 tuner_scl_gpio;
353 s8 tuner_sda_gpio;
e0d3bafd 354
84b5dbf3
MCC
355 /* PIN ctrl */
356 u32 ctl_pin_status_mask;
357 u8 agc_analog_digital_select_gpio;
358 u32 gpio_pin_status_mask;
e0d3bafd 359
84b5dbf3
MCC
360 /* i2c masters */
361 u8 tuner_i2c_master;
362 u8 demod_i2c_master;
9ab66912
MCC
363 u8 ir_i2c_master;
364
365 /* for devices with I2C chips for IR */
29e3ec19 366 char *rc_map_name;
e0d3bafd
SD
367
368 unsigned int max_range_640_480:1;
369 unsigned int has_dvb:1;
2f861387 370 unsigned int has_417:1;
e0d3bafd 371 unsigned int valid:1;
2f861387
MCC
372 unsigned int no_alt_vanc:1;
373 unsigned int external_av:1;
e0d3bafd
SD
374
375 unsigned char xclk, i2c_speed;
376
377 enum cx231xx_decoder decoder;
88806218 378 int output_mode;
e0d3bafd 379
84b5dbf3
MCC
380 struct cx231xx_input input[MAX_CX231XX_INPUT];
381 struct cx231xx_input radio;
b088ba65 382 struct rc_map *ir_codes;
e0d3bafd
SD
383};
384
385/* device states */
386enum cx231xx_dev_state {
387 DEV_INITIALIZED = 0x01,
388 DEV_DISCONNECTED = 0x02,
e0d3bafd
SD
389};
390
84b5dbf3
MCC
391enum AFE_MODE {
392 AFE_MODE_LOW_IF,
393 AFE_MODE_BASEBAND,
394 AFE_MODE_EU_HI_IF,
395 AFE_MODE_US_HI_IF,
396 AFE_MODE_JAPAN_HI_IF
e0d3bafd
SD
397};
398
84b5dbf3
MCC
399enum AUDIO_INPUT {
400 AUDIO_INPUT_MUTE,
401 AUDIO_INPUT_LINE,
402 AUDIO_INPUT_TUNER_TV,
403 AUDIO_INPUT_SPDIF,
404 AUDIO_INPUT_TUNER_FM
e0d3bafd
SD
405};
406
407#define CX231XX_AUDIO_BUFS 5
64fbf444
PB
408#define CX231XX_NUM_AUDIO_PACKETS 16
409#define CX231XX_ISO_NUM_AUDIO_PACKETS 64
e0d3bafd 410
e0d3bafd
SD
411/* cx231xx extensions */
412#define CX231XX_AUDIO 0x10
413#define CX231XX_DVB 0x20
414
415struct cx231xx_audio {
416 char name[50];
417 char *transfer_buffer[CX231XX_AUDIO_BUFS];
418 struct urb *urb[CX231XX_AUDIO_BUFS];
419 struct usb_device *udev;
420 unsigned int capture_transfer_done;
84b5dbf3 421 struct snd_pcm_substream *capture_pcm_substream;
e0d3bafd
SD
422
423 unsigned int hwptr_done_capture;
84b5dbf3 424 struct snd_card *sndcard;
e0d3bafd
SD
425
426 int users, shutdown;
64fbf444 427 /* locks */
e0d3bafd
SD
428 spinlock_t slock;
429
84b5dbf3
MCC
430 int alt; /* alternate */
431 int max_pkt_size; /* max packet size of isoc transaction */
432 int num_alt; /* Number of alternative settings */
e0d3bafd 433 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
84b5dbf3 434 u16 end_point_addr;
e0d3bafd
SD
435};
436
437struct cx231xx;
438
439struct cx231xx_fh {
1d08a4fa 440 struct v4l2_fh fh;
e0d3bafd 441 struct cx231xx *dev;
84b5dbf3 442 unsigned int stream_on:1; /* Locks streams */
84b5dbf3 443 enum v4l2_buf_type type;
64fbf444 444
71590765 445 struct videobuf_queue vb_vidq;
64fbf444
PB
446
447 /* vbi capture */
448 struct videobuf_queue vidq;
449 struct videobuf_queue vbiq;
450
451 /* MPEG Encoder specifics ONLY */
452
453 atomic_t v4l_reading;
e0d3bafd
SD
454};
455
b9255176 456/*****************************************************************/
e0d3bafd 457/* set/get i2c */
b9255176
SD
458/* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */
459#define I2C_SPEED_1M 0x0
460#define I2C_SPEED_400K 0x1
461#define I2C_SPEED_100K 0x2
462#define I2C_SPEED_5M 0x3
463
464/* 0-- STOP transaction */
465#define I2C_STOP 0x0
466/* 1-- do not transmit STOP at end of transaction */
467#define I2C_NOSTOP 0x1
b251e618 468/* 1--allow slave to insert clock wait states */
b9255176 469#define I2C_SYNC 0x1
e0d3bafd
SD
470
471struct cx231xx_i2c {
84b5dbf3 472 struct cx231xx *dev;
e0d3bafd 473
84b5dbf3 474 int nr;
e0d3bafd
SD
475
476 /* i2c i/o */
84b5dbf3 477 struct i2c_adapter i2c_adap;
84b5dbf3 478 u32 i2c_rc;
e0d3bafd
SD
479
480 /* different settings for each bus */
84b5dbf3
MCC
481 u8 i2c_period;
482 u8 i2c_nostop;
483 u8 i2c_reserve;
e0d3bafd
SD
484};
485
84b5dbf3
MCC
486struct cx231xx_i2c_xfer_data {
487 u8 dev_addr;
488 u8 direction; /* 1 - IN, 0 - OUT */
489 u8 saddr_len; /* sub address len */
490 u16 saddr_dat; /* sub addr data */
491 u8 buf_size; /* buffer size */
492 u8 *p_buffer; /* pointer to the buffer */
e0d3bafd
SD
493};
494
6e4f574b 495struct VENDOR_REQUEST_IN {
84b5dbf3
MCC
496 u8 bRequest;
497 u16 wValue;
498 u16 wIndex;
499 u16 wLength;
500 u8 direction;
501 u8 bData;
502 u8 *pBuff;
b9255176 503};
e0d3bafd 504
64fbf444
PB
505struct cx231xx_tvnorm {
506 char *name;
507 v4l2_std_id id;
508 u32 cxiformat;
509 u32 cxoformat;
510};
511
6e4f574b 512enum TRANSFER_TYPE {
84b5dbf3
MCC
513 Raw_Video = 0,
514 Audio,
515 Vbi, /* VANC */
516 Sliced_cc, /* HANC */
517 TS1_serial_mode,
518 TS2,
519 TS1_parallel_mode
b9255176 520} ;
e0d3bafd
SD
521
522struct cx231xx_video_mode {
84b5dbf3 523 /* Isoc control struct */
e0d3bafd 524 struct cx231xx_dmaqueue vidq;
64fbf444
PB
525 struct cx231xx_isoc_ctl isoc_ctl;
526 struct cx231xx_bulk_ctl bulk_ctl;
527 /* locks */
e0d3bafd
SD
528 spinlock_t slock;
529
530 /* usb transfer */
84b5dbf3
MCC
531 int alt; /* alternate */
532 int max_pkt_size; /* max packet size of isoc transaction */
533 int num_alt; /* Number of alternative settings */
e0d3bafd 534 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
84b5dbf3 535 u16 end_point_addr;
e0d3bafd 536};
1e451808 537
64fbf444
PB
538struct cx231xx_tsport {
539 struct cx231xx *dev;
540
541 int nr;
542 int sram_chno;
543
544 struct videobuf_dvb_frontends frontends;
545
546 /* dma queues */
547
548 u32 ts_packet_size;
549 u32 ts_packet_count;
550
551 int width;
552 int height;
553
554 /* locks */
555 spinlock_t slock;
556
557 /* registers */
558 u32 reg_gpcnt;
559 u32 reg_gpcnt_ctl;
560 u32 reg_dma_ctl;
561 u32 reg_lngth;
562 u32 reg_hw_sop_ctrl;
563 u32 reg_gen_ctrl;
564 u32 reg_bd_pkt_status;
565 u32 reg_sop_status;
566 u32 reg_fifo_ovfl_stat;
567 u32 reg_vld_misc;
568 u32 reg_ts_clk_en;
569 u32 reg_ts_int_msk;
570 u32 reg_ts_int_stat;
571 u32 reg_src_sel;
572
573 /* Default register vals */
574 int pci_irqmask;
575 u32 dma_ctl_val;
576 u32 ts_int_msk_val;
577 u32 gen_ctrl_val;
578 u32 ts_clk_en_val;
579 u32 src_sel_val;
580 u32 vld_misc_val;
581 u32 hw_sop_ctrl_val;
582
583 /* Allow a single tsport to have multiple frontends */
584 u32 num_frontends;
585 void *port_priv;
586};
e0d3bafd 587
e0d3bafd
SD
588/* main device struct */
589struct cx231xx {
590 /* generic device properties */
84b5dbf3
MCC
591 char name[30]; /* name (including minor) of the device */
592 int model; /* index in the device_data struct */
593 int devno; /* marks the number of this device */
336fea92 594 struct device *dev; /* pointer to USB interface's dev */
e0d3bafd
SD
595
596 struct cx231xx_board board;
597
9ab66912 598 /* For I2C IR support */
141bb0dc 599 struct IR_i2c_init_data init_data;
7528cd27 600 struct i2c_client *ir_i2c_client;
9ab66912 601
84b5dbf3
MCC
602 unsigned int stream_on:1; /* Locks streams */
603 unsigned int vbi_stream_on:1; /* Locks streams for VBI */
e0d3bafd
SD
604 unsigned int has_audio_class:1;
605 unsigned int has_alsa_audio:1;
606
77e97ba2
MCC
607 unsigned int i2c_scan_running:1; /* true only during i2c_scan */
608
84b5dbf3 609 struct cx231xx_fmt *format;
e0d3bafd 610
b1196126
SD
611 struct v4l2_device v4l2_dev;
612 struct v4l2_subdev *sd_cx25840;
613 struct v4l2_subdev *sd_tuner;
d2370f8e
HV
614 struct v4l2_ctrl_handler ctrl_handler;
615 struct v4l2_ctrl_handler radio_ctrl_handler;
88b6ffed 616 struct cx2341x_handler mpeg_ctrl_handler;
b1196126 617
61b04cb2
MCC
618 struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */
619 atomic_t stream_started; /* stream should be running if true */
620
84b5dbf3 621 struct list_head devlist;
e0d3bafd 622
84b5dbf3
MCC
623 int tuner_type; /* type of the tuner */
624 int tuner_addr; /* tuner address */
e0d3bafd 625
84b5dbf3
MCC
626 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
627 struct cx231xx_i2c i2c_bus[3];
15c212dd
MS
628 struct i2c_adapter *i2c_mux_adap[2];
629
84b5dbf3 630 unsigned int xc_fw_load_done:1;
a1f26765 631 unsigned int port_3_switch_enabled:1;
64fbf444 632 /* locks */
84b5dbf3 633 struct mutex gpio_i2c_lock;
64fbf444 634 struct mutex i2c_lock;
e0d3bafd
SD
635
636 /* video for linux */
84b5dbf3 637 int users; /* user count for exclusive use */
60acf187 638 struct video_device vdev; /* video for linux device struct */
84b5dbf3
MCC
639 v4l2_std_id norm; /* selected tv norm */
640 int ctl_freq; /* selected frequency */
641 unsigned int ctl_ainput; /* selected audio input */
e0d3bafd
SD
642
643 /* frame properties */
84b5dbf3
MCC
644 int width; /* current frame width */
645 int height; /* current frame height */
84b5dbf3 646 int interlaced; /* 1=interlace fileds, 0=just top fileds */
e0d3bafd
SD
647
648 struct cx231xx_audio adev;
649
650 /* states */
651 enum cx231xx_dev_state state;
652
84b5dbf3 653 struct work_struct request_module_wk;
e0d3bafd
SD
654
655 /* locks */
656 struct mutex lock;
84b5dbf3 657 struct mutex ctrl_urb_lock; /* protects urb_buf */
e0d3bafd
SD
658 struct list_head inqueue, outqueue;
659 wait_queue_head_t open, wait_frame, wait_stream;
60acf187
HV
660 struct video_device vbi_dev;
661 struct video_device radio_dev;
e0d3bafd 662
1d058bdc
MCC
663#if defined(CONFIG_MEDIA_CONTROLLER)
664 struct media_device *media_dev;
b6a40e72 665 struct media_pad video_pad, vbi_pad;
1d058bdc
MCC
666#endif
667
e0d3bafd
SD
668 unsigned char eedata[256];
669
84b5dbf3
MCC
670 struct cx231xx_video_mode video_mode;
671 struct cx231xx_video_mode vbi_mode;
672 struct cx231xx_video_mode sliced_cc_mode;
673 struct cx231xx_video_mode ts1_mode;
e0d3bafd 674
64fbf444
PB
675 atomic_t devlist_count;
676
84b5dbf3
MCC
677 struct usb_device *udev; /* the usb device */
678 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
e0d3bafd
SD
679
680 /* helper funcs that call usb_control_msg */
cde4362f 681 int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
e0d3bafd 682 char *buf, int len);
cde4362f 683 int (*cx231xx_write_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 684 char *buf, int len);
cde4362f 685 int (*cx231xx_send_usb_command) (struct cx231xx_i2c *i2c_bus,
b9255176 686 struct cx231xx_i2c_xfer_data *req_data);
cde4362f
MCC
687 int (*cx231xx_gpio_i2c_read) (struct cx231xx *dev, u8 dev_addr,
688 u8 *buf, u8 len);
689 int (*cx231xx_gpio_i2c_write) (struct cx231xx *dev, u8 dev_addr,
690 u8 *buf, u8 len);
84b5dbf3 691
cde4362f
MCC
692 int (*cx231xx_set_analog_freq) (struct cx231xx *dev, u32 freq);
693 int (*cx231xx_reset_analog_tuner) (struct cx231xx *dev);
e0d3bafd
SD
694
695 enum cx231xx_mode mode;
696
697 struct cx231xx_dvb *dvb;
698
84b5dbf3
MCC
699 /* Cx231xx supported PCB config's */
700 struct pcb_config current_pcb_config;
701 u8 current_scenario_idx;
702 u8 interface_count;
703 u8 max_iad_interface_count;
e0d3bafd 704
84b5dbf3
MCC
705 /* GPIO related register direction and values */
706 u32 gpio_dir;
707 u32 gpio_val;
e0d3bafd 708
84b5dbf3
MCC
709 /* Power Modes */
710 int power_mode;
e0d3bafd 711
ecc67d10
SD
712 /* afe parameters */
713 enum AFE_MODE afe_mode;
714 u32 afe_ref_count;
e0d3bafd 715
84b5dbf3
MCC
716 /* video related parameters */
717 u32 video_input;
718 u32 active_mode;
719 u8 vbi_or_sliced_cc_mode; /* 0 - vbi ; 1 - sliced cc mode */
720 enum cx231xx_std_mode std_mode; /* 0 - Air; 1 - cable */
e0d3bafd 721
64fbf444
PB
722 /*mode: digital=1 or analog=0*/
723 u8 mode_tv;
724
725 u8 USE_ISO;
726 struct cx231xx_tvnorm encodernorm;
727 struct cx231xx_tsport ts1, ts2;
60acf187 728 struct video_device v4l_device;
64fbf444
PB
729 atomic_t v4l_reader_count;
730 u32 freq;
731 unsigned int input;
732 u32 cx23417_mailbox;
733 u32 __iomem *lmmio;
734 u8 __iomem *bmmio;
e0d3bafd
SD
735};
736
64fbf444
PB
737extern struct list_head cx231xx_devlist;
738
b1196126
SD
739#define cx25840_call(cx231xx, o, f, args...) \
740 v4l2_subdev_call(cx231xx->sd_cx25840, o, f, ##args)
741#define tuner_call(cx231xx, o, f, args...) \
742 v4l2_subdev_call(cx231xx->sd_tuner, o, f, ##args)
743#define call_all(dev, o, f, args...) \
744 v4l2_device_call_until_err(&dev->v4l2_dev, 0, o, f, ##args)
745
e0d3bafd
SD
746struct cx231xx_ops {
747 struct list_head next;
748 char *name;
749 int id;
84b5dbf3
MCC
750 int (*init) (struct cx231xx *);
751 int (*fini) (struct cx231xx *);
e0d3bafd
SD
752};
753
754/* call back functions in dvb module */
84b5dbf3
MCC
755int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq);
756int cx231xx_reset_analog_tuner(struct cx231xx *dev);
e0d3bafd
SD
757
758/* Provided by cx231xx-i2c.c */
7c894a3b 759void cx231xx_do_i2c_scan(struct cx231xx *dev, int i2c_port);
e0d3bafd
SD
760int cx231xx_i2c_register(struct cx231xx_i2c *bus);
761int cx231xx_i2c_unregister(struct cx231xx_i2c *bus);
15c212dd
MS
762int cx231xx_i2c_mux_register(struct cx231xx *dev, int mux_no);
763void cx231xx_i2c_mux_unregister(struct cx231xx *dev, int mux_no);
c3c3f1ae 764struct i2c_adapter *cx231xx_get_i2c_adap(struct cx231xx *dev, int i2c_port);
e0d3bafd
SD
765
766/* Internal block control functions */
64fbf444
PB
767int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
768 u8 saddr_len, u32 *data, u8 data_len, int master);
769int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
770 u8 saddr_len, u32 data, u8 data_len, int master);
e0d3bafd 771int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr,
cde4362f 772 u16 saddr, u8 saddr_len, u32 *data, u8 data_len);
e0d3bafd 773int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr,
84b5dbf3
MCC
774 u16 saddr, u8 saddr_len, u32 data, u8 data_len);
775int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size,
776 u16 register_address, u8 bit_start, u8 bit_end,
777 u32 value);
e0d3bafd 778int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr,
84b5dbf3 779 u16 saddr, u32 mask, u32 value);
e0d3bafd
SD
780u32 cx231xx_set_field(u32 field_mask, u32 data);
781
64fbf444
PB
782/*verve r/w*/
783void initGPIO(struct cx231xx *dev);
784void uninitGPIO(struct cx231xx *dev);
ecc67d10
SD
785/* afe related functions */
786int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count);
787int cx231xx_afe_init_channels(struct cx231xx *dev);
788int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev);
789int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux);
790int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode);
791int cx231xx_afe_update_power_control(struct cx231xx *dev,
6e4f574b 792 enum AV_MODE avmode);
ecc67d10 793int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input);
e0d3bafd 794
ecc67d10
SD
795/* i2s block related functions */
796int cx231xx_i2s_blk_initialize(struct cx231xx *dev);
797int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev,
6e4f574b 798 enum AV_MODE avmode);
ecc67d10 799int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input);
e0d3bafd
SD
800
801/* DIF related functions */
802int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode,
84b5dbf3 803 u32 function_mode, u32 standard);
64fbf444
PB
804void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,
805 u8 spectral_invert, u32 mode);
806u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd);
807void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,
808 u8 spectral_invert, u32 mode);
809void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev);
810void reset_s5h1432_demod(struct cx231xx *dev);
811void cx231xx_dump_HH_reg(struct cx231xx *dev);
812void update_HH_register_after_set_DIF(struct cx231xx *dev);
64fbf444
PB
813
814
815
e0d3bafd
SD
816int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard);
817int cx231xx_tuner_pre_channel_change(struct cx231xx *dev);
818int cx231xx_tuner_post_channel_change(struct cx231xx *dev);
819
820/* video parser functions */
cde4362f
MCC
821u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size,
822 u32 *p_bytes_used);
823u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf,
824 u32 *p_bytes_used);
e0d3bafd 825int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f 826 u8 *p_buffer, u32 bytes_to_copy);
84b5dbf3
MCC
827void cx231xx_reset_video_buffer(struct cx231xx *dev,
828 struct cx231xx_dmaqueue *dma_q);
829u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q);
830u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f 831 u8 *p_line, u32 length, int field_number);
84b5dbf3 832u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f
MCC
833 u8 sav_eav, u8 *p_buffer, u32 buffer_size);
834void cx231xx_swab(u16 *from, u16 *to, u16 len);
e0d3bafd
SD
835
836/* Provided by cx231xx-core.c */
837
838u32 cx231xx_request_buffers(struct cx231xx *dev, u32 count);
839void cx231xx_queue_unusedframes(struct cx231xx *dev);
840void cx231xx_release_buffers(struct cx231xx *dev);
841
842/* read from control pipe */
843int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 844 char *buf, int len);
e0d3bafd
SD
845
846/* write to control pipe */
847int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 848 char *buf, int len);
e0d3bafd
SD
849int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode);
850
b9255176
SD
851int cx231xx_send_vendor_cmd(struct cx231xx *dev,
852 struct VENDOR_REQUEST_IN *ven_req);
e0d3bafd 853int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus,
b9255176 854 struct cx231xx_i2c_xfer_data *req_data);
e0d3bafd
SD
855
856/* Gpio related functions */
cde4362f 857int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val,
84b5dbf3 858 u8 len, u8 request, u8 direction);
e0d3bafd 859int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value);
84b5dbf3
MCC
860int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number,
861 int pin_value);
e0d3bafd
SD
862
863int cx231xx_gpio_i2c_start(struct cx231xx *dev);
864int cx231xx_gpio_i2c_end(struct cx231xx *dev);
865int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data);
cde4362f 866int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf);
e0d3bafd
SD
867int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev);
868int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev);
869int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev);
870
cde4362f
MCC
871int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
872int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
e0d3bafd
SD
873
874/* audio related functions */
84b5dbf3
MCC
875int cx231xx_set_audio_decoder_input(struct cx231xx *dev,
876 enum AUDIO_INPUT audio_input);
e0d3bafd
SD
877
878int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type);
e0d3bafd
SD
879int cx231xx_set_video_alternate(struct cx231xx *dev);
880int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt);
64fbf444
PB
881int is_fw_load(struct cx231xx *dev);
882int cx231xx_check_fw(struct cx231xx *dev);
e0d3bafd 883int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
84b5dbf3 884 int num_bufs, int max_pkt_size,
cde4362f
MCC
885 int (*isoc_copy) (struct cx231xx *dev,
886 struct urb *urb));
64fbf444
PB
887int cx231xx_init_bulk(struct cx231xx *dev, int max_packets,
888 int num_bufs, int max_pkt_size,
889 int (*bulk_copy) (struct cx231xx *dev,
890 struct urb *urb));
891void cx231xx_stop_TS1(struct cx231xx *dev);
892void cx231xx_start_TS1(struct cx231xx *dev);
e0d3bafd 893void cx231xx_uninit_isoc(struct cx231xx *dev);
64fbf444 894void cx231xx_uninit_bulk(struct cx231xx *dev);
e0d3bafd 895int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode);
64fbf444
PB
896int cx231xx_unmute_audio(struct cx231xx *dev);
897int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size);
898void cx231xx_disable656(struct cx231xx *dev);
899void cx231xx_enable656(struct cx231xx *dev);
900int cx231xx_demod_reset(struct cx231xx *dev);
e0d3bafd
SD
901int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio);
902
903/* Device list functions */
904void cx231xx_release_resources(struct cx231xx *dev);
905void cx231xx_release_analog_resources(struct cx231xx *dev);
906int cx231xx_register_analog_devices(struct cx231xx *dev);
907void cx231xx_remove_from_devlist(struct cx231xx *dev);
908void cx231xx_add_into_devlist(struct cx231xx *dev);
e0d3bafd
SD
909void cx231xx_init_extension(struct cx231xx *dev);
910void cx231xx_close_extension(struct cx231xx *dev);
911
912/* hardware init functions */
913int cx231xx_dev_init(struct cx231xx *dev);
914void cx231xx_dev_uninit(struct cx231xx *dev);
915void cx231xx_config_i2c(struct cx231xx *dev);
916int cx231xx_config(struct cx231xx *dev);
917
918/* Stream control functions */
919int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask);
920int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask);
921
922int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type);
923
924/* Power control functions */
6e4f574b 925int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode);
e0d3bafd
SD
926int cx231xx_power_suspend(struct cx231xx *dev);
927
928/* chip specific control functions */
929int cx231xx_init_ctrl_pin_status(struct cx231xx *dev);
84b5dbf3
MCC
930int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev,
931 u8 analog_or_digital);
a6f6fb9c 932int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3);
e0d3bafd
SD
933
934/* video audio decoder related functions */
935void video_mux(struct cx231xx *dev, int index);
936int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input);
937int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input);
938int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev);
939int cx231xx_set_audio_input(struct cx231xx *dev, u8 input);
e0d3bafd
SD
940
941/* Provided by cx231xx-video.c */
942int cx231xx_register_extension(struct cx231xx_ops *dev);
943void cx231xx_unregister_extension(struct cx231xx_ops *dev);
944void cx231xx_init_extension(struct cx231xx *dev);
945void cx231xx_close_extension(struct cx231xx *dev);
bc08734c
HV
946int cx231xx_querycap(struct file *file, void *priv,
947 struct v4l2_capability *cap);
b86d1544 948int cx231xx_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t);
2f73c7c5 949int cx231xx_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t);
b86d1544
HV
950int cx231xx_g_frequency(struct file *file, void *priv,
951 struct v4l2_frequency *f);
952int cx231xx_s_frequency(struct file *file, void *priv,
b530a447 953 const struct v4l2_frequency *f);
b86d1544
HV
954int cx231xx_enum_input(struct file *file, void *priv,
955 struct v4l2_input *i);
956int cx231xx_g_input(struct file *file, void *priv, unsigned int *i);
957int cx231xx_s_input(struct file *file, void *priv, unsigned int i);
08fe9f7d 958int cx231xx_g_chip_info(struct file *file, void *fh, struct v4l2_dbg_chip_info *chip);
b86d1544
HV
959int cx231xx_g_register(struct file *file, void *priv,
960 struct v4l2_dbg_register *reg);
961int cx231xx_s_register(struct file *file, void *priv,
977ba3b1 962 const struct v4l2_dbg_register *reg);
e0d3bafd
SD
963
964/* Provided by cx231xx-cards.c */
965extern void cx231xx_pre_card_setup(struct cx231xx *dev);
966extern void cx231xx_card_setup(struct cx231xx *dev);
967extern struct cx231xx_board cx231xx_boards[];
968extern struct usb_device_id cx231xx_id_table[];
969extern const unsigned int cx231xx_bcount;
e0d3bafd
SD
970int cx231xx_tuner_callback(void *ptr, int component, int command, int arg);
971
64fbf444
PB
972/* cx23885-417.c */
973extern int cx231xx_417_register(struct cx231xx *dev);
974extern void cx231xx_417_unregister(struct cx231xx *dev);
975
9ab66912
MCC
976/* cx23885-input.c */
977
978#if defined(CONFIG_VIDEO_CX231XX_RC)
979int cx231xx_ir_init(struct cx231xx *dev);
980void cx231xx_ir_exit(struct cx231xx *dev);
981#else
27eb5e24
HV
982static inline int cx231xx_ir_init(struct cx231xx *dev)
983{
984 return 0;
985}
986static inline void cx231xx_ir_exit(struct cx231xx *dev) {}
9ab66912
MCC
987#endif
988
e0d3bafd
SD
989static inline unsigned int norm_maxw(struct cx231xx *dev)
990{
991 if (dev->board.max_range_640_480)
992 return 640;
993 else
994 return 720;
995}
996
997static inline unsigned int norm_maxh(struct cx231xx *dev)
998{
999 if (dev->board.max_range_640_480)
1000 return 480;
1001 else
1002 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
1003}
1004#endif