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[mirror_ubuntu-bionic-kernel.git] / drivers / media / usb / cx231xx / cx231xx.h
CommitLineData
e0d3bafd
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1/*
2 cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices
3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
84b5dbf3 5 Based on em28xx driver
e0d3bafd
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6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#ifndef _CX231XX_H
23#define _CX231XX_H
24
25#include <linux/videodev2.h>
b1196126
SD
26#include <linux/types.h>
27#include <linux/ioctl.h>
e0d3bafd 28#include <linux/i2c.h>
61b04cb2 29#include <linux/workqueue.h>
e0d3bafd 30#include <linux/mutex.h>
b1196126 31
64fbf444 32#include <media/cx2341x.h>
b1196126
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33
34#include <media/videobuf-vmalloc.h>
35#include <media/v4l2-device.h>
d2370f8e 36#include <media/v4l2-ctrls.h>
1d08a4fa 37#include <media/v4l2-fh.h>
6bda9644 38#include <media/rc-core.h>
9ab66912 39#include <media/ir-kbd-i2c.h>
e0d3bafd 40#include <media/videobuf-dvb.h>
e0d3bafd
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41
42#include "cx231xx-reg.h"
6e4f574b 43#include "cx231xx-pcb-cfg.h"
e0d3bafd
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44#include "cx231xx-conf-reg.h"
45
e0d3bafd 46#define DRIVER_NAME "cx231xx"
44ecf1df 47#define PWR_SLEEP_INTERVAL 10
e0d3bafd
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48
49/* I2C addresses for control block in Cx231xx */
ecc67d10
SD
50#define AFE_DEVICE_ADDRESS 0x60
51#define I2S_BLK_DEVICE_ADDRESS 0x98
52#define VID_BLK_I2C_ADDRESS 0x88
64fbf444 53#define VERVE_I2C_ADDRESS 0x40
e0d3bafd
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54#define DIF_USE_BASEBAND 0xFFFFFFFF
55
56/* Boards supported by driver */
57#define CX231XX_BOARD_UNKNOWN 0
955e6ed8
MCC
58#define CX231XX_BOARD_CNXT_CARRAERA 1
59#define CX231XX_BOARD_CNXT_SHELBY 2
60#define CX231XX_BOARD_CNXT_RDE_253S 3
61#define CX231XX_BOARD_CNXT_RDU_253S 4
64fbf444 62#define CX231XX_BOARD_CNXT_VIDEO_GRABBER 5
955e6ed8
MCC
63#define CX231XX_BOARD_CNXT_RDE_250 6
64#define CX231XX_BOARD_CNXT_RDU_250 7
1a50fdde 65#define CX231XX_BOARD_HAUPPAUGE_EXETER 8
4270c3ca 66#define CX231XX_BOARD_HAUPPAUGE_USBLIVE2 9
9417bc6d 67#define CX231XX_BOARD_PV_PLAYTV_USB_HYBRID 10
4e105039 68#define CX231XX_BOARD_PV_XCAPTURE_USB 11
eeaaf817 69#define CX231XX_BOARD_KWORLD_UB430_USB_HYBRID 12
2a7b6a40 70#define CX231XX_BOARD_ICONBIT_U100 13
de8ae0d5
PM
71#define CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL 14
72#define CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC 15
68c97bf3 73#define CX231XX_BOARD_ELGATO_VIDEO_CAPTURE_V2 16
3ead1ba3 74#define CX231XX_BOARD_OTG102 17
e0d3bafd
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75
76/* Limits minimum and default number of buffers */
77#define CX231XX_MIN_BUF 4
78#define CX231XX_DEF_BUF 12
79#define CX231XX_DEF_VBI_BUF 6
80
81#define VBI_LINE_COUNT 17
82#define VBI_LINE_LENGTH 1440
83
84/*Limits the max URB message size */
85#define URB_MAX_CTRL_SIZE 80
86
87/* Params for validated field */
88#define CX231XX_BOARD_NOT_VALIDATED 1
84b5dbf3 89#define CX231XX_BOARD_VALIDATED 0
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90
91/* maximum number of cx231xx boards */
92#define CX231XX_MAXBOARDS 8
93
94/* maximum number of frames that can be queued */
95#define CX231XX_NUM_FRAMES 5
96
97/* number of buffers for isoc transfers */
98#define CX231XX_NUM_BUFS 8
99
100/* number of packets for each buffer
101 windows requests only 40 packets .. so we better do the same
102 this is what I found out for all alternate numbers there!
103 */
104#define CX231XX_NUM_PACKETS 40
105
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106/* default alternate; 0 means choose the best */
107#define CX231XX_PINOUT 0
108
109#define CX231XX_INTERLACED_DEFAULT 1
110
e0d3bafd 111/* time to wait when stopping the isoc transfer */
b9255176
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112#define CX231XX_URB_TIMEOUT \
113 msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS)
e0d3bafd 114
64fbf444
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115#define CX231xx_NORMS (\
116 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
117 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
118 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
119 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
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120
121#define SLEEP_S5H1432 30
122#define CX23417_OSC_EN 8
123#define CX23417_RESET 9
124
125struct cx23417_fmt {
126 char *name;
127 u32 fourcc; /* v4l2 format id */
128 int depth;
129 int flags;
130 u32 cxformat;
131};
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132enum cx231xx_mode {
133 CX231XX_SUSPEND,
134 CX231XX_ANALOG_MODE,
135 CX231XX_DIGITAL_MODE,
136};
137
138enum cx231xx_std_mode {
139 CX231XX_TV_AIR = 0,
140 CX231XX_TV_CABLE
141};
142
143enum cx231xx_stream_state {
144 STREAM_OFF,
145 STREAM_INTERRUPT,
146 STREAM_ON,
147};
148
149struct cx231xx;
150
64fbf444 151struct cx231xx_isoc_ctl {
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152 /* max packet size of isoc transaction */
153 int max_pkt_size;
e0d3bafd 154
84b5dbf3
MCC
155 /* number of allocated urbs */
156 int num_bufs;
e0d3bafd 157
84b5dbf3
MCC
158 /* urb for isoc transfers */
159 struct urb **urb;
e0d3bafd 160
84b5dbf3
MCC
161 /* transfer buffers for isoc transfer */
162 char **transfer_buffer;
e0d3bafd 163
84b5dbf3
MCC
164 /* Last buffer command and region */
165 u8 cmd;
166 int pos, size, pktsize;
e0d3bafd 167
84b5dbf3
MCC
168 /* Last field: ODD or EVEN? */
169 int field;
e0d3bafd 170
84b5dbf3
MCC
171 /* Stores incomplete commands */
172 u32 tmp_buf;
173 int tmp_buf_len;
e0d3bafd 174
84b5dbf3
MCC
175 /* Stores already requested buffers */
176 struct cx231xx_buffer *buf;
e0d3bafd 177
84b5dbf3
MCC
178 /* Stores the number of received fields */
179 int nfields;
e0d3bafd 180
84b5dbf3 181 /* isoc urb callback */
cde4362f 182 int (*isoc_copy) (struct cx231xx *dev, struct urb *urb);
e0d3bafd
SD
183};
184
64fbf444
PB
185struct cx231xx_bulk_ctl {
186 /* max packet size of bulk transaction */
187 int max_pkt_size;
188
189 /* number of allocated urbs */
190 int num_bufs;
191
192 /* urb for bulk transfers */
193 struct urb **urb;
194
195 /* transfer buffers for bulk transfer */
196 char **transfer_buffer;
197
198 /* Last buffer command and region */
199 u8 cmd;
200 int pos, size, pktsize;
201
202 /* Last field: ODD or EVEN? */
203 int field;
204
205 /* Stores incomplete commands */
206 u32 tmp_buf;
207 int tmp_buf_len;
208
209 /* Stores already requested buffers */
210 struct cx231xx_buffer *buf;
211
212 /* Stores the number of received fields */
213 int nfields;
214
215 /* bulk urb callback */
216 int (*bulk_copy) (struct cx231xx *dev, struct urb *urb);
217};
218
e0d3bafd 219struct cx231xx_fmt {
84b5dbf3
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220 char *name;
221 u32 fourcc; /* v4l2 format id */
222 int depth;
223 int reg;
e0d3bafd
SD
224};
225
226/* buffer for one video frame */
227struct cx231xx_buffer {
228 /* common v4l buffer stuff -- must be first */
229 struct videobuf_buffer vb;
230
231 struct list_head frame;
232 int top_field;
233 int receiving;
234};
235
64fbf444
PB
236enum ps_package_head {
237 CX231XX_NEED_ADD_PS_PACKAGE_HEAD = 0,
238 CX231XX_NONEED_PS_PACKAGE_HEAD
239};
240
e0d3bafd 241struct cx231xx_dmaqueue {
84b5dbf3
MCC
242 struct list_head active;
243 struct list_head queued;
e0d3bafd 244
84b5dbf3 245 wait_queue_head_t wq;
e0d3bafd
SD
246
247 /* Counters to control buffer fill */
84b5dbf3
MCC
248 int pos;
249 u8 is_partial_line;
250 u8 partial_buf[8];
251 u8 last_sav;
252 int current_field;
253 u32 bytes_left_in_line;
254 u32 lines_completed;
255 u8 field1_done;
256 u32 lines_per_field;
64fbf444
PB
257
258 /*Mpeg2 control buffer*/
259 u8 *p_left_data;
260 u32 left_data_count;
261 u8 mpeg_buffer_done;
262 u32 mpeg_buffer_completed;
263 enum ps_package_head add_ps_package_head;
264 char ps_head[10];
e0d3bafd
SD
265};
266
e0d3bafd
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267/* inputs */
268
269#define MAX_CX231XX_INPUT 4
270
271enum cx231xx_itype {
272 CX231XX_VMUX_COMPOSITE1 = 1,
273 CX231XX_VMUX_SVIDEO,
274 CX231XX_VMUX_TELEVISION,
84b5dbf3
MCC
275 CX231XX_VMUX_CABLE,
276 CX231XX_RADIO,
277 CX231XX_VMUX_DVB,
e0d3bafd
SD
278 CX231XX_VMUX_DEBUG
279};
280
281enum cx231xx_v_input {
84b5dbf3
MCC
282 CX231XX_VIN_1_1 = 0x1,
283 CX231XX_VIN_2_1,
284 CX231XX_VIN_3_1,
285 CX231XX_VIN_4_1,
286 CX231XX_VIN_1_2 = 0x01,
287 CX231XX_VIN_2_2,
288 CX231XX_VIN_3_2,
289 CX231XX_VIN_1_3 = 0x1,
290 CX231XX_VIN_2_3,
291 CX231XX_VIN_3_3,
e0d3bafd
SD
292};
293
294/* cx231xx has two audio inputs: tuner and line in */
295enum cx231xx_amux {
296 /* This is the only entry for cx231xx tuner input */
84b5dbf3 297 CX231XX_AMUX_VIDEO, /* cx231xx tuner */
e0d3bafd
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298 CX231XX_AMUX_LINE_IN, /* Line In */
299};
300
301struct cx231xx_reg_seq {
302 unsigned char bit;
84b5dbf3 303 unsigned char val;
e0d3bafd
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304 int sleep;
305};
306
307struct cx231xx_input {
308 enum cx231xx_itype type;
309 unsigned int vmux;
310 enum cx231xx_amux amux;
311 struct cx231xx_reg_seq *gpio;
312};
313
314#define INPUT(nr) (&cx231xx_boards[dev->model].input[nr])
315
316enum cx231xx_decoder {
317 CX231XX_NODECODER,
318 CX231XX_AVDECODER
319};
320
b9255176 321enum CX231XX_I2C_MASTER_PORT {
84b5dbf3
MCC
322 I2C_0 = 0,
323 I2C_1 = 1,
324 I2C_2 = 2,
325 I2C_3 = 3
b9255176 326};
e0d3bafd
SD
327
328struct cx231xx_board {
329 char *name;
330 int vchannels;
331 int tuner_type;
332 int tuner_addr;
84b5dbf3 333 v4l2_std_id norm; /* tv norm */
e0d3bafd 334
84b5dbf3
MCC
335 /* demod related */
336 int demod_addr;
337 u8 demod_xfer_mode; /* 0 - Serial; 1 - parallel */
e0d3bafd
SD
338
339 /* GPIO Pins */
340 struct cx231xx_reg_seq *dvb_gpio;
341 struct cx231xx_reg_seq *suspend_gpio;
342 struct cx231xx_reg_seq *tuner_gpio;
78bb6df6
MCC
343 /* Negative means don't use it */
344 s8 tuner_sif_gpio;
345 s8 tuner_scl_gpio;
346 s8 tuner_sda_gpio;
e0d3bafd 347
84b5dbf3
MCC
348 /* PIN ctrl */
349 u32 ctl_pin_status_mask;
350 u8 agc_analog_digital_select_gpio;
351 u32 gpio_pin_status_mask;
e0d3bafd 352
84b5dbf3
MCC
353 /* i2c masters */
354 u8 tuner_i2c_master;
355 u8 demod_i2c_master;
9ab66912
MCC
356 u8 ir_i2c_master;
357
358 /* for devices with I2C chips for IR */
29e3ec19 359 char *rc_map_name;
e0d3bafd
SD
360
361 unsigned int max_range_640_480:1;
362 unsigned int has_dvb:1;
2f861387 363 unsigned int has_417:1;
e0d3bafd 364 unsigned int valid:1;
2f861387
MCC
365 unsigned int no_alt_vanc:1;
366 unsigned int external_av:1;
38f5ddc1 367 unsigned int dont_use_port_3:1;
e0d3bafd
SD
368
369 unsigned char xclk, i2c_speed;
370
371 enum cx231xx_decoder decoder;
88806218 372 int output_mode;
e0d3bafd 373
84b5dbf3
MCC
374 struct cx231xx_input input[MAX_CX231XX_INPUT];
375 struct cx231xx_input radio;
b088ba65 376 struct rc_map *ir_codes;
e0d3bafd
SD
377};
378
379/* device states */
380enum cx231xx_dev_state {
381 DEV_INITIALIZED = 0x01,
382 DEV_DISCONNECTED = 0x02,
e0d3bafd
SD
383};
384
84b5dbf3
MCC
385enum AFE_MODE {
386 AFE_MODE_LOW_IF,
387 AFE_MODE_BASEBAND,
388 AFE_MODE_EU_HI_IF,
389 AFE_MODE_US_HI_IF,
390 AFE_MODE_JAPAN_HI_IF
e0d3bafd
SD
391};
392
84b5dbf3
MCC
393enum AUDIO_INPUT {
394 AUDIO_INPUT_MUTE,
395 AUDIO_INPUT_LINE,
396 AUDIO_INPUT_TUNER_TV,
397 AUDIO_INPUT_SPDIF,
398 AUDIO_INPUT_TUNER_FM
e0d3bafd
SD
399};
400
401#define CX231XX_AUDIO_BUFS 5
64fbf444
PB
402#define CX231XX_NUM_AUDIO_PACKETS 16
403#define CX231XX_ISO_NUM_AUDIO_PACKETS 64
e0d3bafd 404
e0d3bafd
SD
405/* cx231xx extensions */
406#define CX231XX_AUDIO 0x10
407#define CX231XX_DVB 0x20
408
409struct cx231xx_audio {
410 char name[50];
411 char *transfer_buffer[CX231XX_AUDIO_BUFS];
412 struct urb *urb[CX231XX_AUDIO_BUFS];
413 struct usb_device *udev;
414 unsigned int capture_transfer_done;
84b5dbf3 415 struct snd_pcm_substream *capture_pcm_substream;
e0d3bafd
SD
416
417 unsigned int hwptr_done_capture;
84b5dbf3 418 struct snd_card *sndcard;
e0d3bafd
SD
419
420 int users, shutdown;
64fbf444 421 /* locks */
e0d3bafd
SD
422 spinlock_t slock;
423
84b5dbf3
MCC
424 int alt; /* alternate */
425 int max_pkt_size; /* max packet size of isoc transaction */
426 int num_alt; /* Number of alternative settings */
e0d3bafd 427 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
84b5dbf3 428 u16 end_point_addr;
e0d3bafd
SD
429};
430
431struct cx231xx;
432
433struct cx231xx_fh {
1d08a4fa 434 struct v4l2_fh fh;
e0d3bafd 435 struct cx231xx *dev;
84b5dbf3 436 unsigned int stream_on:1; /* Locks streams */
84b5dbf3 437 enum v4l2_buf_type type;
64fbf444 438
71590765 439 struct videobuf_queue vb_vidq;
64fbf444
PB
440
441 /* vbi capture */
442 struct videobuf_queue vidq;
443 struct videobuf_queue vbiq;
444
445 /* MPEG Encoder specifics ONLY */
446
447 atomic_t v4l_reading;
e0d3bafd
SD
448};
449
b9255176 450/*****************************************************************/
e0d3bafd 451/* set/get i2c */
b9255176
SD
452/* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */
453#define I2C_SPEED_1M 0x0
454#define I2C_SPEED_400K 0x1
455#define I2C_SPEED_100K 0x2
456#define I2C_SPEED_5M 0x3
457
458/* 0-- STOP transaction */
459#define I2C_STOP 0x0
460/* 1-- do not transmit STOP at end of transaction */
461#define I2C_NOSTOP 0x1
b251e618 462/* 1--allow slave to insert clock wait states */
b9255176 463#define I2C_SYNC 0x1
e0d3bafd
SD
464
465struct cx231xx_i2c {
84b5dbf3 466 struct cx231xx *dev;
e0d3bafd 467
84b5dbf3 468 int nr;
e0d3bafd
SD
469
470 /* i2c i/o */
84b5dbf3 471 struct i2c_adapter i2c_adap;
84b5dbf3
MCC
472 struct i2c_client i2c_client;
473 u32 i2c_rc;
e0d3bafd
SD
474
475 /* different settings for each bus */
84b5dbf3
MCC
476 u8 i2c_period;
477 u8 i2c_nostop;
478 u8 i2c_reserve;
e0d3bafd
SD
479};
480
84b5dbf3
MCC
481struct cx231xx_i2c_xfer_data {
482 u8 dev_addr;
483 u8 direction; /* 1 - IN, 0 - OUT */
484 u8 saddr_len; /* sub address len */
485 u16 saddr_dat; /* sub addr data */
486 u8 buf_size; /* buffer size */
487 u8 *p_buffer; /* pointer to the buffer */
e0d3bafd
SD
488};
489
6e4f574b 490struct VENDOR_REQUEST_IN {
84b5dbf3
MCC
491 u8 bRequest;
492 u16 wValue;
493 u16 wIndex;
494 u16 wLength;
495 u8 direction;
496 u8 bData;
497 u8 *pBuff;
b9255176 498};
e0d3bafd 499
64fbf444
PB
500struct cx231xx_tvnorm {
501 char *name;
502 v4l2_std_id id;
503 u32 cxiformat;
504 u32 cxoformat;
505};
506
6e4f574b 507enum TRANSFER_TYPE {
84b5dbf3
MCC
508 Raw_Video = 0,
509 Audio,
510 Vbi, /* VANC */
511 Sliced_cc, /* HANC */
512 TS1_serial_mode,
513 TS2,
514 TS1_parallel_mode
b9255176 515} ;
e0d3bafd
SD
516
517struct cx231xx_video_mode {
84b5dbf3 518 /* Isoc control struct */
e0d3bafd 519 struct cx231xx_dmaqueue vidq;
64fbf444
PB
520 struct cx231xx_isoc_ctl isoc_ctl;
521 struct cx231xx_bulk_ctl bulk_ctl;
522 /* locks */
e0d3bafd
SD
523 spinlock_t slock;
524
525 /* usb transfer */
84b5dbf3
MCC
526 int alt; /* alternate */
527 int max_pkt_size; /* max packet size of isoc transaction */
528 int num_alt; /* Number of alternative settings */
e0d3bafd 529 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
84b5dbf3 530 u16 end_point_addr;
e0d3bafd 531};
64fbf444
PB
532/*
533struct cx23885_dmaqueue {
534 struct list_head active;
535 struct list_head queued;
536 struct timer_list timeout;
537 struct btcx_riscmem stopper;
538 u32 count;
539};
540*/
541struct cx231xx_tsport {
542 struct cx231xx *dev;
543
544 int nr;
545 int sram_chno;
546
547 struct videobuf_dvb_frontends frontends;
548
549 /* dma queues */
550
551 u32 ts_packet_size;
552 u32 ts_packet_count;
553
554 int width;
555 int height;
556
557 /* locks */
558 spinlock_t slock;
559
560 /* registers */
561 u32 reg_gpcnt;
562 u32 reg_gpcnt_ctl;
563 u32 reg_dma_ctl;
564 u32 reg_lngth;
565 u32 reg_hw_sop_ctrl;
566 u32 reg_gen_ctrl;
567 u32 reg_bd_pkt_status;
568 u32 reg_sop_status;
569 u32 reg_fifo_ovfl_stat;
570 u32 reg_vld_misc;
571 u32 reg_ts_clk_en;
572 u32 reg_ts_int_msk;
573 u32 reg_ts_int_stat;
574 u32 reg_src_sel;
575
576 /* Default register vals */
577 int pci_irqmask;
578 u32 dma_ctl_val;
579 u32 ts_int_msk_val;
580 u32 gen_ctrl_val;
581 u32 ts_clk_en_val;
582 u32 src_sel_val;
583 u32 vld_misc_val;
584 u32 hw_sop_ctrl_val;
585
586 /* Allow a single tsport to have multiple frontends */
587 u32 num_frontends;
588 void *port_priv;
589};
e0d3bafd 590
e0d3bafd
SD
591/* main device struct */
592struct cx231xx {
593 /* generic device properties */
84b5dbf3
MCC
594 char name[30]; /* name (including minor) of the device */
595 int model; /* index in the device_data struct */
596 int devno; /* marks the number of this device */
e0d3bafd
SD
597
598 struct cx231xx_board board;
599
9ab66912 600 /* For I2C IR support */
141bb0dc 601 struct IR_i2c_init_data init_data;
7528cd27 602 struct i2c_client *ir_i2c_client;
9ab66912 603
84b5dbf3
MCC
604 unsigned int stream_on:1; /* Locks streams */
605 unsigned int vbi_stream_on:1; /* Locks streams for VBI */
e0d3bafd
SD
606 unsigned int has_audio_class:1;
607 unsigned int has_alsa_audio:1;
608
84b5dbf3 609 struct cx231xx_fmt *format;
e0d3bafd 610
b1196126
SD
611 struct v4l2_device v4l2_dev;
612 struct v4l2_subdev *sd_cx25840;
613 struct v4l2_subdev *sd_tuner;
d2370f8e
HV
614 struct v4l2_ctrl_handler ctrl_handler;
615 struct v4l2_ctrl_handler radio_ctrl_handler;
88b6ffed 616 struct cx2341x_handler mpeg_ctrl_handler;
b1196126 617
61b04cb2
MCC
618 struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */
619 atomic_t stream_started; /* stream should be running if true */
620
84b5dbf3 621 struct list_head devlist;
e0d3bafd 622
84b5dbf3
MCC
623 int tuner_type; /* type of the tuner */
624 int tuner_addr; /* tuner address */
e0d3bafd 625
84b5dbf3
MCC
626 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
627 struct cx231xx_i2c i2c_bus[3];
628 unsigned int xc_fw_load_done:1;
64fbf444 629 /* locks */
84b5dbf3 630 struct mutex gpio_i2c_lock;
64fbf444 631 struct mutex i2c_lock;
e0d3bafd
SD
632
633 /* video for linux */
84b5dbf3
MCC
634 int users; /* user count for exclusive use */
635 struct video_device *vdev; /* video for linux device struct */
636 v4l2_std_id norm; /* selected tv norm */
637 int ctl_freq; /* selected frequency */
638 unsigned int ctl_ainput; /* selected audio input */
e0d3bafd
SD
639
640 /* frame properties */
84b5dbf3
MCC
641 int width; /* current frame width */
642 int height; /* current frame height */
84b5dbf3 643 int interlaced; /* 1=interlace fileds, 0=just top fileds */
e0d3bafd
SD
644
645 struct cx231xx_audio adev;
646
647 /* states */
648 enum cx231xx_dev_state state;
649
84b5dbf3 650 struct work_struct request_module_wk;
e0d3bafd
SD
651
652 /* locks */
653 struct mutex lock;
84b5dbf3 654 struct mutex ctrl_urb_lock; /* protects urb_buf */
e0d3bafd
SD
655 struct list_head inqueue, outqueue;
656 wait_queue_head_t open, wait_frame, wait_stream;
657 struct video_device *vbi_dev;
658 struct video_device *radio_dev;
659
660 unsigned char eedata[256];
661
84b5dbf3
MCC
662 struct cx231xx_video_mode video_mode;
663 struct cx231xx_video_mode vbi_mode;
664 struct cx231xx_video_mode sliced_cc_mode;
665 struct cx231xx_video_mode ts1_mode;
e0d3bafd 666
64fbf444
PB
667 atomic_t devlist_count;
668
84b5dbf3
MCC
669 struct usb_device *udev; /* the usb device */
670 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
e0d3bafd
SD
671
672 /* helper funcs that call usb_control_msg */
cde4362f 673 int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
e0d3bafd 674 char *buf, int len);
cde4362f 675 int (*cx231xx_write_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 676 char *buf, int len);
cde4362f 677 int (*cx231xx_send_usb_command) (struct cx231xx_i2c *i2c_bus,
b9255176 678 struct cx231xx_i2c_xfer_data *req_data);
cde4362f
MCC
679 int (*cx231xx_gpio_i2c_read) (struct cx231xx *dev, u8 dev_addr,
680 u8 *buf, u8 len);
681 int (*cx231xx_gpio_i2c_write) (struct cx231xx *dev, u8 dev_addr,
682 u8 *buf, u8 len);
84b5dbf3 683
cde4362f
MCC
684 int (*cx231xx_set_analog_freq) (struct cx231xx *dev, u32 freq);
685 int (*cx231xx_reset_analog_tuner) (struct cx231xx *dev);
e0d3bafd
SD
686
687 enum cx231xx_mode mode;
688
689 struct cx231xx_dvb *dvb;
690
84b5dbf3
MCC
691 /* Cx231xx supported PCB config's */
692 struct pcb_config current_pcb_config;
693 u8 current_scenario_idx;
694 u8 interface_count;
695 u8 max_iad_interface_count;
e0d3bafd 696
84b5dbf3
MCC
697 /* GPIO related register direction and values */
698 u32 gpio_dir;
699 u32 gpio_val;
e0d3bafd 700
84b5dbf3
MCC
701 /* Power Modes */
702 int power_mode;
e0d3bafd 703
ecc67d10
SD
704 /* afe parameters */
705 enum AFE_MODE afe_mode;
706 u32 afe_ref_count;
e0d3bafd 707
84b5dbf3
MCC
708 /* video related parameters */
709 u32 video_input;
710 u32 active_mode;
711 u8 vbi_or_sliced_cc_mode; /* 0 - vbi ; 1 - sliced cc mode */
712 enum cx231xx_std_mode std_mode; /* 0 - Air; 1 - cable */
e0d3bafd 713
64fbf444
PB
714 /*mode: digital=1 or analog=0*/
715 u8 mode_tv;
716
717 u8 USE_ISO;
718 struct cx231xx_tvnorm encodernorm;
719 struct cx231xx_tsport ts1, ts2;
64fbf444
PB
720 struct video_device *v4l_device;
721 atomic_t v4l_reader_count;
722 u32 freq;
723 unsigned int input;
724 u32 cx23417_mailbox;
725 u32 __iomem *lmmio;
726 u8 __iomem *bmmio;
e0d3bafd
SD
727};
728
64fbf444
PB
729extern struct list_head cx231xx_devlist;
730
b1196126
SD
731#define cx25840_call(cx231xx, o, f, args...) \
732 v4l2_subdev_call(cx231xx->sd_cx25840, o, f, ##args)
733#define tuner_call(cx231xx, o, f, args...) \
734 v4l2_subdev_call(cx231xx->sd_tuner, o, f, ##args)
735#define call_all(dev, o, f, args...) \
736 v4l2_device_call_until_err(&dev->v4l2_dev, 0, o, f, ##args)
737
e0d3bafd
SD
738struct cx231xx_ops {
739 struct list_head next;
740 char *name;
741 int id;
84b5dbf3
MCC
742 int (*init) (struct cx231xx *);
743 int (*fini) (struct cx231xx *);
e0d3bafd
SD
744};
745
746/* call back functions in dvb module */
84b5dbf3
MCC
747int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq);
748int cx231xx_reset_analog_tuner(struct cx231xx *dev);
e0d3bafd
SD
749
750/* Provided by cx231xx-i2c.c */
e0d3bafd
SD
751void cx231xx_do_i2c_scan(struct cx231xx *dev, struct i2c_client *c);
752int cx231xx_i2c_register(struct cx231xx_i2c *bus);
753int cx231xx_i2c_unregister(struct cx231xx_i2c *bus);
754
755/* Internal block control functions */
64fbf444
PB
756int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
757 u8 saddr_len, u32 *data, u8 data_len, int master);
758int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
759 u8 saddr_len, u32 data, u8 data_len, int master);
e0d3bafd 760int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr,
cde4362f 761 u16 saddr, u8 saddr_len, u32 *data, u8 data_len);
e0d3bafd 762int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr,
84b5dbf3
MCC
763 u16 saddr, u8 saddr_len, u32 data, u8 data_len);
764int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size,
765 u16 register_address, u8 bit_start, u8 bit_end,
766 u32 value);
e0d3bafd 767int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr,
84b5dbf3 768 u16 saddr, u32 mask, u32 value);
e0d3bafd
SD
769u32 cx231xx_set_field(u32 field_mask, u32 data);
770
64fbf444
PB
771/*verve r/w*/
772void initGPIO(struct cx231xx *dev);
773void uninitGPIO(struct cx231xx *dev);
ecc67d10
SD
774/* afe related functions */
775int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count);
776int cx231xx_afe_init_channels(struct cx231xx *dev);
777int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev);
778int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux);
779int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode);
780int cx231xx_afe_update_power_control(struct cx231xx *dev,
6e4f574b 781 enum AV_MODE avmode);
ecc67d10 782int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input);
e0d3bafd 783
ecc67d10
SD
784/* i2s block related functions */
785int cx231xx_i2s_blk_initialize(struct cx231xx *dev);
786int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev,
6e4f574b 787 enum AV_MODE avmode);
ecc67d10 788int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input);
e0d3bafd
SD
789
790/* DIF related functions */
791int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode,
84b5dbf3 792 u32 function_mode, u32 standard);
64fbf444
PB
793void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,
794 u8 spectral_invert, u32 mode);
795u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd);
796void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,
797 u8 spectral_invert, u32 mode);
798void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev);
799void reset_s5h1432_demod(struct cx231xx *dev);
800void cx231xx_dump_HH_reg(struct cx231xx *dev);
801void update_HH_register_after_set_DIF(struct cx231xx *dev);
802void cx231xx_dump_SC_reg(struct cx231xx *dev);
803
804
805
e0d3bafd
SD
806int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard);
807int cx231xx_tuner_pre_channel_change(struct cx231xx *dev);
808int cx231xx_tuner_post_channel_change(struct cx231xx *dev);
809
810/* video parser functions */
cde4362f
MCC
811u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size,
812 u32 *p_bytes_used);
813u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf,
814 u32 *p_bytes_used);
e0d3bafd 815int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f 816 u8 *p_buffer, u32 bytes_to_copy);
84b5dbf3
MCC
817void cx231xx_reset_video_buffer(struct cx231xx *dev,
818 struct cx231xx_dmaqueue *dma_q);
819u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q);
820u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f 821 u8 *p_line, u32 length, int field_number);
84b5dbf3 822u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f
MCC
823 u8 sav_eav, u8 *p_buffer, u32 buffer_size);
824void cx231xx_swab(u16 *from, u16 *to, u16 len);
e0d3bafd
SD
825
826/* Provided by cx231xx-core.c */
827
828u32 cx231xx_request_buffers(struct cx231xx *dev, u32 count);
829void cx231xx_queue_unusedframes(struct cx231xx *dev);
830void cx231xx_release_buffers(struct cx231xx *dev);
831
832/* read from control pipe */
833int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 834 char *buf, int len);
e0d3bafd
SD
835
836/* write to control pipe */
837int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 838 char *buf, int len);
e0d3bafd
SD
839int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode);
840
b9255176
SD
841int cx231xx_send_vendor_cmd(struct cx231xx *dev,
842 struct VENDOR_REQUEST_IN *ven_req);
e0d3bafd 843int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus,
b9255176 844 struct cx231xx_i2c_xfer_data *req_data);
e0d3bafd
SD
845
846/* Gpio related functions */
cde4362f 847int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val,
84b5dbf3 848 u8 len, u8 request, u8 direction);
e0d3bafd 849int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value);
84b5dbf3
MCC
850int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number,
851 int pin_value);
e0d3bafd
SD
852
853int cx231xx_gpio_i2c_start(struct cx231xx *dev);
854int cx231xx_gpio_i2c_end(struct cx231xx *dev);
855int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data);
cde4362f 856int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf);
e0d3bafd
SD
857int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev);
858int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev);
859int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev);
860
cde4362f
MCC
861int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
862int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
e0d3bafd
SD
863
864/* audio related functions */
84b5dbf3
MCC
865int cx231xx_set_audio_decoder_input(struct cx231xx *dev,
866 enum AUDIO_INPUT audio_input);
e0d3bafd
SD
867
868int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type);
e0d3bafd
SD
869int cx231xx_set_video_alternate(struct cx231xx *dev);
870int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt);
64fbf444
PB
871int is_fw_load(struct cx231xx *dev);
872int cx231xx_check_fw(struct cx231xx *dev);
e0d3bafd 873int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
84b5dbf3 874 int num_bufs, int max_pkt_size,
cde4362f
MCC
875 int (*isoc_copy) (struct cx231xx *dev,
876 struct urb *urb));
64fbf444
PB
877int cx231xx_init_bulk(struct cx231xx *dev, int max_packets,
878 int num_bufs, int max_pkt_size,
879 int (*bulk_copy) (struct cx231xx *dev,
880 struct urb *urb));
881void cx231xx_stop_TS1(struct cx231xx *dev);
882void cx231xx_start_TS1(struct cx231xx *dev);
e0d3bafd 883void cx231xx_uninit_isoc(struct cx231xx *dev);
64fbf444 884void cx231xx_uninit_bulk(struct cx231xx *dev);
e0d3bafd 885int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode);
64fbf444
PB
886int cx231xx_unmute_audio(struct cx231xx *dev);
887int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size);
888void cx231xx_disable656(struct cx231xx *dev);
889void cx231xx_enable656(struct cx231xx *dev);
890int cx231xx_demod_reset(struct cx231xx *dev);
e0d3bafd
SD
891int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio);
892
893/* Device list functions */
894void cx231xx_release_resources(struct cx231xx *dev);
895void cx231xx_release_analog_resources(struct cx231xx *dev);
896int cx231xx_register_analog_devices(struct cx231xx *dev);
897void cx231xx_remove_from_devlist(struct cx231xx *dev);
898void cx231xx_add_into_devlist(struct cx231xx *dev);
e0d3bafd
SD
899void cx231xx_init_extension(struct cx231xx *dev);
900void cx231xx_close_extension(struct cx231xx *dev);
901
902/* hardware init functions */
903int cx231xx_dev_init(struct cx231xx *dev);
904void cx231xx_dev_uninit(struct cx231xx *dev);
905void cx231xx_config_i2c(struct cx231xx *dev);
906int cx231xx_config(struct cx231xx *dev);
907
908/* Stream control functions */
909int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask);
910int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask);
911
912int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type);
913
914/* Power control functions */
6e4f574b 915int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode);
e0d3bafd
SD
916int cx231xx_power_suspend(struct cx231xx *dev);
917
918/* chip specific control functions */
919int cx231xx_init_ctrl_pin_status(struct cx231xx *dev);
84b5dbf3
MCC
920int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev,
921 u8 analog_or_digital);
a6f6fb9c 922int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3);
e0d3bafd
SD
923
924/* video audio decoder related functions */
925void video_mux(struct cx231xx *dev, int index);
926int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input);
927int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input);
928int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev);
929int cx231xx_set_audio_input(struct cx231xx *dev, u8 input);
e0d3bafd
SD
930
931/* Provided by cx231xx-video.c */
932int cx231xx_register_extension(struct cx231xx_ops *dev);
933void cx231xx_unregister_extension(struct cx231xx_ops *dev);
934void cx231xx_init_extension(struct cx231xx *dev);
935void cx231xx_close_extension(struct cx231xx *dev);
bc08734c
HV
936int cx231xx_querycap(struct file *file, void *priv,
937 struct v4l2_capability *cap);
b86d1544 938int cx231xx_g_tuner(struct file *file, void *priv, struct v4l2_tuner *t);
2f73c7c5 939int cx231xx_s_tuner(struct file *file, void *priv, const struct v4l2_tuner *t);
b86d1544
HV
940int cx231xx_g_frequency(struct file *file, void *priv,
941 struct v4l2_frequency *f);
942int cx231xx_s_frequency(struct file *file, void *priv,
b530a447 943 const struct v4l2_frequency *f);
b86d1544
HV
944int cx231xx_enum_input(struct file *file, void *priv,
945 struct v4l2_input *i);
946int cx231xx_g_input(struct file *file, void *priv, unsigned int *i);
947int cx231xx_s_input(struct file *file, void *priv, unsigned int i);
08fe9f7d 948int cx231xx_g_chip_info(struct file *file, void *fh, struct v4l2_dbg_chip_info *chip);
b86d1544
HV
949int cx231xx_g_register(struct file *file, void *priv,
950 struct v4l2_dbg_register *reg);
951int cx231xx_s_register(struct file *file, void *priv,
977ba3b1 952 const struct v4l2_dbg_register *reg);
e0d3bafd
SD
953
954/* Provided by cx231xx-cards.c */
955extern void cx231xx_pre_card_setup(struct cx231xx *dev);
956extern void cx231xx_card_setup(struct cx231xx *dev);
957extern struct cx231xx_board cx231xx_boards[];
958extern struct usb_device_id cx231xx_id_table[];
959extern const unsigned int cx231xx_bcount;
e0d3bafd
SD
960int cx231xx_tuner_callback(void *ptr, int component, int command, int arg);
961
64fbf444
PB
962/* cx23885-417.c */
963extern int cx231xx_417_register(struct cx231xx *dev);
964extern void cx231xx_417_unregister(struct cx231xx *dev);
965
9ab66912
MCC
966/* cx23885-input.c */
967
968#if defined(CONFIG_VIDEO_CX231XX_RC)
969int cx231xx_ir_init(struct cx231xx *dev);
970void cx231xx_ir_exit(struct cx231xx *dev);
971#else
972#define cx231xx_ir_init(dev) (0)
973#define cx231xx_ir_exit(dev) (0)
974#endif
975
976
e0d3bafd
SD
977/* printk macros */
978
979#define cx231xx_err(fmt, arg...) do {\
980 printk(KERN_ERR fmt , ##arg); } while (0)
981
982#define cx231xx_errdev(fmt, arg...) do {\
983 printk(KERN_ERR "%s: "fmt,\
984 dev->name , ##arg); } while (0)
985
986#define cx231xx_info(fmt, arg...) do {\
987 printk(KERN_INFO "%s: "fmt,\
988 dev->name , ##arg); } while (0)
989#define cx231xx_warn(fmt, arg...) do {\
990 printk(KERN_WARNING "%s: "fmt,\
991 dev->name , ##arg); } while (0)
992
e0d3bafd
SD
993static inline unsigned int norm_maxw(struct cx231xx *dev)
994{
995 if (dev->board.max_range_640_480)
996 return 640;
997 else
998 return 720;
999}
1000
1001static inline unsigned int norm_maxh(struct cx231xx *dev)
1002{
1003 if (dev->board.max_range_640_480)
1004 return 480;
1005 else
1006 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
1007}
1008#endif