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[mirror_ubuntu-artful-kernel.git] / drivers / media / usb / dvb-usb / dib0700_devices.c
CommitLineData
b7f54910
PB		 1/* Linux driver for devices based on the DiBcom DiB0700 USB bridge
2 *
3 * This program is free software; you can redistribute it and/or modify it
4 * under the terms of the GNU General Public License as published by the Free
5 * Software Foundation, version 2.
6 *
ba3fe3a9 7 * Copyright (C) 2005-9 DiBcom, SA et al
b7f54910
PB		 8 */
9#include "dib0700.h"
10
11#include "dib3000mc.h"
91bb9be6 12#include "dib7000m.h"
a75763ff 13#include "dib7000p.h"
ba3fe3a9 14#include "dib8000.h"
be9bae10 15#include "dib9000.h"
b7f54910 16#include "mt2060.h"
54d75eba 17#include "mt2266.h"
6ca8f0b9 18#include "tuner-xc2028.h"
cb22cb52 19#include "xc5000.h"
8d009a0c 20#include "xc4000.h"
cb22cb52 21#include "s5h1411.h"
01373a5c 22#include "dib0070.h"
03245a5e 23#include "dib0090.h"
ce904bcb
MK		 24#include "lgdt3305.h"
25#include "mxl5007t.h"
b7f54910 26
7fb3fc0c
PB		 27static int force_lna_activation;
28module_param(force_lna_activation, int, 0644);
f319ed91 29MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifyer(s) (LNA), if applicable for the device (default: 0=automatic/off).");
7fb3fc0c 30
01373a5c 31struct dib0700_adapter_state {
14d24d14 32 int (*set_param_save) (struct dvb_frontend *);
be9bae10 33 const struct firmware *frontend_firmware;
8abe4a0a 34 struct dib7000p_ops dib7000p_ops;
d44913c1 35 struct dib8000_ops dib8000_ops;
01373a5c
PB		 36};
37
38/* Hauppauge Nova-T 500 (aka Bristol)
b7f54910
PB		 39 * has a LNA on GPIO0 which is enabled by setting 1 */
40static struct mt2060_config bristol_mt2060_config[2] = {
41 {
42 .i2c_address = 0x60,
303cbeaa 43 .clock_out = 3,
b7f54910
PB		 44 }, {
45 .i2c_address = 0x61,
46 }
47};
48
99afb989 49
b7f54910
PB		 50static struct dibx000_agc_config bristol_dib3000p_mt2060_agc_config = {
51 .band_caps = BAND_VHF | BAND_UHF,
01b4bf31 52 .setup = (1 << 8) | (5 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (2 << 0),
b7f54910 53
6958effe
PB		 54 .agc1_max = 42598,
55 .agc1_min = 17694,
56 .agc2_max = 45875,
57 .agc2_min = 0,
b7f54910 58
6958effe
PB		 59 .agc1_pt1 = 0,
60 .agc1_pt2 = 59,
b7f54910 61
6958effe
PB		 62 .agc1_slope1 = 0,
63 .agc1_slope2 = 69,
b7f54910
PB		 64
65 .agc2_pt1 = 0,
6958effe 66 .agc2_pt2 = 59,
b7f54910 67
6958effe
PB		 68 .agc2_slope1 = 111,
69 .agc2_slope2 = 28,
b7f54910
PB		 70};
71
72static struct dib3000mc_config bristol_dib3000mc_config[2] = {
73 { .agc = &bristol_dib3000p_mt2060_agc_config,
74 .max_time = 0x196,
75 .ln_adc_level = 0x1cc7,
76 .output_mpeg2_in_188_bytes = 1,
77 },
78 { .agc = &bristol_dib3000p_mt2060_agc_config,
79 .max_time = 0x196,
80 .ln_adc_level = 0x1cc7,
81 .output_mpeg2_in_188_bytes = 1,
82 }
83};
84
85static int bristol_frontend_attach(struct dvb_usb_adapter *adap)
86{
6958effe 87 struct dib0700_state *st = adap->dev->priv;
b7f54910
PB		 88 if (adap->id == 0) {
89 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
90 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
91 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
92 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(10);
93
7fb3fc0c
PB		 94 if (force_lna_activation)
95 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
96 else
97 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
6958effe 98
b7f54910
PB		 99 if (dib3000mc_i2c_enumeration(&adap->dev->i2c_adap, 2, DEFAULT_DIB3000P_I2C_ADDRESS, bristol_dib3000mc_config) != 0) {
100 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
101 return -ENODEV;
102 }
103 }
6958effe 104 st->mt2060_if1[adap->id] = 1220;
77eed219 105 return (adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap,
6958effe 106 (10 + adap->id) << 1, &bristol_dib3000mc_config[adap->id])) == NULL ? -ENODEV : 0;
b7f54910
PB		 107}
108
4a2b1083 109static int eeprom_read(struct i2c_adapter *adap,u8 adrs,u8 *pval)
c52344fd
OD		 110{
111 struct i2c_msg msg[2] = {
112 { .addr = 0x50, .flags = 0, .buf = &adrs, .len = 1 },
113 { .addr = 0x50, .flags = I2C_M_RD, .buf = pval, .len = 1 },
114 };
115 if (i2c_transfer(adap, msg, 2) != 2) return -EREMOTEIO;
116 return 0;
117}
118
b7f54910
PB		 119static int bristol_tuner_attach(struct dvb_usb_adapter *adap)
120{
c52344fd 121 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
77eed219 122 struct i2c_adapter *tun_i2c = dib3000mc_get_tuner_i2c_master(adap->fe_adap[0].fe, 1);
c52344fd
OD		 123 s8 a;
124 int if1=1220;
da5ee486
AV		 125 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
126 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_500_2)) {
c52344fd
OD		 127 if (!eeprom_read(prim_i2c,0x59 + adap->id,&a)) if1=1220+a;
128 }
9a9677af
MK		 129 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c,
130 &bristol_mt2060_config[adap->id], if1) == NULL ?
131 -ENODEV : 0;
b7f54910
PB		 132}
133
01373a5c 134/* STK7700D: Pinnacle/Terratec/Hauppauge Dual DVB-T Diversity */
54d75eba 135
b6884a17
PB		 136/* MT226x */
137static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = {
138 {
9c783036 139 BAND_UHF,
b6884a17
PB		 140
141 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
142 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 143 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
144 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
145
146 1130,
147 21,
148
149 0,
150 118,
151
152 0,
153 3530,
154 1,
155 0,
156
157 65535,
158 33770,
159 65535,
160 23592,
161
162 0,
163 62,
164 255,
165 64,
166 64,
167 132,
168 192,
169 80,
170 80,
171
172 17,
173 27,
174 23,
175 51,
176
177 1,
b6884a17 178 }, {
9c783036 179 BAND_VHF | BAND_LBAND,
b6884a17
PB		 180
181 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
182 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 183 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
184 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
185
186 2372,
187 21,
188
189 0,
190 118,
191
192 0,
193 3530,
194 1,
195 0,
196
197 65535,
198 0,
199 65535,
200 23592,
201
202 0,
203 128,
204 128,
205 128,
206 0,
207 128,
208 253,
209 81,
210 0,
211
212 17,
213 27,
214 23,
215 51,
216
217 1,
b6884a17 218 }
54d75eba
OD		 219};
220
221static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = {
09628b2c
MCC		 222 .internal = 60000,
223 .sampling = 30000,
224 .pll_prediv = 1,
225 .pll_ratio = 8,
226 .pll_range = 3,
227 .pll_reset = 1,
228 .pll_bypass = 0,
229 .enable_refdiv = 0,
230 .bypclk_div = 0,
231 .IO_CLK_en_core = 1,
232 .ADClkSrc = 1,
233 .modulo = 2,
234 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
235 .ifreq = 0,
236 .timf = 20452225,
54d75eba
OD		 237};
238
239static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = {
240 { .output_mpeg2_in_188_bytes = 1,
241 .hostbus_diversity = 1,
242 .tuner_is_baseband = 1,
243
b6884a17
PB		 244 .agc_config_count = 2,
245 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 246 .bw = &stk7700d_mt2266_pll_config,
247
b6884a17
PB		 248 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
249 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
250 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 251 },
252 { .output_mpeg2_in_188_bytes = 1,
253 .hostbus_diversity = 1,
254 .tuner_is_baseband = 1,
255
b6884a17
PB		 256 .agc_config_count = 2,
257 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 258 .bw = &stk7700d_mt2266_pll_config,
259
b6884a17
PB		 260 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
261 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
262 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 263 }
264};
265
266static struct mt2266_config stk7700d_mt2266_config[2] = {
267 { .i2c_address = 0x60
268 },
269 { .i2c_address = 0x60
270 }
271};
272
132c3188
DG		 273static int stk7700P2_frontend_attach(struct dvb_usb_adapter *adap)
274{
8abe4a0a
MCC		 275 struct dib0700_adapter_state *state = adap->priv;
276
277 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
278 return -ENODEV;
279
132c3188
DG		 280 if (adap->id == 0) {
281 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
282 msleep(10);
283 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
284 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
285 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
286 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
287 msleep(10);
288 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
289 msleep(10);
8abe4a0a 290 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7
DH		 291 stk7700d_dib7000p_mt2266_config)
292 != 0) {
8abe4a0a
MCC		 293 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
294 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 295 return -ENODEV;
296 }
132c3188
DG		 297 }
298
8abe4a0a 299 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 300 0x80 + (adap->id << 1),
301 &stk7700d_dib7000p_mt2266_config[adap->id]);
132c3188 302
77eed219 303 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
132c3188
DG		 304}
305
54d75eba
OD		 306static int stk7700d_frontend_attach(struct dvb_usb_adapter *adap)
307{
8abe4a0a
MCC		 308 struct dib0700_adapter_state *state = adap->priv;
309
310 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
311 return -ENODEV;
312
54d75eba
OD		 313 if (adap->id == 0) {
314 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
315 msleep(10);
316 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
317 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
318 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
319 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
320 msleep(10);
321 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
322 msleep(10);
323 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
8abe4a0a 324 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7
DH		 325 stk7700d_dib7000p_mt2266_config)
326 != 0) {
8abe4a0a
MCC		 327 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
328 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 329 return -ENODEV;
330 }
54d75eba
OD		 331 }
332
8abe4a0a 333 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 334 0x80 + (adap->id << 1),
335 &stk7700d_dib7000p_mt2266_config[adap->id]);
54d75eba 336
77eed219 337 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
54d75eba
OD		 338}
339
340static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap)
341{
342 struct i2c_adapter *tun_i2c;
8abe4a0a
MCC		 343 struct dib0700_adapter_state *state = adap->priv;
344
345 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
346 DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 347 return dvb_attach(mt2266_attach, adap->fe_adap[0].fe, tun_i2c,
1ebcad77 348 &stk7700d_mt2266_config[adap->id]) == NULL ? -ENODEV : 0;
54d75eba
OD		 349}
350
6ca8f0b9 351/* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */
b1721d0d 352static struct dibx000_agc_config xc3028_agc_config = {
09628b2c 353 .band_caps = BAND_VHF | BAND_UHF,
6ca8f0b9
AC		 354 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
355 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
356 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
09628b2c
MCC		 357 .setup = (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
358 .inv_gain = 712,
359 .time_stabiliz = 21,
360 .alpha_level = 0,
361 .thlock = 118,
362 .wbd_inv = 0,
363 .wbd_ref = 2867,
364 .wbd_sel = 0,
365 .wbd_alpha = 2,
366 .agc1_max = 0,
367 .agc1_min = 0,
368 .agc2_max = 39718,
369 .agc2_min = 9930,
370 .agc1_pt1 = 0,
371 .agc1_pt2 = 0,
372 .agc1_pt3 = 0,
373 .agc1_slope1 = 0,
374 .agc1_slope2 = 0,
375 .agc2_pt1 = 0,
376 .agc2_pt2 = 128,
377 .agc2_slope1 = 29,
378 .agc2_slope2 = 29,
379 .alpha_mant = 17,
380 .alpha_exp = 27,
381 .beta_mant = 23,
382 .beta_exp = 51,
383 .perform_agc_softsplit = 1,
6ca8f0b9
AC		 384};
385
386/* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */
b1721d0d 387static struct dibx000_bandwidth_config xc3028_bw_config = {
09628b2c
MCC		 388 .internal = 60000,
389 .sampling = 30000,
390 .pll_prediv = 1,
391 .pll_ratio = 8,
392 .pll_range = 3,
393 .pll_reset = 1,
394 .pll_bypass = 0,
395 .enable_refdiv = 0,
396 .bypclk_div = 0,
397 .IO_CLK_en_core = 1,
398 .ADClkSrc = 1,
399 .modulo = 0,
400 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
401 .ifreq = (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
402 .timf = 20452225,
403 .xtal_hz = 30000000,
6ca8f0b9
AC		 404};
405
406static struct dib7000p_config stk7700ph_dib7700_xc3028_config = {
407 .output_mpeg2_in_188_bytes = 1,
408 .tuner_is_baseband = 1,
409
410 .agc_config_count = 1,
411 .agc = &xc3028_agc_config,
412 .bw = &xc3028_bw_config,
413
414 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
415 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
416 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
417};
418
d7cba043
MK		 419static int stk7700ph_xc3028_callback(void *ptr, int component,
420 int command, int arg)
6ca8f0b9
AC		 421{
422 struct dvb_usb_adapter *adap = ptr;
8abe4a0a 423 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9
AC		 424
425 switch (command) {
426 case XC2028_TUNER_RESET:
427 /* Send the tuner in then out of reset */
8abe4a0a
MCC		 428 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
429 msleep(10);
430 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6ca8f0b9
AC		 431 break;
432 case XC2028_RESET_CLK:
433 break;
434 default:
435 err("%s: unknown command %d, arg %d\n", __func__,
436 command, arg);
437 return -EINVAL;
438 }
439 return 0;
440}
441
442static struct xc2028_ctrl stk7700ph_xc3028_ctrl = {
443 .fname = XC2028_DEFAULT_FIRMWARE,
444 .max_len = 64,
445 .demod = XC3028_FE_DIBCOM52,
446};
447
448static struct xc2028_config stk7700ph_xc3028_config = {
449 .i2c_addr = 0x61,
6ca8f0b9
AC		 450 .ctrl = &stk7700ph_xc3028_ctrl,
451};
452
453static int stk7700ph_frontend_attach(struct dvb_usb_adapter *adap)
454{
455 struct usb_device_descriptor *desc = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 456 struct dib0700_adapter_state *state = adap->priv;
457
458 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
459 return -ENODEV;
6ca8f0b9 460
da5ee486
AV		 461 if (desc->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
462 desc->idProduct == cpu_to_le16(USB_PID_PINNACLE_EXPRESSCARD_320CX))
8abe4a0a 463 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 464 else
8abe4a0a 465 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
6ca8f0b9
AC		 466 msleep(20);
467 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
468 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
469 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
470 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
471 msleep(10);
472 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
473 msleep(20);
474 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
475 msleep(10);
476
8abe4a0a 477 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 478 &stk7700ph_dib7700_xc3028_config) != 0) {
8abe4a0a 479 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 480 __func__);
8abe4a0a 481 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 482 return -ENODEV;
483 }
6ca8f0b9 484
8abe4a0a 485 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9
AC		 486 &stk7700ph_dib7700_xc3028_config);
487
77eed219 488 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
6ca8f0b9
AC		 489}
490
491static int stk7700ph_tuner_attach(struct dvb_usb_adapter *adap)
492{
493 struct i2c_adapter *tun_i2c;
8abe4a0a 494 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9 495
8abe4a0a 496 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
6ca8f0b9
AC		 497 DIBX000_I2C_INTERFACE_TUNER, 1);
498
499 stk7700ph_xc3028_config.i2c_adap = tun_i2c;
d7cba043
MK		 500
501 /* FIXME: generalize & move to common area */
77eed219 502 adap->fe_adap[0].fe->callback = stk7700ph_xc3028_callback;
6ca8f0b9 503
77eed219 504 return dvb_attach(xc2028_attach, adap->fe_adap[0].fe, &stk7700ph_xc3028_config)
6ca8f0b9
AC		 505 == NULL ? -ENODEV : 0;
506}
507
4b330bee 508#define DEFAULT_RC_INTERVAL 50
54d75eba 509
72b39310
MCC		 510/*
511 * This function is used only when firmware is < 1.20 version. Newer
512 * firmwares use bulk mode, with functions implemented at dib0700_core,
513 * at dib0700_rc_urb_completion()
514 */
515static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d)
54d75eba 516{
120703f9
DH		 517 enum rc_type protocol;
518 u32 scancode;
72b39310 519 u8 toggle;
54d75eba 520 int i;
54d75eba 521 struct dib0700_state *st = d->priv;
6a207100 522
6a207100
DH		 523 if (st->fw_version >= 0x10200) {
524 /* For 1.20 firmware , We need to keep the RC polling
525 callback so we can reuse the input device setup in
526 dvb-usb-remote.c. However, the actual work is being done
527 in the bulk URB completion handler. */
528 return 0;
529 }
530
bd1f976c
MCC		 531 st->buf[0] = REQUEST_POLL_RC;
532 st->buf[1] = 0;
533
534 i = dib0700_ctrl_rd(d, st->buf, 2, st->buf, 4);
72b39310 535 if (i <= 0) {
034d65ed 536 err("RC Query Failed");
bd1f976c 537 return -EIO;
54d75eba 538 }
58e6f95e
PB		 539
540 /* losing half of KEY_0 events from Philipps rc5 remotes.. */
bd1f976c
MCC		 541 if (st->buf[0] == 0 && st->buf[1] == 0
542 && st->buf[2] == 0 && st->buf[3] == 0)
72b39310 543 return 0;
58e6f95e 544
bd1f976c 545 /* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)st->buf[3 - 2],(int)st->buf[3 - 3],(int)st->buf[3 - 1],(int)st->buf[3]); */
58e6f95e 546
c4018fa2 547 dib0700_rc_setup(d, NULL); /* reset ir sensor data to prevent false events */
58e6f95e 548
0ffd1ab3 549 switch (d->props.rc.core.protocol) {
c003ab1b 550 case RC_BIT_NEC:
58e6f95e 551 /* NEC protocol sends repeat code as 0 0 0 FF */
bd1f976c
MCC		 552 if ((st->buf[3 - 2] == 0x00) && (st->buf[3 - 3] == 0x00) &&
553 (st->buf[3] == 0xff)) {
120703f9
DH		 554 rc_repeat(d->rc_dev);
555 return 0;
58e6f95e 556 }
72b39310 557
120703f9 558 protocol = RC_TYPE_NEC;
bd1f976c 559 scancode = RC_SCANCODE_NEC(st->buf[3 - 2], st->buf[3 - 3]);
120703f9 560 toggle = 0;
58e6f95e 561 break;
120703f9 562
72b39310 563 default:
58e6f95e 564 /* RC-5 protocol changes toggle bit on new keypress */
120703f9 565 protocol = RC_TYPE_RC5;
bd1f976c
MCC		 566 scancode = RC_SCANCODE_RC5(st->buf[3 - 2], st->buf[3 - 3]);
567 toggle = st->buf[3 - 1];
58e6f95e
PB		 568 break;
569 }
120703f9
DH		 570
571 rc_keydown(d->rc_dev, protocol, scancode, toggle);
54d75eba
OD		 572 return 0;
573}
574
b7f54910 575/* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
a75763ff 576static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
9c783036 577 BAND_UHF | BAND_VHF,
69ea31e7
PB		 578
579 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
580 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 581 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
582 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
583
584 712,
585 41,
586
587 0,
588 118,
589
590 0,
591 4095,
592 0,
593 0,
594
595 42598,
596 17694,
597 45875,
598 2621,
599 0,
600 76,
601 139,
602 52,
603 59,
604 107,
605 172,
606 57,
607 70,
608
609 21,
610 25,
611 28,
612 48,
613
614 1,
615 { 0,
616 107,
617 51800,
618 24700
69ea31e7
PB		 619 },
620};
621
a75763ff 622static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = {
09628b2c 623 .band_caps = BAND_UHF | BAND_VHF,
a75763ff
PB		 624 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
625 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
09628b2c
MCC		 626 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
627 .inv_gain = 712,
628 .time_stabiliz = 41,
629 .alpha_level = 0,
630 .thlock = 118,
631 .wbd_inv = 0,
632 .wbd_ref = 4095,
633 .wbd_sel = 0,
634 .wbd_alpha = 0,
635 .agc1_max = 42598,
636 .agc1_min = 16384,
637 .agc2_max = 42598,
638 .agc2_min = 0,
639 .agc1_pt1 = 0,
640 .agc1_pt2 = 137,
641 .agc1_pt3 = 255,
642 .agc1_slope1 = 0,
643 .agc1_slope2 = 255,
644 .agc2_pt1 = 0,
645 .agc2_pt2 = 0,
646 .agc2_slope1 = 0,
647 .agc2_slope2 = 41,
648 .alpha_mant = 15,
649 .alpha_exp = 25,
650 .beta_mant = 28,
651 .beta_exp = 48,
652 .perform_agc_softsplit = 0,
a75763ff
PB		 653};
654
655static struct dibx000_bandwidth_config stk7700p_pll_config = {
09628b2c
MCC		 656 .internal = 60000,
657 .sampling = 30000,
658 .pll_prediv = 1,
659 .pll_ratio = 8,
660 .pll_range = 3,
661 .pll_reset = 1,
662 .pll_bypass = 0,
663 .enable_refdiv = 0,
664 .bypclk_div = 0,
665 .IO_CLK_en_core = 1,
666 .ADClkSrc = 1,
667 .modulo = 0,
668 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
669 .ifreq = 60258167,
670 .timf = 20452225,
671 .xtal_hz = 30000000,
69ea31e7
PB		 672};
673
674static struct dib7000m_config stk7700p_dib7000m_config = {
675 .dvbt_mode = 1,
676 .output_mpeg2_in_188_bytes = 1,
677 .quartz_direct = 1,
678
679 .agc_config_count = 1,
a75763ff
PB		 680 .agc = &stk7700p_7000m_mt2060_agc_config,
681 .bw = &stk7700p_pll_config,
682
683 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
684 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
685 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
686};
687
688static struct dib7000p_config stk7700p_dib7000p_config = {
689 .output_mpeg2_in_188_bytes = 1,
690
b6884a17 691 .agc_config_count = 1,
a75763ff
PB		 692 .agc = &stk7700p_7000p_mt2060_agc_config,
693 .bw = &stk7700p_pll_config,
69ea31e7
PB		 694
695 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
696 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
697 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
b7f54910
PB		 698};
699
700static int stk7700p_frontend_attach(struct dvb_usb_adapter *adap)
701{
69ea31e7 702 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 703 struct dib0700_adapter_state *state = adap->priv;
704
705 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
706 return -ENODEV;
707
b7f54910 708 /* unless there is no real power management in DVB - we leave the device on GPIO6 */
a75763ff
PB		 709
710 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
711 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(50);
712
69ea31e7 713 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
a75763ff
PB		 714 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
715
b7f54910 716 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
a75763ff
PB		 717 dib0700_ctrl_clock(adap->dev, 72, 1);
718 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(100);
719
720 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
b7f54910 721
69ea31e7 722 st->mt2060_if1[0] = 1220;
a75763ff 723
8abe4a0a
MCC		 724 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap)) {
725 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 18, &stk7700p_dib7000p_config);
a75763ff 726 st->is_dib7000pc = 1;
8abe4a0a 727 } else {
8abe4a0a 728 memset(&state->dib7000p_ops, 0, sizeof(state->dib7000p_ops));
77eed219 729 adap->fe_adap[0].fe = dvb_attach(dib7000m_attach, &adap->dev->i2c_adap, 18, &stk7700p_dib7000m_config);
8abe4a0a 730 }
a75763ff 731
77eed219 732 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
b7f54910
PB		 733}
734
69ea31e7
PB		 735static struct mt2060_config stk7700p_mt2060_config = {
736 0x60
737};
738
b7f54910
PB		 739static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap)
740{
c52344fd 741 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
69ea31e7 742 struct dib0700_state *st = adap->dev->priv;
a75763ff 743 struct i2c_adapter *tun_i2c;
8abe4a0a 744 struct dib0700_adapter_state *state = adap->priv;
c52344fd
OD		 745 s8 a;
746 int if1=1220;
8abe4a0a 747
da5ee486
AV		 748 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
749 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_STICK)) {
c52344fd
OD		 750 if (!eeprom_read(prim_i2c,0x58,&a)) if1=1220+a;
751 }
a75763ff 752 if (st->is_dib7000pc)
8abe4a0a 753 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 754 else
77eed219 755 tun_i2c = dib7000m_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 756
77eed219 757 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, &stk7700p_mt2060_config,
c52344fd 758 if1) == NULL ? -ENODEV : 0;
b7f54910
PB		 759}
760
01373a5c
PB		 761/* DIB7070 generic */
762static struct dibx000_agc_config dib7070_agc_config = {
09628b2c 763 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
01373a5c
PB		 764 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
765 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
09628b2c
MCC		 766 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
767 .inv_gain = 600,
768 .time_stabiliz = 10,
769 .alpha_level = 0,
770 .thlock = 118,
771 .wbd_inv = 0,
772 .wbd_ref = 3530,
773 .wbd_sel = 1,
774 .wbd_alpha = 5,
775 .agc1_max = 65535,
776 .agc1_min = 0,
777 .agc2_max = 65535,
778 .agc2_min = 0,
779 .agc1_pt1 = 0,
780 .agc1_pt2 = 40,
781 .agc1_pt3 = 183,
782 .agc1_slope1 = 206,
783 .agc1_slope2 = 255,
784 .agc2_pt1 = 72,
785 .agc2_pt2 = 152,
786 .agc2_slope1 = 88,
787 .agc2_slope2 = 90,
788 .alpha_mant = 17,
789 .alpha_exp = 27,
790 .beta_mant = 23,
791 .beta_exp = 51,
792 .perform_agc_softsplit = 0,
01373a5c
PB		 793};
794
795static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
796{
8abe4a0a
MCC		 797 struct dvb_usb_adapter *adap = fe->dvb->priv;
798 struct dib0700_adapter_state *state = adap->priv;
799
7e5ce651 800 deb_info("reset: %d", onoff);
8abe4a0a 801 return state->dib7000p_ops.set_gpio(fe, 8, 0, !onoff);
01373a5c
PB		 802}
803
804static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
805{
8abe4a0a
MCC		 806 struct dvb_usb_adapter *adap = fe->dvb->priv;
807 struct dib0700_adapter_state *state = adap->priv;
808
7e5ce651 809 deb_info("sleep: %d", onoff);
8abe4a0a 810 return state->dib7000p_ops.set_gpio(fe, 9, 0, onoff);
01373a5c
PB		 811}
812
813static struct dib0070_config dib7070p_dib0070_config[2] = {
814 {
815 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
816 .reset = dib7070_tuner_reset,
817 .sleep = dib7070_tuner_sleep,
818 .clock_khz = 12000,
7e5ce651
PB		 819 .clock_pad_drive = 4,
820 .charge_pump = 2,
01373a5c
PB		 821 }, {
822 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
823 .reset = dib7070_tuner_reset,
824 .sleep = dib7070_tuner_sleep,
825 .clock_khz = 12000,
7e5ce651 826 .charge_pump = 2,
01373a5c
PB		 827 }
828};
829
d300bd69
OG		 830static struct dib0070_config dib7770p_dib0070_config = {
831 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
832 .reset = dib7070_tuner_reset,
833 .sleep = dib7070_tuner_sleep,
834 .clock_khz = 12000,
835 .clock_pad_drive = 0,
836 .flip_chip = 1,
eac1fe10 837 .charge_pump = 2,
d300bd69
OG		 838};
839
14d24d14 840static int dib7070_set_param_override(struct dvb_frontend *fe)
01373a5c 841{
47b163af 842 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
01373a5c
PB		 843 struct dvb_usb_adapter *adap = fe->dvb->priv;
844 struct dib0700_adapter_state *state = adap->priv;
845
846 u16 offset;
47b163af 847 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
01373a5c
PB		 848 switch (band) {
849 case BAND_VHF: offset = 950; break;
850 case BAND_UHF:
851 default: offset = 550; break;
852 }
853 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
8abe4a0a 854 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
14d24d14 855 return state->set_param_save(fe);
01373a5c
PB		 856}
857
14d24d14 858static int dib7770_set_param_override(struct dvb_frontend *fe)
d300bd69 859{
47b163af
MCC		 860 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
861 struct dvb_usb_adapter *adap = fe->dvb->priv;
862 struct dib0700_adapter_state *state = adap->priv;
d300bd69 863
316c46b8
MCC		 864 u16 offset;
865 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
866 switch (band) {
867 case BAND_VHF:
868 state->dib7000p_ops.set_gpio(fe, 0, 0, 1);
869 offset = 850;
870 break;
871 case BAND_UHF:
872 default:
873 state->dib7000p_ops.set_gpio(fe, 0, 0, 0);
874 offset = 250;
875 break;
876 }
877 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
878 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
879 return state->set_param_save(fe);
d300bd69
OG		 880}
881
882static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap)
883{
8abe4a0a
MCC		 884 struct dib0700_adapter_state *st = adap->priv;
885 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
d300bd69
OG		 886 DIBX000_I2C_INTERFACE_TUNER, 1);
887
8abe4a0a
MCC		 888 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
889 &dib7770p_dib0070_config) == NULL)
890 return -ENODEV;
d300bd69 891
8abe4a0a
MCC		 892 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
893 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7770_set_param_override;
894 return 0;
d300bd69
OG		 895}
896
01373a5c
PB		 897static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
898{
899 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a 900 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
01373a5c
PB		 901
902 if (adap->id == 0) {
77eed219 903 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[0]) == NULL)
01373a5c
PB		 904 return -ENODEV;
905 } else {
77eed219 906 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[1]) == NULL)
01373a5c
PB		 907 return -ENODEV;
908 }
909
77eed219
MK		 910 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
911 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7070_set_param_override;
01373a5c
PB		 912 return 0;
913}
914
e192a7cf
OG		 915static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index,
916 u16 pid, int onoff)
917{
8abe4a0a 918 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 919 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 920
e192a7cf 921 if (st->is_dib7000pc)
8abe4a0a 922 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
77eed219 923 return dib7000m_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
e192a7cf
OG		 924}
925
926static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
927{
928 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 929 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 930 if (st->is_dib7000pc)
8abe4a0a 931 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
77eed219 932 return dib7000m_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
e192a7cf
OG		 933}
934
f8731f4d
OG		 935static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
936{
8abe4a0a
MCC		 937 struct dib0700_adapter_state *state = adapter->priv;
938 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 939}
940
941static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
942{
8abe4a0a
MCC		 943 struct dib0700_adapter_state *state = adapter->priv;
944 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d
OG		 945}
946
01373a5c 947static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
09628b2c
MCC		 948 .internal = 60000,
949 .sampling = 15000,
950 .pll_prediv = 1,
951 .pll_ratio = 20,
952 .pll_range = 3,
953 .pll_reset = 1,
954 .pll_bypass = 0,
955 .enable_refdiv = 0,
956 .bypclk_div = 0,
957 .IO_CLK_en_core = 1,
958 .ADClkSrc = 1,
959 .modulo = 2,
960 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
961 .ifreq = (0 << 25) | 0,
962 .timf = 20452225,
963 .xtal_hz = 12000000,
01373a5c
PB		 964};
965
966static struct dib7000p_config dib7070p_dib7000p_config = {
967 .output_mpeg2_in_188_bytes = 1,
968
969 .agc_config_count = 1,
970 .agc = &dib7070_agc_config,
971 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 972 .tuner_is_baseband = 1,
973 .spur_protect = 1,
01373a5c
PB		 974
975 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
976 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
977 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
978
979 .hostbus_diversity = 1,
980};
981
982/* STK7070P */
983static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap)
984{
da5ee486 985 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 986 struct dib0700_adapter_state *state = adap->priv;
987
988 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
989 return -ENODEV;
990
da5ee486
AV		 991 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
992 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
993 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 994 else
da5ee486 995 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
01373a5c
PB		 996 msleep(10);
997 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
998 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
999 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1000 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1001
1002 dib0700_ctrl_clock(adap->dev, 72, 1);
1003
1004 msleep(10);
1005 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1006 msleep(10);
1007 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1008
8abe4a0a 1009 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 1010 &dib7070p_dib7000p_config) != 0) {
8abe4a0a 1011 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 1012 __func__);
8abe4a0a 1013 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 1014 return -ENODEV;
1015 }
01373a5c 1016
8abe4a0a 1017 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9 1018 &dib7070p_dib7000p_config);
77eed219 1019 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 1020}
1021
90e12cec
OG		 1022/* STK7770P */
1023static struct dib7000p_config dib7770p_dib7000p_config = {
1024 .output_mpeg2_in_188_bytes = 1,
1025
1026 .agc_config_count = 1,
1027 .agc = &dib7070_agc_config,
1028 .bw = &dib7070_bw_config_12_mhz,
1029 .tuner_is_baseband = 1,
1030 .spur_protect = 1,
1031
1032 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
1033 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
1034 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1035
1036 .hostbus_diversity = 1,
1037 .enable_current_mirror = 1,
970d14c6 1038 .disable_sample_and_hold = 0,
90e12cec
OG		 1039};
1040
1041static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap)
1042{
1043 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 1044 struct dib0700_adapter_state *state = adap->priv;
1045
1046 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
1047 return -ENODEV;
1048
90e12cec
OG		 1049 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
1050 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
1051 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1052 else
1053 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1054 msleep(10);
1055 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1056 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1057 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1058 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1059
1060 dib0700_ctrl_clock(adap->dev, 72, 1);
1061
1062 msleep(10);
1063 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1064 msleep(10);
1065 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1066
8abe4a0a 1067 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
90e12cec 1068 &dib7770p_dib7000p_config) != 0) {
8abe4a0a 1069 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
90e12cec 1070 __func__);
8abe4a0a 1071 dvb_detach(&state->dib7000p_ops);
90e12cec
OG		 1072 return -ENODEV;
1073 }
1074
8abe4a0a 1075 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
90e12cec 1076 &dib7770p_dib7000p_config);
77eed219 1077 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
90e12cec
OG		 1078}
1079
ba3fe3a9
PB		 1080/* DIB807x generic */
1081static struct dibx000_agc_config dib807x_agc_config[2] = {
1082 {
1083 BAND_VHF,
1084 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1085 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1086 * P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0,
1087 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1088 * P_agc_write=0 */
1089 (0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) |
1090 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1091 (0 << 0), /* setup*/
1092
1093 600, /* inv_gain*/
1094 10, /* time_stabiliz*/
1095
1096 0, /* alpha_level*/
1097 118, /* thlock*/
1098
1099 0, /* wbd_inv*/
1100 3530, /* wbd_ref*/
1101 1, /* wbd_sel*/
1102 5, /* wbd_alpha*/
1103
1104 65535, /* agc1_max*/
1105 0, /* agc1_min*/
1106
1107 65535, /* agc2_max*/
1108 0, /* agc2_min*/
1109
1110 0, /* agc1_pt1*/
1111 40, /* agc1_pt2*/
1112 183, /* agc1_pt3*/
1113 206, /* agc1_slope1*/
1114 255, /* agc1_slope2*/
1115 72, /* agc2_pt1*/
1116 152, /* agc2_pt2*/
1117 88, /* agc2_slope1*/
1118 90, /* agc2_slope2*/
1119
1120 17, /* alpha_mant*/
1121 27, /* alpha_exp*/
1122 23, /* beta_mant*/
1123 51, /* beta_exp*/
1124
1125 0, /* perform_agc_softsplit*/
1126 }, {
1127 BAND_UHF,
1128 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1129 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1130 * P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1131 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1132 * P_agc_write=0 */
1133 (0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) |
1134 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1135 (0 << 0), /* setup */
1136
1137 600, /* inv_gain*/
1138 10, /* time_stabiliz*/
1139
1140 0, /* alpha_level*/
1141 118, /* thlock*/
1142
1143 0, /* wbd_inv*/
1144 3530, /* wbd_ref*/
1145 1, /* wbd_sel*/
1146 5, /* wbd_alpha*/
1147
1148 65535, /* agc1_max*/
1149 0, /* agc1_min*/
1150
1151 65535, /* agc2_max*/
1152 0, /* agc2_min*/
1153
1154 0, /* agc1_pt1*/
1155 40, /* agc1_pt2*/
1156 183, /* agc1_pt3*/
1157 206, /* agc1_slope1*/
1158 255, /* agc1_slope2*/
1159 72, /* agc2_pt1*/
1160 152, /* agc2_pt2*/
1161 88, /* agc2_slope1*/
1162 90, /* agc2_slope2*/
1163
1164 17, /* alpha_mant*/
1165 27, /* alpha_exp*/
1166 23, /* beta_mant*/
1167 51, /* beta_exp*/
1168
1169 0, /* perform_agc_softsplit*/
1170 }
1171};
1172
1173static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = {
09628b2c
MCC		 1174 .internal = 60000,
1175 .sampling = 15000,
1176 .pll_prediv = 1,
1177 .pll_ratio = 20,
1178 .pll_range = 3,
1179 .pll_reset = 1,
1180 .pll_bypass = 0,
1181 .enable_refdiv = 0,
1182 .bypclk_div = 0,
1183 .IO_CLK_en_core = 1,
1184 .ADClkSrc = 1,
1185 .modulo = 2,
1186 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/
1187 .ifreq = (0 << 25) | 0, /* ifreq = 0.000000 MHz*/
1188 .timf = 18179755,
1189 .xtal_hz = 12000000,
ba3fe3a9
PB		 1190};
1191
1192static struct dib8000_config dib807x_dib8000_config[2] = {
1193 {
1194 .output_mpeg2_in_188_bytes = 1,
1195
1196 .agc_config_count = 2,
1197 .agc = dib807x_agc_config,
1198 .pll = &dib807x_bw_config_12_mhz,
1199 .tuner_is_baseband = 1,
1200
1201 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1202 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1203 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1204
1205 .hostbus_diversity = 1,
1206 .div_cfg = 1,
1207 .agc_control = &dib0070_ctrl_agc_filter,
1208 .output_mode = OUTMODE_MPEG2_FIFO,
1209 .drives = 0x2d98,
1210 }, {
1211 .output_mpeg2_in_188_bytes = 1,
1212
1213 .agc_config_count = 2,
1214 .agc = dib807x_agc_config,
1215 .pll = &dib807x_bw_config_12_mhz,
1216 .tuner_is_baseband = 1,
1217
1218 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1219 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1220 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1221
1222 .hostbus_diversity = 1,
1223 .agc_control = &dib0070_ctrl_agc_filter,
1224 .output_mode = OUTMODE_MPEG2_FIFO,
1225 .drives = 0x2d98,
1226 }
1227};
1228
03245a5e 1229static int dib80xx_tuner_reset(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1230{
d44913c1
MCC		 1231 struct dvb_usb_adapter *adap = fe->dvb->priv;
1232 struct dib0700_adapter_state *state = adap->priv;
1233
1234 return state->dib8000_ops.set_gpio(fe, 5, 0, !onoff);
ba3fe3a9
PB		 1235}
1236
03245a5e 1237static int dib80xx_tuner_sleep(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1238{
d44913c1
MCC		 1239 struct dvb_usb_adapter *adap = fe->dvb->priv;
1240 struct dib0700_adapter_state *state = adap->priv;
1241
1242 return state->dib8000_ops.set_gpio(fe, 0, 0, onoff);
ba3fe3a9
PB		 1243}
1244
1245static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = {
1246 { 240, 7},
1247 { 0xffff, 6},
1248};
1249
1250static struct dib0070_config dib807x_dib0070_config[2] = {
1251 {
1252 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1253 .reset = dib80xx_tuner_reset,
1254 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1255 .clock_khz = 12000,
1256 .clock_pad_drive = 4,
1257 .vga_filter = 1,
1258 .force_crystal_mode = 1,
1259 .enable_third_order_filter = 1,
1260 .charge_pump = 0,
1261 .wbd_gain = dib8070_wbd_gain_cfg,
1262 .osc_buffer_state = 0,
1263 .freq_offset_khz_uhf = -100,
1264 .freq_offset_khz_vhf = -100,
1265 }, {
1266 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1267 .reset = dib80xx_tuner_reset,
1268 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1269 .clock_khz = 12000,
1270 .clock_pad_drive = 2,
1271 .vga_filter = 1,
1272 .force_crystal_mode = 1,
1273 .enable_third_order_filter = 1,
1274 .charge_pump = 0,
1275 .wbd_gain = dib8070_wbd_gain_cfg,
1276 .osc_buffer_state = 0,
1277 .freq_offset_khz_uhf = -25,
1278 .freq_offset_khz_vhf = -25,
1279 }
1280};
1281
14d24d14 1282static int dib807x_set_param_override(struct dvb_frontend *fe)
ba3fe3a9 1283{
47b163af 1284 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
ba3fe3a9
PB		 1285 struct dvb_usb_adapter *adap = fe->dvb->priv;
1286 struct dib0700_adapter_state *state = adap->priv;
1287
1288 u16 offset = dib0070_wbd_offset(fe);
47b163af 1289 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
ba3fe3a9
PB		 1290 switch (band) {
1291 case BAND_VHF:
1292 offset += 750;
1293 break;
1294 case BAND_UHF: /* fall-thru wanted */
1295 default:
1296 offset += 250; break;
1297 }
1298 deb_info("WBD for DiB8000: %d\n", offset);
d44913c1 1299 state->dib8000_ops.set_wbd_ref(fe, offset);
ba3fe3a9 1300
14d24d14 1301 return state->set_param_save(fe);
ba3fe3a9
PB		 1302}
1303
1304static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
1305{
1306 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1307 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe,
ba3fe3a9
PB		 1308 DIBX000_I2C_INTERFACE_TUNER, 1);
1309
1310 if (adap->id == 0) {
77eed219 1311 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1312 &dib807x_dib0070_config[0]) == NULL)
1313 return -ENODEV;
1314 } else {
77eed219 1315 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1316 &dib807x_dib0070_config[1]) == NULL)
1317 return -ENODEV;
1318 }
1319
77eed219
MK		 1320 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1321 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib807x_set_param_override;
ba3fe3a9
PB		 1322 return 0;
1323}
1324
9c783036
OG		 1325static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index,
1326 u16 pid, int onoff)
f8731f4d 1327{
d44913c1
MCC		 1328 struct dib0700_adapter_state *state = adapter->priv;
1329
1330 return state->dib8000_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 1331}
1332
9c783036 1333static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter,
be9bae10 1334 int onoff)
f8731f4d 1335{
d44913c1
MCC		 1336 struct dib0700_adapter_state *state = adapter->priv;
1337
1338 return state->dib8000_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d 1339}
ba3fe3a9
PB		 1340
1341/* STK807x */
1342static int stk807x_frontend_attach(struct dvb_usb_adapter *adap)
1343{
d44913c1
MCC		 1344 struct dib0700_adapter_state *state = adap->priv;
1345
1346 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1347 return -ENODEV;
1348
ba3fe3a9
PB		 1349 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1350 msleep(10);
1351 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1352 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1353 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1354
1355 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1356
1357 dib0700_ctrl_clock(adap->dev, 72, 1);
1358
1359 msleep(10);
1360 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1361 msleep(10);
1362 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1363
d44913c1 1364 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
0c32dbd7 1365 0x80, 0);
ba3fe3a9 1366
d44913c1 1367 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1368 &dib807x_dib8000_config[0]);
1369
77eed219 1370 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1371}
1372
1373/* STK807xPVR */
1374static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
1375{
d44913c1
MCC		 1376 struct dib0700_adapter_state *state = adap->priv;
1377
1378 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1379 return -ENODEV;
1380
ba3fe3a9
PB		 1381 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1382 msleep(30);
1383 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1384 msleep(500);
1385 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1386 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1387 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1388
1389 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1390
1391 dib0700_ctrl_clock(adap->dev, 72, 1);
1392
1393 msleep(10);
1394 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1395 msleep(10);
1396 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1397
1398 /* initialize IC 0 */
d44913c1 1399 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80, 0);
ba3fe3a9 1400
d44913c1 1401 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1402 &dib807x_dib8000_config[0]);
1403
77eed219 1404 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1405}
1406
1407static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
1408{
d44913c1
MCC		 1409 struct dib0700_adapter_state *state = adap->priv;
1410
1411 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1412 return -ENODEV;
1413
ba3fe3a9 1414 /* initialize IC 1 */
d44913c1 1415 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82, 0);
ba3fe3a9 1416
d44913c1 1417 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82,
ba3fe3a9
PB		 1418 &dib807x_dib8000_config[1]);
1419
77eed219 1420 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1421}
1422
03245a5e 1423/* STK8096GP */
a685dbbc 1424static struct dibx000_agc_config dib8090_agc_config[2] = {
be9bae10 1425 {
40d1a7c3 1426 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
9c783036 1427 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1428 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1429 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1430 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1431 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1432
40d1a7c3
MCC		 1433 .inv_gain = 787,
1434 .time_stabiliz = 10,
9c783036 1435
40d1a7c3
MCC		 1436 .alpha_level = 0,
1437 .thlock = 118,
9c783036 1438
40d1a7c3
MCC		 1439 .wbd_inv = 0,
1440 .wbd_ref = 3530,
1441 .wbd_sel = 1,
1442 .wbd_alpha = 5,
9c783036 1443
40d1a7c3
MCC		 1444 .agc1_max = 65535,
1445 .agc1_min = 0,
9c783036 1446
40d1a7c3
MCC		 1447 .agc2_max = 65535,
1448 .agc2_min = 0,
9c783036 1449
40d1a7c3
MCC		 1450 .agc1_pt1 = 0,
1451 .agc1_pt2 = 32,
1452 .agc1_pt3 = 114,
1453 .agc1_slope1 = 143,
1454 .agc1_slope2 = 144,
1455 .agc2_pt1 = 114,
1456 .agc2_pt2 = 227,
1457 .agc2_slope1 = 116,
1458 .agc2_slope2 = 117,
1459
1460 .alpha_mant = 28,
1461 .alpha_exp = 26,
1462 .beta_mant = 31,
1463 .beta_exp = 51,
1464
1465 .perform_agc_softsplit = 0,
be9bae10
OG		 1466 },
1467 {
40d1a7c3 1468 .band_caps = BAND_CBAND,
9c783036 1469 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1470 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1471 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1472 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1473 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1474
40d1a7c3
MCC		 1475 .inv_gain = 787,
1476 .time_stabiliz = 10,
9c783036 1477
40d1a7c3
MCC		 1478 .alpha_level = 0,
1479 .thlock = 118,
9c783036 1480
40d1a7c3
MCC		 1481 .wbd_inv = 0,
1482 .wbd_ref = 3530,
1483 .wbd_sel = 1,
1484 .wbd_alpha = 5,
9c783036 1485
40d1a7c3
MCC		 1486 .agc1_max = 0,
1487 .agc1_min = 0,
9c783036 1488
40d1a7c3
MCC		 1489 .agc2_max = 65535,
1490 .agc2_min = 0,
9c783036 1491
40d1a7c3
MCC		 1492 .agc1_pt1 = 0,
1493 .agc1_pt2 = 32,
1494 .agc1_pt3 = 114,
1495 .agc1_slope1 = 143,
1496 .agc1_slope2 = 144,
1497 .agc2_pt1 = 114,
1498 .agc2_pt2 = 227,
1499 .agc2_slope1 = 116,
1500 .agc2_slope2 = 117,
1501
1502 .alpha_mant = 28,
1503 .alpha_exp = 26,
1504 .beta_mant = 31,
1505 .beta_exp = 51,
1506
1507 .perform_agc_softsplit = 0,
be9bae10 1508 }
03245a5e
OG		 1509};
1510
1511static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = {
40d1a7c3
MCC		 1512 .internal = 54000,
1513 .sampling = 13500,
1514
1515 .pll_prediv = 1,
1516 .pll_ratio = 18,
1517 .pll_range = 3,
1518 .pll_reset = 1,
1519 .pll_bypass = 0,
1520
1521 .enable_refdiv = 0,
1522 .bypclk_div = 0,
1523 .IO_CLK_en_core = 1,
1524 .ADClkSrc = 1,
1525 .modulo = 2,
1526
1527 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0),
1528
1529 .ifreq = (0 << 25) | 0,
1530 .timf = 20199727,
1531
1532 .xtal_hz = 12000000,
03245a5e
OG		 1533};
1534
1535static int dib8090_get_adc_power(struct dvb_frontend *fe)
1536{
d44913c1
MCC		 1537 struct dvb_usb_adapter *adap = fe->dvb->priv;
1538 struct dib0700_adapter_state *state = adap->priv;
1539
1540 return state->dib8000_ops.get_adc_power(fe, 1);
be9bae10
OG		 1541}
1542
5e9c85d9
OG		 1543static void dib8090_agc_control(struct dvb_frontend *fe, u8 restart)
1544{
1545 deb_info("AGC control callback: %i\n", restart);
1546 dib0090_dcc_freq(fe, restart);
1547
1548 if (restart == 0) /* before AGC startup */
1549 dib0090_set_dc_servo(fe, 1);
1550}
1551
be9bae10
OG		 1552static struct dib8000_config dib809x_dib8000_config[2] = {
1553 {
1554 .output_mpeg2_in_188_bytes = 1,
1555
1556 .agc_config_count = 2,
1557 .agc = dib8090_agc_config,
5e9c85d9 1558 .agc_control = dib8090_agc_control,
be9bae10
OG		 1559 .pll = &dib8090_pll_config_12mhz,
1560 .tuner_is_baseband = 1,
1561
1562 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1563 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1564 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1565
1566 .hostbus_diversity = 1,
1567 .div_cfg = 0x31,
1568 .output_mode = OUTMODE_MPEG2_FIFO,
1569 .drives = 0x2d98,
1570 .diversity_delay = 48,
1571 .refclksel = 3,
b4d6046e 1572 }, {
be9bae10
OG		 1573 .output_mpeg2_in_188_bytes = 1,
1574
1575 .agc_config_count = 2,
1576 .agc = dib8090_agc_config,
5e9c85d9 1577 .agc_control = dib8090_agc_control,
be9bae10
OG		 1578 .pll = &dib8090_pll_config_12mhz,
1579 .tuner_is_baseband = 1,
1580
1581 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1582 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1583 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1584
1585 .hostbus_diversity = 1,
1586 .div_cfg = 0x31,
1587 .output_mode = OUTMODE_DIVERSITY,
1588 .drives = 0x2d08,
1589 .diversity_delay = 1,
1590 .refclksel = 3,
1591 }
1592};
1593
1594static struct dib0090_wbd_slope dib8090_wbd_table[] = {
1595 /* max freq ; cold slope ; cold offset ; warm slope ; warm offset ; wbd gain */
1596 { 120, 0, 500, 0, 500, 4 }, /* CBAND */
1597 { 170, 0, 450, 0, 450, 4 }, /* CBAND */
1598 { 380, 48, 373, 28, 259, 6 }, /* VHF */
1599 { 860, 34, 700, 36, 616, 6 }, /* high UHF */
1600 { 0xFFFF, 34, 700, 36, 616, 6 }, /* default */
1601};
1602
1603static struct dib0090_config dib809x_dib0090_config = {
1604 .io.pll_bypass = 1,
1605 .io.pll_range = 1,
1606 .io.pll_prediv = 1,
1607 .io.pll_loopdiv = 20,
1608 .io.adc_clock_ratio = 8,
1609 .io.pll_int_loop_filt = 0,
1610 .io.clock_khz = 12000,
1611 .reset = dib80xx_tuner_reset,
1612 .sleep = dib80xx_tuner_sleep,
1613 .clkouttobamse = 1,
1614 .analog_output = 1,
1615 .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS,
1616 .use_pwm_agc = 1,
1617 .clkoutdrive = 1,
1618 .get_adc_power = dib8090_get_adc_power,
1619 .freq_offset_khz_uhf = -63,
1620 .freq_offset_khz_vhf = -143,
1621 .wbd = dib8090_wbd_table,
1622 .fref_clock_ratio = 6,
1623};
1624
5e9c85d9
OG		 1625static u8 dib8090_compute_pll_parameters(struct dvb_frontend *fe)
1626{
1627 u8 optimal_pll_ratio = 20;
1628 u32 freq_adc, ratio, rest, max = 0;
1629 u8 pll_ratio;
1630
1631 for (pll_ratio = 17; pll_ratio <= 20; pll_ratio++) {
1632 freq_adc = 12 * pll_ratio * (1 << 8) / 16;
1633 ratio = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) / freq_adc;
1634 rest = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) - ratio * freq_adc;
1635
1636 if (rest > freq_adc / 2)
1637 rest = freq_adc - rest;
1638 deb_info("PLL ratio=%i rest=%i\n", pll_ratio, rest);
1639 if ((rest > max) && (rest > 717)) {
1640 optimal_pll_ratio = pll_ratio;
1641 max = rest;
1642 }
1643 }
1644 deb_info("optimal PLL ratio=%i\n", optimal_pll_ratio);
1645
1646 return optimal_pll_ratio;
1647}
1648
14d24d14 1649static int dib8096_set_param_override(struct dvb_frontend *fe)
be9bae10
OG		 1650{
1651 struct dvb_usb_adapter *adap = fe->dvb->priv;
1652 struct dib0700_adapter_state *state = adap->priv;
5e9c85d9
OG		 1653 u8 pll_ratio, band = BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
1654 u16 target, ltgain, rf_gain_limit;
1655 u32 timf;
be9bae10
OG		 1656 int ret = 0;
1657 enum frontend_tune_state tune_state = CT_SHUTDOWN;
5e9c85d9
OG		 1658
1659 switch (band) {
1660 default:
1661 deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);
1662 case BAND_VHF:
d44913c1 1663 state->dib8000_ops.set_gpio(fe, 3, 0, 1);
5e9c85d9
OG		 1664 break;
1665 case BAND_UHF:
d44913c1 1666 state->dib8000_ops.set_gpio(fe, 3, 0, 0);
5e9c85d9
OG		 1667 break;
1668 }
be9bae10 1669
14d24d14 1670 ret = state->set_param_save(fe);
be9bae10
OG		 1671 if (ret < 0)
1672 return ret;
1673
5e9c85d9
OG		 1674 if (fe->dtv_property_cache.bandwidth_hz != 6000000) {
1675 deb_info("only 6MHz bandwidth is supported\n");
1676 return -EINVAL;
1677 }
1678
1679 /** Update PLL if needed ratio **/
d44913c1 1680 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
5e9c85d9
OG		 1681
1682 /** Get optimize PLL ratio to remove spurious **/
1683 pll_ratio = dib8090_compute_pll_parameters(fe);
1684 if (pll_ratio == 17)
1685 timf = 21387946;
1686 else if (pll_ratio == 18)
1687 timf = 20199727;
1688 else if (pll_ratio == 19)
1689 timf = 19136583;
1690 else
1691 timf = 18179756;
be9bae10 1692
5e9c85d9 1693 /** Update ratio **/
d44913c1 1694 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio);
5e9c85d9 1695
d44913c1 1696 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf);
5e9c85d9
OG		 1697
1698 if (band != BAND_CBAND) {
1699 /* dib0090_get_wbd_target is returning any possible temperature compensated wbd-target */
1700 target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2;
d44913c1 1701 state->dib8000_ops.set_wbd_ref(fe, target);
5e9c85d9 1702 }
be9bae10
OG		 1703
1704 if (band == BAND_CBAND) {
b4d6046e
OG		 1705 deb_info("tuning in CBAND - soft-AGC startup\n");
1706 dib0090_set_tune_state(fe, CT_AGC_START);
5e9c85d9 1707
b4d6046e
OG		 1708 do {
1709 ret = dib0090_gain_control(fe);
1710 msleep(ret);
1711 tune_state = dib0090_get_tune_state(fe);
1712 if (tune_state == CT_AGC_STEP_0)
d44913c1 1713 state->dib8000_ops.set_gpio(fe, 6, 0, 1);
b4d6046e
OG		 1714 else if (tune_state == CT_AGC_STEP_1) {
1715 dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, &ltgain);
5e9c85d9 1716 if (rf_gain_limit < 2000) /* activate the external attenuator in case of very high input power */
d44913c1 1717 state->dib8000_ops.set_gpio(fe, 6, 0, 0);
b4d6046e
OG		 1718 }
1719 } while (tune_state < CT_AGC_STOP);
5e9c85d9
OG		 1720
1721 deb_info("switching to PWM AGC\n");
b4d6046e 1722 dib0090_pwm_gain_reset(fe);
d44913c1
MCC		 1723 state->dib8000_ops.pwm_agc_reset(fe);
1724 state->dib8000_ops.set_tune_state(fe, CT_DEMOD_START);
be9bae10 1725 } else {
5e9c85d9 1726 /* for everything else than CBAND we are using standard AGC */
b4d6046e
OG		 1727 deb_info("not tuning in CBAND - standard AGC startup\n");
1728 dib0090_pwm_gain_reset(fe);
be9bae10
OG		 1729 }
1730
1731 return 0;
1732}
1733
1734static int dib809x_tuner_attach(struct dvb_usb_adapter *adap)
1735{
1736 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1737 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10 1738
91be260f
NS		 1739 if (adap->id == 0) {
1740 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
1741 return -ENODEV;
1742 } else {
1743 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
1744 return -ENODEV;
1745 }
be9bae10 1746
77eed219
MK		 1747 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1748 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1749 return 0;
1750}
1751
1752static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
1753{
d44913c1
MCC		 1754 struct dib0700_adapter_state *state = adap->priv;
1755
1756 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1757 return -ENODEV;
1758
be9bae10
OG		 1759 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1760 msleep(10);
1761 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1762 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1763 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1764
1765 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1766
1767 dib0700_ctrl_clock(adap->dev, 72, 1);
1768
1769 msleep(10);
1770 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1771 msleep(10);
1772 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1773
d44913c1 1774 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80, 0);
be9bae10 1775
d44913c1 1776 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
be9bae10 1777
77eed219 1778 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 1779}
1780
91be260f
NS		 1781static int stk809x_frontend1_attach(struct dvb_usb_adapter *adap)
1782{
1783 struct dib0700_adapter_state *state = adap->priv;
1784
1785 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1786 return -ENODEV;
1787
1788 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x82, 0);
1789
1790 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
1791
1792 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
1793}
1794
be9bae10
OG		 1795static int nim8096md_tuner_attach(struct dvb_usb_adapter *adap)
1796{
1797 struct dib0700_adapter_state *st = adap->priv;
1798 struct i2c_adapter *tun_i2c;
d44913c1 1799 struct dvb_frontend *fe_slave = st->dib8000_ops.get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10
OG		 1800
1801 if (fe_slave) {
d44913c1 1802 tun_i2c = st->dib8000_ops.get_i2c_master(fe_slave, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10
OG		 1803 if (dvb_attach(dib0090_register, fe_slave, tun_i2c, &dib809x_dib0090_config) == NULL)
1804 return -ENODEV;
77eed219 1805 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
be9bae10
OG		 1806 fe_slave->ops.tuner_ops.set_params = dib8096_set_param_override;
1807 }
d44913c1 1808 tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 1809 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
be9bae10
OG		 1810 return -ENODEV;
1811
77eed219
MK		 1812 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1813 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1814
1815 return 0;
1816}
1817
1818static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
1819{
1820 struct dvb_frontend *fe_slave;
d44913c1
MCC		 1821 struct dib0700_adapter_state *state = adap->priv;
1822
1823 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1824 return -ENODEV;
be9bae10
OG		 1825
1826 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
b4d6046e 1827 msleep(20);
be9bae10
OG		 1828 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1829 msleep(1000);
1830 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1831 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1832 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1833
1834 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1835
1836 dib0700_ctrl_clock(adap->dev, 72, 1);
1837
b4d6046e 1838 msleep(20);
be9bae10 1839 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 1840 msleep(20);
be9bae10
OG		 1841 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1842
d44913c1 1843 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80, 0);
be9bae10 1844
d44913c1 1845 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
77eed219 1846 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 1847 return -ENODEV;
1848
d44913c1
MCC		 1849 /* Needed to increment refcount */
1850 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1851 return -ENODEV;
1852
1853 fe_slave = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
1854 state->dib8000_ops.set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10
OG		 1855
1856 return fe_slave == NULL ? -ENODEV : 0;
1857}
1858
88f3a358
OG		 1859/* TFE8096P */
1860static struct dibx000_agc_config dib8096p_agc_config[2] = {
1861 {
1862 .band_caps = BAND_UHF,
1863 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1864 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1865 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1866 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1867 P_agc_write=0 */
1868 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1869 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1870 | (0 << 4) | (5 << 1) | (0 << 0),
1871
1872 .inv_gain = 684,
1873 .time_stabiliz = 10,
1874
1875 .alpha_level = 0,
1876 .thlock = 118,
1877
1878 .wbd_inv = 0,
1879 .wbd_ref = 1200,
1880 .wbd_sel = 3,
1881 .wbd_alpha = 5,
1882
1883 .agc1_max = 65535,
1884 .agc1_min = 0,
1885
1886 .agc2_max = 32767,
1887 .agc2_min = 0,
1888
1889 .agc1_pt1 = 0,
1890 .agc1_pt2 = 0,
1891 .agc1_pt3 = 105,
1892 .agc1_slope1 = 0,
1893 .agc1_slope2 = 156,
1894 .agc2_pt1 = 105,
1895 .agc2_pt2 = 255,
1896 .agc2_slope1 = 54,
1897 .agc2_slope2 = 0,
1898
1899 .alpha_mant = 28,
1900 .alpha_exp = 26,
1901 .beta_mant = 31,
1902 .beta_exp = 51,
1903
1904 .perform_agc_softsplit = 0,
1905 } , {
1906 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
1907 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1908 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1909 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1910 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1911 P_agc_write=0 */
1912 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1913 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1914 | (0 << 4) | (5 << 1) | (0 << 0),
1915
1916 .inv_gain = 732,
1917 .time_stabiliz = 10,
1918
1919 .alpha_level = 0,
1920 .thlock = 118,
1921
1922 .wbd_inv = 0,
1923 .wbd_ref = 1200,
1924 .wbd_sel = 3,
1925 .wbd_alpha = 5,
1926
1927 .agc1_max = 65535,
1928 .agc1_min = 0,
1929
1930 .agc2_max = 32767,
1931 .agc2_min = 0,
1932
1933 .agc1_pt1 = 0,
1934 .agc1_pt2 = 0,
1935 .agc1_pt3 = 98,
1936 .agc1_slope1 = 0,
1937 .agc1_slope2 = 167,
1938 .agc2_pt1 = 98,
1939 .agc2_pt2 = 255,
1940 .agc2_slope1 = 52,
1941 .agc2_slope2 = 0,
1942
1943 .alpha_mant = 28,
1944 .alpha_exp = 26,
1945 .beta_mant = 31,
1946 .beta_exp = 51,
1947
1948 .perform_agc_softsplit = 0,
1949 }
1950};
1951
1952static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
09628b2c
MCC		 1953 .internal = 108000,
1954 .sampling = 13500,
1955 .pll_prediv = 1,
1956 .pll_ratio = 9,
1957 .pll_range = 1,
1958 .pll_reset = 0,
1959 .pll_bypass = 0,
1960 .enable_refdiv = 0,
1961 .bypclk_div = 0,
1962 .IO_CLK_en_core = 0,
1963 .ADClkSrc = 0,
1964 .modulo = 2,
1965 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1966 .ifreq = (0 << 25) | 0,
1967 .timf = 20199729,
1968 .xtal_hz = 12000000,
88f3a358
OG		 1969};
1970
1971static struct dib8000_config tfe8096p_dib8000_config = {
1972 .output_mpeg2_in_188_bytes = 1,
1973 .hostbus_diversity = 1,
1974 .update_lna = NULL,
1975
1976 .agc_config_count = 2,
1977 .agc = dib8096p_agc_config,
1978 .pll = &dib8096p_clock_config_12_mhz,
1979
1980 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1981 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1982 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1983
1984 .agc_control = NULL,
1985 .diversity_delay = 48,
1986 .output_mode = OUTMODE_MPEG2_FIFO,
1987 .enMpegOutput = 1,
1988};
1989
1990static struct dib0090_wbd_slope dib8096p_wbd_table[] = {
1991 { 380, 81, 850, 64, 540, 4},
1992 { 860, 51, 866, 21, 375, 4},
1993 {1700, 0, 250, 0, 100, 6},
1994 {2600, 0, 250, 0, 100, 6},
1995 { 0xFFFF, 0, 0, 0, 0, 0},
1996};
1997
d44913c1 1998static struct dib0090_config tfe8096p_dib0090_config = {
88f3a358
OG		 1999 .io.clock_khz = 12000,
2000 .io.pll_bypass = 0,
2001 .io.pll_range = 0,
2002 .io.pll_prediv = 3,
2003 .io.pll_loopdiv = 6,
2004 .io.adc_clock_ratio = 0,
2005 .io.pll_int_loop_filt = 0,
88f3a358
OG		 2006
2007 .freq_offset_khz_uhf = -143,
2008 .freq_offset_khz_vhf = -143,
2009
2010 .get_adc_power = dib8090_get_adc_power,
2011
2012 .clkouttobamse = 1,
2013 .analog_output = 0,
2014
2015 .wbd_vhf_offset = 0,
2016 .wbd_cband_offset = 0,
2017 .use_pwm_agc = 1,
2018 .clkoutdrive = 0,
2019
2020 .fref_clock_ratio = 1,
2021
88f3a358
OG		 2022 .ls_cfg_pad_drv = 0,
2023 .data_tx_drv = 0,
2024 .low_if = NULL,
2025 .in_soc = 1,
2026 .force_cband_input = 0,
2027};
2028
2029struct dibx090p_adc {
2030 u32 freq; /* RF freq MHz */
2031 u32 timf; /* New Timf */
2032 u32 pll_loopdiv; /* New prediv */
2033 u32 pll_prediv; /* New loopdiv */
2034};
2035
5e9c85d9
OG		 2036struct dibx090p_best_adc {
2037 u32 timf;
2038 u32 pll_loopdiv;
2039 u32 pll_prediv;
88f3a358
OG		 2040};
2041
5e9c85d9
OG		 2042static int dib8096p_get_best_sampling(struct dvb_frontend *fe, struct dibx090p_best_adc *adc)
2043{
2044 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2045 u16 xtal = 12000;
2046 u16 fcp_min = 1900; /* PLL, Minimum Frequency of phase comparator (KHz) */
2047 u16 fcp_max = 20000; /* PLL, Maximum Frequency of phase comparator (KHz) */
2048 u32 fmem_max = 140000; /* 140MHz max SDRAM freq */
2049 u32 fdem_min = 66000;
2050 u32 fcp = 0, fs = 0, fdem = 0, fmem = 0;
2051 u32 harmonic_id = 0;
2052
2053 adc->timf = 0;
2054 adc->pll_loopdiv = loopdiv;
2055 adc->pll_prediv = prediv;
2056
2057 deb_info("bandwidth = %d", fe->dtv_property_cache.bandwidth_hz);
2058
2059 /* Find Min and Max prediv */
2060 while ((xtal / max_prediv) >= fcp_min)
2061 max_prediv++;
2062
2063 max_prediv--;
2064 min_prediv = max_prediv;
2065 while ((xtal / min_prediv) <= fcp_max) {
2066 min_prediv--;
2067 if (min_prediv == 1)
2068 break;
2069 }
2070 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2071
2072 min_prediv = 1;
2073
2074 for (prediv = min_prediv; prediv < max_prediv; prediv++) {
2075 fcp = xtal / prediv;
2076 if (fcp > fcp_min && fcp < fcp_max) {
2077 for (loopdiv = 1; loopdiv < 64; loopdiv++) {
2078 fmem = ((xtal/prediv) * loopdiv);
2079 fdem = fmem / 2;
2080 fs = fdem / 4;
2081
2082 /* test min/max system restrictions */
2083 if ((fdem >= fdem_min) && (fmem <= fmem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz / 1000)) {
2084 spur = 0;
2085 /* test fs harmonics positions */
2086 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000 * fs)); harmonic_id <= ((fe->dtv_property_cache.frequency / (1000 * fs)) + 1); harmonic_id++) {
2087 if (((fs * harmonic_id) >= (fe->dtv_property_cache.frequency / 1000 - (fe->dtv_property_cache.bandwidth_hz / 2000))) && ((fs * harmonic_id) <= (fe->dtv_property_cache.frequency / 1000 + (fe->dtv_property_cache.bandwidth_hz / 2000)))) {
2088 spur = 1;
2089 break;
2090 }
2091 }
2092
2093 if (!spur) {
2094 adc->pll_loopdiv = loopdiv;
2095 adc->pll_prediv = prediv;
2096 adc->timf = (4260880253U / fdem) * (1 << 8);
2097 adc->timf += ((4260880253U % fdem) << 8) / fdem;
2098
2099 deb_info("RF %6d; BW %6d; Xtal %6d; Fmem %6d; Fdem %6d; Fs %6d; Prediv %2d; Loopdiv %2d; Timf %8d;", fe->dtv_property_cache.frequency, fe->dtv_property_cache.bandwidth_hz, xtal, fmem, fdem, fs, prediv, loopdiv, adc->timf);
2100 break;
2101 }
2102 }
2103 }
2104 }
2105 if (!spur)
2106 break;
2107 }
2108
2109 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
2110 return -EINVAL;
2111 return 0;
2112}
2113
14d24d14 2114static int dib8096p_agc_startup(struct dvb_frontend *fe)
88f3a358
OG		 2115{
2116 struct dvb_usb_adapter *adap = fe->dvb->priv;
2117 struct dib0700_adapter_state *state = adap->priv;
2118 struct dibx000_bandwidth_config pll;
5e9c85d9 2119 struct dibx090p_best_adc adc;
88f3a358 2120 u16 target;
5e9c85d9 2121 int ret;
88f3a358 2122
14d24d14 2123 ret = state->set_param_save(fe);
88f3a358
OG		 2124 if (ret < 0)
2125 return ret;
2126 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2127
2128 dib0090_pwm_gain_reset(fe);
2129 /* dib0090_get_wbd_target is returning any possible
2130 temperature compensated wbd-target */
2131 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
d44913c1 2132 state->dib8000_ops.set_wbd_ref(fe, target);
88f3a358 2133
5e9c85d9
OG		 2134 if (dib8096p_get_best_sampling(fe, &adc) == 0) {
2135 pll.pll_ratio = adc.pll_loopdiv;
2136 pll.pll_prediv = adc.pll_prediv;
88f3a358 2137
5e9c85d9 2138 dib0700_set_i2c_speed(adap->dev, 200);
d44913c1
MCC		 2139 state->dib8000_ops.update_pll(fe, &pll, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
2140 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
5e9c85d9 2141 dib0700_set_i2c_speed(adap->dev, 1000);
88f3a358
OG		 2142 }
2143 return 0;
2144}
2145
2146static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap)
2147{
5e9c85d9
OG		 2148 struct dib0700_state *st = adap->dev->priv;
2149 u32 fw_version;
d44913c1
MCC		 2150 struct dib0700_adapter_state *state = adap->priv;
2151
2152 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
2153 return -ENODEV;
5e9c85d9
OG		 2154
2155 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2156 if (fw_version >= 0x10200)
2157 st->fw_use_new_i2c_api = 1;
2158
88f3a358
OG		 2159 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
2160 msleep(20);
2161 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2162 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2163 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2164
2165 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2166
2167 dib0700_ctrl_clock(adap->dev, 72, 1);
2168
2169 msleep(20);
2170 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
2171 msleep(20);
2172 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2173
d44913c1 2174 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1);
88f3a358 2175
d44913c1
MCC		 2176 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap,
2177 0x80, &tfe8096p_dib8000_config);
88f3a358
OG		 2178
2179 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
2180}
2181
2182static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap)
2183{
2184 struct dib0700_adapter_state *st = adap->priv;
d44913c1
MCC		 2185 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_tuner(adap->fe_adap[0].fe);
2186
2187 tfe8096p_dib0090_config.reset = st->dib8000_ops.tuner_sleep;
2188 tfe8096p_dib0090_config.sleep = st->dib8000_ops.tuner_sleep;
2189 tfe8096p_dib0090_config.wbd = dib8096p_wbd_table;
88f3a358
OG		 2190
2191 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
2192 &tfe8096p_dib0090_config) == NULL)
2193 return -ENODEV;
2194
d44913c1 2195 st->dib8000_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
88f3a358
OG		 2196
2197 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
2198 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup;
2199 return 0;
2200}
2201
be9bae10
OG		 2202/* STK9090M */
2203static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
2204{
77eed219 2205 return dib9000_fw_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
be9bae10
OG		 2206}
2207
2208static int dib90x0_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
2209{
77eed219 2210 return dib9000_fw_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
be9bae10
OG		 2211}
2212
2213static int dib90x0_tuner_reset(struct dvb_frontend *fe, int onoff)
2214{
2215 return dib9000_set_gpio(fe, 5, 0, !onoff);
2216}
2217
2218static int dib90x0_tuner_sleep(struct dvb_frontend *fe, int onoff)
2219{
2220 return dib9000_set_gpio(fe, 0, 0, onoff);
2221}
2222
2223static int dib01x0_pmu_update(struct i2c_adapter *i2c, u16 *data, u8 len)
2224{
2225 u8 wb[4] = { 0xc >> 8, 0xc & 0xff, 0, 0 };
2226 u8 rb[2];
2227 struct i2c_msg msg[2] = {
b4d6046e
OG		 2228 {.addr = 0x1e >> 1, .flags = 0, .buf = wb, .len = 2},
2229 {.addr = 0x1e >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2},
be9bae10
OG		 2230 };
2231 u8 index_data;
2232
2233 dibx000_i2c_set_speed(i2c, 250);
2234
2235 if (i2c_transfer(i2c, msg, 2) != 2)
2236 return -EIO;
2237
2238 switch (rb[0] << 8 | rb[1]) {
b4d6046e 2239 case 0:
be9bae10
OG		 2240 deb_info("Found DiB0170 rev1: This version of DiB0170 is not supported any longer.\n");
2241 return -EIO;
b4d6046e 2242 case 1:
be9bae10
OG		 2243 deb_info("Found DiB0170 rev2");
2244 break;
b4d6046e 2245 case 2:
be9bae10
OG		 2246 deb_info("Found DiB0190 rev2");
2247 break;
b4d6046e 2248 default:
be9bae10
OG		 2249 deb_info("DiB01x0 not found");
2250 return -EIO;
b4d6046e 2251 }
be9bae10
OG		 2252
2253 for (index_data = 0; index_data < len; index_data += 2) {
2254 wb[2] = (data[index_data + 1] >> 8) & 0xff;
2255 wb[3] = (data[index_data + 1]) & 0xff;
2256
2257 if (data[index_data] == 0) {
2258 wb[0] = (data[index_data] >> 8) & 0xff;
2259 wb[1] = (data[index_data]) & 0xff;
2260 msg[0].len = 2;
2261 if (i2c_transfer(i2c, msg, 2) != 2)
2262 return -EIO;
2263 wb[2] |= rb[0];
2264 wb[3] |= rb[1] & ~(3 << 4);
2265 }
2266
b4d6046e
OG		 2267 wb[0] = (data[index_data] >> 8)&0xff;
2268 wb[1] = (data[index_data])&0xff;
be9bae10
OG		 2269 msg[0].len = 4;
2270 if (i2c_transfer(i2c, &msg[0], 1) != 1)
2271 return -EIO;
2272 }
2273 return 0;
2274}
2275
2276static struct dib9000_config stk9090m_config = {
2277 .output_mpeg2_in_188_bytes = 1,
2278 .output_mode = OUTMODE_MPEG2_FIFO,
2279 .vcxo_timer = 279620,
2280 .timing_frequency = 20452225,
2281 .demod_clock_khz = 60000,
2282 .xtal_clock_khz = 30000,
2283 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2284 .subband = {
2285 2,
2286 {
2287 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0008 } }, /* GPIO 3 to 1 for VHF */
2288 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0000 } }, /* GPIO 3 to 0 for UHF */
2289 { 0 },
2290 },
2291 },
2292 .gpio_function = {
2293 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2294 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2295 },
2296};
2297
2298static struct dib9000_config nim9090md_config[2] = {
2299 {
2300 .output_mpeg2_in_188_bytes = 1,
2301 .output_mode = OUTMODE_MPEG2_FIFO,
2302 .vcxo_timer = 279620,
2303 .timing_frequency = 20452225,
2304 .demod_clock_khz = 60000,
2305 .xtal_clock_khz = 30000,
2306 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2307 }, {
2308 .output_mpeg2_in_188_bytes = 1,
2309 .output_mode = OUTMODE_DIVERSITY,
2310 .vcxo_timer = 279620,
2311 .timing_frequency = 20452225,
2312 .demod_clock_khz = 60000,
2313 .xtal_clock_khz = 30000,
2314 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2315 .subband = {
2316 2,
2317 {
2318 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0006 } }, /* GPIO 1 and 2 to 1 for VHF */
2319 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0000 } }, /* GPIO 1 and 2 to 0 for UHF */
2320 { 0 },
2321 },
2322 },
2323 .gpio_function = {
2324 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2325 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2326 },
2327 }
2328};
2329
2330static struct dib0090_config dib9090_dib0090_config = {
2331 .io.pll_bypass = 0,
2332 .io.pll_range = 1,
2333 .io.pll_prediv = 1,
2334 .io.pll_loopdiv = 8,
2335 .io.adc_clock_ratio = 8,
2336 .io.pll_int_loop_filt = 0,
2337 .io.clock_khz = 30000,
2338 .reset = dib90x0_tuner_reset,
2339 .sleep = dib90x0_tuner_sleep,
2340 .clkouttobamse = 0,
2341 .analog_output = 0,
2342 .use_pwm_agc = 0,
2343 .clkoutdrive = 0,
2344 .freq_offset_khz_uhf = 0,
2345 .freq_offset_khz_vhf = 0,
2346};
2347
2348static struct dib0090_config nim9090md_dib0090_config[2] = {
2349 {
2350 .io.pll_bypass = 0,
2351 .io.pll_range = 1,
2352 .io.pll_prediv = 1,
2353 .io.pll_loopdiv = 8,
2354 .io.adc_clock_ratio = 8,
2355 .io.pll_int_loop_filt = 0,
2356 .io.clock_khz = 30000,
2357 .reset = dib90x0_tuner_reset,
2358 .sleep = dib90x0_tuner_sleep,
2359 .clkouttobamse = 1,
2360 .analog_output = 0,
2361 .use_pwm_agc = 0,
2362 .clkoutdrive = 0,
2363 .freq_offset_khz_uhf = 0,
2364 .freq_offset_khz_vhf = 0,
b4d6046e 2365 }, {
be9bae10
OG		 2366 .io.pll_bypass = 0,
2367 .io.pll_range = 1,
2368 .io.pll_prediv = 1,
2369 .io.pll_loopdiv = 8,
2370 .io.adc_clock_ratio = 8,
2371 .io.pll_int_loop_filt = 0,
2372 .io.clock_khz = 30000,
2373 .reset = dib90x0_tuner_reset,
2374 .sleep = dib90x0_tuner_sleep,
2375 .clkouttobamse = 0,
2376 .analog_output = 0,
2377 .use_pwm_agc = 0,
2378 .clkoutdrive = 0,
2379 .freq_offset_khz_uhf = 0,
2380 .freq_offset_khz_vhf = 0,
2381 }
2382};
2383
2384
2385static int stk9090m_frontend_attach(struct dvb_usb_adapter *adap)
2386{
2387 struct dib0700_adapter_state *state = adap->priv;
2388 struct dib0700_state *st = adap->dev->priv;
2389 u32 fw_version;
2390
2391 /* Make use of the new i2c functions from FW 1.20 */
2392 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2393 if (fw_version >= 0x10200)
2394 st->fw_use_new_i2c_api = 1;
2395 dib0700_set_i2c_speed(adap->dev, 340);
2396
2397 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2398 msleep(20);
be9bae10
OG		 2399 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2400 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2401 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2402 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2403
2404 dib0700_ctrl_clock(adap->dev, 72, 1);
2405
b4d6046e 2406 msleep(20);
be9bae10 2407 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2408 msleep(20);
be9bae10
OG		 2409 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2410
2411 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80);
2412
2413 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2414 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2415 return -ENODEV;
2416 } else {
5b5e0928 2417 deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
be9bae10
OG		 2418 }
2419 stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size;
2420 stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data;
2421
77eed219 2422 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &stk9090m_config);
be9bae10 2423
77eed219 2424 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 2425}
2426
2427static int dib9090_tuner_attach(struct dvb_usb_adapter *adap)
2428{
2429 struct dib0700_adapter_state *state = adap->priv;
77eed219 2430 struct i2c_adapter *i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2431 u16 data_dib190[10] = {
2432 1, 0x1374,
2433 2, 0x01a2,
2434 7, 0x0020,
2435 0, 0x00ef,
2436 8, 0x0486,
2437 };
2438
77eed219 2439 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &dib9090_dib0090_config) == NULL)
be9bae10 2440 return -ENODEV;
77eed219 2441 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
be9bae10
OG		 2442 if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0)
2443 return -ENODEV;
d1190024 2444 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2445 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10 2446 return -ENODEV;
b4d6046e 2447 release_firmware(state->frontend_firmware);
be9bae10
OG		 2448 return 0;
2449}
2450
2451static int nim9090md_frontend_attach(struct dvb_usb_adapter *adap)
2452{
2453 struct dib0700_adapter_state *state = adap->priv;
2454 struct dib0700_state *st = adap->dev->priv;
2455 struct i2c_adapter *i2c;
2456 struct dvb_frontend *fe_slave;
2457 u32 fw_version;
2458
2459 /* Make use of the new i2c functions from FW 1.20 */
2460 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2461 if (fw_version >= 0x10200)
2462 st->fw_use_new_i2c_api = 1;
2463 dib0700_set_i2c_speed(adap->dev, 340);
2464
2465 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2466 msleep(20);
be9bae10
OG		 2467 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2468 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2469 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2470 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2471
2472 dib0700_ctrl_clock(adap->dev, 72, 1);
2473
b4d6046e 2474 msleep(20);
be9bae10 2475 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2476 msleep(20);
be9bae10
OG		 2477 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2478
2479 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2480 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2481 return -EIO;
2482 } else {
5b5e0928 2483 deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
be9bae10
OG		 2484 }
2485 nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size;
2486 nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data;
2487 nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size;
2488 nim9090md_config[1].microcode_B_fe_buffer = state->frontend_firmware->data;
2489
2490 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, 0x80);
77eed219 2491 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &nim9090md_config[0]);
be9bae10 2492
77eed219 2493 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 2494 return -ENODEV;
2495
77eed219 2496 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_3_4, 0);
be9bae10
OG		 2497 dib9000_i2c_enumeration(i2c, 1, 0x12, 0x82);
2498
2499 fe_slave = dvb_attach(dib9000_attach, i2c, 0x82, &nim9090md_config[1]);
77eed219 2500 dib9000_set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10
OG		 2501
2502 return fe_slave == NULL ? -ENODEV : 0;
03245a5e
OG		 2503}
2504
be9bae10
OG		 2505static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap)
2506{
2507 struct dib0700_adapter_state *state = adap->priv;
2508 struct i2c_adapter *i2c;
2509 struct dvb_frontend *fe_slave;
2510 u16 data_dib190[10] = {
2511 1, 0x5374,
2512 2, 0x01ae,
2513 7, 0x0020,
2514 0, 0x00ef,
2515 8, 0x0406,
2516 };
77eed219
MK		 2517 i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
2518 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &nim9090md_dib0090_config[0]) == NULL)
be9bae10 2519 return -ENODEV;
77eed219 2520 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
be9bae10
OG		 2521 if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0)
2522 return -ENODEV;
d1190024
OG		 2523
2524 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2525 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10
OG		 2526 return -ENODEV;
2527
77eed219 2528 fe_slave = dib9000_get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10 2529 if (fe_slave != NULL) {
77eed219 2530 i2c = dib9000_get_component_bus_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2531 dib9000_set_i2c_adapter(fe_slave, i2c);
2532
2533 i2c = dib9000_get_tuner_interface(fe_slave);
2534 if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL)
2535 return -ENODEV;
77eed219 2536 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
d1190024 2537 dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 1500);
be9bae10
OG		 2538 if (dib9000_firmware_post_pll_init(fe_slave) < 0)
2539 return -ENODEV;
2540 }
b4d6046e 2541 release_firmware(state->frontend_firmware);
be9bae10
OG		 2542
2543 return 0;
2544}
2545
2546/* NIM7090 */
5e9c85d9 2547static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dibx090p_best_adc *adc)
be9bae10
OG		 2548{
2549 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2550
2551 u16 xtal = 12000;
2552 u32 fcp_min = 1900; /* PLL Minimum Frequency comparator KHz */
2553 u32 fcp_max = 20000; /* PLL Maximum Frequency comparator KHz */
2554 u32 fdem_max = 76000;
2555 u32 fdem_min = 69500;
2556 u32 fcp = 0, fs = 0, fdem = 0;
2557 u32 harmonic_id = 0;
2558
2559 adc->pll_loopdiv = loopdiv;
2560 adc->pll_prediv = prediv;
2561 adc->timf = 0;
2562
2563 deb_info("bandwidth = %d fdem_min =%d", fe->dtv_property_cache.bandwidth_hz, fdem_min);
2564
2565 /* Find Min and Max prediv */
b4d6046e 2566 while ((xtal/max_prediv) >= fcp_min)
be9bae10
OG		 2567 max_prediv++;
2568
2569 max_prediv--;
2570 min_prediv = max_prediv;
b4d6046e 2571 while ((xtal/min_prediv) <= fcp_max) {
be9bae10 2572 min_prediv--;
b4d6046e 2573 if (min_prediv == 1)
be9bae10
OG		 2574 break;
2575 }
2576 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2577
2578 min_prediv = 2;
2579
b4d6046e 2580 for (prediv = min_prediv ; prediv < max_prediv; prediv++) {
be9bae10 2581 fcp = xtal / prediv;
b4d6046e
OG		 2582 if (fcp > fcp_min && fcp < fcp_max) {
2583 for (loopdiv = 1 ; loopdiv < 64 ; loopdiv++) {
be9bae10
OG		 2584 fdem = ((xtal/prediv) * loopdiv);
2585 fs = fdem / 4;
2586 /* test min/max system restrictions */
2587
b4d6046e 2588 if ((fdem >= fdem_min) && (fdem <= fdem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz/1000)) {
be9bae10
OG		 2589 spur = 0;
2590 /* test fs harmonics positions */
b4d6046e
OG		 2591 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000*fs)) ; harmonic_id <= ((fe->dtv_property_cache.frequency / (1000*fs))+1) ; harmonic_id++) {
2592 if (((fs*harmonic_id) >= ((fe->dtv_property_cache.frequency/1000) - (fe->dtv_property_cache.bandwidth_hz/2000))) && ((fs*harmonic_id) <= ((fe->dtv_property_cache.frequency/1000) + (fe->dtv_property_cache.bandwidth_hz/2000)))) {
be9bae10
OG		 2593 spur = 1;
2594 break;
2595 }
2596 }
2597
b4d6046e 2598 if (!spur) {
be9bae10
OG		 2599 adc->pll_loopdiv = loopdiv;
2600 adc->pll_prediv = prediv;
b4d6046e
OG		 2601 adc->timf = 2396745143UL/fdem*(1 << 9);
2602 adc->timf += ((2396745143UL%fdem) << 9)/fdem;
be9bae10
OG		 2603 deb_info("loopdiv=%i prediv=%i timf=%i", loopdiv, prediv, adc->timf);
2604 break;
2605 }
2606 }
2607 }
2608 }
2609 if (!spur)
2610 break;
2611 }
2612
2613
b4d6046e 2614 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
be9bae10 2615 return -EINVAL;
b4d6046e 2616 else
be9bae10
OG		 2617 return 0;
2618}
2619
14d24d14 2620static int dib7090_agc_startup(struct dvb_frontend *fe)
be9bae10
OG		 2621{
2622 struct dvb_usb_adapter *adap = fe->dvb->priv;
2623 struct dib0700_adapter_state *state = adap->priv;
2624 struct dibx000_bandwidth_config pll;
2625 u16 target;
5e9c85d9 2626 struct dibx090p_best_adc adc;
be9bae10
OG		 2627 int ret;
2628
14d24d14 2629 ret = state->set_param_save(fe);
be9bae10
OG		 2630 if (ret < 0)
2631 return ret;
2632
2633 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2634 dib0090_pwm_gain_reset(fe);
6724a2f4 2635 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
8abe4a0a 2636 state->dib7000p_ops.set_wbd_ref(fe, target);
be9bae10 2637
b4d6046e 2638 if (dib7090p_get_best_sampling(fe, &adc) == 0) {
be9bae10
OG		 2639 pll.pll_ratio = adc.pll_loopdiv;
2640 pll.pll_prediv = adc.pll_prediv;
2641
8abe4a0a
MCC		 2642 state->dib7000p_ops.update_pll(fe, &pll);
2643 state->dib7000p_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
be9bae10
OG		 2644 }
2645 return 0;
2646}
2647
2e802861
OG		 2648static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
2649{
2650 deb_info("AGC restart callback: %d", restart);
2651 if (restart == 0) /* before AGC startup */
2652 dib0090_set_dc_servo(fe, 1);
2653 return 0;
2654}
2655
f45f513a 2656static int tfe7790p_update_lna(struct dvb_frontend *fe, u16 agc_global)
6724a2f4 2657{
8abe4a0a
MCC		 2658 struct dvb_usb_adapter *adap = fe->dvb->priv;
2659 struct dib0700_adapter_state *state = adap->priv;
2660
f45f513a 2661 deb_info("update LNA: agc global=%i", agc_global);
6724a2f4 2662
f45f513a 2663 if (agc_global < 25000) {
8abe4a0a
MCC		 2664 state->dib7000p_ops.set_gpio(fe, 8, 0, 0);
2665 state->dib7000p_ops.set_agc1_min(fe, 0);
6724a2f4 2666 } else {
8abe4a0a
MCC		 2667 state->dib7000p_ops.set_gpio(fe, 8, 0, 1);
2668 state->dib7000p_ops.set_agc1_min(fe, 32768);
6724a2f4
OG		 2669 }
2670
2671 return 0;
2672}
2673
be9bae10 2674static struct dib0090_wbd_slope dib7090_wbd_table[] = {
b4d6046e
OG		 2675 { 380, 81, 850, 64, 540, 4},
2676 { 860, 51, 866, 21, 375, 4},
2677 {1700, 0, 250, 0, 100, 6},
2678 {2600, 0, 250, 0, 100, 6},
2679 { 0xFFFF, 0, 0, 0, 0, 0},
03245a5e
OG		 2680};
2681
a685dbbc 2682static struct dibx000_agc_config dib7090_agc_config[2] = {
be9bae10
OG		 2683 {
2684 .band_caps = BAND_UHF,
2685 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2686 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2687 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2688
b4d6046e
OG		 2689 .inv_gain = 687,
2690 .time_stabiliz = 10,
be9bae10 2691
b4d6046e
OG		 2692 .alpha_level = 0,
2693 .thlock = 118,
be9bae10 2694
b4d6046e
OG		 2695 .wbd_inv = 0,
2696 .wbd_ref = 1200,
2697 .wbd_sel = 3,
2698 .wbd_alpha = 5,
be9bae10 2699
b4d6046e 2700 .agc1_max = 65535,
59501bb7 2701 .agc1_min = 32768,
be9bae10 2702
b4d6046e
OG		 2703 .agc2_max = 65535,
2704 .agc2_min = 0,
be9bae10 2705
b4d6046e
OG		 2706 .agc1_pt1 = 0,
2707 .agc1_pt2 = 32,
2708 .agc1_pt3 = 114,
2709 .agc1_slope1 = 143,
2710 .agc1_slope2 = 144,
2711 .agc2_pt1 = 114,
2712 .agc2_pt2 = 227,
2713 .agc2_slope1 = 116,
2714 .agc2_slope2 = 117,
be9bae10 2715
b4d6046e
OG		 2716 .alpha_mant = 18,
2717 .alpha_exp = 0,
2718 .beta_mant = 20,
2719 .beta_exp = 59,
be9bae10 2720
b4d6046e 2721 .perform_agc_softsplit = 0,
be9bae10
OG		 2722 } , {
2723 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
2724 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2725 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2726 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2727
b4d6046e
OG		 2728 .inv_gain = 732,
2729 .time_stabiliz = 10,
be9bae10 2730
b4d6046e
OG		 2731 .alpha_level = 0,
2732 .thlock = 118,
be9bae10 2733
b4d6046e
OG		 2734 .wbd_inv = 0,
2735 .wbd_ref = 1200,
2736 .wbd_sel = 3,
2737 .wbd_alpha = 5,
be9bae10 2738
b4d6046e
OG		 2739 .agc1_max = 65535,
2740 .agc1_min = 0,
be9bae10 2741
b4d6046e
OG		 2742 .agc2_max = 65535,
2743 .agc2_min = 0,
be9bae10 2744
b4d6046e
OG		 2745 .agc1_pt1 = 0,
2746 .agc1_pt2 = 0,
2747 .agc1_pt3 = 98,
2748 .agc1_slope1 = 0,
2749 .agc1_slope2 = 167,
7f4d527f 2750 .agc2_pt1 = 98,
b4d6046e
OG		 2751 .agc2_pt2 = 255,
2752 .agc2_slope1 = 104,
2753 .agc2_slope2 = 0,
be9bae10 2754
b4d6046e
OG		 2755 .alpha_mant = 18,
2756 .alpha_exp = 0,
2757 .beta_mant = 20,
2758 .beta_exp = 59,
be9bae10 2759
b4d6046e 2760 .perform_agc_softsplit = 0,
be9bae10
OG		 2761 }
2762};
2763
2764static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = {
09628b2c
MCC		 2765 .internal = 60000,
2766 .sampling = 15000,
2767 .pll_prediv = 1,
2768 .pll_ratio = 5,
2769 .pll_range = 0,
2770 .pll_reset = 0,
2771 .pll_bypass = 0,
2772 .enable_refdiv = 0,
2773 .bypclk_div = 0,
2774 .IO_CLK_en_core = 1,
2775 .ADClkSrc = 1,
2776 .modulo = 2,
2777 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
2778 .ifreq = (0 << 25) | 0,
2779 .timf = 20452225,
2780 .xtal_hz = 15000000,
be9bae10
OG		 2781};
2782
2783static struct dib7000p_config nim7090_dib7000p_config = {
2784 .output_mpeg2_in_188_bytes = 1,
2785 .hostbus_diversity = 1,
2786 .tuner_is_baseband = 1,
59501bb7 2787 .update_lna = tfe7790p_update_lna, /* GPIO used is the same as TFE7790 */
be9bae10
OG		 2788
2789 .agc_config_count = 2,
2790 .agc = dib7090_agc_config,
2791
2792 .bw = &dib7090_clock_config_12_mhz,
2793
2794 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2795 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2796 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2797
2798 .pwm_freq_div = 0,
2799
2800 .agc_control = dib7090_agc_restart,
2801
2802 .spur_protect = 0,
2803 .disable_sample_and_hold = 0,
2804 .enable_current_mirror = 0,
2805 .diversity_delay = 0,
2806
2807 .output_mode = OUTMODE_MPEG2_FIFO,
2808 .enMpegOutput = 1,
2809};
2810
59501bb7
OG		 2811static int tfe7090p_pvr_update_lna(struct dvb_frontend *fe, u16 agc_global)
2812{
8abe4a0a
MCC		 2813 struct dvb_usb_adapter *adap = fe->dvb->priv;
2814 struct dib0700_adapter_state *state = adap->priv;
2815
59501bb7
OG		 2816 deb_info("TFE7090P-PVR update LNA: agc global=%i", agc_global);
2817 if (agc_global < 25000) {
8abe4a0a
MCC		 2818 state->dib7000p_ops.set_gpio(fe, 5, 0, 0);
2819 state->dib7000p_ops.set_agc1_min(fe, 0);
59501bb7 2820 } else {
8abe4a0a
MCC		 2821 state->dib7000p_ops.set_gpio(fe, 5, 0, 1);
2822 state->dib7000p_ops.set_agc1_min(fe, 32768);
59501bb7
OG		 2823 }
2824
2825 return 0;
2826}
2827
be9bae10
OG		 2828static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = {
2829 {
2830 .output_mpeg2_in_188_bytes = 1,
2831 .hostbus_diversity = 1,
2832 .tuner_is_baseband = 1,
59501bb7 2833 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2834
2835 .agc_config_count = 2,
2836 .agc = dib7090_agc_config,
2837
2838 .bw = &dib7090_clock_config_12_mhz,
2839
2840 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2841 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2842 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2843
2844 .pwm_freq_div = 0,
2845
2846 .agc_control = dib7090_agc_restart,
2847
2848 .spur_protect = 0,
2849 .disable_sample_and_hold = 0,
2850 .enable_current_mirror = 0,
2851 .diversity_delay = 0,
2852
2853 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2854 .default_i2c_addr = 0x90,
2855 .enMpegOutput = 1,
b4d6046e 2856 }, {
be9bae10
OG		 2857 .output_mpeg2_in_188_bytes = 1,
2858 .hostbus_diversity = 1,
2859 .tuner_is_baseband = 1,
59501bb7 2860 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2861
2862 .agc_config_count = 2,
2863 .agc = dib7090_agc_config,
2864
2865 .bw = &dib7090_clock_config_12_mhz,
2866
2867 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2868 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2869 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2870
2871 .pwm_freq_div = 0,
2872
2873 .agc_control = dib7090_agc_restart,
2874
2875 .spur_protect = 0,
2876 .disable_sample_and_hold = 0,
2877 .enable_current_mirror = 0,
2878 .diversity_delay = 0,
2879
2880 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2881 .default_i2c_addr = 0x92,
2882 .enMpegOutput = 0,
2883 }
2884};
2885
8abe4a0a 2886static struct dib0090_config nim7090_dib0090_config = {
be9bae10
OG		 2887 .io.clock_khz = 12000,
2888 .io.pll_bypass = 0,
2889 .io.pll_range = 0,
2890 .io.pll_prediv = 3,
2891 .io.pll_loopdiv = 6,
2892 .io.adc_clock_ratio = 0,
2893 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2894
2895 .freq_offset_khz_uhf = 0,
2896 .freq_offset_khz_vhf = 0,
2897
be9bae10
OG		 2898 .clkouttobamse = 1,
2899 .analog_output = 0,
2900
2901 .wbd_vhf_offset = 0,
2902 .wbd_cband_offset = 0,
2903 .use_pwm_agc = 1,
2904 .clkoutdrive = 0,
2905
2906 .fref_clock_ratio = 0,
2907
2908 .wbd = dib7090_wbd_table,
2909
2910 .ls_cfg_pad_drv = 0,
2911 .data_tx_drv = 0,
2912 .low_if = NULL,
2913 .in_soc = 1,
2914};
2915
f45f513a 2916static struct dib7000p_config tfe7790p_dib7000p_config = {
b293f304
OG		 2917 .output_mpeg2_in_188_bytes = 1,
2918 .hostbus_diversity = 1,
2919 .tuner_is_baseband = 1,
f45f513a 2920 .update_lna = tfe7790p_update_lna,
b293f304
OG		 2921
2922 .agc_config_count = 2,
2923 .agc = dib7090_agc_config,
2924
2925 .bw = &dib7090_clock_config_12_mhz,
2926
2927 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2928 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2929 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2930
2931 .pwm_freq_div = 0,
2932
2933 .agc_control = dib7090_agc_restart,
2934
2935 .spur_protect = 0,
2936 .disable_sample_and_hold = 0,
2937 .enable_current_mirror = 0,
2938 .diversity_delay = 0,
2939
2940 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2941 .enMpegOutput = 1,
2942};
2943
8abe4a0a 2944static struct dib0090_config tfe7790p_dib0090_config = {
b293f304
OG		 2945 .io.clock_khz = 12000,
2946 .io.pll_bypass = 0,
2947 .io.pll_range = 0,
2948 .io.pll_prediv = 3,
2949 .io.pll_loopdiv = 6,
2950 .io.adc_clock_ratio = 0,
2951 .io.pll_int_loop_filt = 0,
b293f304
OG		 2952
2953 .freq_offset_khz_uhf = 0,
2954 .freq_offset_khz_vhf = 0,
2955
b293f304
OG		 2956 .clkouttobamse = 1,
2957 .analog_output = 0,
2958
2959 .wbd_vhf_offset = 0,
2960 .wbd_cband_offset = 0,
2961 .use_pwm_agc = 1,
2962 .clkoutdrive = 0,
2963
2964 .fref_clock_ratio = 0,
2965
f45f513a 2966 .wbd = dib7090_wbd_table,
b293f304
OG		 2967
2968 .ls_cfg_pad_drv = 0,
2969 .data_tx_drv = 0,
2970 .low_if = NULL,
2971 .in_soc = 1,
f45f513a
OG		 2972 .force_cband_input = 0,
2973 .is_dib7090e = 0,
b293f304
OG		 2974 .force_crystal_mode = 1,
2975};
2976
8abe4a0a 2977static struct dib0090_config tfe7090pvr_dib0090_config[2] = {
be9bae10
OG		 2978 {
2979 .io.clock_khz = 12000,
2980 .io.pll_bypass = 0,
2981 .io.pll_range = 0,
2982 .io.pll_prediv = 3,
2983 .io.pll_loopdiv = 6,
2984 .io.adc_clock_ratio = 0,
2985 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2986
2987 .freq_offset_khz_uhf = 50,
2988 .freq_offset_khz_vhf = 70,
2989
be9bae10
OG		 2990 .clkouttobamse = 1,
2991 .analog_output = 0,
2992
2993 .wbd_vhf_offset = 0,
2994 .wbd_cband_offset = 0,
2995 .use_pwm_agc = 1,
2996 .clkoutdrive = 0,
2997
2998 .fref_clock_ratio = 0,
2999
3000 .wbd = dib7090_wbd_table,
3001
3002 .ls_cfg_pad_drv = 0,
3003 .data_tx_drv = 0,
3004 .low_if = NULL,
3005 .in_soc = 1,
b4d6046e 3006 }, {
be9bae10
OG		 3007 .io.clock_khz = 12000,
3008 .io.pll_bypass = 0,
3009 .io.pll_range = 0,
3010 .io.pll_prediv = 3,
3011 .io.pll_loopdiv = 6,
3012 .io.adc_clock_ratio = 0,
3013 .io.pll_int_loop_filt = 0,
be9bae10
OG		 3014
3015 .freq_offset_khz_uhf = -50,
3016 .freq_offset_khz_vhf = -70,
3017
be9bae10
OG		 3018 .clkouttobamse = 1,
3019 .analog_output = 0,
3020
3021 .wbd_vhf_offset = 0,
3022 .wbd_cband_offset = 0,
3023 .use_pwm_agc = 1,
3024 .clkoutdrive = 0,
3025
3026 .fref_clock_ratio = 0,
3027
3028 .wbd = dib7090_wbd_table,
3029
3030 .ls_cfg_pad_drv = 0,
3031 .data_tx_drv = 0,
3032 .low_if = NULL,
3033 .in_soc = 1,
3034 }
3035};
3036
3037static int nim7090_frontend_attach(struct dvb_usb_adapter *adap)
3038{
8abe4a0a
MCC		 3039 struct dib0700_adapter_state *state = adap->priv;
3040
3041 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3042 return -ENODEV;
3043
be9bae10 3044 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 3045 msleep(20);
be9bae10
OG		 3046 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3047 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3048 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3049 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3050
b4d6046e 3051 msleep(20);
be9bae10 3052 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3053 msleep(20);
be9bae10 3054 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
03245a5e 3055
8abe4a0a
MCC		 3056 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, &nim7090_dib7000p_config) != 0) {
3057 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
3058 dvb_detach(&state->dib7000p_ops);
be9bae10
OG		 3059 return -ENODEV;
3060 }
8abe4a0a 3061 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &nim7090_dib7000p_config);
03245a5e 3062
77eed219 3063 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
03245a5e
OG		 3064}
3065
be9bae10 3066static int nim7090_tuner_attach(struct dvb_usb_adapter *adap)
03245a5e 3067{
be9bae10 3068 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3069 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3070
3071 nim7090_dib0090_config.reset = st->dib7000p_ops.tuner_sleep,
3072 nim7090_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep,
3073 nim7090_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3074
77eed219 3075 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &nim7090_dib0090_config) == NULL)
be9bae10 3076 return -ENODEV;
03245a5e 3077
8abe4a0a 3078 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
03245a5e 3079
77eed219
MK		 3080 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3081 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3082 return 0;
03245a5e
OG		 3083}
3084
be9bae10 3085static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap)
03245a5e 3086{
be9bae10 3087 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3088 struct dib0700_adapter_state *state = adap->priv;
3089
3090 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3091 return -ENODEV;
be9bae10
OG		 3092
3093 /* The TFE7090 requires the dib0700 to not be in master mode */
3094 st->disable_streaming_master_mode = 1;
3095
03245a5e 3096 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 3097 msleep(20);
03245a5e
OG		 3098 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3099 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3100 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
03245a5e
OG		 3101 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3102
b4d6046e 3103 msleep(20);
03245a5e 3104 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3105 msleep(20);
03245a5e
OG		 3106 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3107
be9bae10 3108 /* initialize IC 0 */
8abe4a0a
MCC		 3109 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, &tfe7090pvr_dib7000p_config[0]) != 0) {
3110 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
3111 dvb_detach(&state->dib7000p_ops);
be9bae10
OG		 3112 return -ENODEV;
3113 }
03245a5e 3114
be9bae10 3115 dib0700_set_i2c_speed(adap->dev, 340);
8abe4a0a 3116 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]);
77eed219 3117 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 3118 return -ENODEV;
3119
8abe4a0a 3120 state->dib7000p_ops.slave_reset(adap->fe_adap[0].fe);
71682520 3121
be9bae10
OG		 3122 return 0;
3123}
3124
3125static int tfe7090pvr_frontend1_attach(struct dvb_usb_adapter *adap)
3126{
3127 struct i2c_adapter *i2c;
8abe4a0a 3128 struct dib0700_adapter_state *state = adap->priv;
be9bae10 3129
77eed219 3130 if (adap->dev->adapter[0].fe_adap[0].fe == NULL) {
be9bae10
OG		 3131 err("the master dib7090 has to be initialized first");
3132 return -ENODEV; /* the master device has not been initialized */
3133 }
3134
8abe4a0a
MCC		 3135 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3136 return -ENODEV;
3137
3138 i2c = state->dib7000p_ops.get_i2c_master(adap->dev->adapter[0].fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_6_7, 1);
3139 if (state->dib7000p_ops.i2c_enumeration(i2c, 1, 0x10, &tfe7090pvr_dib7000p_config[1]) != 0) {
3140 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
3141 dvb_detach(&state->dib7000p_ops);
be9bae10
OG		 3142 return -ENODEV;
3143 }
3144
8abe4a0a 3145 adap->fe_adap[0].fe = state->dib7000p_ops.init(i2c, 0x92, &tfe7090pvr_dib7000p_config[1]);
be9bae10
OG		 3146 dib0700_set_i2c_speed(adap->dev, 200);
3147
77eed219 3148 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 3149}
3150
3151static int tfe7090pvr_tuner0_attach(struct dvb_usb_adapter *adap)
3152{
3153 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3154 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3155
3156 tfe7090pvr_dib0090_config[0].reset = st->dib7000p_ops.tuner_sleep;
3157 tfe7090pvr_dib0090_config[0].sleep = st->dib7000p_ops.tuner_sleep;
3158 tfe7090pvr_dib0090_config[0].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3159
77eed219 3160 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[0]) == NULL)
be9bae10
OG		 3161 return -ENODEV;
3162
8abe4a0a 3163 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3164
77eed219
MK		 3165 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3166 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10
OG		 3167 return 0;
3168}
3169
3170static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap)
3171{
3172 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3173 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3174
3175 tfe7090pvr_dib0090_config[1].reset = st->dib7000p_ops.tuner_sleep;
3176 tfe7090pvr_dib0090_config[1].sleep = st->dib7000p_ops.tuner_sleep;
3177 tfe7090pvr_dib0090_config[1].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3178
77eed219 3179 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[1]) == NULL)
be9bae10
OG		 3180 return -ENODEV;
3181
8abe4a0a 3182 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3183
77eed219
MK		 3184 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3185 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3186 return 0;
03245a5e 3187}
ba3fe3a9 3188
f45f513a 3189static int tfe7790p_frontend_attach(struct dvb_usb_adapter *adap)
b293f304
OG		 3190{
3191 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3192 struct dib0700_adapter_state *state = adap->priv;
3193
3194 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3195 return -ENODEV;
b293f304 3196
f45f513a 3197 /* The TFE7790P requires the dib0700 to not be in master mode */
b293f304
OG		 3198 st->disable_streaming_master_mode = 1;
3199
3200 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3201 msleep(20);
3202 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3203 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3204 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3205 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3206 msleep(20);
3207 dib0700_ctrl_clock(adap->dev, 72, 1);
3208 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3209 msleep(20);
3210 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3211
8abe4a0a 3212 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap,
f45f513a 3213 1, 0x10, &tfe7790p_dib7000p_config) != 0) {
8abe4a0a 3214 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
b293f304 3215 __func__);
8abe4a0a 3216 dvb_detach(&state->dib7000p_ops);
b293f304
OG		 3217 return -ENODEV;
3218 }
8abe4a0a 3219 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
f45f513a 3220 0x80, &tfe7790p_dib7000p_config);
b293f304
OG		 3221
3222 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
3223}
3224
f45f513a 3225static int tfe7790p_tuner_attach(struct dvb_usb_adapter *adap)
6724a2f4
OG		 3226{
3227 struct dib0700_adapter_state *st = adap->priv;
3228 struct i2c_adapter *tun_i2c =
8abe4a0a
MCC		 3229 st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3230
3231
3232 tfe7790p_dib0090_config.reset = st->dib7000p_ops.tuner_sleep;
3233 tfe7790p_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep;
3234 tfe7790p_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
6724a2f4
OG		 3235
3236 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
f45f513a 3237 &tfe7790p_dib0090_config) == NULL)
6724a2f4
OG		 3238 return -ENODEV;
3239
8abe4a0a 3240 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6724a2f4
OG		 3241
3242 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3243 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
3244 return 0;
3245}
3246
01373a5c
PB		 3247/* STK7070PD */
3248static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
3249 {
3250 .output_mpeg2_in_188_bytes = 1,
3251
3252 .agc_config_count = 1,
3253 .agc = &dib7070_agc_config,
3254 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3255 .tuner_is_baseband = 1,
3256 .spur_protect = 1,
01373a5c
PB		 3257
3258 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3259 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3260 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3261
3262 .hostbus_diversity = 1,
3263 }, {
3264 .output_mpeg2_in_188_bytes = 1,
3265
3266 .agc_config_count = 1,
3267 .agc = &dib7070_agc_config,
3268 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3269 .tuner_is_baseband = 1,
3270 .spur_protect = 1,
01373a5c
PB		 3271
3272 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3273 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3274 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3275
3276 .hostbus_diversity = 1,
3277 }
3278};
3279
52fd5b2e 3280static void stk7070pd_init(struct dvb_usb_device *dev)
01373a5c 3281{
52fd5b2e 3282 dib0700_set_gpio(dev, GPIO6, GPIO_OUT, 1);
01373a5c 3283 msleep(10);
52fd5b2e
JS		 3284 dib0700_set_gpio(dev, GPIO9, GPIO_OUT, 1);
3285 dib0700_set_gpio(dev, GPIO4, GPIO_OUT, 1);
3286 dib0700_set_gpio(dev, GPIO7, GPIO_OUT, 1);
3287 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 0);
01373a5c 3288
52fd5b2e 3289 dib0700_ctrl_clock(dev, 72, 1);
01373a5c
PB		 3290
3291 msleep(10);
52fd5b2e
JS		 3292 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 1);
3293}
3294
3295static int stk7070pd_frontend_attach0(struct dvb_usb_adapter *adap)
3296{
8abe4a0a
MCC		 3297 struct dib0700_adapter_state *state = adap->priv;
3298
3299 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3300 return -ENODEV;
3301
52fd5b2e
JS		 3302 stk7070pd_init(adap->dev);
3303
01373a5c
PB		 3304 msleep(10);
3305 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3306
8abe4a0a 3307 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7 3308 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3309 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 3310 __func__);
8abe4a0a 3311 dvb_detach(&state->dib7000p_ops);
83c4fdf7
DH		 3312 return -ENODEV;
3313 }
01373a5c 3314
8abe4a0a 3315 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &stk7070pd_dib7000p_config[0]);
77eed219 3316 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3317}
3318
3319static int stk7070pd_frontend_attach1(struct dvb_usb_adapter *adap)
3320{
8abe4a0a
MCC		 3321 struct dib0700_adapter_state *state = adap->priv;
3322
3323 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3324 return -ENODEV;
3325
3326 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x82, &stk7070pd_dib7000p_config[1]);
77eed219 3327 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3328}
3329
d43272a4 3330static int novatd_read_status_override(struct dvb_frontend *fe,
0df289a2 3331 enum fe_status *stat)
d43272a4
JS		 3332{
3333 struct dvb_usb_adapter *adap = fe->dvb->priv;
3334 struct dvb_usb_device *dev = adap->dev;
3335 struct dib0700_state *state = dev->priv;
3336 int ret;
3337
3338 ret = state->read_status(fe, stat);
3339
3340 if (!ret)
3341 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT,
3342 !!(*stat & FE_HAS_LOCK));
3343
3344 return ret;
3345}
3346
3347static int novatd_sleep_override(struct dvb_frontend* fe)
3348{
3349 struct dvb_usb_adapter *adap = fe->dvb->priv;
3350 struct dvb_usb_device *dev = adap->dev;
3351 struct dib0700_state *state = dev->priv;
3352
3353 /* turn off LED */
3354 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 0);
3355
3356 return state->sleep(fe);
3357}
3358
2b05b881
JS		 3359/**
3360 * novatd_frontend_attach - Nova-TD specific attach
3361 *
3362 * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for
3363 * information purposes.
3364 */
3365static int novatd_frontend_attach(struct dvb_usb_adapter *adap)
3366{
3367 struct dvb_usb_device *dev = adap->dev;
d43272a4 3368 struct dib0700_state *st = dev->priv;
8abe4a0a
MCC		 3369 struct dib0700_adapter_state *state = adap->priv;
3370
3371 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3372 return -ENODEV;
2b05b881
JS		 3373
3374 if (adap->id == 0) {
3375 stk7070pd_init(dev);
3376
3377 /* turn the power LED on, the other two off (just in case) */
3378 dib0700_set_gpio(dev, GPIO0, GPIO_OUT, 0);
3379 dib0700_set_gpio(dev, GPIO1, GPIO_OUT, 0);
3380 dib0700_set_gpio(dev, GPIO2, GPIO_OUT, 1);
3381
8abe4a0a 3382 if (state->dib7000p_ops.i2c_enumeration(&dev->i2c_adap, 2, 18,
2b05b881 3383 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3384 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
2b05b881 3385 __func__);
8abe4a0a 3386 dvb_detach(&state->dib7000p_ops);
2b05b881
JS		 3387 return -ENODEV;
3388 }
3389 }
3390
8abe4a0a 3391 adap->fe_adap[0].fe = state->dib7000p_ops.init(&dev->i2c_adap,
2b05b881
JS		 3392 adap->id == 0 ? 0x80 : 0x82,
3393 &stk7070pd_dib7000p_config[adap->id]);
d43272a4
JS		 3394
3395 if (adap->fe_adap[0].fe == NULL)
3396 return -ENODEV;
3397
3398 st->read_status = adap->fe_adap[0].fe->ops.read_status;
3399 adap->fe_adap[0].fe->ops.read_status = novatd_read_status_override;
3400 st->sleep = adap->fe_adap[0].fe->ops.sleep;
3401 adap->fe_adap[0].fe->ops.sleep = novatd_sleep_override;
3402
3403 return 0;
2b05b881
JS		 3404}
3405
cb22cb52
DH		 3406/* S5H1411 */
3407static struct s5h1411_config pinnacle_801e_config = {
3408 .output_mode = S5H1411_PARALLEL_OUTPUT,
3409 .gpio = S5H1411_GPIO_OFF,
3410 .mpeg_timing = S5H1411_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
3411 .qam_if = S5H1411_IF_44000,
3412 .vsb_if = S5H1411_IF_44000,
3413 .inversion = S5H1411_INVERSION_OFF,
3414 .status_mode = S5H1411_DEMODLOCKING
3415};
3416
3417/* Pinnacle PCTV HD Pro 801e GPIOs map:
3418 GPIO0 - currently unknown
3419 GPIO1 - xc5000 tuner reset
3420 GPIO2 - CX25843 sleep
3421 GPIO3 - currently unknown
3422 GPIO4 - currently unknown
3423 GPIO6 - currently unknown
3424 GPIO7 - currently unknown
3425 GPIO9 - currently unknown
3426 GPIO10 - CX25843 reset
3427 */
3428static int s5h1411_frontend_attach(struct dvb_usb_adapter *adap)
3429{
3430 struct dib0700_state *st = adap->dev->priv;
3431
3432 /* Make use of the new i2c functions from FW 1.20 */
3433 st->fw_use_new_i2c_api = 1;
3434
3435 /* The s5h1411 requires the dib0700 to not be in master mode */
3436 st->disable_streaming_master_mode = 1;
3437
3438 /* All msleep values taken from Windows USB trace */
3439 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
3440 dib0700_set_gpio(adap->dev, GPIO3, GPIO_OUT, 0);
3441 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3442 msleep(400);
3443 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3444 msleep(60);
3445 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3446 msleep(30);
3447 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3448 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3449 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3450 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3451 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 0);
3452 msleep(30);
3453
3454 /* Put the CX25843 to sleep for now since we're in digital mode */
3455 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3456
3457 /* GPIOs are initialized, do the attach */
77eed219 3458 adap->fe_adap[0].fe = dvb_attach(s5h1411_attach, &pinnacle_801e_config,
cb22cb52 3459 &adap->dev->i2c_adap);
77eed219 3460 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
cb22cb52
DH		 3461}
3462
767f3b3b
MK		 3463static int dib0700_xc5000_tuner_callback(void *priv, int component,
3464 int command, int arg)
cb22cb52
DH		 3465{
3466 struct dvb_usb_adapter *adap = priv;
3467
79025a9e
DH		 3468 if (command == XC5000_TUNER_RESET) {
3469 /* Reset the tuner */
3470 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 0);
f0f4633a 3471 msleep(10);
79025a9e 3472 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 1);
f0f4633a 3473 msleep(10);
79025a9e
DH		 3474 } else {
3475 err("xc5000: unknown tuner callback command: %d\n", command);
3476 return -EINVAL;
3477 }
cb22cb52
DH		 3478
3479 return 0;
3480}
3481
3482static struct xc5000_config s5h1411_xc5000_tunerconfig = {
3483 .i2c_address = 0x64,
3484 .if_khz = 5380,
cb22cb52
DH		 3485};
3486
3487static int xc5000_tuner_attach(struct dvb_usb_adapter *adap)
3488{
79025a9e 3489 /* FIXME: generalize & move to common area */
77eed219 3490 adap->fe_adap[0].fe->callback = dib0700_xc5000_tuner_callback;
79025a9e 3491
77eed219 3492 return dvb_attach(xc5000_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap,
767f3b3b 3493 &s5h1411_xc5000_tunerconfig)
cb22cb52
DH		 3494 == NULL ? -ENODEV : 0;
3495}
3496
8d009a0c
DF		 3497static int dib0700_xc4000_tuner_callback(void *priv, int component,
3498 int command, int arg)
3499{
3500 struct dvb_usb_adapter *adap = priv;
8abe4a0a 3501 struct dib0700_adapter_state *state = adap->priv;
8d009a0c
DF		 3502
3503 if (command == XC4000_TUNER_RESET) {
3504 /* Reset the tuner */
8abe4a0a 3505 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
8d009a0c 3506 msleep(10);
8abe4a0a 3507 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
8d009a0c
DF		 3508 } else {
3509 err("xc4000: unknown tuner callback command: %d\n", command);
3510 return -EINVAL;
3511 }
3512
3513 return 0;
3514}
3515
8583fc83
DH		 3516static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = {
3517 .band_caps = BAND_UHF | BAND_VHF,
3518 .setup = 0x64,
3519 .inv_gain = 0x02c8,
3520 .time_stabiliz = 0x15,
3521 .alpha_level = 0x00,
3522 .thlock = 0x76,
3523 .wbd_inv = 0x01,
3524 .wbd_ref = 0x0b33,
3525 .wbd_sel = 0x00,
3526 .wbd_alpha = 0x02,
3527 .agc1_max = 0x00,
3528 .agc1_min = 0x00,
3529 .agc2_max = 0x9b26,
3530 .agc2_min = 0x26ca,
3531 .agc1_pt1 = 0x00,
3532 .agc1_pt2 = 0x00,
3533 .agc1_pt3 = 0x00,
3534 .agc1_slope1 = 0x00,
3535 .agc1_slope2 = 0x00,
3536 .agc2_pt1 = 0x00,
3537 .agc2_pt2 = 0x80,
3538 .agc2_slope1 = 0x1d,
3539 .agc2_slope2 = 0x1d,
2df12510 3540 .alpha_mant = 0x11,
8583fc83
DH		 3541 .alpha_exp = 0x1b,
3542 .beta_mant = 0x17,
3543 .beta_exp = 0x33,
3544 .perform_agc_softsplit = 0x00,
3545};
3546
f1c78d34 3547static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = {
09628b2c
MCC		 3548 .internal = 60000,
3549 .sampling = 30000,
3550 .pll_prediv = 1,
3551 .pll_ratio = 8,
3552 .pll_range = 3,
3553 .pll_reset = 1,
3554 .pll_bypass = 0,
3555 .enable_refdiv = 0,
3556 .bypclk_div = 0,
3557 .IO_CLK_en_core = 1,
3558 .ADClkSrc = 1,
3559 .modulo = 0,
3560 .sad_cfg = (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */
3561 .ifreq = 39370534,
3562 .timf = 20452225,
3563 .xtal_hz = 30000000
f1c78d34
DH		 3564};
3565
01f16263
DH		 3566/* FIXME: none of these inputs are validated yet */
3567static struct dib7000p_config pctv_340e_config = {
62956ced 3568 .output_mpeg2_in_188_bytes = 1,
01f16263
DH		 3569
3570 .agc_config_count = 1,
8583fc83 3571 .agc = &stk7700p_7000p_xc4000_agc_config,
f1c78d34 3572 .bw = &stk7700p_xc4000_pll_config,
01f16263 3573
01f16263
DH		 3574 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
3575 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
3576 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
3577};
3578
3579/* PCTV 340e GPIOs map:
3580 dib0700:
3581 GPIO2 - CX25843 sleep
3582 GPIO3 - CS5340 reset
3583 GPIO5 - IRD
3584 GPIO6 - Power Supply
3585 GPIO8 - LNA (1=off 0=on)
3586 GPIO10 - CX25843 reset
3587 dib7000:
3588 GPIO8 - xc4000 reset
3589 */
3590static int pctv340e_frontend_attach(struct dvb_usb_adapter *adap)
3591{
3592 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3593 struct dib0700_adapter_state *state = adap->priv;
3594
3595 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3596 return -ENODEV;
01f16263
DH		 3597
3598 /* Power Supply on */
3599 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3600 msleep(50);
3601 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3602 msleep(100); /* Allow power supply to settle before probing */
3603
3604 /* cx25843 reset */
3605 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3606 msleep(1); /* cx25843 datasheet say 350us required */
3607 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3608
3609 /* LNA off for now */
3610 dib0700_set_gpio(adap->dev, GPIO8, GPIO_OUT, 1);
3611
3612 /* Put the CX25843 to sleep for now since we're in digital mode */
3613 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3614
3615 /* FIXME: not verified yet */
3616 dib0700_ctrl_clock(adap->dev, 72, 1);
3617
2750d9c3
DH		 3618 msleep(500);
3619
8abe4a0a 3620 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap) == 0) {
01f16263 3621 /* Demodulator not found for some reason? */
8abe4a0a 3622 dvb_detach(&state->dib7000p_ops);
01f16263
DH		 3623 return -ENODEV;
3624 }
3625
8abe4a0a 3626 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x12,
01f16263
DH		 3627 &pctv_340e_config);
3628 st->is_dib7000pc = 1;
3629
77eed219 3630 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01f16263
DH		 3631}
3632
8583fc83 3633static struct xc4000_config dib7000p_xc4000_tunerconfig = {
8edeb6eb 3634 .i2c_address = 0x61,
3635 .default_pm = 1,
3636 .dvb_amplitude = 0,
3637 .set_smoothedcvbs = 0,
3638 .if_khz = 5400
8d009a0c
DF		 3639};
3640
3641static int xc4000_tuner_attach(struct dvb_usb_adapter *adap)
3642{
59d0c37b 3643 struct i2c_adapter *tun_i2c;
8abe4a0a 3644 struct dib0700_adapter_state *state = adap->priv;
59d0c37b
DH		 3645
3646 /* The xc4000 is not on the main i2c bus */
8abe4a0a 3647 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
59d0c37b
DH		 3648 DIBX000_I2C_INTERFACE_TUNER, 1);
3649 if (tun_i2c == NULL) {
941830c9 3650 printk(KERN_ERR "Could not reach tuner i2c bus\n");
59d0c37b
DH		 3651 return 0;
3652 }
3653
3654 /* Setup the reset callback */
77eed219 3655 adap->fe_adap[0].fe->callback = dib0700_xc4000_tuner_callback;
8d009a0c 3656
77eed219 3657 return dvb_attach(xc4000_attach, adap->fe_adap[0].fe, tun_i2c,
8583fc83 3658 &dib7000p_xc4000_tunerconfig)
8d009a0c
DF		 3659 == NULL ? -ENODEV : 0;
3660}
3661
ce904bcb
MK		 3662static struct lgdt3305_config hcw_lgdt3305_config = {
3663 .i2c_addr = 0x0e,
3664 .mpeg_mode = LGDT3305_MPEG_PARALLEL,
3665 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
3666 .tpvalid_polarity = LGDT3305_TP_VALID_LOW,
3667 .deny_i2c_rptr = 0,
3668 .spectral_inversion = 1,
3669 .qam_if_khz = 6000,
3670 .vsb_if_khz = 6000,
3671 .usref_8vsb = 0x0500,
3672};
3673
3674static struct mxl5007t_config hcw_mxl5007t_config = {
3675 .xtal_freq_hz = MxL_XTAL_25_MHZ,
3676 .if_freq_hz = MxL_IF_6_MHZ,
3677 .invert_if = 1,
3678};
3679
3680/* TIGER-ATSC map:
3681 GPIO0 - LNA_CTR (H: LNA power enabled, L: LNA power disabled)
3682 GPIO1 - ANT_SEL (H: VPA, L: MCX)
3683 GPIO4 - SCL2
3684 GPIO6 - EN_TUNER
3685 GPIO7 - SDA2
3686 GPIO10 - DEM_RST
3687
3688 MXL is behind LG's i2c repeater. LG is on SCL2/SDA2 gpios on the DIB
3689 */
3690static int lgdt3305_frontend_attach(struct dvb_usb_adapter *adap)
3691{
3692 struct dib0700_state *st = adap->dev->priv;
3693
3694 /* Make use of the new i2c functions from FW 1.20 */
3695 st->fw_use_new_i2c_api = 1;
3696
3697 st->disable_streaming_master_mode = 1;
3698
3699 /* fe power enable */
3700 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3701 msleep(30);
3702 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3703 msleep(30);
3704
3705 /* demod reset */
3706 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3707 msleep(30);
3708 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3709 msleep(30);
3710 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3711 msleep(30);
3712
77eed219 3713 adap->fe_adap[0].fe = dvb_attach(lgdt3305_attach,
ce904bcb
MK		 3714 &hcw_lgdt3305_config,
3715 &adap->dev->i2c_adap);
3716
77eed219 3717 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ce904bcb
MK		 3718}
3719
3720static int mxl5007t_tuner_attach(struct dvb_usb_adapter *adap)
3721{
77eed219 3722 return dvb_attach(mxl5007t_attach, adap->fe_adap[0].fe,
ce904bcb
MK		 3723 &adap->dev->i2c_adap, 0x60,
3724 &hcw_mxl5007t_config) == NULL ? -ENODEV : 0;
3725}
3726
3727
01373a5c 3728/* DVB-USB and USB stuff follows */
b7f54910 3729struct usb_device_id dib0700_usb_id_table[] = {
01373a5c 3730/* 0 */ { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P) },
6ca8f0b9
AC		 3731 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P_PC) },
3732 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500) },
3733 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_2) },
3734 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK) },
01373a5c 3735/* 5 */ { USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR) },
6ca8f0b9
AC		 3736 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500) },
3737 { USB_DEVICE(USB_VID_UNIWILL, USB_PID_UNIWILL_STK7700P) },
3738 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P) },
3739 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_2) },
01373a5c 3740/* 10 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_2) },
6ca8f0b9
AC		 3741 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV2000E) },
3742 { USB_DEVICE(USB_VID_TERRATEC,
3743 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY) },
3744 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK) },
3745 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700D) },
01373a5c 3746/* 15 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070P) },
6ca8f0b9
AC		 3747 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV_DVB_T_FLASH) },
3748 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070PD) },
3749 { USB_DEVICE(USB_VID_PINNACLE,
3750 USB_PID_PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T) },
3751 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500_PC) },
fa3b877e 3752/* 20 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_EXPRESS) },
6ca8f0b9
AC		 3753 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U7000) },
3754 { USB_DEVICE(USB_VID_ULTIMA_ELECTRONIC, USB_PID_ARTEC_T14BR) },
3755 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000) },
3756 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3100) },
3757/* 25 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_3) },
3758 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_MYTV_T) },
3759 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_USB_XE) },
3760 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_EXPRESSCARD_320CX) },
3761 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV72E) },
3762/* 30 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73E) },
3763 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_EC372S) },
3764 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_EXPRESS) },
dc88807e 3765 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS) },
5da4e2c6 3766 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P_2) },
af2a887c 3767/* 35 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK_52009) },
9a0c04a1 3768 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_3) },
17a370bc 3769 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U8000) },
8751aaa6 3770 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700PH) },
5769743a 3771 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000H) },
cb22cb52 3772/* 40 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E) },
d2fc3bfc 3773 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E_SE) },
bb1b082e 3774 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_EXPRESS) },
db4b2d19
NF		 3775 { USB_DEVICE(USB_VID_TERRATEC,
3776 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY_2) },
0a6e1ed2 3777 { USB_DEVICE(USB_VID_SONY, USB_PID_SONY_PLAYTV) },
9abb6e6f 3778/* 45 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_PD378S) },
ce904bcb
MK		 3779 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC) },
3780 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC_B210) },
16ba1ee5 3781 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_MC770) },
919a5488 3782 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT) },
513846ec 3783/* 50 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_Dlx) },
f0f4ae76 3784 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_H) },
a9b8fe30
PB		 3785 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T3) },
3786 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T5) },
c53d83cc 3787 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D) },
74b76f21
OG		 3788/* 55 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D_2) },
3789 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73A) },
e414753c
PB		 3790 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV73ESE) },
3791 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV282E) },
d300bd69 3792 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7770P) },
db48138f 3793/* 60 */{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS_2) },
ba3fe3a9
PB		 3794 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XPVR) },
3795 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XP) },
3bfb317f 3796 { USB_DEVICE_VER(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD, 0x000, 0x3f00) },
8a378e85 3797 { USB_DEVICE(USB_VID_EVOLUTEPC, USB_PID_TVWAY_PLUS) },
20232c47 3798/* 65 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73ESE) },
e414753c 3799 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV282E) },
03245a5e 3800 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096GP) },
84e2f037 3801 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DIVERSITY) },
be9bae10
OG		 3802 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090M) },
3803/* 70 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM8096MD) },
3804 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090MD) },
3805 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM7090) },
3806 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7090PVR) },
498e677c 3807 { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2) },
d1402307 3808/* 75 */{ USB_DEVICE(USB_VID_MEDION, USB_PID_CREATIX_CTX1921) },
8d009a0c 3809 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E) },
33fb1681 3810 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E_SE) },
f45f513a
OG		 3811 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7790P) },
3812 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE8096P) },
3813/* 80 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_2) },
c859e6ef
MK		 3814 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E) },
3815 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E_SE) },
91be260f 3816 { USB_DEVICE(USB_VID_PCTV, USB_PID_DIBCOM_STK8096PVR) },
ec788795 3817 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096PVR) },
430ae126 3818 { USB_DEVICE(USB_VID_HAMA, USB_PID_HAMA_DVBT_HYBRID) },
6ca8f0b9 3819 { 0 } /* Terminating entry */
b7f54910
PB		 3820};
3821MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
3822
3823#define DIB0700_DEFAULT_DEVICE_PROPERTIES \
3824 .caps = DVB_USB_IS_AN_I2C_ADAPTER, \
3825 .usb_ctrl = DEVICE_SPECIFIC, \
bdc203e1 3826 .firmware = "dvb-usb-dib0700-1.20.fw", \
b7f54910 3827 .download_firmware = dib0700_download_firmware, \
6958effe 3828 .no_reconnect = 1, \
b7f54910 3829 .size_of_priv = sizeof(struct dib0700_state), \
6958effe
PB		 3830 .i2c_algo = &dib0700_i2c_algo, \
3831 .identify_state = dib0700_identify_state
b7f54910
PB		 3832
3833#define DIB0700_DEFAULT_STREAMING_CONFIG(ep) \
3834 .streaming_ctrl = dib0700_streaming_ctrl, \
3835 .stream = { \
3836 .type = USB_BULK, \
3837 .count = 4, \
3838 .endpoint = ep, \
3839 .u = { \
3840 .bulk = { \
3841 .buffersize = 39480, \
3842 } \
3843 } \
3844 }
3845
0fae1997
MCC		 3846#define DIB0700_NUM_FRONTENDS(n) \
3847 .num_frontends = n, \
3848 .size_of_priv = sizeof(struct dib0700_adapter_state)
3849
b7f54910
PB		 3850struct dvb_usb_device_properties dib0700_devices[] = {
3851 {
3852 DIB0700_DEFAULT_DEVICE_PROPERTIES,
3853
3854 .num_adapters = 1,
3855 .adapter = {
3856 {
0fae1997 3857 DIB0700_NUM_FRONTENDS(1),
77eed219 3858 .fe = {{
f8731f4d
OG		 3859 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3860 .pid_filter_count = 32,
e192a7cf
OG		 3861 .pid_filter = stk7700p_pid_filter,
3862 .pid_filter_ctrl = stk7700p_pid_filter_ctrl,
b7f54910
PB		 3863 .frontend_attach = stk7700p_frontend_attach,
3864 .tuner_attach = stk7700p_tuner_attach,
3865
3866 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3867 }},
b7f54910
PB		 3868 },
3869 },
3870
67053a40 3871 .num_device_descs = 8,
b7f54910
PB		 3872 .devices = {
3873 { "DiBcom STK7700P reference design",
49a1376c 3874 { &dib0700_usb_id_table[0], &dib0700_usb_id_table[1] },
b7f54910
PB		 3875 { NULL },
3876 },
3877 { "Hauppauge Nova-T Stick",
f9aeba45 3878 { &dib0700_usb_id_table[4], &dib0700_usb_id_table[9], NULL },
b7f54910
PB		 3879 { NULL },
3880 },
3881 { "AVerMedia AVerTV DVB-T Volar",
ced8feca 3882 { &dib0700_usb_id_table[5], &dib0700_usb_id_table[10] },
b7f54910
PB		 3883 { NULL },
3884 },
49a1376c 3885 { "Compro Videomate U500",
1f8ca4b3 3886 { &dib0700_usb_id_table[6], &dib0700_usb_id_table[19] },
49a1376c 3887 { NULL },
0ce215e1
HS		 3888 },
3889 { "Uniwill STK7700P based (Hama and others)",
3890 { &dib0700_usb_id_table[7], NULL },
3891 { NULL },
8637a875
MK		 3892 },
3893 { "Leadtek Winfast DTV Dongle (STK7700P based)",
1e13c8f0 3894 { &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] },
8637a875 3895 { NULL },
fa3b877e
JS		 3896 },
3897 { "AVerMedia AVerTV DVB-T Express",
3898 { &dib0700_usb_id_table[20] },
3899 { NULL },
67053a40 3900 },
67053a40 3901 { "Gigabyte U7000",
3902 { &dib0700_usb_id_table[21], NULL },
3903 { NULL },
49a1376c 3904 }
b1139e35
DS		 3905 },
3906
72b39310 3907 .rc.core = {
f72a27b8 3908 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 3909 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 3910 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 3911 .allowed_protos = RC_BIT_RC5 |
3912 RC_BIT_RC6_MCE |
3913 RC_BIT_NEC,
d8b4b582 3914 .change_protocol = dib0700_change_protocol,
f72a27b8 3915 },
b7f54910
PB		 3916 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
3917
3918 .num_adapters = 2,
3919 .adapter = {
3920 {
0fae1997 3921 DIB0700_NUM_FRONTENDS(1),
77eed219 3922 .fe = {{
b7f54910
PB		 3923 .frontend_attach = bristol_frontend_attach,
3924 .tuner_attach = bristol_tuner_attach,
3925
3926 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3927 }},
b7f54910 3928 }, {
0fae1997 3929 DIB0700_NUM_FRONTENDS(1),
77eed219 3930 .fe = {{
b7f54910
PB		 3931 .frontend_attach = bristol_frontend_attach,
3932 .tuner_attach = bristol_tuner_attach,
3933
3934 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 3935 }},
b7f54910
PB		 3936 }
3937 },
3938
3939 .num_device_descs = 1,
3940 .devices = {
3941 { "Hauppauge Nova-T 500 Dual DVB-T",
49a1376c 3942 { &dib0700_usb_id_table[2], &dib0700_usb_id_table[3], NULL },
b7f54910
PB		 3943 { NULL },
3944 },
82f3d559
JG		 3945 },
3946
72b39310 3947 .rc.core = {
f72a27b8 3948 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 3949 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 3950 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 3951 .allowed_protos = RC_BIT_RC5 |
3952 RC_BIT_RC6_MCE |
3953 RC_BIT_NEC,
d8b4b582 3954 .change_protocol = dib0700_change_protocol,
f72a27b8 3955 },
54d75eba
OD		 3956 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
3957
3958 .num_adapters = 2,
3959 .adapter = {
3960 {
0fae1997 3961 DIB0700_NUM_FRONTENDS(1),
77eed219 3962 .fe = {{
f8731f4d
OG		 3963 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3964 .pid_filter_count = 32,
3965 .pid_filter = stk70x0p_pid_filter,
3966 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 3967 .frontend_attach = stk7700d_frontend_attach,
3968 .tuner_attach = stk7700d_tuner_attach,
3969
3970 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3971 }},
54d75eba 3972 }, {
0fae1997 3973 DIB0700_NUM_FRONTENDS(1),
77eed219 3974 .fe = {{
f8731f4d
OG		 3975 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3976 .pid_filter_count = 32,
3977 .pid_filter = stk70x0p_pid_filter,
3978 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 3979 .frontend_attach = stk7700d_frontend_attach,
3980 .tuner_attach = stk7700d_tuner_attach,
3981
3982 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 3983 }},
54d75eba
OD		 3984 }
3985 },
3986
200e861c 3987 .num_device_descs = 5,
54d75eba
OD		 3988 .devices = {
3989 { "Pinnacle PCTV 2000e",
3990 { &dib0700_usb_id_table[11], NULL },
3991 { NULL },
3992 },
3993 { "Terratec Cinergy DT XS Diversity",
3994 { &dib0700_usb_id_table[12], NULL },
3995 { NULL },
3996 },
faebb914 3997 { "Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity",
54d75eba
OD		 3998 { &dib0700_usb_id_table[13], NULL },
3999 { NULL },
4000 },
01373a5c 4001 { "DiBcom STK7700D reference design",
b6884a17
PB		 4002 { &dib0700_usb_id_table[14], NULL },
4003 { NULL },
bb1b082e 4004 },
200e861c
JW		 4005 { "YUAN High-Tech DiBcom STK7700D",
4006 { &dib0700_usb_id_table[55], NULL },
4007 { NULL },
4008 },
bb1b082e 4009
54d75eba 4010 },
82f3d559 4011
72b39310 4012 .rc.core = {
f72a27b8 4013 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4014 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 4015 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4016 .allowed_protos = RC_BIT_RC5 |
4017 RC_BIT_RC6_MCE |
4018 RC_BIT_NEC,
d8b4b582 4019 .change_protocol = dib0700_change_protocol,
f72a27b8 4020 },
132c3188
DG		 4021 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4022
4023 .num_adapters = 1,
4024 .adapter = {
4025 {
0fae1997 4026 DIB0700_NUM_FRONTENDS(1),
77eed219 4027 .fe = {{
f8731f4d
OG		 4028 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4029 .pid_filter_count = 32,
4030 .pid_filter = stk70x0p_pid_filter,
4031 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
132c3188
DG		 4032 .frontend_attach = stk7700P2_frontend_attach,
4033 .tuner_attach = stk7700d_tuner_attach,
4034
4035 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4036 }},
132c3188
DG		 4037 },
4038 },
4039
bb1b082e 4040 .num_device_descs = 3,
132c3188
DG		 4041 .devices = {
4042 { "ASUS My Cinema U3000 Mini DVBT Tuner",
4043 { &dib0700_usb_id_table[23], NULL },
4044 { NULL },
4045 },
6ca8f0b9
AC		 4046 { "Yuan EC372S",
4047 { &dib0700_usb_id_table[31], NULL },
4048 { NULL },
bb1b082e
YA		 4049 },
4050 { "Terratec Cinergy T Express",
4051 { &dib0700_usb_id_table[42], NULL },
4052 { NULL },
6ca8f0b9 4053 }
48aa7391
CR		 4054 },
4055
72b39310 4056 .rc.core = {
f72a27b8 4057 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4058 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4059 .module_name = "dib0700",
0ffd1ab3 4060 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4061 .allowed_protos = RC_BIT_RC5 |
4062 RC_BIT_RC6_MCE |
4063 RC_BIT_NEC,
d8b4b582 4064 .change_protocol = dib0700_change_protocol,
f72a27b8 4065 },
01373a5c
PB		 4066 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4067
4068 .num_adapters = 1,
4069 .adapter = {
4070 {
0fae1997 4071 DIB0700_NUM_FRONTENDS(1),
77eed219 4072 .fe = {{
f8731f4d
OG		 4073 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4074 .pid_filter_count = 32,
4075 .pid_filter = stk70x0p_pid_filter,
4076 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
01373a5c
PB		 4077 .frontend_attach = stk7070p_frontend_attach,
4078 .tuner_attach = dib7070p_tuner_attach,
4079
4080 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4081 }},
01373a5c
PB		 4082 },
4083 },
4084
0bc9d39b 4085 .num_device_descs = 12,
01373a5c
PB		 4086 .devices = {
4087 { "DiBcom STK7070P reference design",
4088 { &dib0700_usb_id_table[15], NULL },
4089 { NULL },
4090 },
4091 { "Pinnacle PCTV DVB-T Flash Stick",
4092 { &dib0700_usb_id_table[16], NULL },
4093 { NULL },
4094 },
7999a816
YL		 4095 { "Artec T14BR DVB-T",
4096 { &dib0700_usb_id_table[22], NULL },
4097 { NULL },
132c3188
DG		 4098 },
4099 { "ASUS My Cinema U3100 Mini DVBT Tuner",
4100 { &dib0700_usb_id_table[24], NULL },
4101 { NULL },
4102 },
c7637b1a
TT		 4103 { "Hauppauge Nova-T Stick",
4104 { &dib0700_usb_id_table[25], NULL },
4105 { NULL },
4106 },
13b83b5d
DS		 4107 { "Hauppauge Nova-T MyTV.t",
4108 { &dib0700_usb_id_table[26], NULL },
4109 { NULL },
4110 },
6ca8f0b9
AC		 4111 { "Pinnacle PCTV 72e",
4112 { &dib0700_usb_id_table[29], NULL },
4113 { NULL },
4114 },
4115 { "Pinnacle PCTV 73e",
4116 { &dib0700_usb_id_table[30], NULL },
4117 { NULL },
4118 },
919a5488
KF		 4119 { "Elgato EyeTV DTT",
4120 { &dib0700_usb_id_table[49], NULL },
4121 { NULL },
4122 },
9abb6e6f
PT		 4123 { "Yuan PD378S",
4124 { &dib0700_usb_id_table[45], NULL },
4125 { NULL },
4126 },
513846ec
AS		 4127 { "Elgato EyeTV Dtt Dlx PD378S",
4128 { &dib0700_usb_id_table[50], NULL },
4129 { NULL },
4130 },
0bc9d39b 4131 { "Elgato EyeTV DTT rev. 2",
f45f513a 4132 { &dib0700_usb_id_table[80], NULL },
0bc9d39b
GG		 4133 { NULL },
4134 },
c7637b1a
TT		 4135 },
4136
72b39310 4137 .rc.core = {
f72a27b8 4138 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4139 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4140 .module_name = "dib0700",
0ffd1ab3 4141 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4142 .allowed_protos = RC_BIT_RC5 |
4143 RC_BIT_RC6_MCE |
4144 RC_BIT_NEC,
d8b4b582 4145 .change_protocol = dib0700_change_protocol,
f72a27b8 4146 },
74b76f21
OG		 4147 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4148
4149 .num_adapters = 1,
4150 .adapter = {
4151 {
0fae1997 4152 DIB0700_NUM_FRONTENDS(1),
77eed219 4153 .fe = {{
648732fc
MCC		 4154 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4155 .pid_filter_count = 32,
4156 .pid_filter = stk70x0p_pid_filter,
4157 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
74b76f21
OG		 4158 .frontend_attach = stk7070p_frontend_attach,
4159 .tuner_attach = dib7070p_tuner_attach,
4160
4161 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4162 }},
74b76f21
OG		 4163 },
4164 },
4165
20232c47 4166 .num_device_descs = 3,
74b76f21
OG		 4167 .devices = {
4168 { "Pinnacle PCTV 73A",
4169 { &dib0700_usb_id_table[56], NULL },
4170 { NULL },
4171 },
4172 { "Pinnacle PCTV 73e SE",
20232c47 4173 { &dib0700_usb_id_table[57], &dib0700_usb_id_table[65], NULL },
74b76f21
OG		 4174 { NULL },
4175 },
4176 { "Pinnacle PCTV 282e",
20232c47 4177 { &dib0700_usb_id_table[58], &dib0700_usb_id_table[66], NULL },
74b76f21
OG		 4178 { NULL },
4179 },
4180 },
4181
72b39310 4182 .rc.core = {
f72a27b8 4183 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4184 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4185 .module_name = "dib0700",
0ffd1ab3 4186 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4187 .allowed_protos = RC_BIT_RC5 |
4188 RC_BIT_RC6_MCE |
4189 RC_BIT_NEC,
d8b4b582 4190 .change_protocol = dib0700_change_protocol,
f72a27b8 4191 },
01373a5c
PB		 4192 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4193
4194 .num_adapters = 2,
4195 .adapter = {
4196 {
0fae1997 4197 DIB0700_NUM_FRONTENDS(1),
77eed219 4198 .fe = {{
f8731f4d
OG		 4199 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4200 .pid_filter_count = 32,
4201 .pid_filter = stk70x0p_pid_filter,
4202 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4203 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4204 .tuner_attach = dib7070p_tuner_attach,
4205
4206 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4207 }},
01373a5c 4208 }, {
0fae1997 4209 DIB0700_NUM_FRONTENDS(1),
77eed219 4210 .fe = {{
f8731f4d
OG		 4211 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4212 .pid_filter_count = 32,
4213 .pid_filter = stk70x0p_pid_filter,
4214 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4215 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4216 .tuner_attach = dib7070p_tuner_attach,
4217
4218 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4219 }},
01373a5c
PB		 4220 }
4221 },
4222
c859e6ef 4223 .num_device_descs = 3,
9b6ba57b
JS		 4224 .devices = {
4225 { "Hauppauge Nova-TD Stick (52009)",
4226 { &dib0700_usb_id_table[35], NULL },
4227 { NULL },
4228 },
c859e6ef
MK		 4229 { "PCTV 2002e",
4230 { &dib0700_usb_id_table[81], NULL },
4231 { NULL },
4232 },
4233 { "PCTV 2002e SE",
4234 { &dib0700_usb_id_table[82], NULL },
4235 { NULL },
4236 },
9b6ba57b
JS		 4237 },
4238
4239 .rc.core = {
4240 .rc_interval = DEFAULT_RC_INTERVAL,
4241 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4242 .module_name = "dib0700",
4243 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4244 .allowed_protos = RC_BIT_RC5 |
4245 RC_BIT_RC6_MCE |
4246 RC_BIT_NEC,
9b6ba57b
JS		 4247 .change_protocol = dib0700_change_protocol,
4248 },
4249 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4250
4251 .num_adapters = 2,
4252 .adapter = {
4253 {
0fae1997 4254 DIB0700_NUM_FRONTENDS(1),
9b6ba57b
JS		 4255 .fe = {{
4256 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4257 .pid_filter_count = 32,
4258 .pid_filter = stk70x0p_pid_filter,
4259 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4260 .frontend_attach = stk7070pd_frontend_attach0,
4261 .tuner_attach = dib7070p_tuner_attach,
4262
4263 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4264 }},
9b6ba57b 4265 }, {
0fae1997 4266 DIB0700_NUM_FRONTENDS(1),
9b6ba57b
JS		 4267 .fe = {{
4268 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4269 .pid_filter_count = 32,
4270 .pid_filter = stk70x0p_pid_filter,
4271 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4272 .frontend_attach = stk7070pd_frontend_attach1,
4273 .tuner_attach = dib7070p_tuner_attach,
4274
4275 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
4276 }},
9b6ba57b
JS		 4277 }
4278 },
4279
4280 .num_device_descs = 5,
01373a5c
PB		 4281 .devices = {
4282 { "DiBcom STK7070PD reference design",
4283 { &dib0700_usb_id_table[17], NULL },
4284 { NULL },
4285 },
4286 { "Pinnacle PCTV Dual DVB-T Diversity Stick",
4287 { &dib0700_usb_id_table[18], NULL },
4288 { NULL },
d01eb2dc 4289 },
9a0c04a1
MK		 4290 { "Hauppauge Nova-TD-500 (84xxx)",
4291 { &dib0700_usb_id_table[36], NULL },
4292 { NULL },
db4b2d19 4293 },
a9b8fe30
PB		 4294 { "Terratec Cinergy DT USB XS Diversity/ T5",
4295 { &dib0700_usb_id_table[43],
4296 &dib0700_usb_id_table[53], NULL},
db4b2d19 4297 { NULL },
0a6e1ed2 4298 },
4299 { "Sony PlayTV",
4300 { &dib0700_usb_id_table[44], NULL },
4301 { NULL },
84e2f037 4302 },
5af935cc
MCC		 4303 },
4304
4305 .rc.core = {
4306 .rc_interval = DEFAULT_RC_INTERVAL,
4307 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4308 .module_name = "dib0700",
0ffd1ab3 4309 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4310 .allowed_protos = RC_BIT_RC5 |
4311 RC_BIT_RC6_MCE |
4312 RC_BIT_NEC,
d8b4b582 4313 .change_protocol = dib0700_change_protocol,
5af935cc
MCC		 4314 },
4315 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4316
4317 .num_adapters = 2,
4318 .adapter = {
4319 {
0fae1997 4320 DIB0700_NUM_FRONTENDS(1),
77eed219 4321 .fe = {{
5af935cc
MCC		 4322 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4323 .pid_filter_count = 32,
4324 .pid_filter = stk70x0p_pid_filter,
4325 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4326 .frontend_attach = stk7070pd_frontend_attach0,
4327 .tuner_attach = dib7070p_tuner_attach,
4328
4329 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4330 }},
5af935cc 4331 }, {
0fae1997 4332 DIB0700_NUM_FRONTENDS(1),
77eed219 4333 .fe = {{
5af935cc
MCC		 4334 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4335 .pid_filter_count = 32,
4336 .pid_filter = stk70x0p_pid_filter,
4337 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4338 .frontend_attach = stk7070pd_frontend_attach1,
4339 .tuner_attach = dib7070p_tuner_attach,
4340
4341 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4342 }},
5af935cc
MCC		 4343 }
4344 },
4345
4346 .num_device_descs = 1,
4347 .devices = {
84e2f037
MM		 4348 { "Elgato EyeTV Diversity",
4349 { &dib0700_usb_id_table[68], NULL },
4350 { NULL },
4351 },
c985a8dc 4352 },
f72a27b8 4353
72b39310 4354 .rc.core = {
f72a27b8 4355 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4356 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4357 .module_name = "dib0700",
0ffd1ab3 4358 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4359 .allowed_protos = RC_BIT_RC5 |
4360 RC_BIT_RC6_MCE |
4361 RC_BIT_NEC,
d8b4b582 4362 .change_protocol = dib0700_change_protocol,
f72a27b8 4363 },
6ca8f0b9
AC		 4364 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4365
4366 .num_adapters = 1,
4367 .adapter = {
4368 {
0fae1997 4369 DIB0700_NUM_FRONTENDS(1),
77eed219 4370 .fe = {{
f8731f4d
OG		 4371 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4372 .pid_filter_count = 32,
4373 .pid_filter = stk70x0p_pid_filter,
4374 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
6ca8f0b9
AC		 4375 .frontend_attach = stk7700ph_frontend_attach,
4376 .tuner_attach = stk7700ph_tuner_attach,
4377
4378 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4379 }},
6ca8f0b9
AC		 4380 },
4381 },
4382
430ae126 4383 .num_device_descs = 10,
6ca8f0b9
AC		 4384 .devices = {
4385 { "Terratec Cinergy HT USB XE",
4386 { &dib0700_usb_id_table[27], NULL },
4387 { NULL },
4388 },
4389 { "Pinnacle Expresscard 320cx",
4390 { &dib0700_usb_id_table[28], NULL },
4391 { NULL },
4392 },
4393 { "Terratec Cinergy HT Express",
4394 { &dib0700_usb_id_table[32], NULL },
4395 { NULL },
4396 },
17a370bc
FT		 4397 { "Gigabyte U8000-RH",
4398 { &dib0700_usb_id_table[37], NULL },
4399 { NULL },
4400 },
8751aaa6
DON		 4401 { "YUAN High-Tech STK7700PH",
4402 { &dib0700_usb_id_table[38], NULL },
4403 { NULL },
4404 },
5769743a
AC		 4405 { "Asus My Cinema-U3000Hybrid",
4406 { &dib0700_usb_id_table[39], NULL },
4407 { NULL },
4408 },
16ba1ee5
XL		 4409 { "YUAN High-Tech MC770",
4410 { &dib0700_usb_id_table[48], NULL },
4411 { NULL },
4412 },
f0f4ae76 4413 { "Leadtek WinFast DTV Dongle H",
4414 { &dib0700_usb_id_table[51], NULL },
4415 { NULL },
4416 },
c53d83cc
PH		 4417 { "YUAN High-Tech STK7700D",
4418 { &dib0700_usb_id_table[54], NULL },
4419 { NULL },
4420 },
430ae126
PO		 4421 { "Hama DVB=T Hybrid USB Stick",
4422 { &dib0700_usb_id_table[85], NULL },
4423 { NULL },
4424 },
6ca8f0b9 4425 },
f72a27b8 4426
72b39310 4427 .rc.core = {
f72a27b8 4428 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4429 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4430 .module_name = "dib0700",
0ffd1ab3 4431 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4432 .allowed_protos = RC_BIT_RC5 |
4433 RC_BIT_RC6_MCE |
4434 RC_BIT_NEC,
d8b4b582 4435 .change_protocol = dib0700_change_protocol,
f72a27b8 4436 },
cb22cb52
DH		 4437 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4438 .num_adapters = 1,
4439 .adapter = {
4440 {
0fae1997 4441 DIB0700_NUM_FRONTENDS(1),
77eed219 4442 .fe = {{
cb22cb52
DH		 4443 .frontend_attach = s5h1411_frontend_attach,
4444 .tuner_attach = xc5000_tuner_attach,
4445
4446 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4447 }},
cb22cb52
DH		 4448 },
4449 },
4450
d2fc3bfc 4451 .num_device_descs = 2,
cb22cb52
DH		 4452 .devices = {
4453 { "Pinnacle PCTV HD Pro USB Stick",
4454 { &dib0700_usb_id_table[40], NULL },
4455 { NULL },
4456 },
d2fc3bfc
DH		 4457 { "Pinnacle PCTV HD USB Stick",
4458 { &dib0700_usb_id_table[41], NULL },
4459 { NULL },
4460 },
cb22cb52 4461 },
72b39310
MCC		 4462
4463 .rc.core = {
f72a27b8 4464 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4465 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4466 .module_name = "dib0700",
0ffd1ab3 4467 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4468 .allowed_protos = RC_BIT_RC5 |
4469 RC_BIT_RC6_MCE |
4470 RC_BIT_NEC,
d8b4b582 4471 .change_protocol = dib0700_change_protocol,
f72a27b8 4472 },
ce904bcb
MK		 4473 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4474 .num_adapters = 1,
4475 .adapter = {
4476 {
0fae1997 4477 DIB0700_NUM_FRONTENDS(1),
77eed219 4478 .fe = {{
ce904bcb
MK		 4479 .frontend_attach = lgdt3305_frontend_attach,
4480 .tuner_attach = mxl5007t_tuner_attach,
4481
4482 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4483 }},
ce904bcb
MK		 4484 },
4485 },
4486
4487 .num_device_descs = 2,
4488 .devices = {
4489 { "Hauppauge ATSC MiniCard (B200)",
4490 { &dib0700_usb_id_table[46], NULL },
4491 { NULL },
4492 },
4493 { "Hauppauge ATSC MiniCard (B210)",
4494 { &dib0700_usb_id_table[47], NULL },
4495 { NULL },
4496 },
4497 },
d300bd69
OG		 4498 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4499
4500 .num_adapters = 1,
4501 .adapter = {
4502 {
0fae1997 4503 DIB0700_NUM_FRONTENDS(1),
77eed219 4504 .fe = {{
f8731f4d
OG		 4505 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4506 .pid_filter_count = 32,
4507 .pid_filter = stk70x0p_pid_filter,
4508 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
90e12cec 4509 .frontend_attach = stk7770p_frontend_attach,
d300bd69
OG		 4510 .tuner_attach = dib7770p_tuner_attach,
4511
4512 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4513 }},
d300bd69
OG		 4514 },
4515 },
4516
d1402307 4517 .num_device_descs = 4,
d300bd69
OG		 4518 .devices = {
4519 { "DiBcom STK7770P reference design",
4520 { &dib0700_usb_id_table[59], NULL },
4521 { NULL },
4522 },
1e13c8f0
PB		 4523 { "Terratec Cinergy T USB XXS (HD)/ T3",
4524 { &dib0700_usb_id_table[33],
4525 &dib0700_usb_id_table[52],
4526 &dib0700_usb_id_table[60], NULL},
db48138f
PB		 4527 { NULL },
4528 },
498e677c
LMF		 4529 { "TechniSat AirStar TeleStick 2",
4530 { &dib0700_usb_id_table[74], NULL },
4531 { NULL },
4532 },
d1402307
SE		 4533 { "Medion CTX1921 DVB-T USB",
4534 { &dib0700_usb_id_table[75], NULL },
4535 { NULL },
4536 },
d300bd69 4537 },
72b39310
MCC		 4538
4539 .rc.core = {
f72a27b8 4540 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4541 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4542 .module_name = "dib0700",
0ffd1ab3 4543 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4544 .allowed_protos = RC_BIT_RC5 |
4545 RC_BIT_RC6_MCE |
4546 RC_BIT_NEC,
d8b4b582 4547 .change_protocol = dib0700_change_protocol,
f72a27b8 4548 },
ba3fe3a9
PB		 4549 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4550 .num_adapters = 1,
4551 .adapter = {
4552 {
0fae1997 4553 DIB0700_NUM_FRONTENDS(1),
77eed219 4554 .fe = {{
f8731f4d
OG		 4555 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4556 .pid_filter_count = 32,
03245a5e
OG		 4557 .pid_filter = stk80xx_pid_filter,
4558 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4559 .frontend_attach = stk807x_frontend_attach,
4560 .tuner_attach = dib807x_tuner_attach,
4561
4562 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4563 }},
ba3fe3a9
PB		 4564 },
4565 },
4566
8a378e85 4567 .num_device_descs = 3,
ba3fe3a9
PB		 4568 .devices = {
4569 { "DiBcom STK807xP reference design",
4570 { &dib0700_usb_id_table[62], NULL },
4571 { NULL },
4572 },
aaeab30f
MCC		 4573 { "Prolink Pixelview SBTVD",
4574 { &dib0700_usb_id_table[63], NULL },
4575 { NULL },
4576 },
8a378e85
F		 4577 { "EvolutePC TVWay+",
4578 { &dib0700_usb_id_table[64], NULL },
4579 { NULL },
4580 },
ba3fe3a9
PB		 4581 },
4582
72b39310 4583 .rc.core = {
f72a27b8 4584 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4585 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4586 .module_name = "dib0700",
0ffd1ab3 4587 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4588 .allowed_protos = RC_BIT_RC5 |
4589 RC_BIT_RC6_MCE |
4590 RC_BIT_NEC,
d8b4b582 4591 .change_protocol = dib0700_change_protocol,
f72a27b8 4592 },
ba3fe3a9
PB		 4593 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4594 .num_adapters = 2,
4595 .adapter = {
4596 {
0fae1997 4597 DIB0700_NUM_FRONTENDS(1),
77eed219 4598 .fe = {{
f8731f4d
OG		 4599 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4600 .pid_filter_count = 32,
03245a5e
OG		 4601 .pid_filter = stk80xx_pid_filter,
4602 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4603 .frontend_attach = stk807xpvr_frontend_attach0,
4604 .tuner_attach = dib807x_tuner_attach,
4605
4606 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4607 }},
ba3fe3a9
PB		 4608 },
4609 {
0fae1997 4610 DIB0700_NUM_FRONTENDS(1),
77eed219 4611 .fe = {{
f8731f4d
OG		 4612 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4613 .pid_filter_count = 32,
03245a5e
OG		 4614 .pid_filter = stk80xx_pid_filter,
4615 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4616 .frontend_attach = stk807xpvr_frontend_attach1,
4617 .tuner_attach = dib807x_tuner_attach,
4618
4619 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4620 }},
ba3fe3a9
PB		 4621 },
4622 },
4623
4624 .num_device_descs = 1,
4625 .devices = {
4626 { "DiBcom STK807xPVR reference design",
4627 { &dib0700_usb_id_table[61], NULL },
4628 { NULL },
4629 },
4630 },
4631
72b39310 4632 .rc.core = {
f72a27b8 4633 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4634 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4635 .module_name = "dib0700",
0ffd1ab3 4636 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4637 .allowed_protos = RC_BIT_RC5 |
4638 RC_BIT_RC6_MCE |
4639 RC_BIT_NEC,
d8b4b582 4640 .change_protocol = dib0700_change_protocol,
f72a27b8 4641 },
03245a5e
OG		 4642 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4643 .num_adapters = 1,
4644 .adapter = {
4645 {
0fae1997 4646 DIB0700_NUM_FRONTENDS(1),
77eed219 4647 .fe = {{
03245a5e
OG		 4648 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4649 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4650 .pid_filter_count = 32,
4651 .pid_filter = stk80xx_pid_filter,
4652 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4653 .frontend_attach = stk809x_frontend_attach,
4654 .tuner_attach = dib809x_tuner_attach,
4655
4656 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4657 }},
03245a5e
OG		 4658 },
4659 },
4660
4661 .num_device_descs = 1,
4662 .devices = {
4663 { "DiBcom STK8096GP reference design",
4664 { &dib0700_usb_id_table[67], NULL },
4665 { NULL },
4666 },
4667 },
4668
be9bae10
OG		 4669 .rc.core = {
4670 .rc_interval = DEFAULT_RC_INTERVAL,
4671 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4672 .module_name = "dib0700",
4673 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4674 .allowed_protos = RC_BIT_RC5 |
4675 RC_BIT_RC6_MCE |
4676 RC_BIT_NEC,
be9bae10
OG		 4677 .change_protocol = dib0700_change_protocol,
4678 },
4679 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4680 .num_adapters = 1,
4681 .adapter = {
4682 {
0fae1997 4683 DIB0700_NUM_FRONTENDS(1),
77eed219 4684 .fe = {{
be9bae10
OG		 4685 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4686 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4687 .pid_filter_count = 32,
4688 .pid_filter = dib90x0_pid_filter,
4689 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4690 .frontend_attach = stk9090m_frontend_attach,
4691 .tuner_attach = dib9090_tuner_attach,
4692
4693 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4694 }},
be9bae10
OG		 4695 },
4696 },
4697
4698 .num_device_descs = 1,
4699 .devices = {
4700 { "DiBcom STK9090M reference design",
4701 { &dib0700_usb_id_table[69], NULL },
4702 { NULL },
4703 },
4704 },
4705
4706 .rc.core = {
4707 .rc_interval = DEFAULT_RC_INTERVAL,
4708 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4709 .module_name = "dib0700",
4710 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4711 .allowed_protos = RC_BIT_RC5 |
4712 RC_BIT_RC6_MCE |
4713 RC_BIT_NEC,
be9bae10
OG		 4714 .change_protocol = dib0700_change_protocol,
4715 },
4716 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4717 .num_adapters = 1,
4718 .adapter = {
4719 {
0fae1997 4720 DIB0700_NUM_FRONTENDS(1),
77eed219 4721 .fe = {{
be9bae10
OG		 4722 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4723 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4724 .pid_filter_count = 32,
4725 .pid_filter = stk80xx_pid_filter,
4726 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4727 .frontend_attach = nim8096md_frontend_attach,
4728 .tuner_attach = nim8096md_tuner_attach,
4729
4730 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4731 }},
be9bae10
OG		 4732 },
4733 },
4734
4735 .num_device_descs = 1,
4736 .devices = {
4737 { "DiBcom NIM8096MD reference design",
4738 { &dib0700_usb_id_table[70], NULL },
4739 { NULL },
4740 },
4741 },
4742
4743 .rc.core = {
4744 .rc_interval = DEFAULT_RC_INTERVAL,
4745 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4746 .module_name = "dib0700",
4747 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4748 .allowed_protos = RC_BIT_RC5 |
4749 RC_BIT_RC6_MCE |
4750 RC_BIT_NEC,
be9bae10
OG		 4751 .change_protocol = dib0700_change_protocol,
4752 },
4753 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4754 .num_adapters = 1,
4755 .adapter = {
4756 {
0fae1997 4757 DIB0700_NUM_FRONTENDS(1),
77eed219 4758 .fe = {{
be9bae10
OG		 4759 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4760 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4761 .pid_filter_count = 32,
4762 .pid_filter = dib90x0_pid_filter,
4763 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4764 .frontend_attach = nim9090md_frontend_attach,
4765 .tuner_attach = nim9090md_tuner_attach,
4766
4767 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4768 }},
be9bae10
OG		 4769 },
4770 },
4771
4772 .num_device_descs = 1,
4773 .devices = {
4774 { "DiBcom NIM9090MD reference design",
4775 { &dib0700_usb_id_table[71], NULL },
4776 { NULL },
4777 },
4778 },
4779
4780 .rc.core = {
4781 .rc_interval = DEFAULT_RC_INTERVAL,
4782 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4783 .module_name = "dib0700",
4784 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4785 .allowed_protos = RC_BIT_RC5 |
4786 RC_BIT_RC6_MCE |
4787 RC_BIT_NEC,
be9bae10
OG		 4788 .change_protocol = dib0700_change_protocol,
4789 },
4790 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4791 .num_adapters = 1,
4792 .adapter = {
4793 {
0fae1997 4794 DIB0700_NUM_FRONTENDS(1),
77eed219 4795 .fe = {{
be9bae10
OG		 4796 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4797 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4798 .pid_filter_count = 32,
4799 .pid_filter = stk70x0p_pid_filter,
4800 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4801 .frontend_attach = nim7090_frontend_attach,
4802 .tuner_attach = nim7090_tuner_attach,
4803
4804 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4805 }},
be9bae10
OG		 4806 },
4807 },
4808
4809 .num_device_descs = 1,
4810 .devices = {
4811 { "DiBcom NIM7090 reference design",
4812 { &dib0700_usb_id_table[72], NULL },
4813 { NULL },
4814 },
4815 },
4816
4817 .rc.core = {
4818 .rc_interval = DEFAULT_RC_INTERVAL,
4819 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4820 .module_name = "dib0700",
4821 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4822 .allowed_protos = RC_BIT_RC5 |
4823 RC_BIT_RC6_MCE |
4824 RC_BIT_NEC,
be9bae10
OG		 4825 .change_protocol = dib0700_change_protocol,
4826 },
4827 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4828 .num_adapters = 2,
4829 .adapter = {
4830 {
0fae1997 4831 DIB0700_NUM_FRONTENDS(1),
77eed219 4832 .fe = {{
be9bae10
OG		 4833 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4834 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4835 .pid_filter_count = 32,
4836 .pid_filter = stk70x0p_pid_filter,
4837 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4838 .frontend_attach = tfe7090pvr_frontend0_attach,
4839 .tuner_attach = tfe7090pvr_tuner0_attach,
4840
4841 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4842 }},
be9bae10
OG		 4843 },
4844 {
0fae1997 4845 DIB0700_NUM_FRONTENDS(1),
77eed219 4846 .fe = {{
be9bae10
OG		 4847 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4848 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4849 .pid_filter_count = 32,
4850 .pid_filter = stk70x0p_pid_filter,
4851 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4852 .frontend_attach = tfe7090pvr_frontend1_attach,
4853 .tuner_attach = tfe7090pvr_tuner1_attach,
4854
4855 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4856 }},
be9bae10
OG		 4857 },
4858 },
4859
4860 .num_device_descs = 1,
4861 .devices = {
4862 { "DiBcom TFE7090PVR reference design",
4863 { &dib0700_usb_id_table[73], NULL },
4864 { NULL },
4865 },
4866 },
4867
8d009a0c
DF		 4868 .rc.core = {
4869 .rc_interval = DEFAULT_RC_INTERVAL,
4870 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4871 .module_name = "dib0700",
4872 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4873 .allowed_protos = RC_BIT_RC5 |
4874 RC_BIT_RC6_MCE |
4875 RC_BIT_NEC,
8d009a0c
DF		 4876 .change_protocol = dib0700_change_protocol,
4877 },
4878 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4879 .num_adapters = 1,
4880 .adapter = {
4881 {
0fae1997 4882 DIB0700_NUM_FRONTENDS(1),
77eed219 4883 .fe = {{
01f16263 4884 .frontend_attach = pctv340e_frontend_attach,
8d009a0c
DF		 4885 .tuner_attach = xc4000_tuner_attach,
4886
4887 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4888 }},
8d009a0c
DF		 4889 },
4890 },
4891
33fb1681 4892 .num_device_descs = 2,
8d009a0c
DF		 4893 .devices = {
4894 { "Pinnacle PCTV 340e HD Pro USB Stick",
4895 { &dib0700_usb_id_table[76], NULL },
4896 { NULL },
4897 },
33fb1681
DH		 4898 { "Pinnacle PCTV Hybrid Stick Solo",
4899 { &dib0700_usb_id_table[77], NULL },
4900 { NULL },
4901 },
8d009a0c 4902 },
6724a2f4
OG		 4903 .rc.core = {
4904 .rc_interval = DEFAULT_RC_INTERVAL,
4905 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4906 .module_name = "dib0700",
4907 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4908 .allowed_protos = RC_BIT_RC5 |
4909 RC_BIT_RC6_MCE |
4910 RC_BIT_NEC,
6724a2f4
OG		 4911 .change_protocol = dib0700_change_protocol,
4912 },
4913 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4914 .num_adapters = 1,
4915 .adapter = {
4916 {
0fae1997 4917 DIB0700_NUM_FRONTENDS(1),
6724a2f4
OG		 4918 .fe = {{
4919 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4920 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4921 .pid_filter_count = 32,
4922 .pid_filter = stk70x0p_pid_filter,
4923 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
f45f513a
OG		 4924 .frontend_attach = tfe7790p_frontend_attach,
4925 .tuner_attach = tfe7790p_tuner_attach,
b293f304
OG		 4926
4927 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
4928 } },
b293f304
OG		 4929 },
4930 },
4931
4932 .num_device_descs = 1,
4933 .devices = {
f45f513a
OG		 4934 { "DiBcom TFE7790P reference design",
4935 { &dib0700_usb_id_table[78], NULL },
b293f304
OG		 4936 { NULL },
4937 },
4938 },
4939
88f3a358
OG		 4940 .rc.core = {
4941 .rc_interval = DEFAULT_RC_INTERVAL,
4942 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4943 .module_name = "dib0700",
4944 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4945 .allowed_protos = RC_BIT_RC5 |
4946 RC_BIT_RC6_MCE |
4947 RC_BIT_NEC,
88f3a358
OG		 4948 .change_protocol = dib0700_change_protocol,
4949 },
4950 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4951 .num_adapters = 1,
4952 .adapter = {
4953 {
0fae1997 4954 DIB0700_NUM_FRONTENDS(1),
88f3a358
OG		 4955 .fe = {{
4956 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4957 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4958 .pid_filter_count = 32,
4959 .pid_filter = stk80xx_pid_filter,
4960 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4961 .frontend_attach = tfe8096p_frontend_attach,
4962 .tuner_attach = tfe8096p_tuner_attach,
4963
4964 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4965
4966 } },
88f3a358
OG		 4967 },
4968 },
4969
4970 .num_device_descs = 1,
4971 .devices = {
4972 { "DiBcom TFE8096P reference design",
f45f513a 4973 { &dib0700_usb_id_table[79], NULL },
88f3a358
OG		 4974 { NULL },
4975 },
4976 },
4977
72b39310 4978 .rc.core = {
f72a27b8 4979 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4980 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4981 .module_name = "dib0700",
0ffd1ab3 4982 .rc_query = dib0700_rc_query_old_firmware,
c003ab1b
DH		 4983 .allowed_protos = RC_BIT_RC5 |
4984 RC_BIT_RC6_MCE |
4985 RC_BIT_NEC,
d8b4b582 4986 .change_protocol = dib0700_change_protocol,
f72a27b8 4987 },
91be260f
NS		 4988 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4989 .num_adapters = 2,
4990 .adapter = {
4991 {
4992 .num_frontends = 1,
4993 .fe = {{
4994 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4995 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4996 .pid_filter_count = 32,
4997 .pid_filter = stk80xx_pid_filter,
4998 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4999 .frontend_attach = stk809x_frontend_attach,
5000 .tuner_attach = dib809x_tuner_attach,
5001
5002 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
5003 } },
5004 .size_of_priv =
5005 sizeof(struct dib0700_adapter_state),
5006 }, {
5007 .num_frontends = 1,
5008 .fe = { {
5009 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5010 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5011 .pid_filter_count = 32,
5012 .pid_filter = stk80xx_pid_filter,
5013 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
5014 .frontend_attach = stk809x_frontend1_attach,
5015 .tuner_attach = dib809x_tuner_attach,
5016
5017 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
5018 } },
5019 .size_of_priv =
5020 sizeof(struct dib0700_adapter_state),
5021 },
5022 },
5023 .num_device_descs = 1,
5024 .devices = {
5025 { "DiBcom STK8096-PVR reference design",
ec788795
AT		 5026 { &dib0700_usb_id_table[83],
5027 &dib0700_usb_id_table[84], NULL},
91be260f
NS		 5028 { NULL },
5029 },
5030 },
5031
5032 .rc.core = {
5033 .rc_interval = DEFAULT_RC_INTERVAL,
5034 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
5035 .module_name = "dib0700",
5036 .rc_query = dib0700_rc_query_old_firmware,
5037 .allowed_protos = RC_BIT_RC5 |
5038 RC_BIT_RC6_MCE |
5039 RC_BIT_NEC,
5040 .change_protocol = dib0700_change_protocol,
5041 },
01373a5c 5042 },
b7f54910
PB		 5043};
5044
5045int dib0700_device_count = ARRAY_SIZE(dib0700_devices);
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