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UBUNTU: Ubuntu-5.11.0-22.23
[mirror_ubuntu-hirsute-kernel.git] / drivers / media / usb / dvb-usb / dib0700_devices.c
CommitLineData
a10e763b 1// SPDX-License-Identifier: GPL-2.0-only
b7f54910 2/* Linux driver for devices based on the DiBcom DiB0700 USB bridge
b7f54910 3 *
ba3fe3a9 4 * Copyright (C) 2005-9 DiBcom, SA et al
b7f54910
PB		 5 */
6#include "dib0700.h"
7
8#include "dib3000mc.h"
91bb9be6 9#include "dib7000m.h"
a75763ff 10#include "dib7000p.h"
ba3fe3a9 11#include "dib8000.h"
be9bae10 12#include "dib9000.h"
b7f54910 13#include "mt2060.h"
54d75eba 14#include "mt2266.h"
6ca8f0b9 15#include "tuner-xc2028.h"
cb22cb52 16#include "xc5000.h"
8d009a0c 17#include "xc4000.h"
cb22cb52 18#include "s5h1411.h"
01373a5c 19#include "dib0070.h"
03245a5e 20#include "dib0090.h"
ce904bcb
MK		 21#include "lgdt3305.h"
22#include "mxl5007t.h"
c4d84547
OS		 23#include "mn88472.h"
24#include "tda18250.h"
25
b7f54910 26
7fb3fc0c
PB		 27static int force_lna_activation;
28module_param(force_lna_activation, int, 0644);
6bca5de9 29MODULE_PARM_DESC(force_lna_activation, "force the activation of Low-Noise-Amplifier(s) (LNA), if applicable for the device (default: 0=automatic/off).");
7fb3fc0c 30
01373a5c 31struct dib0700_adapter_state {
14d24d14 32 int (*set_param_save) (struct dvb_frontend *);
be9bae10 33 const struct firmware *frontend_firmware;
8abe4a0a 34 struct dib7000p_ops dib7000p_ops;
d44913c1 35 struct dib8000_ops dib8000_ops;
01373a5c
PB		 36};
37
38/* Hauppauge Nova-T 500 (aka Bristol)
b7f54910
PB		 39 * has a LNA on GPIO0 which is enabled by setting 1 */
40static struct mt2060_config bristol_mt2060_config[2] = {
41 {
42 .i2c_address = 0x60,
303cbeaa 43 .clock_out = 3,
b7f54910
PB		 44 }, {
45 .i2c_address = 0x61,
46 }
47};
48
99afb989 49
b7f54910
PB		 50static struct dibx000_agc_config bristol_dib3000p_mt2060_agc_config = {
51 .band_caps = BAND_VHF | BAND_UHF,
01b4bf31 52 .setup = (1 << 8) | (5 << 5) | (0 << 4) | (0 << 3) | (0 << 2) | (2 << 0),
b7f54910 53
6958effe
PB		 54 .agc1_max = 42598,
55 .agc1_min = 17694,
56 .agc2_max = 45875,
57 .agc2_min = 0,
b7f54910 58
6958effe
PB		 59 .agc1_pt1 = 0,
60 .agc1_pt2 = 59,
b7f54910 61
6958effe
PB		 62 .agc1_slope1 = 0,
63 .agc1_slope2 = 69,
b7f54910
PB		 64
65 .agc2_pt1 = 0,
6958effe 66 .agc2_pt2 = 59,
b7f54910 67
6958effe
PB		 68 .agc2_slope1 = 111,
69 .agc2_slope2 = 28,
b7f54910
PB		 70};
71
72static struct dib3000mc_config bristol_dib3000mc_config[2] = {
73 { .agc = &bristol_dib3000p_mt2060_agc_config,
74 .max_time = 0x196,
75 .ln_adc_level = 0x1cc7,
76 .output_mpeg2_in_188_bytes = 1,
77 },
78 { .agc = &bristol_dib3000p_mt2060_agc_config,
79 .max_time = 0x196,
80 .ln_adc_level = 0x1cc7,
81 .output_mpeg2_in_188_bytes = 1,
82 }
83};
84
85static int bristol_frontend_attach(struct dvb_usb_adapter *adap)
86{
6958effe 87 struct dib0700_state *st = adap->dev->priv;
b7f54910
PB		 88 if (adap->id == 0) {
89 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
90 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
91 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
92 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(10);
93
7fb3fc0c
PB		 94 if (force_lna_activation)
95 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
96 else
97 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
6958effe 98
b7f54910
PB		 99 if (dib3000mc_i2c_enumeration(&adap->dev->i2c_adap, 2, DEFAULT_DIB3000P_I2C_ADDRESS, bristol_dib3000mc_config) != 0) {
100 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(10);
101 return -ENODEV;
102 }
103 }
6958effe 104 st->mt2060_if1[adap->id] = 1220;
77eed219 105 return (adap->fe_adap[0].fe = dvb_attach(dib3000mc_attach, &adap->dev->i2c_adap,
6958effe 106 (10 + adap->id) << 1, &bristol_dib3000mc_config[adap->id])) == NULL ? -ENODEV : 0;
b7f54910
PB		 107}
108
4a2b1083 109static int eeprom_read(struct i2c_adapter *adap,u8 adrs,u8 *pval)
c52344fd
OD		 110{
111 struct i2c_msg msg[2] = {
112 { .addr = 0x50, .flags = 0, .buf = &adrs, .len = 1 },
113 { .addr = 0x50, .flags = I2C_M_RD, .buf = pval, .len = 1 },
114 };
115 if (i2c_transfer(adap, msg, 2) != 2) return -EREMOTEIO;
116 return 0;
117}
118
b7f54910
PB		 119static int bristol_tuner_attach(struct dvb_usb_adapter *adap)
120{
c52344fd 121 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
77eed219 122 struct i2c_adapter *tun_i2c = dib3000mc_get_tuner_i2c_master(adap->fe_adap[0].fe, 1);
c52344fd
OD		 123 s8 a;
124 int if1=1220;
da5ee486
AV		 125 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
126 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_500_2)) {
c52344fd
OD		 127 if (!eeprom_read(prim_i2c,0x59 + adap->id,&a)) if1=1220+a;
128 }
9a9677af
MK		 129 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c,
130 &bristol_mt2060_config[adap->id], if1) == NULL ?
131 -ENODEV : 0;
b7f54910
PB		 132}
133
01373a5c 134/* STK7700D: Pinnacle/Terratec/Hauppauge Dual DVB-T Diversity */
54d75eba 135
b6884a17
PB		 136/* MT226x */
137static struct dibx000_agc_config stk7700d_7000p_mt2266_agc_config[2] = {
138 {
9c783036 139 BAND_UHF,
b6884a17
PB		 140
141 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
142 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 143 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
144 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
145
146 1130,
147 21,
148
149 0,
150 118,
151
152 0,
153 3530,
154 1,
155 0,
156
157 65535,
158 33770,
159 65535,
160 23592,
161
162 0,
163 62,
164 255,
165 64,
166 64,
167 132,
168 192,
169 80,
170 80,
171
172 17,
173 27,
174 23,
175 51,
176
177 1,
b6884a17 178 }, {
9c783036 179 BAND_VHF | BAND_LBAND,
b6884a17
PB		 180
181 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=1, P_agc_inv_pwm2=1,
182 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 183 (0 << 15) | (0 << 14) | (1 << 11) | (1 << 10) | (1 << 9) | (0 << 8)
184 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
185
186 2372,
187 21,
188
189 0,
190 118,
191
192 0,
193 3530,
194 1,
195 0,
196
197 65535,
198 0,
199 65535,
200 23592,
201
202 0,
203 128,
204 128,
205 128,
206 0,
207 128,
208 253,
209 81,
210 0,
211
212 17,
213 27,
214 23,
215 51,
216
217 1,
b6884a17 218 }
54d75eba
OD		 219};
220
221static struct dibx000_bandwidth_config stk7700d_mt2266_pll_config = {
09628b2c
MCC		 222 .internal = 60000,
223 .sampling = 30000,
224 .pll_prediv = 1,
225 .pll_ratio = 8,
226 .pll_range = 3,
227 .pll_reset = 1,
228 .pll_bypass = 0,
229 .enable_refdiv = 0,
230 .bypclk_div = 0,
231 .IO_CLK_en_core = 1,
232 .ADClkSrc = 1,
233 .modulo = 2,
234 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
235 .ifreq = 0,
236 .timf = 20452225,
54d75eba
OD		 237};
238
239static struct dib7000p_config stk7700d_dib7000p_mt2266_config[] = {
240 { .output_mpeg2_in_188_bytes = 1,
241 .hostbus_diversity = 1,
242 .tuner_is_baseband = 1,
243
b6884a17
PB		 244 .agc_config_count = 2,
245 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 246 .bw = &stk7700d_mt2266_pll_config,
247
b6884a17
PB		 248 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
249 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
250 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 251 },
252 { .output_mpeg2_in_188_bytes = 1,
253 .hostbus_diversity = 1,
254 .tuner_is_baseband = 1,
255
b6884a17
PB		 256 .agc_config_count = 2,
257 .agc = stk7700d_7000p_mt2266_agc_config,
54d75eba
OD		 258 .bw = &stk7700d_mt2266_pll_config,
259
b6884a17
PB		 260 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
261 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
262 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
54d75eba
OD		 263 }
264};
265
266static struct mt2266_config stk7700d_mt2266_config[2] = {
267 { .i2c_address = 0x60
268 },
269 { .i2c_address = 0x60
270 }
271};
272
132c3188
DG		 273static int stk7700P2_frontend_attach(struct dvb_usb_adapter *adap)
274{
8abe4a0a
MCC		 275 struct dib0700_adapter_state *state = adap->priv;
276
277 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
278 return -ENODEV;
279
132c3188
DG		 280 if (adap->id == 0) {
281 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
282 msleep(10);
283 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
284 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
285 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
286 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
287 msleep(10);
288 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
289 msleep(10);
8abe4a0a 290 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7
DH		 291 stk7700d_dib7000p_mt2266_config)
292 != 0) {
8abe4a0a 293 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 294 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 295 return -ENODEV;
296 }
132c3188
DG		 297 }
298
8abe4a0a 299 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 300 0x80 + (adap->id << 1),
301 &stk7700d_dib7000p_mt2266_config[adap->id]);
132c3188 302
77eed219 303 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
132c3188
DG		 304}
305
54d75eba
OD		 306static int stk7700d_frontend_attach(struct dvb_usb_adapter *adap)
307{
8abe4a0a
MCC		 308 struct dib0700_adapter_state *state = adap->priv;
309
310 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
311 return -ENODEV;
312
54d75eba
OD		 313 if (adap->id == 0) {
314 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
315 msleep(10);
316 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
317 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
318 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
319 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
320 msleep(10);
321 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
322 msleep(10);
323 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
8abe4a0a 324 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7
DH		 325 stk7700d_dib7000p_mt2266_config)
326 != 0) {
8abe4a0a 327 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 328 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 329 return -ENODEV;
330 }
54d75eba
OD		 331 }
332
8abe4a0a 333 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
2a776313
MK		 334 0x80 + (adap->id << 1),
335 &stk7700d_dib7000p_mt2266_config[adap->id]);
54d75eba 336
77eed219 337 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
54d75eba
OD		 338}
339
340static int stk7700d_tuner_attach(struct dvb_usb_adapter *adap)
341{
342 struct i2c_adapter *tun_i2c;
8abe4a0a
MCC		 343 struct dib0700_adapter_state *state = adap->priv;
344
345 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
346 DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 347 return dvb_attach(mt2266_attach, adap->fe_adap[0].fe, tun_i2c,
1ebcad77 348 &stk7700d_mt2266_config[adap->id]) == NULL ? -ENODEV : 0;
54d75eba
OD		 349}
350
6ca8f0b9 351/* STK7700-PH: Digital/Analog Hybrid Tuner, e.h. Cinergy HT USB HE */
b1721d0d 352static struct dibx000_agc_config xc3028_agc_config = {
09628b2c 353 .band_caps = BAND_VHF | BAND_UHF,
6ca8f0b9
AC		 354 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
355 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
356 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
09628b2c
MCC		 357 .setup = (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
358 .inv_gain = 712,
359 .time_stabiliz = 21,
360 .alpha_level = 0,
361 .thlock = 118,
362 .wbd_inv = 0,
363 .wbd_ref = 2867,
364 .wbd_sel = 0,
365 .wbd_alpha = 2,
366 .agc1_max = 0,
367 .agc1_min = 0,
368 .agc2_max = 39718,
369 .agc2_min = 9930,
370 .agc1_pt1 = 0,
371 .agc1_pt2 = 0,
372 .agc1_pt3 = 0,
373 .agc1_slope1 = 0,
374 .agc1_slope2 = 0,
375 .agc2_pt1 = 0,
376 .agc2_pt2 = 128,
377 .agc2_slope1 = 29,
378 .agc2_slope2 = 29,
379 .alpha_mant = 17,
380 .alpha_exp = 27,
381 .beta_mant = 23,
382 .beta_exp = 51,
383 .perform_agc_softsplit = 1,
6ca8f0b9
AC		 384};
385
386/* PLL Configuration for COFDM BW_MHz = 8.00 with external clock = 30.00 */
b1721d0d 387static struct dibx000_bandwidth_config xc3028_bw_config = {
09628b2c
MCC		 388 .internal = 60000,
389 .sampling = 30000,
390 .pll_prediv = 1,
391 .pll_ratio = 8,
392 .pll_range = 3,
393 .pll_reset = 1,
394 .pll_bypass = 0,
395 .enable_refdiv = 0,
396 .bypclk_div = 0,
397 .IO_CLK_en_core = 1,
398 .ADClkSrc = 1,
399 .modulo = 0,
400 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
401 .ifreq = (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
402 .timf = 20452225,
403 .xtal_hz = 30000000,
6ca8f0b9
AC		 404};
405
406static struct dib7000p_config stk7700ph_dib7700_xc3028_config = {
407 .output_mpeg2_in_188_bytes = 1,
408 .tuner_is_baseband = 1,
409
410 .agc_config_count = 1,
411 .agc = &xc3028_agc_config,
412 .bw = &xc3028_bw_config,
413
414 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
415 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
416 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
417};
418
d7cba043
MK		 419static int stk7700ph_xc3028_callback(void *ptr, int component,
420 int command, int arg)
6ca8f0b9
AC		 421{
422 struct dvb_usb_adapter *adap = ptr;
8abe4a0a 423 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9
AC		 424
425 switch (command) {
426 case XC2028_TUNER_RESET:
427 /* Send the tuner in then out of reset */
8abe4a0a
MCC		 428 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
429 msleep(10);
430 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6ca8f0b9
AC		 431 break;
432 case XC2028_RESET_CLK:
9893b905 433 case XC2028_I2C_FLUSH:
6ca8f0b9
AC		 434 break;
435 default:
436 err("%s: unknown command %d, arg %d\n", __func__,
437 command, arg);
438 return -EINVAL;
439 }
440 return 0;
441}
442
443static struct xc2028_ctrl stk7700ph_xc3028_ctrl = {
444 .fname = XC2028_DEFAULT_FIRMWARE,
445 .max_len = 64,
446 .demod = XC3028_FE_DIBCOM52,
447};
448
449static struct xc2028_config stk7700ph_xc3028_config = {
450 .i2c_addr = 0x61,
6ca8f0b9
AC		 451 .ctrl = &stk7700ph_xc3028_ctrl,
452};
453
454static int stk7700ph_frontend_attach(struct dvb_usb_adapter *adap)
455{
456 struct usb_device_descriptor *desc = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 457 struct dib0700_adapter_state *state = adap->priv;
458
459 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
460 return -ENODEV;
6ca8f0b9 461
da5ee486
AV		 462 if (desc->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
463 desc->idProduct == cpu_to_le16(USB_PID_PINNACLE_EXPRESSCARD_320CX))
8abe4a0a 464 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 465 else
8abe4a0a 466 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
6ca8f0b9
AC		 467 msleep(20);
468 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
469 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
470 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
471 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
472 msleep(10);
473 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
474 msleep(20);
475 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
476 msleep(10);
477
8abe4a0a 478 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 479 &stk7700ph_dib7700_xc3028_config) != 0) {
8abe4a0a 480 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 481 __func__);
eb0c1994 482 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 483 return -ENODEV;
484 }
6ca8f0b9 485
8abe4a0a 486 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9
AC		 487 &stk7700ph_dib7700_xc3028_config);
488
77eed219 489 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
6ca8f0b9
AC		 490}
491
492static int stk7700ph_tuner_attach(struct dvb_usb_adapter *adap)
493{
494 struct i2c_adapter *tun_i2c;
8abe4a0a 495 struct dib0700_adapter_state *state = adap->priv;
6ca8f0b9 496
8abe4a0a 497 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
6ca8f0b9
AC		 498 DIBX000_I2C_INTERFACE_TUNER, 1);
499
500 stk7700ph_xc3028_config.i2c_adap = tun_i2c;
d7cba043
MK		 501
502 /* FIXME: generalize & move to common area */
77eed219 503 adap->fe_adap[0].fe->callback = stk7700ph_xc3028_callback;
6ca8f0b9 504
77eed219 505 return dvb_attach(xc2028_attach, adap->fe_adap[0].fe, &stk7700ph_xc3028_config)
6ca8f0b9
AC		 506 == NULL ? -ENODEV : 0;
507}
508
4b330bee 509#define DEFAULT_RC_INTERVAL 50
54d75eba 510
72b39310
MCC		 511/*
512 * This function is used only when firmware is < 1.20 version. Newer
513 * firmwares use bulk mode, with functions implemented at dib0700_core,
514 * at dib0700_rc_urb_completion()
515 */
516static int dib0700_rc_query_old_firmware(struct dvb_usb_device *d)
54d75eba 517{
6d741bfe 518 enum rc_proto protocol;
120703f9 519 u32 scancode;
72b39310 520 u8 toggle;
54d75eba 521 int i;
54d75eba 522 struct dib0700_state *st = d->priv;
6a207100 523
6a207100
DH		 524 if (st->fw_version >= 0x10200) {
525 /* For 1.20 firmware , We need to keep the RC polling
526 callback so we can reuse the input device setup in
527 dvb-usb-remote.c. However, the actual work is being done
528 in the bulk URB completion handler. */
529 return 0;
530 }
531
bd1f976c
MCC		 532 st->buf[0] = REQUEST_POLL_RC;
533 st->buf[1] = 0;
534
535 i = dib0700_ctrl_rd(d, st->buf, 2, st->buf, 4);
72b39310 536 if (i <= 0) {
034d65ed 537 err("RC Query Failed");
bd1f976c 538 return -EIO;
54d75eba 539 }
58e6f95e
PB		 540
541 /* losing half of KEY_0 events from Philipps rc5 remotes.. */
bd1f976c
MCC		 542 if (st->buf[0] == 0 && st->buf[1] == 0
543 && st->buf[2] == 0 && st->buf[3] == 0)
72b39310 544 return 0;
58e6f95e 545
bd1f976c 546 /* info("%d: %2X %2X %2X %2X",dvb_usb_dib0700_ir_proto,(int)st->buf[3 - 2],(int)st->buf[3 - 3],(int)st->buf[3 - 1],(int)st->buf[3]); */
58e6f95e 547
c4018fa2 548 dib0700_rc_setup(d, NULL); /* reset ir sensor data to prevent false events */
58e6f95e 549
0ffd1ab3 550 switch (d->props.rc.core.protocol) {
6d741bfe 551 case RC_PROTO_BIT_NEC:
58e6f95e 552 /* NEC protocol sends repeat code as 0 0 0 FF */
bd1f976c
MCC		 553 if ((st->buf[3 - 2] == 0x00) && (st->buf[3 - 3] == 0x00) &&
554 (st->buf[3] == 0xff)) {
120703f9
DH		 555 rc_repeat(d->rc_dev);
556 return 0;
58e6f95e 557 }
72b39310 558
6d741bfe 559 protocol = RC_PROTO_NEC;
bd1f976c 560 scancode = RC_SCANCODE_NEC(st->buf[3 - 2], st->buf[3 - 3]);
120703f9 561 toggle = 0;
58e6f95e 562 break;
120703f9 563
72b39310 564 default:
58e6f95e 565 /* RC-5 protocol changes toggle bit on new keypress */
6d741bfe 566 protocol = RC_PROTO_RC5;
bd1f976c
MCC		 567 scancode = RC_SCANCODE_RC5(st->buf[3 - 2], st->buf[3 - 3]);
568 toggle = st->buf[3 - 1];
58e6f95e
PB		 569 break;
570 }
120703f9
DH		 571
572 rc_keydown(d->rc_dev, protocol, scancode, toggle);
54d75eba
OD		 573 return 0;
574}
575
b7f54910 576/* STK7700P: Hauppauge Nova-T Stick, AVerMedia Volar */
a75763ff 577static struct dibx000_agc_config stk7700p_7000m_mt2060_agc_config = {
9c783036 578 BAND_UHF | BAND_VHF,
69ea31e7
PB		 579
580 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
581 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
9c783036
OG		 582 (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
583 | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
584
585 712,
586 41,
587
588 0,
589 118,
590
591 0,
592 4095,
593 0,
594 0,
595
596 42598,
597 17694,
598 45875,
599 2621,
600 0,
601 76,
602 139,
603 52,
604 59,
605 107,
606 172,
607 57,
608 70,
609
610 21,
611 25,
612 28,
613 48,
614
615 1,
616 { 0,
617 107,
618 51800,
619 24700
69ea31e7
PB		 620 },
621};
622
a75763ff 623static struct dibx000_agc_config stk7700p_7000p_mt2060_agc_config = {
09628b2c 624 .band_caps = BAND_UHF | BAND_VHF,
a75763ff
PB		 625 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
626 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=2, P_agc_write=0 */
09628b2c
MCC		 627 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0),
628 .inv_gain = 712,
629 .time_stabiliz = 41,
630 .alpha_level = 0,
631 .thlock = 118,
632 .wbd_inv = 0,
633 .wbd_ref = 4095,
634 .wbd_sel = 0,
635 .wbd_alpha = 0,
636 .agc1_max = 42598,
637 .agc1_min = 16384,
638 .agc2_max = 42598,
639 .agc2_min = 0,
640 .agc1_pt1 = 0,
641 .agc1_pt2 = 137,
642 .agc1_pt3 = 255,
643 .agc1_slope1 = 0,
644 .agc1_slope2 = 255,
645 .agc2_pt1 = 0,
646 .agc2_pt2 = 0,
647 .agc2_slope1 = 0,
648 .agc2_slope2 = 41,
649 .alpha_mant = 15,
650 .alpha_exp = 25,
651 .beta_mant = 28,
652 .beta_exp = 48,
653 .perform_agc_softsplit = 0,
a75763ff
PB		 654};
655
656static struct dibx000_bandwidth_config stk7700p_pll_config = {
09628b2c
MCC		 657 .internal = 60000,
658 .sampling = 30000,
659 .pll_prediv = 1,
660 .pll_ratio = 8,
661 .pll_range = 3,
662 .pll_reset = 1,
663 .pll_bypass = 0,
664 .enable_refdiv = 0,
665 .bypclk_div = 0,
666 .IO_CLK_en_core = 1,
667 .ADClkSrc = 1,
668 .modulo = 0,
669 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
670 .ifreq = 60258167,
671 .timf = 20452225,
672 .xtal_hz = 30000000,
69ea31e7
PB		 673};
674
675static struct dib7000m_config stk7700p_dib7000m_config = {
676 .dvbt_mode = 1,
677 .output_mpeg2_in_188_bytes = 1,
678 .quartz_direct = 1,
679
680 .agc_config_count = 1,
a75763ff
PB		 681 .agc = &stk7700p_7000m_mt2060_agc_config,
682 .bw = &stk7700p_pll_config,
683
684 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
685 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
686 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
687};
688
689static struct dib7000p_config stk7700p_dib7000p_config = {
690 .output_mpeg2_in_188_bytes = 1,
691
b6884a17 692 .agc_config_count = 1,
a75763ff
PB		 693 .agc = &stk7700p_7000p_mt2060_agc_config,
694 .bw = &stk7700p_pll_config,
69ea31e7
PB		 695
696 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
697 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
698 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
b7f54910
PB		 699};
700
701static int stk7700p_frontend_attach(struct dvb_usb_adapter *adap)
702{
69ea31e7 703 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 704 struct dib0700_adapter_state *state = adap->priv;
705
706 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
707 return -ENODEV;
708
b7f54910 709 /* unless there is no real power management in DVB - we leave the device on GPIO6 */
a75763ff
PB		 710
711 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
712 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0); msleep(50);
713
69ea31e7 714 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1); msleep(10);
a75763ff
PB		 715 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
716
b7f54910 717 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0); msleep(10);
a75763ff
PB		 718 dib0700_ctrl_clock(adap->dev, 72, 1);
719 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1); msleep(100);
720
721 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
b7f54910 722
69ea31e7 723 st->mt2060_if1[0] = 1220;
a75763ff 724
8abe4a0a
MCC		 725 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap)) {
726 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 18, &stk7700p_dib7000p_config);
a75763ff 727 st->is_dib7000pc = 1;
8abe4a0a 728 } else {
8abe4a0a 729 memset(&state->dib7000p_ops, 0, sizeof(state->dib7000p_ops));
77eed219 730 adap->fe_adap[0].fe = dvb_attach(dib7000m_attach, &adap->dev->i2c_adap, 18, &stk7700p_dib7000m_config);
8abe4a0a 731 }
a75763ff 732
77eed219 733 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
b7f54910
PB		 734}
735
69ea31e7
PB		 736static struct mt2060_config stk7700p_mt2060_config = {
737 0x60
738};
739
b7f54910
PB		 740static int stk7700p_tuner_attach(struct dvb_usb_adapter *adap)
741{
c52344fd 742 struct i2c_adapter *prim_i2c = &adap->dev->i2c_adap;
69ea31e7 743 struct dib0700_state *st = adap->dev->priv;
a75763ff 744 struct i2c_adapter *tun_i2c;
8abe4a0a 745 struct dib0700_adapter_state *state = adap->priv;
c52344fd
OD		 746 s8 a;
747 int if1=1220;
8abe4a0a 748
da5ee486
AV		 749 if (adap->dev->udev->descriptor.idVendor == cpu_to_le16(USB_VID_HAUPPAUGE) &&
750 adap->dev->udev->descriptor.idProduct == cpu_to_le16(USB_PID_HAUPPAUGE_NOVA_T_STICK)) {
c52344fd
OD		 751 if (!eeprom_read(prim_i2c,0x58,&a)) if1=1220+a;
752 }
a75763ff 753 if (st->is_dib7000pc)
8abe4a0a 754 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 755 else
77eed219 756 tun_i2c = dib7000m_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
a75763ff 757
77eed219 758 return dvb_attach(mt2060_attach, adap->fe_adap[0].fe, tun_i2c, &stk7700p_mt2060_config,
c52344fd 759 if1) == NULL ? -ENODEV : 0;
b7f54910
PB		 760}
761
01373a5c
PB		 762/* DIB7070 generic */
763static struct dibx000_agc_config dib7070_agc_config = {
09628b2c 764 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
01373a5c
PB		 765 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=5, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
766 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
09628b2c
MCC		 767 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
768 .inv_gain = 600,
769 .time_stabiliz = 10,
770 .alpha_level = 0,
771 .thlock = 118,
772 .wbd_inv = 0,
773 .wbd_ref = 3530,
774 .wbd_sel = 1,
775 .wbd_alpha = 5,
776 .agc1_max = 65535,
777 .agc1_min = 0,
778 .agc2_max = 65535,
779 .agc2_min = 0,
780 .agc1_pt1 = 0,
781 .agc1_pt2 = 40,
782 .agc1_pt3 = 183,
783 .agc1_slope1 = 206,
784 .agc1_slope2 = 255,
785 .agc2_pt1 = 72,
786 .agc2_pt2 = 152,
787 .agc2_slope1 = 88,
788 .agc2_slope2 = 90,
789 .alpha_mant = 17,
790 .alpha_exp = 27,
791 .beta_mant = 23,
792 .beta_exp = 51,
793 .perform_agc_softsplit = 0,
01373a5c
PB		 794};
795
796static int dib7070_tuner_reset(struct dvb_frontend *fe, int onoff)
797{
8abe4a0a
MCC		 798 struct dvb_usb_adapter *adap = fe->dvb->priv;
799 struct dib0700_adapter_state *state = adap->priv;
800
7e5ce651 801 deb_info("reset: %d", onoff);
8abe4a0a 802 return state->dib7000p_ops.set_gpio(fe, 8, 0, !onoff);
01373a5c
PB		 803}
804
805static int dib7070_tuner_sleep(struct dvb_frontend *fe, int onoff)
806{
8abe4a0a
MCC		 807 struct dvb_usb_adapter *adap = fe->dvb->priv;
808 struct dib0700_adapter_state *state = adap->priv;
809
7e5ce651 810 deb_info("sleep: %d", onoff);
8abe4a0a 811 return state->dib7000p_ops.set_gpio(fe, 9, 0, onoff);
01373a5c
PB		 812}
813
814static struct dib0070_config dib7070p_dib0070_config[2] = {
815 {
816 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
817 .reset = dib7070_tuner_reset,
818 .sleep = dib7070_tuner_sleep,
819 .clock_khz = 12000,
7e5ce651
PB		 820 .clock_pad_drive = 4,
821 .charge_pump = 2,
01373a5c
PB		 822 }, {
823 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
824 .reset = dib7070_tuner_reset,
825 .sleep = dib7070_tuner_sleep,
826 .clock_khz = 12000,
7e5ce651 827 .charge_pump = 2,
01373a5c
PB		 828 }
829};
830
d300bd69
OG		 831static struct dib0070_config dib7770p_dib0070_config = {
832 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
833 .reset = dib7070_tuner_reset,
834 .sleep = dib7070_tuner_sleep,
835 .clock_khz = 12000,
836 .clock_pad_drive = 0,
837 .flip_chip = 1,
eac1fe10 838 .charge_pump = 2,
d300bd69
OG		 839};
840
14d24d14 841static int dib7070_set_param_override(struct dvb_frontend *fe)
01373a5c 842{
47b163af 843 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
01373a5c
PB		 844 struct dvb_usb_adapter *adap = fe->dvb->priv;
845 struct dib0700_adapter_state *state = adap->priv;
846
847 u16 offset;
47b163af 848 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
01373a5c
PB		 849 switch (band) {
850 case BAND_VHF: offset = 950; break;
851 case BAND_UHF:
852 default: offset = 550; break;
853 }
854 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
8abe4a0a 855 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
14d24d14 856 return state->set_param_save(fe);
01373a5c
PB		 857}
858
14d24d14 859static int dib7770_set_param_override(struct dvb_frontend *fe)
d300bd69 860{
47b163af
MCC		 861 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
862 struct dvb_usb_adapter *adap = fe->dvb->priv;
863 struct dib0700_adapter_state *state = adap->priv;
d300bd69 864
316c46b8
MCC		 865 u16 offset;
866 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
867 switch (band) {
868 case BAND_VHF:
869 state->dib7000p_ops.set_gpio(fe, 0, 0, 1);
870 offset = 850;
871 break;
872 case BAND_UHF:
873 default:
874 state->dib7000p_ops.set_gpio(fe, 0, 0, 0);
875 offset = 250;
876 break;
877 }
878 deb_info("WBD for DiB7000P: %d\n", offset + dib0070_wbd_offset(fe));
879 state->dib7000p_ops.set_wbd_ref(fe, offset + dib0070_wbd_offset(fe));
880 return state->set_param_save(fe);
d300bd69
OG		 881}
882
883static int dib7770p_tuner_attach(struct dvb_usb_adapter *adap)
884{
8abe4a0a
MCC		 885 struct dib0700_adapter_state *st = adap->priv;
886 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
d300bd69
OG		 887 DIBX000_I2C_INTERFACE_TUNER, 1);
888
8abe4a0a
MCC		 889 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
890 &dib7770p_dib0070_config) == NULL)
891 return -ENODEV;
d300bd69 892
8abe4a0a
MCC		 893 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
894 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7770_set_param_override;
895 return 0;
d300bd69
OG		 896}
897
01373a5c
PB		 898static int dib7070p_tuner_attach(struct dvb_usb_adapter *adap)
899{
900 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a 901 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
01373a5c
PB		 902
903 if (adap->id == 0) {
77eed219 904 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[0]) == NULL)
01373a5c
PB		 905 return -ENODEV;
906 } else {
77eed219 907 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c, &dib7070p_dib0070_config[1]) == NULL)
01373a5c
PB		 908 return -ENODEV;
909 }
910
77eed219
MK		 911 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
912 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7070_set_param_override;
01373a5c
PB		 913 return 0;
914}
915
e192a7cf
OG		 916static int stk7700p_pid_filter(struct dvb_usb_adapter *adapter, int index,
917 u16 pid, int onoff)
918{
8abe4a0a 919 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 920 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 921
e192a7cf 922 if (st->is_dib7000pc)
8abe4a0a 923 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
77eed219 924 return dib7000m_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
e192a7cf
OG		 925}
926
927static int stk7700p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
928{
929 struct dib0700_state *st = adapter->dev->priv;
8abe4a0a 930 struct dib0700_adapter_state *state = adapter->priv;
e192a7cf 931 if (st->is_dib7000pc)
8abe4a0a 932 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
77eed219 933 return dib7000m_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
e192a7cf
OG		 934}
935
f8731f4d
OG		 936static int stk70x0p_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
937{
8abe4a0a
MCC		 938 struct dib0700_adapter_state *state = adapter->priv;
939 return state->dib7000p_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 940}
941
942static int stk70x0p_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
943{
8abe4a0a
MCC		 944 struct dib0700_adapter_state *state = adapter->priv;
945 return state->dib7000p_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d
OG		 946}
947
01373a5c 948static struct dibx000_bandwidth_config dib7070_bw_config_12_mhz = {
09628b2c
MCC		 949 .internal = 60000,
950 .sampling = 15000,
951 .pll_prediv = 1,
952 .pll_ratio = 20,
953 .pll_range = 3,
954 .pll_reset = 1,
955 .pll_bypass = 0,
956 .enable_refdiv = 0,
957 .bypclk_div = 0,
958 .IO_CLK_en_core = 1,
959 .ADClkSrc = 1,
960 .modulo = 2,
961 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
962 .ifreq = (0 << 25) | 0,
963 .timf = 20452225,
964 .xtal_hz = 12000000,
01373a5c
PB		 965};
966
967static struct dib7000p_config dib7070p_dib7000p_config = {
968 .output_mpeg2_in_188_bytes = 1,
969
970 .agc_config_count = 1,
971 .agc = &dib7070_agc_config,
972 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 973 .tuner_is_baseband = 1,
974 .spur_protect = 1,
01373a5c
PB		 975
976 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
977 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
978 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
979
980 .hostbus_diversity = 1,
981};
982
983/* STK7070P */
984static int stk7070p_frontend_attach(struct dvb_usb_adapter *adap)
985{
da5ee486 986 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 987 struct dib0700_adapter_state *state = adap->priv;
988
989 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
990 return -ENODEV;
991
da5ee486
AV		 992 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
993 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
994 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
6ca8f0b9 995 else
da5ee486 996 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
01373a5c
PB		 997 msleep(10);
998 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
999 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1000 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1001 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1002
1003 dib0700_ctrl_clock(adap->dev, 72, 1);
1004
1005 msleep(10);
1006 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1007 msleep(10);
1008 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1009
8abe4a0a 1010 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
83c4fdf7 1011 &dib7070p_dib7000p_config) != 0) {
8abe4a0a 1012 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 1013 __func__);
eb0c1994 1014 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 1015 return -ENODEV;
1016 }
01373a5c 1017
8abe4a0a 1018 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
6ca8f0b9 1019 &dib7070p_dib7000p_config);
77eed219 1020 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 1021}
1022
90e12cec
OG		 1023/* STK7770P */
1024static struct dib7000p_config dib7770p_dib7000p_config = {
1025 .output_mpeg2_in_188_bytes = 1,
1026
1027 .agc_config_count = 1,
1028 .agc = &dib7070_agc_config,
1029 .bw = &dib7070_bw_config_12_mhz,
1030 .tuner_is_baseband = 1,
1031 .spur_protect = 1,
1032
1033 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
1034 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
1035 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
1036
1037 .hostbus_diversity = 1,
1038 .enable_current_mirror = 1,
970d14c6 1039 .disable_sample_and_hold = 0,
90e12cec
OG		 1040};
1041
1042static int stk7770p_frontend_attach(struct dvb_usb_adapter *adap)
1043{
1044 struct usb_device_descriptor *p = &adap->dev->udev->descriptor;
8abe4a0a
MCC		 1045 struct dib0700_adapter_state *state = adap->priv;
1046
1047 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
1048 return -ENODEV;
1049
90e12cec
OG		 1050 if (p->idVendor == cpu_to_le16(USB_VID_PINNACLE) &&
1051 p->idProduct == cpu_to_le16(USB_PID_PINNACLE_PCTV72E))
1052 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1053 else
1054 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1055 msleep(10);
1056 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1057 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1058 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1059 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1060
1061 dib0700_ctrl_clock(adap->dev, 72, 1);
1062
1063 msleep(10);
1064 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1065 msleep(10);
1066 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1067
8abe4a0a 1068 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
90e12cec 1069 &dib7770p_dib7000p_config) != 0) {
8abe4a0a 1070 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
90e12cec 1071 __func__);
eb0c1994 1072 dvb_detach(state->dib7000p_ops.set_wbd_ref);
90e12cec
OG		 1073 return -ENODEV;
1074 }
1075
8abe4a0a 1076 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80,
90e12cec 1077 &dib7770p_dib7000p_config);
77eed219 1078 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
90e12cec
OG		 1079}
1080
ba3fe3a9
PB		 1081/* DIB807x generic */
1082static struct dibx000_agc_config dib807x_agc_config[2] = {
1083 {
1084 BAND_VHF,
1085 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1086 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1087 * P_agc_inv_pwm2=0,P_agc_inh_dc_rv_est=0,
1088 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1089 * P_agc_write=0 */
1090 (0 << 15) | (0 << 14) | (7 << 11) | (0 << 10) | (0 << 9) |
1091 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1092 (0 << 0), /* setup*/
1093
1094 600, /* inv_gain*/
1095 10, /* time_stabiliz*/
1096
1097 0, /* alpha_level*/
1098 118, /* thlock*/
1099
1100 0, /* wbd_inv*/
1101 3530, /* wbd_ref*/
1102 1, /* wbd_sel*/
1103 5, /* wbd_alpha*/
1104
1105 65535, /* agc1_max*/
1106 0, /* agc1_min*/
1107
1108 65535, /* agc2_max*/
1109 0, /* agc2_min*/
1110
1111 0, /* agc1_pt1*/
1112 40, /* agc1_pt2*/
1113 183, /* agc1_pt3*/
1114 206, /* agc1_slope1*/
1115 255, /* agc1_slope2*/
1116 72, /* agc2_pt1*/
1117 152, /* agc2_pt2*/
1118 88, /* agc2_slope1*/
1119 90, /* agc2_slope2*/
1120
1121 17, /* alpha_mant*/
1122 27, /* alpha_exp*/
1123 23, /* beta_mant*/
1124 51, /* beta_exp*/
1125
1126 0, /* perform_agc_softsplit*/
1127 }, {
1128 BAND_UHF,
1129 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1130 * P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1131 * P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1132 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1133 * P_agc_write=0 */
1134 (0 << 15) | (0 << 14) | (1 << 11) | (0 << 10) | (0 << 9) |
1135 (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) |
1136 (0 << 0), /* setup */
1137
1138 600, /* inv_gain*/
1139 10, /* time_stabiliz*/
1140
1141 0, /* alpha_level*/
1142 118, /* thlock*/
1143
1144 0, /* wbd_inv*/
1145 3530, /* wbd_ref*/
1146 1, /* wbd_sel*/
1147 5, /* wbd_alpha*/
1148
1149 65535, /* agc1_max*/
1150 0, /* agc1_min*/
1151
1152 65535, /* agc2_max*/
1153 0, /* agc2_min*/
1154
1155 0, /* agc1_pt1*/
1156 40, /* agc1_pt2*/
1157 183, /* agc1_pt3*/
1158 206, /* agc1_slope1*/
1159 255, /* agc1_slope2*/
1160 72, /* agc2_pt1*/
1161 152, /* agc2_pt2*/
1162 88, /* agc2_slope1*/
1163 90, /* agc2_slope2*/
1164
1165 17, /* alpha_mant*/
1166 27, /* alpha_exp*/
1167 23, /* beta_mant*/
1168 51, /* beta_exp*/
1169
1170 0, /* perform_agc_softsplit*/
1171 }
1172};
1173
1174static struct dibx000_bandwidth_config dib807x_bw_config_12_mhz = {
09628b2c
MCC		 1175 .internal = 60000,
1176 .sampling = 15000,
1177 .pll_prediv = 1,
1178 .pll_ratio = 20,
1179 .pll_range = 3,
1180 .pll_reset = 1,
1181 .pll_bypass = 0,
1182 .enable_refdiv = 0,
1183 .bypclk_div = 0,
1184 .IO_CLK_en_core = 1,
1185 .ADClkSrc = 1,
1186 .modulo = 2,
1187 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0), /* sad_cfg: refsel, sel, freq_15k*/
1188 .ifreq = (0 << 25) | 0, /* ifreq = 0.000000 MHz*/
1189 .timf = 18179755,
1190 .xtal_hz = 12000000,
ba3fe3a9
PB		 1191};
1192
1193static struct dib8000_config dib807x_dib8000_config[2] = {
1194 {
1195 .output_mpeg2_in_188_bytes = 1,
1196
1197 .agc_config_count = 2,
1198 .agc = dib807x_agc_config,
1199 .pll = &dib807x_bw_config_12_mhz,
1200 .tuner_is_baseband = 1,
1201
1202 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1203 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1204 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1205
1206 .hostbus_diversity = 1,
1207 .div_cfg = 1,
1208 .agc_control = &dib0070_ctrl_agc_filter,
1209 .output_mode = OUTMODE_MPEG2_FIFO,
1210 .drives = 0x2d98,
1211 }, {
1212 .output_mpeg2_in_188_bytes = 1,
1213
1214 .agc_config_count = 2,
1215 .agc = dib807x_agc_config,
1216 .pll = &dib807x_bw_config_12_mhz,
1217 .tuner_is_baseband = 1,
1218
1219 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1220 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1221 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1222
1223 .hostbus_diversity = 1,
1224 .agc_control = &dib0070_ctrl_agc_filter,
1225 .output_mode = OUTMODE_MPEG2_FIFO,
1226 .drives = 0x2d98,
1227 }
1228};
1229
03245a5e 1230static int dib80xx_tuner_reset(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1231{
d44913c1
MCC		 1232 struct dvb_usb_adapter *adap = fe->dvb->priv;
1233 struct dib0700_adapter_state *state = adap->priv;
1234
1235 return state->dib8000_ops.set_gpio(fe, 5, 0, !onoff);
ba3fe3a9
PB		 1236}
1237
03245a5e 1238static int dib80xx_tuner_sleep(struct dvb_frontend *fe, int onoff)
ba3fe3a9 1239{
d44913c1
MCC		 1240 struct dvb_usb_adapter *adap = fe->dvb->priv;
1241 struct dib0700_adapter_state *state = adap->priv;
1242
1243 return state->dib8000_ops.set_gpio(fe, 0, 0, onoff);
ba3fe3a9
PB		 1244}
1245
1246static const struct dib0070_wbd_gain_cfg dib8070_wbd_gain_cfg[] = {
1247 { 240, 7},
1248 { 0xffff, 6},
1249};
1250
1251static struct dib0070_config dib807x_dib0070_config[2] = {
1252 {
1253 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1254 .reset = dib80xx_tuner_reset,
1255 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1256 .clock_khz = 12000,
1257 .clock_pad_drive = 4,
1258 .vga_filter = 1,
1259 .force_crystal_mode = 1,
1260 .enable_third_order_filter = 1,
1261 .charge_pump = 0,
1262 .wbd_gain = dib8070_wbd_gain_cfg,
1263 .osc_buffer_state = 0,
1264 .freq_offset_khz_uhf = -100,
1265 .freq_offset_khz_vhf = -100,
1266 }, {
1267 .i2c_address = DEFAULT_DIB0070_I2C_ADDRESS,
03245a5e
OG		 1268 .reset = dib80xx_tuner_reset,
1269 .sleep = dib80xx_tuner_sleep,
ba3fe3a9
PB		 1270 .clock_khz = 12000,
1271 .clock_pad_drive = 2,
1272 .vga_filter = 1,
1273 .force_crystal_mode = 1,
1274 .enable_third_order_filter = 1,
1275 .charge_pump = 0,
1276 .wbd_gain = dib8070_wbd_gain_cfg,
1277 .osc_buffer_state = 0,
1278 .freq_offset_khz_uhf = -25,
1279 .freq_offset_khz_vhf = -25,
1280 }
1281};
1282
14d24d14 1283static int dib807x_set_param_override(struct dvb_frontend *fe)
ba3fe3a9 1284{
47b163af 1285 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
ba3fe3a9
PB		 1286 struct dvb_usb_adapter *adap = fe->dvb->priv;
1287 struct dib0700_adapter_state *state = adap->priv;
1288
1289 u16 offset = dib0070_wbd_offset(fe);
47b163af 1290 u8 band = BAND_OF_FREQUENCY(p->frequency/1000);
ba3fe3a9
PB		 1291 switch (band) {
1292 case BAND_VHF:
1293 offset += 750;
1294 break;
1295 case BAND_UHF: /* fall-thru wanted */
1296 default:
1297 offset += 250; break;
1298 }
1299 deb_info("WBD for DiB8000: %d\n", offset);
d44913c1 1300 state->dib8000_ops.set_wbd_ref(fe, offset);
ba3fe3a9 1301
14d24d14 1302 return state->set_param_save(fe);
ba3fe3a9
PB		 1303}
1304
1305static int dib807x_tuner_attach(struct dvb_usb_adapter *adap)
1306{
1307 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1308 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe,
ba3fe3a9
PB		 1309 DIBX000_I2C_INTERFACE_TUNER, 1);
1310
1311 if (adap->id == 0) {
77eed219 1312 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1313 &dib807x_dib0070_config[0]) == NULL)
1314 return -ENODEV;
1315 } else {
77eed219 1316 if (dvb_attach(dib0070_attach, adap->fe_adap[0].fe, tun_i2c,
ba3fe3a9
PB		 1317 &dib807x_dib0070_config[1]) == NULL)
1318 return -ENODEV;
1319 }
1320
77eed219
MK		 1321 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1322 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib807x_set_param_override;
ba3fe3a9
PB		 1323 return 0;
1324}
1325
9c783036
OG		 1326static int stk80xx_pid_filter(struct dvb_usb_adapter *adapter, int index,
1327 u16 pid, int onoff)
f8731f4d 1328{
d44913c1
MCC		 1329 struct dib0700_adapter_state *state = adapter->priv;
1330
1331 return state->dib8000_ops.pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
f8731f4d
OG		 1332}
1333
9c783036 1334static int stk80xx_pid_filter_ctrl(struct dvb_usb_adapter *adapter,
be9bae10 1335 int onoff)
f8731f4d 1336{
d44913c1
MCC		 1337 struct dib0700_adapter_state *state = adapter->priv;
1338
1339 return state->dib8000_ops.pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
f8731f4d 1340}
ba3fe3a9
PB		 1341
1342/* STK807x */
1343static int stk807x_frontend_attach(struct dvb_usb_adapter *adap)
1344{
d44913c1
MCC		 1345 struct dib0700_adapter_state *state = adap->priv;
1346
1347 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1348 return -ENODEV;
1349
ba3fe3a9
PB		 1350 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1351 msleep(10);
1352 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1353 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1354 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1355
1356 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1357
1358 dib0700_ctrl_clock(adap->dev, 72, 1);
1359
1360 msleep(10);
1361 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1362 msleep(10);
1363 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1364
d44913c1 1365 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18,
0c32dbd7 1366 0x80, 0);
ba3fe3a9 1367
d44913c1 1368 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1369 &dib807x_dib8000_config[0]);
1370
77eed219 1371 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1372}
1373
1374/* STK807xPVR */
1375static int stk807xpvr_frontend_attach0(struct dvb_usb_adapter *adap)
1376{
d44913c1
MCC		 1377 struct dib0700_adapter_state *state = adap->priv;
1378
1379 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1380 return -ENODEV;
1381
ba3fe3a9
PB		 1382 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
1383 msleep(30);
1384 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1385 msleep(500);
1386 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1387 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1388 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1389
1390 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1391
1392 dib0700_ctrl_clock(adap->dev, 72, 1);
1393
1394 msleep(10);
1395 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1396 msleep(10);
1397 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1398
1399 /* initialize IC 0 */
d44913c1 1400 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x22, 0x80, 0);
ba3fe3a9 1401
d44913c1 1402 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80,
ba3fe3a9
PB		 1403 &dib807x_dib8000_config[0]);
1404
77eed219 1405 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1406}
1407
1408static int stk807xpvr_frontend_attach1(struct dvb_usb_adapter *adap)
1409{
d44913c1
MCC		 1410 struct dib0700_adapter_state *state = adap->priv;
1411
1412 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1413 return -ENODEV;
1414
ba3fe3a9 1415 /* initialize IC 1 */
d44913c1 1416 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x12, 0x82, 0);
ba3fe3a9 1417
d44913c1 1418 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82,
ba3fe3a9
PB		 1419 &dib807x_dib8000_config[1]);
1420
77eed219 1421 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ba3fe3a9
PB		 1422}
1423
03245a5e 1424/* STK8096GP */
a685dbbc 1425static struct dibx000_agc_config dib8090_agc_config[2] = {
be9bae10 1426 {
40d1a7c3 1427 .band_caps = BAND_UHF | BAND_VHF | BAND_LBAND | BAND_SBAND,
9c783036 1428 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1429 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1430 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1431 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1432 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1433
40d1a7c3
MCC		 1434 .inv_gain = 787,
1435 .time_stabiliz = 10,
9c783036 1436
40d1a7c3
MCC		 1437 .alpha_level = 0,
1438 .thlock = 118,
9c783036 1439
40d1a7c3
MCC		 1440 .wbd_inv = 0,
1441 .wbd_ref = 3530,
1442 .wbd_sel = 1,
1443 .wbd_alpha = 5,
9c783036 1444
40d1a7c3
MCC		 1445 .agc1_max = 65535,
1446 .agc1_min = 0,
9c783036 1447
40d1a7c3
MCC		 1448 .agc2_max = 65535,
1449 .agc2_min = 0,
9c783036 1450
40d1a7c3
MCC		 1451 .agc1_pt1 = 0,
1452 .agc1_pt2 = 32,
1453 .agc1_pt3 = 114,
1454 .agc1_slope1 = 143,
1455 .agc1_slope2 = 144,
1456 .agc2_pt1 = 114,
1457 .agc2_pt2 = 227,
1458 .agc2_slope1 = 116,
1459 .agc2_slope2 = 117,
1460
1461 .alpha_mant = 28,
1462 .alpha_exp = 26,
1463 .beta_mant = 31,
1464 .beta_exp = 51,
1465
1466 .perform_agc_softsplit = 0,
be9bae10
OG		 1467 },
1468 {
40d1a7c3 1469 .band_caps = BAND_CBAND,
9c783036 1470 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1,
be9bae10
OG		 1471 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1472 * P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
40d1a7c3 1473 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8)
9c783036
OG		 1474 | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
1475
40d1a7c3
MCC		 1476 .inv_gain = 787,
1477 .time_stabiliz = 10,
9c783036 1478
40d1a7c3
MCC		 1479 .alpha_level = 0,
1480 .thlock = 118,
9c783036 1481
40d1a7c3
MCC		 1482 .wbd_inv = 0,
1483 .wbd_ref = 3530,
1484 .wbd_sel = 1,
1485 .wbd_alpha = 5,
9c783036 1486
40d1a7c3
MCC		 1487 .agc1_max = 0,
1488 .agc1_min = 0,
9c783036 1489
40d1a7c3
MCC		 1490 .agc2_max = 65535,
1491 .agc2_min = 0,
9c783036 1492
40d1a7c3
MCC		 1493 .agc1_pt1 = 0,
1494 .agc1_pt2 = 32,
1495 .agc1_pt3 = 114,
1496 .agc1_slope1 = 143,
1497 .agc1_slope2 = 144,
1498 .agc2_pt1 = 114,
1499 .agc2_pt2 = 227,
1500 .agc2_slope1 = 116,
1501 .agc2_slope2 = 117,
1502
1503 .alpha_mant = 28,
1504 .alpha_exp = 26,
1505 .beta_mant = 31,
1506 .beta_exp = 51,
1507
1508 .perform_agc_softsplit = 0,
be9bae10 1509 }
03245a5e
OG		 1510};
1511
1512static struct dibx000_bandwidth_config dib8090_pll_config_12mhz = {
40d1a7c3
MCC		 1513 .internal = 54000,
1514 .sampling = 13500,
1515
1516 .pll_prediv = 1,
1517 .pll_ratio = 18,
1518 .pll_range = 3,
1519 .pll_reset = 1,
1520 .pll_bypass = 0,
1521
1522 .enable_refdiv = 0,
1523 .bypclk_div = 0,
1524 .IO_CLK_en_core = 1,
1525 .ADClkSrc = 1,
1526 .modulo = 2,
1527
1528 .sad_cfg = (3 << 14) | (1 << 12) | (599 << 0),
1529
1530 .ifreq = (0 << 25) | 0,
1531 .timf = 20199727,
1532
1533 .xtal_hz = 12000000,
03245a5e
OG		 1534};
1535
1536static int dib8090_get_adc_power(struct dvb_frontend *fe)
1537{
d44913c1
MCC		 1538 struct dvb_usb_adapter *adap = fe->dvb->priv;
1539 struct dib0700_adapter_state *state = adap->priv;
1540
1541 return state->dib8000_ops.get_adc_power(fe, 1);
be9bae10
OG		 1542}
1543
5e9c85d9
OG		 1544static void dib8090_agc_control(struct dvb_frontend *fe, u8 restart)
1545{
1546 deb_info("AGC control callback: %i\n", restart);
1547 dib0090_dcc_freq(fe, restart);
1548
1549 if (restart == 0) /* before AGC startup */
1550 dib0090_set_dc_servo(fe, 1);
1551}
1552
be9bae10
OG		 1553static struct dib8000_config dib809x_dib8000_config[2] = {
1554 {
1555 .output_mpeg2_in_188_bytes = 1,
1556
1557 .agc_config_count = 2,
1558 .agc = dib8090_agc_config,
5e9c85d9 1559 .agc_control = dib8090_agc_control,
be9bae10
OG		 1560 .pll = &dib8090_pll_config_12mhz,
1561 .tuner_is_baseband = 1,
1562
1563 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1564 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1565 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1566
1567 .hostbus_diversity = 1,
1568 .div_cfg = 0x31,
1569 .output_mode = OUTMODE_MPEG2_FIFO,
1570 .drives = 0x2d98,
1571 .diversity_delay = 48,
1572 .refclksel = 3,
b4d6046e 1573 }, {
be9bae10
OG		 1574 .output_mpeg2_in_188_bytes = 1,
1575
1576 .agc_config_count = 2,
1577 .agc = dib8090_agc_config,
5e9c85d9 1578 .agc_control = dib8090_agc_control,
be9bae10
OG		 1579 .pll = &dib8090_pll_config_12mhz,
1580 .tuner_is_baseband = 1,
1581
1582 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1583 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1584 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1585
1586 .hostbus_diversity = 1,
1587 .div_cfg = 0x31,
1588 .output_mode = OUTMODE_DIVERSITY,
1589 .drives = 0x2d08,
1590 .diversity_delay = 1,
1591 .refclksel = 3,
1592 }
1593};
1594
1595static struct dib0090_wbd_slope dib8090_wbd_table[] = {
1596 /* max freq ; cold slope ; cold offset ; warm slope ; warm offset ; wbd gain */
1597 { 120, 0, 500, 0, 500, 4 }, /* CBAND */
1598 { 170, 0, 450, 0, 450, 4 }, /* CBAND */
1599 { 380, 48, 373, 28, 259, 6 }, /* VHF */
1600 { 860, 34, 700, 36, 616, 6 }, /* high UHF */
1601 { 0xFFFF, 34, 700, 36, 616, 6 }, /* default */
1602};
1603
1604static struct dib0090_config dib809x_dib0090_config = {
1605 .io.pll_bypass = 1,
1606 .io.pll_range = 1,
1607 .io.pll_prediv = 1,
1608 .io.pll_loopdiv = 20,
1609 .io.adc_clock_ratio = 8,
1610 .io.pll_int_loop_filt = 0,
1611 .io.clock_khz = 12000,
1612 .reset = dib80xx_tuner_reset,
1613 .sleep = dib80xx_tuner_sleep,
1614 .clkouttobamse = 1,
1615 .analog_output = 1,
1616 .i2c_address = DEFAULT_DIB0090_I2C_ADDRESS,
1617 .use_pwm_agc = 1,
1618 .clkoutdrive = 1,
1619 .get_adc_power = dib8090_get_adc_power,
1620 .freq_offset_khz_uhf = -63,
1621 .freq_offset_khz_vhf = -143,
1622 .wbd = dib8090_wbd_table,
1623 .fref_clock_ratio = 6,
1624};
1625
5e9c85d9
OG		 1626static u8 dib8090_compute_pll_parameters(struct dvb_frontend *fe)
1627{
1628 u8 optimal_pll_ratio = 20;
1629 u32 freq_adc, ratio, rest, max = 0;
1630 u8 pll_ratio;
1631
1632 for (pll_ratio = 17; pll_ratio <= 20; pll_ratio++) {
1633 freq_adc = 12 * pll_ratio * (1 << 8) / 16;
1634 ratio = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) / freq_adc;
1635 rest = ((fe->dtv_property_cache.frequency / 1000) * (1 << 8) / 1000) - ratio * freq_adc;
1636
1637 if (rest > freq_adc / 2)
1638 rest = freq_adc - rest;
1639 deb_info("PLL ratio=%i rest=%i\n", pll_ratio, rest);
1640 if ((rest > max) && (rest > 717)) {
1641 optimal_pll_ratio = pll_ratio;
1642 max = rest;
1643 }
1644 }
1645 deb_info("optimal PLL ratio=%i\n", optimal_pll_ratio);
1646
1647 return optimal_pll_ratio;
1648}
1649
14d24d14 1650static int dib8096_set_param_override(struct dvb_frontend *fe)
be9bae10
OG		 1651{
1652 struct dvb_usb_adapter *adap = fe->dvb->priv;
1653 struct dib0700_adapter_state *state = adap->priv;
5e9c85d9
OG		 1654 u8 pll_ratio, band = BAND_OF_FREQUENCY(fe->dtv_property_cache.frequency / 1000);
1655 u16 target, ltgain, rf_gain_limit;
1656 u32 timf;
be9bae10
OG		 1657 int ret = 0;
1658 enum frontend_tune_state tune_state = CT_SHUTDOWN;
5e9c85d9
OG		 1659
1660 switch (band) {
1661 default:
0cc4a0c4 1662 deb_info("Warning : Rf frequency (%iHz) is not in the supported range, using VHF switch ", fe->dtv_property_cache.frequency);
df561f66 1663 fallthrough;
5e9c85d9 1664 case BAND_VHF:
0cc4a0c4
GS		 1665 state->dib8000_ops.set_gpio(fe, 3, 0, 1);
1666 break;
5e9c85d9 1667 case BAND_UHF:
0cc4a0c4
GS		 1668 state->dib8000_ops.set_gpio(fe, 3, 0, 0);
1669 break;
5e9c85d9 1670 }
be9bae10 1671
14d24d14 1672 ret = state->set_param_save(fe);
be9bae10
OG		 1673 if (ret < 0)
1674 return ret;
1675
5e9c85d9
OG		 1676 if (fe->dtv_property_cache.bandwidth_hz != 6000000) {
1677 deb_info("only 6MHz bandwidth is supported\n");
1678 return -EINVAL;
1679 }
1680
cba862dc 1681 /* Update PLL if needed ratio */
d44913c1 1682 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
5e9c85d9 1683
cba862dc 1684 /* Get optimize PLL ratio to remove spurious */
5e9c85d9
OG		 1685 pll_ratio = dib8090_compute_pll_parameters(fe);
1686 if (pll_ratio == 17)
1687 timf = 21387946;
1688 else if (pll_ratio == 18)
1689 timf = 20199727;
1690 else if (pll_ratio == 19)
1691 timf = 19136583;
1692 else
1693 timf = 18179756;
be9bae10 1694
cba862dc 1695 /* Update ratio */
d44913c1 1696 state->dib8000_ops.update_pll(fe, &dib8090_pll_config_12mhz, fe->dtv_property_cache.bandwidth_hz / 1000, pll_ratio);
5e9c85d9 1697
d44913c1 1698 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, timf);
5e9c85d9
OG		 1699
1700 if (band != BAND_CBAND) {
1701 /* dib0090_get_wbd_target is returning any possible temperature compensated wbd-target */
1702 target = (dib0090_get_wbd_target(fe) * 8 * 18 / 33 + 1) / 2;
d44913c1 1703 state->dib8000_ops.set_wbd_ref(fe, target);
5e9c85d9 1704 }
be9bae10
OG		 1705
1706 if (band == BAND_CBAND) {
b4d6046e
OG		 1707 deb_info("tuning in CBAND - soft-AGC startup\n");
1708 dib0090_set_tune_state(fe, CT_AGC_START);
5e9c85d9 1709
b4d6046e
OG		 1710 do {
1711 ret = dib0090_gain_control(fe);
1712 msleep(ret);
1713 tune_state = dib0090_get_tune_state(fe);
1714 if (tune_state == CT_AGC_STEP_0)
d44913c1 1715 state->dib8000_ops.set_gpio(fe, 6, 0, 1);
b4d6046e
OG		 1716 else if (tune_state == CT_AGC_STEP_1) {
1717 dib0090_get_current_gain(fe, NULL, NULL, &rf_gain_limit, &ltgain);
5e9c85d9 1718 if (rf_gain_limit < 2000) /* activate the external attenuator in case of very high input power */
d44913c1 1719 state->dib8000_ops.set_gpio(fe, 6, 0, 0);
b4d6046e
OG		 1720 }
1721 } while (tune_state < CT_AGC_STOP);
5e9c85d9
OG		 1722
1723 deb_info("switching to PWM AGC\n");
b4d6046e 1724 dib0090_pwm_gain_reset(fe);
d44913c1
MCC		 1725 state->dib8000_ops.pwm_agc_reset(fe);
1726 state->dib8000_ops.set_tune_state(fe, CT_DEMOD_START);
be9bae10 1727 } else {
5e9c85d9 1728 /* for everything else than CBAND we are using standard AGC */
b4d6046e
OG		 1729 deb_info("not tuning in CBAND - standard AGC startup\n");
1730 dib0090_pwm_gain_reset(fe);
be9bae10
OG		 1731 }
1732
1733 return 0;
1734}
1735
1736static int dib809x_tuner_attach(struct dvb_usb_adapter *adap)
1737{
1738 struct dib0700_adapter_state *st = adap->priv;
d44913c1 1739 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10 1740
e1f8807a
DA		 1741 /* FIXME: if adap->id != 0, check if it is fe_adap[1] */
1742 if (!dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config))
1743 return -ENODEV;
be9bae10 1744
77eed219
MK		 1745 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1746 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1747 return 0;
1748}
1749
1750static int stk809x_frontend_attach(struct dvb_usb_adapter *adap)
1751{
d44913c1
MCC		 1752 struct dib0700_adapter_state *state = adap->priv;
1753
1754 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1755 return -ENODEV;
1756
be9bae10
OG		 1757 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1758 msleep(10);
1759 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1760 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1761 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1762
1763 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1764
1765 dib0700_ctrl_clock(adap->dev, 72, 1);
1766
1767 msleep(10);
1768 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
1769 msleep(10);
1770 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1771
d44913c1 1772 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 18, 0x80, 0);
be9bae10 1773
d44913c1 1774 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
be9bae10 1775
77eed219 1776 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 1777}
1778
91be260f
NS		 1779static int stk809x_frontend1_attach(struct dvb_usb_adapter *adap)
1780{
1781 struct dib0700_adapter_state *state = adap->priv;
1782
1783 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1784 return -ENODEV;
1785
1786 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x82, 0);
1787
1788 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
1789
1790 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
1791}
1792
be9bae10
OG		 1793static int nim8096md_tuner_attach(struct dvb_usb_adapter *adap)
1794{
1795 struct dib0700_adapter_state *st = adap->priv;
1796 struct i2c_adapter *tun_i2c;
d44913c1 1797 struct dvb_frontend *fe_slave = st->dib8000_ops.get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10
OG		 1798
1799 if (fe_slave) {
d44913c1 1800 tun_i2c = st->dib8000_ops.get_i2c_master(fe_slave, DIBX000_I2C_INTERFACE_TUNER, 1);
be9bae10
OG		 1801 if (dvb_attach(dib0090_register, fe_slave, tun_i2c, &dib809x_dib0090_config) == NULL)
1802 return -ENODEV;
77eed219 1803 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
be9bae10
OG		 1804 fe_slave->ops.tuner_ops.set_params = dib8096_set_param_override;
1805 }
d44913c1 1806 tun_i2c = st->dib8000_ops.get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_TUNER, 1);
77eed219 1807 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &dib809x_dib0090_config) == NULL)
be9bae10
OG		 1808 return -ENODEV;
1809
77eed219
MK		 1810 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
1811 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096_set_param_override;
be9bae10
OG		 1812
1813 return 0;
1814}
1815
1816static int nim8096md_frontend_attach(struct dvb_usb_adapter *adap)
1817{
1818 struct dvb_frontend *fe_slave;
d44913c1
MCC		 1819 struct dib0700_adapter_state *state = adap->priv;
1820
1821 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1822 return -ENODEV;
be9bae10
OG		 1823
1824 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
b4d6046e 1825 msleep(20);
be9bae10
OG		 1826 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
1827 msleep(1000);
1828 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
1829 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
1830 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
1831
1832 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
1833
1834 dib0700_ctrl_clock(adap->dev, 72, 1);
1835
b4d6046e 1836 msleep(20);
be9bae10 1837 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 1838 msleep(20);
be9bae10
OG		 1839 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
1840
d44913c1 1841 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18, 0x80, 0);
be9bae10 1842
d44913c1 1843 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x80, &dib809x_dib8000_config[0]);
77eed219 1844 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 1845 return -ENODEV;
1846
d44913c1
MCC		 1847 /* Needed to increment refcount */
1848 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
1849 return -ENODEV;
1850
1851 fe_slave = state->dib8000_ops.init(&adap->dev->i2c_adap, 0x82, &dib809x_dib8000_config[1]);
1852 state->dib8000_ops.set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10
OG		 1853
1854 return fe_slave == NULL ? -ENODEV : 0;
1855}
1856
88f3a358
OG		 1857/* TFE8096P */
1858static struct dibx000_agc_config dib8096p_agc_config[2] = {
1859 {
1860 .band_caps = BAND_UHF,
1861 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1862 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1863 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1864 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1865 P_agc_write=0 */
1866 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1867 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1868 | (0 << 4) | (5 << 1) | (0 << 0),
1869
1870 .inv_gain = 684,
1871 .time_stabiliz = 10,
1872
1873 .alpha_level = 0,
1874 .thlock = 118,
1875
1876 .wbd_inv = 0,
1877 .wbd_ref = 1200,
1878 .wbd_sel = 3,
1879 .wbd_alpha = 5,
1880
1881 .agc1_max = 65535,
1882 .agc1_min = 0,
1883
1884 .agc2_max = 32767,
1885 .agc2_min = 0,
1886
1887 .agc1_pt1 = 0,
1888 .agc1_pt2 = 0,
1889 .agc1_pt3 = 105,
1890 .agc1_slope1 = 0,
1891 .agc1_slope2 = 156,
1892 .agc2_pt1 = 105,
1893 .agc2_pt2 = 255,
1894 .agc2_slope1 = 54,
1895 .agc2_slope2 = 0,
1896
1897 .alpha_mant = 28,
1898 .alpha_exp = 26,
1899 .beta_mant = 31,
1900 .beta_exp = 51,
1901
1902 .perform_agc_softsplit = 0,
1903 } , {
1904 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
1905 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0,
1906 P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0,
1907 P_agc_inv_pwm2=0, P_agc_inh_dc_rv_est=0,
1908 P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5,
1909 P_agc_write=0 */
1910 .setup = (0 << 15) | (0 << 14) | (5 << 11)
1911 | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5)
1912 | (0 << 4) | (5 << 1) | (0 << 0),
1913
1914 .inv_gain = 732,
1915 .time_stabiliz = 10,
1916
1917 .alpha_level = 0,
1918 .thlock = 118,
1919
1920 .wbd_inv = 0,
1921 .wbd_ref = 1200,
1922 .wbd_sel = 3,
1923 .wbd_alpha = 5,
1924
1925 .agc1_max = 65535,
1926 .agc1_min = 0,
1927
1928 .agc2_max = 32767,
1929 .agc2_min = 0,
1930
1931 .agc1_pt1 = 0,
1932 .agc1_pt2 = 0,
1933 .agc1_pt3 = 98,
1934 .agc1_slope1 = 0,
1935 .agc1_slope2 = 167,
1936 .agc2_pt1 = 98,
1937 .agc2_pt2 = 255,
1938 .agc2_slope1 = 52,
1939 .agc2_slope2 = 0,
1940
1941 .alpha_mant = 28,
1942 .alpha_exp = 26,
1943 .beta_mant = 31,
1944 .beta_exp = 51,
1945
1946 .perform_agc_softsplit = 0,
1947 }
1948};
1949
1950static struct dibx000_bandwidth_config dib8096p_clock_config_12_mhz = {
09628b2c
MCC		 1951 .internal = 108000,
1952 .sampling = 13500,
1953 .pll_prediv = 1,
1954 .pll_ratio = 9,
1955 .pll_range = 1,
1956 .pll_reset = 0,
1957 .pll_bypass = 0,
1958 .enable_refdiv = 0,
1959 .bypclk_div = 0,
1960 .IO_CLK_en_core = 0,
1961 .ADClkSrc = 0,
1962 .modulo = 2,
1963 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
1964 .ifreq = (0 << 25) | 0,
1965 .timf = 20199729,
1966 .xtal_hz = 12000000,
88f3a358
OG		 1967};
1968
1969static struct dib8000_config tfe8096p_dib8000_config = {
1970 .output_mpeg2_in_188_bytes = 1,
1971 .hostbus_diversity = 1,
1972 .update_lna = NULL,
1973
1974 .agc_config_count = 2,
1975 .agc = dib8096p_agc_config,
1976 .pll = &dib8096p_clock_config_12_mhz,
1977
1978 .gpio_dir = DIB8000_GPIO_DEFAULT_DIRECTIONS,
1979 .gpio_val = DIB8000_GPIO_DEFAULT_VALUES,
1980 .gpio_pwm_pos = DIB8000_GPIO_DEFAULT_PWM_POS,
1981
1982 .agc_control = NULL,
1983 .diversity_delay = 48,
1984 .output_mode = OUTMODE_MPEG2_FIFO,
1985 .enMpegOutput = 1,
1986};
1987
1988static struct dib0090_wbd_slope dib8096p_wbd_table[] = {
1989 { 380, 81, 850, 64, 540, 4},
1990 { 860, 51, 866, 21, 375, 4},
1991 {1700, 0, 250, 0, 100, 6},
1992 {2600, 0, 250, 0, 100, 6},
1993 { 0xFFFF, 0, 0, 0, 0, 0},
1994};
1995
d44913c1 1996static struct dib0090_config tfe8096p_dib0090_config = {
88f3a358
OG		 1997 .io.clock_khz = 12000,
1998 .io.pll_bypass = 0,
1999 .io.pll_range = 0,
2000 .io.pll_prediv = 3,
2001 .io.pll_loopdiv = 6,
2002 .io.adc_clock_ratio = 0,
2003 .io.pll_int_loop_filt = 0,
88f3a358
OG		 2004
2005 .freq_offset_khz_uhf = -143,
2006 .freq_offset_khz_vhf = -143,
2007
2008 .get_adc_power = dib8090_get_adc_power,
2009
2010 .clkouttobamse = 1,
2011 .analog_output = 0,
2012
2013 .wbd_vhf_offset = 0,
2014 .wbd_cband_offset = 0,
2015 .use_pwm_agc = 1,
2016 .clkoutdrive = 0,
2017
2018 .fref_clock_ratio = 1,
2019
88f3a358
OG		 2020 .ls_cfg_pad_drv = 0,
2021 .data_tx_drv = 0,
2022 .low_if = NULL,
2023 .in_soc = 1,
2024 .force_cband_input = 0,
2025};
2026
2027struct dibx090p_adc {
2028 u32 freq; /* RF freq MHz */
2029 u32 timf; /* New Timf */
2030 u32 pll_loopdiv; /* New prediv */
2031 u32 pll_prediv; /* New loopdiv */
2032};
2033
5e9c85d9
OG		 2034struct dibx090p_best_adc {
2035 u32 timf;
2036 u32 pll_loopdiv;
2037 u32 pll_prediv;
88f3a358
OG		 2038};
2039
5e9c85d9
OG		 2040static int dib8096p_get_best_sampling(struct dvb_frontend *fe, struct dibx090p_best_adc *adc)
2041{
2042 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2043 u16 xtal = 12000;
2044 u16 fcp_min = 1900; /* PLL, Minimum Frequency of phase comparator (KHz) */
2045 u16 fcp_max = 20000; /* PLL, Maximum Frequency of phase comparator (KHz) */
2046 u32 fmem_max = 140000; /* 140MHz max SDRAM freq */
2047 u32 fdem_min = 66000;
2048 u32 fcp = 0, fs = 0, fdem = 0, fmem = 0;
2049 u32 harmonic_id = 0;
2050
2051 adc->timf = 0;
2052 adc->pll_loopdiv = loopdiv;
2053 adc->pll_prediv = prediv;
2054
2055 deb_info("bandwidth = %d", fe->dtv_property_cache.bandwidth_hz);
2056
2057 /* Find Min and Max prediv */
2058 while ((xtal / max_prediv) >= fcp_min)
2059 max_prediv++;
2060
2061 max_prediv--;
2062 min_prediv = max_prediv;
2063 while ((xtal / min_prediv) <= fcp_max) {
2064 min_prediv--;
2065 if (min_prediv == 1)
2066 break;
2067 }
2068 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2069
2070 min_prediv = 1;
2071
2072 for (prediv = min_prediv; prediv < max_prediv; prediv++) {
2073 fcp = xtal / prediv;
2074 if (fcp > fcp_min && fcp < fcp_max) {
2075 for (loopdiv = 1; loopdiv < 64; loopdiv++) {
2076 fmem = ((xtal/prediv) * loopdiv);
2077 fdem = fmem / 2;
2078 fs = fdem / 4;
2079
2080 /* test min/max system restrictions */
2081 if ((fdem >= fdem_min) && (fmem <= fmem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz / 1000)) {
2082 spur = 0;
2083 /* test fs harmonics positions */
2084 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000 * fs)); harmonic_id <= ((fe->dtv_property_cache.frequency / (1000 * fs)) + 1); harmonic_id++) {
2085 if (((fs * harmonic_id) >= (fe->dtv_property_cache.frequency / 1000 - (fe->dtv_property_cache.bandwidth_hz / 2000))) && ((fs * harmonic_id) <= (fe->dtv_property_cache.frequency / 1000 + (fe->dtv_property_cache.bandwidth_hz / 2000)))) {
2086 spur = 1;
2087 break;
2088 }
2089 }
2090
2091 if (!spur) {
2092 adc->pll_loopdiv = loopdiv;
2093 adc->pll_prediv = prediv;
2094 adc->timf = (4260880253U / fdem) * (1 << 8);
2095 adc->timf += ((4260880253U % fdem) << 8) / fdem;
2096
2097 deb_info("RF %6d; BW %6d; Xtal %6d; Fmem %6d; Fdem %6d; Fs %6d; Prediv %2d; Loopdiv %2d; Timf %8d;", fe->dtv_property_cache.frequency, fe->dtv_property_cache.bandwidth_hz, xtal, fmem, fdem, fs, prediv, loopdiv, adc->timf);
2098 break;
2099 }
2100 }
2101 }
2102 }
2103 if (!spur)
2104 break;
2105 }
2106
2107 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
2108 return -EINVAL;
2109 return 0;
2110}
2111
14d24d14 2112static int dib8096p_agc_startup(struct dvb_frontend *fe)
88f3a358
OG		 2113{
2114 struct dvb_usb_adapter *adap = fe->dvb->priv;
2115 struct dib0700_adapter_state *state = adap->priv;
2116 struct dibx000_bandwidth_config pll;
5e9c85d9 2117 struct dibx090p_best_adc adc;
88f3a358 2118 u16 target;
5e9c85d9 2119 int ret;
88f3a358 2120
14d24d14 2121 ret = state->set_param_save(fe);
88f3a358
OG		 2122 if (ret < 0)
2123 return ret;
2124 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2125
2126 dib0090_pwm_gain_reset(fe);
2127 /* dib0090_get_wbd_target is returning any possible
2128 temperature compensated wbd-target */
2129 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
d44913c1 2130 state->dib8000_ops.set_wbd_ref(fe, target);
88f3a358 2131
5e9c85d9
OG		 2132 if (dib8096p_get_best_sampling(fe, &adc) == 0) {
2133 pll.pll_ratio = adc.pll_loopdiv;
2134 pll.pll_prediv = adc.pll_prediv;
88f3a358 2135
5e9c85d9 2136 dib0700_set_i2c_speed(adap->dev, 200);
d44913c1
MCC		 2137 state->dib8000_ops.update_pll(fe, &pll, fe->dtv_property_cache.bandwidth_hz / 1000, 0);
2138 state->dib8000_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
5e9c85d9 2139 dib0700_set_i2c_speed(adap->dev, 1000);
88f3a358
OG		 2140 }
2141 return 0;
2142}
2143
2144static int tfe8096p_frontend_attach(struct dvb_usb_adapter *adap)
2145{
5e9c85d9
OG		 2146 struct dib0700_state *st = adap->dev->priv;
2147 u32 fw_version;
d44913c1
MCC		 2148 struct dib0700_adapter_state *state = adap->priv;
2149
2150 if (!dvb_attach(dib8000_attach, &state->dib8000_ops))
2151 return -ENODEV;
5e9c85d9
OG		 2152
2153 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2154 if (fw_version >= 0x10200)
2155 st->fw_use_new_i2c_api = 1;
2156
88f3a358
OG		 2157 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
2158 msleep(20);
2159 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2160 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2161 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2162
2163 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2164
2165 dib0700_ctrl_clock(adap->dev, 72, 1);
2166
2167 msleep(20);
2168 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
2169 msleep(20);
2170 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2171
d44913c1 2172 state->dib8000_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80, 1);
88f3a358 2173
d44913c1
MCC		 2174 adap->fe_adap[0].fe = state->dib8000_ops.init(&adap->dev->i2c_adap,
2175 0x80, &tfe8096p_dib8000_config);
88f3a358
OG		 2176
2177 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
2178}
2179
2180static int tfe8096p_tuner_attach(struct dvb_usb_adapter *adap)
2181{
2182 struct dib0700_adapter_state *st = adap->priv;
d44913c1
MCC		 2183 struct i2c_adapter *tun_i2c = st->dib8000_ops.get_i2c_tuner(adap->fe_adap[0].fe);
2184
2185 tfe8096p_dib0090_config.reset = st->dib8000_ops.tuner_sleep;
2186 tfe8096p_dib0090_config.sleep = st->dib8000_ops.tuner_sleep;
2187 tfe8096p_dib0090_config.wbd = dib8096p_wbd_table;
88f3a358
OG		 2188
2189 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
2190 &tfe8096p_dib0090_config) == NULL)
2191 return -ENODEV;
2192
d44913c1 2193 st->dib8000_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
88f3a358
OG		 2194
2195 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
2196 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib8096p_agc_startup;
2197 return 0;
2198}
2199
be9bae10
OG		 2200/* STK9090M */
2201static int dib90x0_pid_filter(struct dvb_usb_adapter *adapter, int index, u16 pid, int onoff)
2202{
77eed219 2203 return dib9000_fw_pid_filter(adapter->fe_adap[0].fe, index, pid, onoff);
be9bae10
OG		 2204}
2205
2206static int dib90x0_pid_filter_ctrl(struct dvb_usb_adapter *adapter, int onoff)
2207{
77eed219 2208 return dib9000_fw_pid_filter_ctrl(adapter->fe_adap[0].fe, onoff);
be9bae10
OG		 2209}
2210
2211static int dib90x0_tuner_reset(struct dvb_frontend *fe, int onoff)
2212{
2213 return dib9000_set_gpio(fe, 5, 0, !onoff);
2214}
2215
2216static int dib90x0_tuner_sleep(struct dvb_frontend *fe, int onoff)
2217{
2218 return dib9000_set_gpio(fe, 0, 0, onoff);
2219}
2220
2221static int dib01x0_pmu_update(struct i2c_adapter *i2c, u16 *data, u8 len)
2222{
2223 u8 wb[4] = { 0xc >> 8, 0xc & 0xff, 0, 0 };
2224 u8 rb[2];
2225 struct i2c_msg msg[2] = {
b4d6046e
OG		 2226 {.addr = 0x1e >> 1, .flags = 0, .buf = wb, .len = 2},
2227 {.addr = 0x1e >> 1, .flags = I2C_M_RD, .buf = rb, .len = 2},
be9bae10
OG		 2228 };
2229 u8 index_data;
2230
2231 dibx000_i2c_set_speed(i2c, 250);
2232
2233 if (i2c_transfer(i2c, msg, 2) != 2)
2234 return -EIO;
2235
2236 switch (rb[0] << 8 | rb[1]) {
b4d6046e 2237 case 0:
be9bae10
OG		 2238 deb_info("Found DiB0170 rev1: This version of DiB0170 is not supported any longer.\n");
2239 return -EIO;
b4d6046e 2240 case 1:
be9bae10
OG		 2241 deb_info("Found DiB0170 rev2");
2242 break;
b4d6046e 2243 case 2:
be9bae10
OG		 2244 deb_info("Found DiB0190 rev2");
2245 break;
b4d6046e 2246 default:
be9bae10
OG		 2247 deb_info("DiB01x0 not found");
2248 return -EIO;
b4d6046e 2249 }
be9bae10
OG		 2250
2251 for (index_data = 0; index_data < len; index_data += 2) {
2252 wb[2] = (data[index_data + 1] >> 8) & 0xff;
2253 wb[3] = (data[index_data + 1]) & 0xff;
2254
2255 if (data[index_data] == 0) {
2256 wb[0] = (data[index_data] >> 8) & 0xff;
2257 wb[1] = (data[index_data]) & 0xff;
2258 msg[0].len = 2;
2259 if (i2c_transfer(i2c, msg, 2) != 2)
2260 return -EIO;
2261 wb[2] |= rb[0];
2262 wb[3] |= rb[1] & ~(3 << 4);
2263 }
2264
b4d6046e
OG		 2265 wb[0] = (data[index_data] >> 8)&0xff;
2266 wb[1] = (data[index_data])&0xff;
be9bae10
OG		 2267 msg[0].len = 4;
2268 if (i2c_transfer(i2c, &msg[0], 1) != 1)
2269 return -EIO;
2270 }
2271 return 0;
2272}
2273
2274static struct dib9000_config stk9090m_config = {
2275 .output_mpeg2_in_188_bytes = 1,
2276 .output_mode = OUTMODE_MPEG2_FIFO,
2277 .vcxo_timer = 279620,
2278 .timing_frequency = 20452225,
2279 .demod_clock_khz = 60000,
2280 .xtal_clock_khz = 30000,
2281 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2282 .subband = {
2283 2,
2284 {
2285 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0008 } }, /* GPIO 3 to 1 for VHF */
2286 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0008, 0x0000, 0x0000 } }, /* GPIO 3 to 0 for UHF */
2287 { 0 },
2288 },
2289 },
2290 .gpio_function = {
2291 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2292 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2293 },
2294};
2295
2296static struct dib9000_config nim9090md_config[2] = {
2297 {
2298 .output_mpeg2_in_188_bytes = 1,
2299 .output_mode = OUTMODE_MPEG2_FIFO,
2300 .vcxo_timer = 279620,
2301 .timing_frequency = 20452225,
2302 .demod_clock_khz = 60000,
2303 .xtal_clock_khz = 30000,
2304 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2305 }, {
2306 .output_mpeg2_in_188_bytes = 1,
2307 .output_mode = OUTMODE_DIVERSITY,
2308 .vcxo_timer = 279620,
2309 .timing_frequency = 20452225,
2310 .demod_clock_khz = 60000,
2311 .xtal_clock_khz = 30000,
2312 .if_drives = (0 << 15) | (1 << 13) | (0 << 12) | (3 << 10) | (0 << 9) | (1 << 7) | (0 << 6) | (0 << 4) | (1 << 3) | (1 << 1) | (0),
2313 .subband = {
2314 2,
2315 {
2316 { 240, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0006 } }, /* GPIO 1 and 2 to 1 for VHF */
2317 { 890, { BOARD_GPIO_COMPONENT_DEMOD, BOARD_GPIO_FUNCTION_SUBBAND_GPIO, 0x0006, 0x0000, 0x0000 } }, /* GPIO 1 and 2 to 0 for UHF */
2318 { 0 },
2319 },
2320 },
2321 .gpio_function = {
2322 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_ON, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = (0x10 & ~0x1) | 0x20 },
2323 { .component = BOARD_GPIO_COMPONENT_DEMOD, .function = BOARD_GPIO_FUNCTION_COMPONENT_OFF, .mask = 0x10 | 0x21, .direction = 0 & ~0x21, .value = 0 | 0x21 },
2324 },
2325 }
2326};
2327
2328static struct dib0090_config dib9090_dib0090_config = {
2329 .io.pll_bypass = 0,
2330 .io.pll_range = 1,
2331 .io.pll_prediv = 1,
2332 .io.pll_loopdiv = 8,
2333 .io.adc_clock_ratio = 8,
2334 .io.pll_int_loop_filt = 0,
2335 .io.clock_khz = 30000,
2336 .reset = dib90x0_tuner_reset,
2337 .sleep = dib90x0_tuner_sleep,
2338 .clkouttobamse = 0,
2339 .analog_output = 0,
2340 .use_pwm_agc = 0,
2341 .clkoutdrive = 0,
2342 .freq_offset_khz_uhf = 0,
2343 .freq_offset_khz_vhf = 0,
2344};
2345
2346static struct dib0090_config nim9090md_dib0090_config[2] = {
2347 {
2348 .io.pll_bypass = 0,
2349 .io.pll_range = 1,
2350 .io.pll_prediv = 1,
2351 .io.pll_loopdiv = 8,
2352 .io.adc_clock_ratio = 8,
2353 .io.pll_int_loop_filt = 0,
2354 .io.clock_khz = 30000,
2355 .reset = dib90x0_tuner_reset,
2356 .sleep = dib90x0_tuner_sleep,
2357 .clkouttobamse = 1,
2358 .analog_output = 0,
2359 .use_pwm_agc = 0,
2360 .clkoutdrive = 0,
2361 .freq_offset_khz_uhf = 0,
2362 .freq_offset_khz_vhf = 0,
b4d6046e 2363 }, {
be9bae10
OG		 2364 .io.pll_bypass = 0,
2365 .io.pll_range = 1,
2366 .io.pll_prediv = 1,
2367 .io.pll_loopdiv = 8,
2368 .io.adc_clock_ratio = 8,
2369 .io.pll_int_loop_filt = 0,
2370 .io.clock_khz = 30000,
2371 .reset = dib90x0_tuner_reset,
2372 .sleep = dib90x0_tuner_sleep,
2373 .clkouttobamse = 0,
2374 .analog_output = 0,
2375 .use_pwm_agc = 0,
2376 .clkoutdrive = 0,
2377 .freq_offset_khz_uhf = 0,
2378 .freq_offset_khz_vhf = 0,
2379 }
2380};
2381
2382
2383static int stk9090m_frontend_attach(struct dvb_usb_adapter *adap)
2384{
2385 struct dib0700_adapter_state *state = adap->priv;
2386 struct dib0700_state *st = adap->dev->priv;
2387 u32 fw_version;
2388
2389 /* Make use of the new i2c functions from FW 1.20 */
2390 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2391 if (fw_version >= 0x10200)
2392 st->fw_use_new_i2c_api = 1;
2393 dib0700_set_i2c_speed(adap->dev, 340);
2394
2395 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2396 msleep(20);
be9bae10
OG		 2397 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2398 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2399 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2400 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2401
2402 dib0700_ctrl_clock(adap->dev, 72, 1);
2403
b4d6046e 2404 msleep(20);
be9bae10 2405 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2406 msleep(20);
be9bae10
OG		 2407 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2408
2409 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, 0x80);
2410
2411 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2412 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2413 return -ENODEV;
2414 } else {
5b5e0928 2415 deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
be9bae10
OG		 2416 }
2417 stk9090m_config.microcode_B_fe_size = state->frontend_firmware->size;
2418 stk9090m_config.microcode_B_fe_buffer = state->frontend_firmware->data;
2419
77eed219 2420 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &stk9090m_config);
be9bae10 2421
77eed219 2422 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 2423}
2424
2425static int dib9090_tuner_attach(struct dvb_usb_adapter *adap)
2426{
2427 struct dib0700_adapter_state *state = adap->priv;
77eed219 2428 struct i2c_adapter *i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2429 u16 data_dib190[10] = {
2430 1, 0x1374,
2431 2, 0x01a2,
2432 7, 0x0020,
2433 0, 0x00ef,
2434 8, 0x0486,
2435 };
2436
765bb861
AB		 2437 if (!IS_ENABLED(CONFIG_DVB_DIB9000))
2438 return -ENODEV;
77eed219 2439 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &dib9090_dib0090_config) == NULL)
be9bae10 2440 return -ENODEV;
77eed219 2441 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
765bb861
AB		 2442 if (!i2c)
2443 return -ENODEV;
be9bae10
OG		 2444 if (dib01x0_pmu_update(i2c, data_dib190, 10) != 0)
2445 return -ENODEV;
d1190024 2446 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2447 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10 2448 return -ENODEV;
b4d6046e 2449 release_firmware(state->frontend_firmware);
be9bae10
OG		 2450 return 0;
2451}
2452
2453static int nim9090md_frontend_attach(struct dvb_usb_adapter *adap)
2454{
2455 struct dib0700_adapter_state *state = adap->priv;
2456 struct dib0700_state *st = adap->dev->priv;
2457 struct i2c_adapter *i2c;
2458 struct dvb_frontend *fe_slave;
2459 u32 fw_version;
2460
2461 /* Make use of the new i2c functions from FW 1.20 */
2462 dib0700_get_version(adap->dev, NULL, NULL, &fw_version, NULL);
2463 if (fw_version >= 0x10200)
2464 st->fw_use_new_i2c_api = 1;
2465 dib0700_set_i2c_speed(adap->dev, 340);
2466
2467 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 2468 msleep(20);
be9bae10
OG		 2469 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
2470 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
2471 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
2472 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
2473
2474 dib0700_ctrl_clock(adap->dev, 72, 1);
2475
b4d6046e 2476 msleep(20);
be9bae10 2477 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 2478 msleep(20);
be9bae10
OG		 2479 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
2480
2481 if (request_firmware(&state->frontend_firmware, "dib9090.fw", &adap->dev->udev->dev)) {
2482 deb_info("%s: Upload failed. (file not found?)\n", __func__);
2483 return -EIO;
2484 } else {
5b5e0928 2485 deb_info("%s: firmware read %zu bytes.\n", __func__, state->frontend_firmware->size);
be9bae10
OG		 2486 }
2487 nim9090md_config[0].microcode_B_fe_size = state->frontend_firmware->size;
2488 nim9090md_config[0].microcode_B_fe_buffer = state->frontend_firmware->data;
2489 nim9090md_config[1].microcode_B_fe_size = state->frontend_firmware->size;
2490 nim9090md_config[1].microcode_B_fe_buffer = state->frontend_firmware->data;
2491
2492 dib9000_i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, 0x80);
77eed219 2493 adap->fe_adap[0].fe = dvb_attach(dib9000_attach, &adap->dev->i2c_adap, 0x80, &nim9090md_config[0]);
be9bae10 2494
77eed219 2495 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 2496 return -ENODEV;
2497
77eed219 2498 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_3_4, 0);
be9bae10
OG		 2499 dib9000_i2c_enumeration(i2c, 1, 0x12, 0x82);
2500
2501 fe_slave = dvb_attach(dib9000_attach, i2c, 0x82, &nim9090md_config[1]);
77eed219 2502 dib9000_set_slave_frontend(adap->fe_adap[0].fe, fe_slave);
be9bae10
OG		 2503
2504 return fe_slave == NULL ? -ENODEV : 0;
03245a5e
OG		 2505}
2506
be9bae10
OG		 2507static int nim9090md_tuner_attach(struct dvb_usb_adapter *adap)
2508{
2509 struct dib0700_adapter_state *state = adap->priv;
2510 struct i2c_adapter *i2c;
2511 struct dvb_frontend *fe_slave;
2512 u16 data_dib190[10] = {
2513 1, 0x5374,
2514 2, 0x01ae,
2515 7, 0x0020,
2516 0, 0x00ef,
2517 8, 0x0406,
2518 };
765bb861
AB		 2519 if (!IS_ENABLED(CONFIG_DVB_DIB9000))
2520 return -ENODEV;
77eed219
MK		 2521 i2c = dib9000_get_tuner_interface(adap->fe_adap[0].fe);
2522 if (dvb_attach(dib0090_fw_register, adap->fe_adap[0].fe, i2c, &nim9090md_dib0090_config[0]) == NULL)
be9bae10 2523 return -ENODEV;
77eed219 2524 i2c = dib9000_get_i2c_master(adap->fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_1_2, 0);
765bb861
AB		 2525 if (!i2c)
2526 return -ENODEV;
be9bae10
OG		 2527 if (dib01x0_pmu_update(i2c, data_dib190, 10) < 0)
2528 return -ENODEV;
d1190024
OG		 2529
2530 dib0700_set_i2c_speed(adap->dev, 1500);
77eed219 2531 if (dib9000_firmware_post_pll_init(adap->fe_adap[0].fe) < 0)
be9bae10
OG		 2532 return -ENODEV;
2533
77eed219 2534 fe_slave = dib9000_get_slave_frontend(adap->fe_adap[0].fe, 1);
be9bae10 2535 if (fe_slave != NULL) {
77eed219 2536 i2c = dib9000_get_component_bus_interface(adap->fe_adap[0].fe);
be9bae10
OG		 2537 dib9000_set_i2c_adapter(fe_slave, i2c);
2538
2539 i2c = dib9000_get_tuner_interface(fe_slave);
2540 if (dvb_attach(dib0090_fw_register, fe_slave, i2c, &nim9090md_dib0090_config[1]) == NULL)
2541 return -ENODEV;
77eed219 2542 fe_slave->dvb = adap->fe_adap[0].fe->dvb;
d1190024 2543 dib9000_fw_set_component_bus_speed(adap->fe_adap[0].fe, 1500);
be9bae10
OG		 2544 if (dib9000_firmware_post_pll_init(fe_slave) < 0)
2545 return -ENODEV;
2546 }
b4d6046e 2547 release_firmware(state->frontend_firmware);
be9bae10
OG		 2548
2549 return 0;
2550}
2551
2552/* NIM7090 */
5e9c85d9 2553static int dib7090p_get_best_sampling(struct dvb_frontend *fe , struct dibx090p_best_adc *adc)
be9bae10
OG		 2554{
2555 u8 spur = 0, prediv = 0, loopdiv = 0, min_prediv = 1, max_prediv = 1;
2556
2557 u16 xtal = 12000;
2558 u32 fcp_min = 1900; /* PLL Minimum Frequency comparator KHz */
2559 u32 fcp_max = 20000; /* PLL Maximum Frequency comparator KHz */
2560 u32 fdem_max = 76000;
2561 u32 fdem_min = 69500;
2562 u32 fcp = 0, fs = 0, fdem = 0;
2563 u32 harmonic_id = 0;
2564
2565 adc->pll_loopdiv = loopdiv;
2566 adc->pll_prediv = prediv;
2567 adc->timf = 0;
2568
2569 deb_info("bandwidth = %d fdem_min =%d", fe->dtv_property_cache.bandwidth_hz, fdem_min);
2570
2571 /* Find Min and Max prediv */
b4d6046e 2572 while ((xtal/max_prediv) >= fcp_min)
be9bae10
OG		 2573 max_prediv++;
2574
2575 max_prediv--;
2576 min_prediv = max_prediv;
b4d6046e 2577 while ((xtal/min_prediv) <= fcp_max) {
be9bae10 2578 min_prediv--;
b4d6046e 2579 if (min_prediv == 1)
be9bae10
OG		 2580 break;
2581 }
2582 deb_info("MIN prediv = %d : MAX prediv = %d", min_prediv, max_prediv);
2583
2584 min_prediv = 2;
2585
b4d6046e 2586 for (prediv = min_prediv ; prediv < max_prediv; prediv++) {
be9bae10 2587 fcp = xtal / prediv;
b4d6046e
OG		 2588 if (fcp > fcp_min && fcp < fcp_max) {
2589 for (loopdiv = 1 ; loopdiv < 64 ; loopdiv++) {
be9bae10
OG		 2590 fdem = ((xtal/prediv) * loopdiv);
2591 fs = fdem / 4;
2592 /* test min/max system restrictions */
2593
b4d6046e 2594 if ((fdem >= fdem_min) && (fdem <= fdem_max) && (fs >= fe->dtv_property_cache.bandwidth_hz/1000)) {
be9bae10
OG		 2595 spur = 0;
2596 /* test fs harmonics positions */
b4d6046e
OG		 2597 for (harmonic_id = (fe->dtv_property_cache.frequency / (1000*fs)) ; harmonic_id <= ((fe->dtv_property_cache.frequency / (1000*fs))+1) ; harmonic_id++) {
2598 if (((fs*harmonic_id) >= ((fe->dtv_property_cache.frequency/1000) - (fe->dtv_property_cache.bandwidth_hz/2000))) && ((fs*harmonic_id) <= ((fe->dtv_property_cache.frequency/1000) + (fe->dtv_property_cache.bandwidth_hz/2000)))) {
be9bae10
OG		 2599 spur = 1;
2600 break;
2601 }
2602 }
2603
b4d6046e 2604 if (!spur) {
be9bae10
OG		 2605 adc->pll_loopdiv = loopdiv;
2606 adc->pll_prediv = prediv;
b4d6046e
OG		 2607 adc->timf = 2396745143UL/fdem*(1 << 9);
2608 adc->timf += ((2396745143UL%fdem) << 9)/fdem;
be9bae10
OG		 2609 deb_info("loopdiv=%i prediv=%i timf=%i", loopdiv, prediv, adc->timf);
2610 break;
2611 }
2612 }
2613 }
2614 }
2615 if (!spur)
2616 break;
2617 }
2618
2619
b4d6046e 2620 if (adc->pll_loopdiv == 0 && adc->pll_prediv == 0)
be9bae10 2621 return -EINVAL;
b4d6046e 2622 else
be9bae10
OG		 2623 return 0;
2624}
2625
14d24d14 2626static int dib7090_agc_startup(struct dvb_frontend *fe)
be9bae10
OG		 2627{
2628 struct dvb_usb_adapter *adap = fe->dvb->priv;
2629 struct dib0700_adapter_state *state = adap->priv;
2630 struct dibx000_bandwidth_config pll;
2631 u16 target;
5e9c85d9 2632 struct dibx090p_best_adc adc;
be9bae10
OG		 2633 int ret;
2634
14d24d14 2635 ret = state->set_param_save(fe);
be9bae10
OG		 2636 if (ret < 0)
2637 return ret;
2638
2639 memset(&pll, 0, sizeof(struct dibx000_bandwidth_config));
2640 dib0090_pwm_gain_reset(fe);
6724a2f4 2641 target = (dib0090_get_wbd_target(fe) * 8 + 1) / 2;
8abe4a0a 2642 state->dib7000p_ops.set_wbd_ref(fe, target);
be9bae10 2643
b4d6046e 2644 if (dib7090p_get_best_sampling(fe, &adc) == 0) {
be9bae10
OG		 2645 pll.pll_ratio = adc.pll_loopdiv;
2646 pll.pll_prediv = adc.pll_prediv;
2647
8abe4a0a
MCC		 2648 state->dib7000p_ops.update_pll(fe, &pll);
2649 state->dib7000p_ops.ctrl_timf(fe, DEMOD_TIMF_SET, adc.timf);
be9bae10
OG		 2650 }
2651 return 0;
2652}
2653
2e802861
OG		 2654static int dib7090_agc_restart(struct dvb_frontend *fe, u8 restart)
2655{
2656 deb_info("AGC restart callback: %d", restart);
2657 if (restart == 0) /* before AGC startup */
2658 dib0090_set_dc_servo(fe, 1);
2659 return 0;
2660}
2661
f45f513a 2662static int tfe7790p_update_lna(struct dvb_frontend *fe, u16 agc_global)
6724a2f4 2663{
8abe4a0a
MCC		 2664 struct dvb_usb_adapter *adap = fe->dvb->priv;
2665 struct dib0700_adapter_state *state = adap->priv;
2666
f45f513a 2667 deb_info("update LNA: agc global=%i", agc_global);
6724a2f4 2668
f45f513a 2669 if (agc_global < 25000) {
8abe4a0a
MCC		 2670 state->dib7000p_ops.set_gpio(fe, 8, 0, 0);
2671 state->dib7000p_ops.set_agc1_min(fe, 0);
6724a2f4 2672 } else {
8abe4a0a
MCC		 2673 state->dib7000p_ops.set_gpio(fe, 8, 0, 1);
2674 state->dib7000p_ops.set_agc1_min(fe, 32768);
6724a2f4
OG		 2675 }
2676
2677 return 0;
2678}
2679
be9bae10 2680static struct dib0090_wbd_slope dib7090_wbd_table[] = {
b4d6046e
OG		 2681 { 380, 81, 850, 64, 540, 4},
2682 { 860, 51, 866, 21, 375, 4},
2683 {1700, 0, 250, 0, 100, 6},
2684 {2600, 0, 250, 0, 100, 6},
2685 { 0xFFFF, 0, 0, 0, 0, 0},
03245a5e
OG		 2686};
2687
a685dbbc 2688static struct dibx000_agc_config dib7090_agc_config[2] = {
be9bae10
OG		 2689 {
2690 .band_caps = BAND_UHF,
2691 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2692 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2693 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2694
b4d6046e
OG		 2695 .inv_gain = 687,
2696 .time_stabiliz = 10,
be9bae10 2697
b4d6046e
OG		 2698 .alpha_level = 0,
2699 .thlock = 118,
be9bae10 2700
b4d6046e
OG		 2701 .wbd_inv = 0,
2702 .wbd_ref = 1200,
2703 .wbd_sel = 3,
2704 .wbd_alpha = 5,
be9bae10 2705
b4d6046e 2706 .agc1_max = 65535,
59501bb7 2707 .agc1_min = 32768,
be9bae10 2708
b4d6046e
OG		 2709 .agc2_max = 65535,
2710 .agc2_min = 0,
be9bae10 2711
b4d6046e
OG		 2712 .agc1_pt1 = 0,
2713 .agc1_pt2 = 32,
2714 .agc1_pt3 = 114,
2715 .agc1_slope1 = 143,
2716 .agc1_slope2 = 144,
2717 .agc2_pt1 = 114,
2718 .agc2_pt2 = 227,
2719 .agc2_slope1 = 116,
2720 .agc2_slope2 = 117,
be9bae10 2721
b4d6046e
OG		 2722 .alpha_mant = 18,
2723 .alpha_exp = 0,
2724 .beta_mant = 20,
2725 .beta_exp = 59,
be9bae10 2726
b4d6046e 2727 .perform_agc_softsplit = 0,
be9bae10
OG		 2728 } , {
2729 .band_caps = BAND_FM | BAND_VHF | BAND_CBAND,
2730 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=1, P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
2731 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0, P_agc_nb_est=5, P_agc_write=0 */
b4d6046e 2732 .setup = (0 << 15) | (0 << 14) | (5 << 11) | (0 << 10) | (0 << 9) | (0 << 8) | (3 << 5) | (0 << 4) | (5 << 1) | (0 << 0),
be9bae10 2733
b4d6046e
OG		 2734 .inv_gain = 732,
2735 .time_stabiliz = 10,
be9bae10 2736
b4d6046e
OG		 2737 .alpha_level = 0,
2738 .thlock = 118,
be9bae10 2739
b4d6046e
OG		 2740 .wbd_inv = 0,
2741 .wbd_ref = 1200,
2742 .wbd_sel = 3,
2743 .wbd_alpha = 5,
be9bae10 2744
b4d6046e
OG		 2745 .agc1_max = 65535,
2746 .agc1_min = 0,
be9bae10 2747
b4d6046e
OG		 2748 .agc2_max = 65535,
2749 .agc2_min = 0,
be9bae10 2750
b4d6046e
OG		 2751 .agc1_pt1 = 0,
2752 .agc1_pt2 = 0,
2753 .agc1_pt3 = 98,
2754 .agc1_slope1 = 0,
2755 .agc1_slope2 = 167,
7f4d527f 2756 .agc2_pt1 = 98,
b4d6046e
OG		 2757 .agc2_pt2 = 255,
2758 .agc2_slope1 = 104,
2759 .agc2_slope2 = 0,
be9bae10 2760
b4d6046e
OG		 2761 .alpha_mant = 18,
2762 .alpha_exp = 0,
2763 .beta_mant = 20,
2764 .beta_exp = 59,
be9bae10 2765
b4d6046e 2766 .perform_agc_softsplit = 0,
be9bae10
OG		 2767 }
2768};
2769
2770static struct dibx000_bandwidth_config dib7090_clock_config_12_mhz = {
09628b2c
MCC		 2771 .internal = 60000,
2772 .sampling = 15000,
2773 .pll_prediv = 1,
2774 .pll_ratio = 5,
2775 .pll_range = 0,
2776 .pll_reset = 0,
2777 .pll_bypass = 0,
2778 .enable_refdiv = 0,
2779 .bypclk_div = 0,
2780 .IO_CLK_en_core = 1,
2781 .ADClkSrc = 1,
2782 .modulo = 2,
2783 .sad_cfg = (3 << 14) | (1 << 12) | (524 << 0),
2784 .ifreq = (0 << 25) | 0,
2785 .timf = 20452225,
2786 .xtal_hz = 15000000,
be9bae10
OG		 2787};
2788
2789static struct dib7000p_config nim7090_dib7000p_config = {
2790 .output_mpeg2_in_188_bytes = 1,
2791 .hostbus_diversity = 1,
2792 .tuner_is_baseband = 1,
59501bb7 2793 .update_lna = tfe7790p_update_lna, /* GPIO used is the same as TFE7790 */
be9bae10
OG		 2794
2795 .agc_config_count = 2,
2796 .agc = dib7090_agc_config,
2797
2798 .bw = &dib7090_clock_config_12_mhz,
2799
2800 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2801 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2802 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2803
2804 .pwm_freq_div = 0,
2805
2806 .agc_control = dib7090_agc_restart,
2807
2808 .spur_protect = 0,
2809 .disable_sample_and_hold = 0,
2810 .enable_current_mirror = 0,
2811 .diversity_delay = 0,
2812
2813 .output_mode = OUTMODE_MPEG2_FIFO,
2814 .enMpegOutput = 1,
2815};
2816
59501bb7
OG		 2817static int tfe7090p_pvr_update_lna(struct dvb_frontend *fe, u16 agc_global)
2818{
8abe4a0a
MCC		 2819 struct dvb_usb_adapter *adap = fe->dvb->priv;
2820 struct dib0700_adapter_state *state = adap->priv;
2821
59501bb7
OG		 2822 deb_info("TFE7090P-PVR update LNA: agc global=%i", agc_global);
2823 if (agc_global < 25000) {
8abe4a0a
MCC		 2824 state->dib7000p_ops.set_gpio(fe, 5, 0, 0);
2825 state->dib7000p_ops.set_agc1_min(fe, 0);
59501bb7 2826 } else {
8abe4a0a
MCC		 2827 state->dib7000p_ops.set_gpio(fe, 5, 0, 1);
2828 state->dib7000p_ops.set_agc1_min(fe, 32768);
59501bb7
OG		 2829 }
2830
2831 return 0;
2832}
2833
be9bae10
OG		 2834static struct dib7000p_config tfe7090pvr_dib7000p_config[2] = {
2835 {
2836 .output_mpeg2_in_188_bytes = 1,
2837 .hostbus_diversity = 1,
2838 .tuner_is_baseband = 1,
59501bb7 2839 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2840
2841 .agc_config_count = 2,
2842 .agc = dib7090_agc_config,
2843
2844 .bw = &dib7090_clock_config_12_mhz,
2845
2846 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2847 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2848 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2849
2850 .pwm_freq_div = 0,
2851
2852 .agc_control = dib7090_agc_restart,
2853
2854 .spur_protect = 0,
2855 .disable_sample_and_hold = 0,
2856 .enable_current_mirror = 0,
2857 .diversity_delay = 0,
2858
2859 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2860 .default_i2c_addr = 0x90,
2861 .enMpegOutput = 1,
b4d6046e 2862 }, {
be9bae10
OG		 2863 .output_mpeg2_in_188_bytes = 1,
2864 .hostbus_diversity = 1,
2865 .tuner_is_baseband = 1,
59501bb7 2866 .update_lna = tfe7090p_pvr_update_lna,
be9bae10
OG		 2867
2868 .agc_config_count = 2,
2869 .agc = dib7090_agc_config,
2870
2871 .bw = &dib7090_clock_config_12_mhz,
2872
2873 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2874 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2875 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2876
2877 .pwm_freq_div = 0,
2878
2879 .agc_control = dib7090_agc_restart,
2880
2881 .spur_protect = 0,
2882 .disable_sample_and_hold = 0,
2883 .enable_current_mirror = 0,
2884 .diversity_delay = 0,
2885
2886 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2887 .default_i2c_addr = 0x92,
2888 .enMpegOutput = 0,
2889 }
2890};
2891
8abe4a0a 2892static struct dib0090_config nim7090_dib0090_config = {
be9bae10
OG		 2893 .io.clock_khz = 12000,
2894 .io.pll_bypass = 0,
2895 .io.pll_range = 0,
2896 .io.pll_prediv = 3,
2897 .io.pll_loopdiv = 6,
2898 .io.adc_clock_ratio = 0,
2899 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2900
2901 .freq_offset_khz_uhf = 0,
2902 .freq_offset_khz_vhf = 0,
2903
be9bae10
OG		 2904 .clkouttobamse = 1,
2905 .analog_output = 0,
2906
2907 .wbd_vhf_offset = 0,
2908 .wbd_cband_offset = 0,
2909 .use_pwm_agc = 1,
2910 .clkoutdrive = 0,
2911
2912 .fref_clock_ratio = 0,
2913
2914 .wbd = dib7090_wbd_table,
2915
2916 .ls_cfg_pad_drv = 0,
2917 .data_tx_drv = 0,
2918 .low_if = NULL,
2919 .in_soc = 1,
2920};
2921
f45f513a 2922static struct dib7000p_config tfe7790p_dib7000p_config = {
b293f304
OG		 2923 .output_mpeg2_in_188_bytes = 1,
2924 .hostbus_diversity = 1,
2925 .tuner_is_baseband = 1,
f45f513a 2926 .update_lna = tfe7790p_update_lna,
b293f304
OG		 2927
2928 .agc_config_count = 2,
2929 .agc = dib7090_agc_config,
2930
2931 .bw = &dib7090_clock_config_12_mhz,
2932
2933 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
2934 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
2935 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
2936
2937 .pwm_freq_div = 0,
2938
2939 .agc_control = dib7090_agc_restart,
2940
2941 .spur_protect = 0,
2942 .disable_sample_and_hold = 0,
2943 .enable_current_mirror = 0,
2944 .diversity_delay = 0,
2945
2946 .output_mode = OUTMODE_MPEG2_PAR_GATED_CLK,
2947 .enMpegOutput = 1,
2948};
2949
8abe4a0a 2950static struct dib0090_config tfe7790p_dib0090_config = {
b293f304
OG		 2951 .io.clock_khz = 12000,
2952 .io.pll_bypass = 0,
2953 .io.pll_range = 0,
2954 .io.pll_prediv = 3,
2955 .io.pll_loopdiv = 6,
2956 .io.adc_clock_ratio = 0,
2957 .io.pll_int_loop_filt = 0,
b293f304
OG		 2958
2959 .freq_offset_khz_uhf = 0,
2960 .freq_offset_khz_vhf = 0,
2961
b293f304
OG		 2962 .clkouttobamse = 1,
2963 .analog_output = 0,
2964
2965 .wbd_vhf_offset = 0,
2966 .wbd_cband_offset = 0,
2967 .use_pwm_agc = 1,
2968 .clkoutdrive = 0,
2969
2970 .fref_clock_ratio = 0,
2971
f45f513a 2972 .wbd = dib7090_wbd_table,
b293f304
OG		 2973
2974 .ls_cfg_pad_drv = 0,
2975 .data_tx_drv = 0,
2976 .low_if = NULL,
2977 .in_soc = 1,
f45f513a
OG		 2978 .force_cband_input = 0,
2979 .is_dib7090e = 0,
b293f304
OG		 2980 .force_crystal_mode = 1,
2981};
2982
8abe4a0a 2983static struct dib0090_config tfe7090pvr_dib0090_config[2] = {
be9bae10
OG		 2984 {
2985 .io.clock_khz = 12000,
2986 .io.pll_bypass = 0,
2987 .io.pll_range = 0,
2988 .io.pll_prediv = 3,
2989 .io.pll_loopdiv = 6,
2990 .io.adc_clock_ratio = 0,
2991 .io.pll_int_loop_filt = 0,
be9bae10
OG		 2992
2993 .freq_offset_khz_uhf = 50,
2994 .freq_offset_khz_vhf = 70,
2995
be9bae10
OG		 2996 .clkouttobamse = 1,
2997 .analog_output = 0,
2998
2999 .wbd_vhf_offset = 0,
3000 .wbd_cband_offset = 0,
3001 .use_pwm_agc = 1,
3002 .clkoutdrive = 0,
3003
3004 .fref_clock_ratio = 0,
3005
3006 .wbd = dib7090_wbd_table,
3007
3008 .ls_cfg_pad_drv = 0,
3009 .data_tx_drv = 0,
3010 .low_if = NULL,
3011 .in_soc = 1,
b4d6046e 3012 }, {
be9bae10
OG		 3013 .io.clock_khz = 12000,
3014 .io.pll_bypass = 0,
3015 .io.pll_range = 0,
3016 .io.pll_prediv = 3,
3017 .io.pll_loopdiv = 6,
3018 .io.adc_clock_ratio = 0,
3019 .io.pll_int_loop_filt = 0,
be9bae10
OG		 3020
3021 .freq_offset_khz_uhf = -50,
3022 .freq_offset_khz_vhf = -70,
3023
be9bae10
OG		 3024 .clkouttobamse = 1,
3025 .analog_output = 0,
3026
3027 .wbd_vhf_offset = 0,
3028 .wbd_cband_offset = 0,
3029 .use_pwm_agc = 1,
3030 .clkoutdrive = 0,
3031
3032 .fref_clock_ratio = 0,
3033
3034 .wbd = dib7090_wbd_table,
3035
3036 .ls_cfg_pad_drv = 0,
3037 .data_tx_drv = 0,
3038 .low_if = NULL,
3039 .in_soc = 1,
3040 }
3041};
3042
3043static int nim7090_frontend_attach(struct dvb_usb_adapter *adap)
3044{
8abe4a0a
MCC		 3045 struct dib0700_adapter_state *state = adap->priv;
3046
3047 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3048 return -ENODEV;
3049
be9bae10 3050 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 3051 msleep(20);
be9bae10
OG		 3052 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3053 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3054 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3055 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3056
b4d6046e 3057 msleep(20);
be9bae10 3058 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3059 msleep(20);
be9bae10 3060 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
03245a5e 3061
8abe4a0a
MCC		 3062 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x10, &nim7090_dib7000p_config) != 0) {
3063 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 3064 dvb_detach(state->dib7000p_ops.set_wbd_ref);
be9bae10
OG		 3065 return -ENODEV;
3066 }
8abe4a0a 3067 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &nim7090_dib7000p_config);
03245a5e 3068
77eed219 3069 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
03245a5e
OG		 3070}
3071
be9bae10 3072static int nim7090_tuner_attach(struct dvb_usb_adapter *adap)
03245a5e 3073{
be9bae10 3074 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3075 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3076
7214f42c
JL		 3077 nim7090_dib0090_config.reset = st->dib7000p_ops.tuner_sleep;
3078 nim7090_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep;
8abe4a0a 3079 nim7090_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3080
77eed219 3081 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &nim7090_dib0090_config) == NULL)
be9bae10 3082 return -ENODEV;
03245a5e 3083
8abe4a0a 3084 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
03245a5e 3085
77eed219
MK		 3086 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3087 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3088 return 0;
03245a5e
OG		 3089}
3090
be9bae10 3091static int tfe7090pvr_frontend0_attach(struct dvb_usb_adapter *adap)
03245a5e 3092{
be9bae10 3093 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3094 struct dib0700_adapter_state *state = adap->priv;
3095
3096 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3097 return -ENODEV;
be9bae10
OG		 3098
3099 /* The TFE7090 requires the dib0700 to not be in master mode */
3100 st->disable_streaming_master_mode = 1;
3101
03245a5e 3102 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
b4d6046e 3103 msleep(20);
03245a5e
OG		 3104 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3105 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3106 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
03245a5e
OG		 3107 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3108
b4d6046e 3109 msleep(20);
03245a5e 3110 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
b4d6046e 3111 msleep(20);
03245a5e
OG		 3112 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3113
be9bae10 3114 /* initialize IC 0 */
8abe4a0a
MCC		 3115 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 1, 0x20, &tfe7090pvr_dib7000p_config[0]) != 0) {
3116 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 3117 dvb_detach(state->dib7000p_ops.set_wbd_ref);
be9bae10
OG		 3118 return -ENODEV;
3119 }
03245a5e 3120
be9bae10 3121 dib0700_set_i2c_speed(adap->dev, 340);
8abe4a0a 3122 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x90, &tfe7090pvr_dib7000p_config[0]);
77eed219 3123 if (adap->fe_adap[0].fe == NULL)
be9bae10
OG		 3124 return -ENODEV;
3125
8abe4a0a 3126 state->dib7000p_ops.slave_reset(adap->fe_adap[0].fe);
71682520 3127
be9bae10
OG		 3128 return 0;
3129}
3130
3131static int tfe7090pvr_frontend1_attach(struct dvb_usb_adapter *adap)
3132{
3133 struct i2c_adapter *i2c;
8abe4a0a 3134 struct dib0700_adapter_state *state = adap->priv;
be9bae10 3135
77eed219 3136 if (adap->dev->adapter[0].fe_adap[0].fe == NULL) {
be9bae10
OG		 3137 err("the master dib7090 has to be initialized first");
3138 return -ENODEV; /* the master device has not been initialized */
3139 }
3140
8abe4a0a
MCC		 3141 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3142 return -ENODEV;
3143
3144 i2c = state->dib7000p_ops.get_i2c_master(adap->dev->adapter[0].fe_adap[0].fe, DIBX000_I2C_INTERFACE_GPIO_6_7, 1);
3145 if (state->dib7000p_ops.i2c_enumeration(i2c, 1, 0x10, &tfe7090pvr_dib7000p_config[1]) != 0) {
3146 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n", __func__);
eb0c1994 3147 dvb_detach(state->dib7000p_ops.set_wbd_ref);
be9bae10
OG		 3148 return -ENODEV;
3149 }
3150
8abe4a0a 3151 adap->fe_adap[0].fe = state->dib7000p_ops.init(i2c, 0x92, &tfe7090pvr_dib7000p_config[1]);
be9bae10
OG		 3152 dib0700_set_i2c_speed(adap->dev, 200);
3153
77eed219 3154 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
be9bae10
OG		 3155}
3156
3157static int tfe7090pvr_tuner0_attach(struct dvb_usb_adapter *adap)
3158{
3159 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3160 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3161
3162 tfe7090pvr_dib0090_config[0].reset = st->dib7000p_ops.tuner_sleep;
3163 tfe7090pvr_dib0090_config[0].sleep = st->dib7000p_ops.tuner_sleep;
3164 tfe7090pvr_dib0090_config[0].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3165
77eed219 3166 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[0]) == NULL)
be9bae10
OG		 3167 return -ENODEV;
3168
8abe4a0a 3169 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3170
77eed219
MK		 3171 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3172 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10
OG		 3173 return 0;
3174}
3175
3176static int tfe7090pvr_tuner1_attach(struct dvb_usb_adapter *adap)
3177{
3178 struct dib0700_adapter_state *st = adap->priv;
8abe4a0a
MCC		 3179 struct i2c_adapter *tun_i2c = st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3180
3181 tfe7090pvr_dib0090_config[1].reset = st->dib7000p_ops.tuner_sleep;
3182 tfe7090pvr_dib0090_config[1].sleep = st->dib7000p_ops.tuner_sleep;
3183 tfe7090pvr_dib0090_config[1].get_adc_power = st->dib7000p_ops.get_adc_power;
be9bae10 3184
77eed219 3185 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c, &tfe7090pvr_dib0090_config[1]) == NULL)
be9bae10
OG		 3186 return -ENODEV;
3187
8abe4a0a 3188 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
be9bae10 3189
77eed219
MK		 3190 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3191 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
be9bae10 3192 return 0;
03245a5e 3193}
ba3fe3a9 3194
f45f513a 3195static int tfe7790p_frontend_attach(struct dvb_usb_adapter *adap)
b293f304
OG		 3196{
3197 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3198 struct dib0700_adapter_state *state = adap->priv;
3199
3200 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3201 return -ENODEV;
b293f304 3202
f45f513a 3203 /* The TFE7790P requires the dib0700 to not be in master mode */
b293f304
OG		 3204 st->disable_streaming_master_mode = 1;
3205
3206 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3207 msleep(20);
3208 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3209 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3210 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3211 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3212 msleep(20);
3213 dib0700_ctrl_clock(adap->dev, 72, 1);
3214 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3215 msleep(20);
3216 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3217
8abe4a0a 3218 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap,
f45f513a 3219 1, 0x10, &tfe7790p_dib7000p_config) != 0) {
8abe4a0a 3220 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
b293f304 3221 __func__);
eb0c1994 3222 dvb_detach(state->dib7000p_ops.set_wbd_ref);
b293f304
OG		 3223 return -ENODEV;
3224 }
8abe4a0a 3225 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap,
f45f513a 3226 0x80, &tfe7790p_dib7000p_config);
b293f304
OG		 3227
3228 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
3229}
3230
f45f513a 3231static int tfe7790p_tuner_attach(struct dvb_usb_adapter *adap)
6724a2f4
OG		 3232{
3233 struct dib0700_adapter_state *st = adap->priv;
3234 struct i2c_adapter *tun_i2c =
8abe4a0a
MCC		 3235 st->dib7000p_ops.get_i2c_tuner(adap->fe_adap[0].fe);
3236
3237
3238 tfe7790p_dib0090_config.reset = st->dib7000p_ops.tuner_sleep;
3239 tfe7790p_dib0090_config.sleep = st->dib7000p_ops.tuner_sleep;
3240 tfe7790p_dib0090_config.get_adc_power = st->dib7000p_ops.get_adc_power;
6724a2f4
OG		 3241
3242 if (dvb_attach(dib0090_register, adap->fe_adap[0].fe, tun_i2c,
f45f513a 3243 &tfe7790p_dib0090_config) == NULL)
6724a2f4
OG		 3244 return -ENODEV;
3245
8abe4a0a 3246 st->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
6724a2f4
OG		 3247
3248 st->set_param_save = adap->fe_adap[0].fe->ops.tuner_ops.set_params;
3249 adap->fe_adap[0].fe->ops.tuner_ops.set_params = dib7090_agc_startup;
3250 return 0;
3251}
3252
01373a5c
PB		 3253/* STK7070PD */
3254static struct dib7000p_config stk7070pd_dib7000p_config[2] = {
3255 {
3256 .output_mpeg2_in_188_bytes = 1,
3257
3258 .agc_config_count = 1,
3259 .agc = &dib7070_agc_config,
3260 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3261 .tuner_is_baseband = 1,
3262 .spur_protect = 1,
01373a5c
PB		 3263
3264 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3265 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3266 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3267
3268 .hostbus_diversity = 1,
3269 }, {
3270 .output_mpeg2_in_188_bytes = 1,
3271
3272 .agc_config_count = 1,
3273 .agc = &dib7070_agc_config,
3274 .bw = &dib7070_bw_config_12_mhz,
3cb2c39d
PB		 3275 .tuner_is_baseband = 1,
3276 .spur_protect = 1,
01373a5c
PB		 3277
3278 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
3279 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
3280 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
3281
3282 .hostbus_diversity = 1,
3283 }
3284};
3285
52fd5b2e 3286static void stk7070pd_init(struct dvb_usb_device *dev)
01373a5c 3287{
52fd5b2e 3288 dib0700_set_gpio(dev, GPIO6, GPIO_OUT, 1);
01373a5c 3289 msleep(10);
52fd5b2e
JS		 3290 dib0700_set_gpio(dev, GPIO9, GPIO_OUT, 1);
3291 dib0700_set_gpio(dev, GPIO4, GPIO_OUT, 1);
3292 dib0700_set_gpio(dev, GPIO7, GPIO_OUT, 1);
3293 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 0);
01373a5c 3294
52fd5b2e 3295 dib0700_ctrl_clock(dev, 72, 1);
01373a5c
PB		 3296
3297 msleep(10);
52fd5b2e
JS		 3298 dib0700_set_gpio(dev, GPIO10, GPIO_OUT, 1);
3299}
3300
3301static int stk7070pd_frontend_attach0(struct dvb_usb_adapter *adap)
3302{
8abe4a0a
MCC		 3303 struct dib0700_adapter_state *state = adap->priv;
3304
3305 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3306 return -ENODEV;
3307
52fd5b2e
JS		 3308 stk7070pd_init(adap->dev);
3309
01373a5c
PB		 3310 msleep(10);
3311 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3312
8abe4a0a 3313 if (state->dib7000p_ops.i2c_enumeration(&adap->dev->i2c_adap, 2, 18,
83c4fdf7 3314 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3315 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
83c4fdf7 3316 __func__);
eb0c1994 3317 dvb_detach(state->dib7000p_ops.set_wbd_ref);
83c4fdf7
DH		 3318 return -ENODEV;
3319 }
01373a5c 3320
8abe4a0a 3321 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x80, &stk7070pd_dib7000p_config[0]);
77eed219 3322 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3323}
3324
3325static int stk7070pd_frontend_attach1(struct dvb_usb_adapter *adap)
3326{
8abe4a0a
MCC		 3327 struct dib0700_adapter_state *state = adap->priv;
3328
3329 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3330 return -ENODEV;
3331
3332 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x82, &stk7070pd_dib7000p_config[1]);
77eed219 3333 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01373a5c
PB		 3334}
3335
d43272a4 3336static int novatd_read_status_override(struct dvb_frontend *fe,
0df289a2 3337 enum fe_status *stat)
d43272a4
JS		 3338{
3339 struct dvb_usb_adapter *adap = fe->dvb->priv;
3340 struct dvb_usb_device *dev = adap->dev;
3341 struct dib0700_state *state = dev->priv;
3342 int ret;
3343
3344 ret = state->read_status(fe, stat);
3345
3346 if (!ret)
3347 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT,
3348 !!(*stat & FE_HAS_LOCK));
3349
3350 return ret;
3351}
3352
3353static int novatd_sleep_override(struct dvb_frontend* fe)
3354{
3355 struct dvb_usb_adapter *adap = fe->dvb->priv;
3356 struct dvb_usb_device *dev = adap->dev;
3357 struct dib0700_state *state = dev->priv;
3358
3359 /* turn off LED */
3360 dib0700_set_gpio(dev, adap->id == 0 ? GPIO1 : GPIO0, GPIO_OUT, 0);
3361
3362 return state->sleep(fe);
3363}
3364
cba862dc 3365/*
2b05b881
JS		 3366 * novatd_frontend_attach - Nova-TD specific attach
3367 *
3368 * Nova-TD has GPIO0, 1 and 2 for LEDs. So do not fiddle with them except for
3369 * information purposes.
3370 */
3371static int novatd_frontend_attach(struct dvb_usb_adapter *adap)
3372{
3373 struct dvb_usb_device *dev = adap->dev;
d43272a4 3374 struct dib0700_state *st = dev->priv;
8abe4a0a
MCC		 3375 struct dib0700_adapter_state *state = adap->priv;
3376
3377 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3378 return -ENODEV;
2b05b881
JS		 3379
3380 if (adap->id == 0) {
3381 stk7070pd_init(dev);
3382
3383 /* turn the power LED on, the other two off (just in case) */
3384 dib0700_set_gpio(dev, GPIO0, GPIO_OUT, 0);
3385 dib0700_set_gpio(dev, GPIO1, GPIO_OUT, 0);
3386 dib0700_set_gpio(dev, GPIO2, GPIO_OUT, 1);
3387
8abe4a0a 3388 if (state->dib7000p_ops.i2c_enumeration(&dev->i2c_adap, 2, 18,
2b05b881 3389 stk7070pd_dib7000p_config) != 0) {
8abe4a0a 3390 err("%s: state->dib7000p_ops.i2c_enumeration failed. Cannot continue\n",
2b05b881 3391 __func__);
eb0c1994 3392 dvb_detach(state->dib7000p_ops.set_wbd_ref);
2b05b881
JS		 3393 return -ENODEV;
3394 }
3395 }
3396
8abe4a0a 3397 adap->fe_adap[0].fe = state->dib7000p_ops.init(&dev->i2c_adap,
2b05b881
JS		 3398 adap->id == 0 ? 0x80 : 0x82,
3399 &stk7070pd_dib7000p_config[adap->id]);
d43272a4
JS		 3400
3401 if (adap->fe_adap[0].fe == NULL)
3402 return -ENODEV;
3403
3404 st->read_status = adap->fe_adap[0].fe->ops.read_status;
3405 adap->fe_adap[0].fe->ops.read_status = novatd_read_status_override;
3406 st->sleep = adap->fe_adap[0].fe->ops.sleep;
3407 adap->fe_adap[0].fe->ops.sleep = novatd_sleep_override;
3408
3409 return 0;
2b05b881
JS		 3410}
3411
cb22cb52
DH		 3412/* S5H1411 */
3413static struct s5h1411_config pinnacle_801e_config = {
3414 .output_mode = S5H1411_PARALLEL_OUTPUT,
3415 .gpio = S5H1411_GPIO_OFF,
ad05ff09 3416 .mpeg_timing = S5H1411_MPEGTIMING_NONCONTINUOUS_NONINVERTING_CLOCK,
cb22cb52
DH		 3417 .qam_if = S5H1411_IF_44000,
3418 .vsb_if = S5H1411_IF_44000,
3419 .inversion = S5H1411_INVERSION_OFF,
3420 .status_mode = S5H1411_DEMODLOCKING
3421};
3422
3423/* Pinnacle PCTV HD Pro 801e GPIOs map:
3424 GPIO0 - currently unknown
3425 GPIO1 - xc5000 tuner reset
3426 GPIO2 - CX25843 sleep
3427 GPIO3 - currently unknown
3428 GPIO4 - currently unknown
3429 GPIO6 - currently unknown
3430 GPIO7 - currently unknown
3431 GPIO9 - currently unknown
3432 GPIO10 - CX25843 reset
3433 */
3434static int s5h1411_frontend_attach(struct dvb_usb_adapter *adap)
3435{
3436 struct dib0700_state *st = adap->dev->priv;
3437
3438 /* Make use of the new i2c functions from FW 1.20 */
3439 st->fw_use_new_i2c_api = 1;
3440
3441 /* The s5h1411 requires the dib0700 to not be in master mode */
3442 st->disable_streaming_master_mode = 1;
3443
3444 /* All msleep values taken from Windows USB trace */
3445 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 0);
3446 dib0700_set_gpio(adap->dev, GPIO3, GPIO_OUT, 0);
3447 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3448 msleep(400);
3449 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3450 msleep(60);
3451 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3452 msleep(30);
3453 dib0700_set_gpio(adap->dev, GPIO0, GPIO_OUT, 1);
3454 dib0700_set_gpio(adap->dev, GPIO9, GPIO_OUT, 1);
3455 dib0700_set_gpio(adap->dev, GPIO4, GPIO_OUT, 1);
3456 dib0700_set_gpio(adap->dev, GPIO7, GPIO_OUT, 1);
3457 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 0);
3458 msleep(30);
3459
3460 /* Put the CX25843 to sleep for now since we're in digital mode */
3461 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3462
3463 /* GPIOs are initialized, do the attach */
77eed219 3464 adap->fe_adap[0].fe = dvb_attach(s5h1411_attach, &pinnacle_801e_config,
cb22cb52 3465 &adap->dev->i2c_adap);
77eed219 3466 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
cb22cb52
DH		 3467}
3468
767f3b3b
MK		 3469static int dib0700_xc5000_tuner_callback(void *priv, int component,
3470 int command, int arg)
cb22cb52
DH		 3471{
3472 struct dvb_usb_adapter *adap = priv;
3473
79025a9e
DH		 3474 if (command == XC5000_TUNER_RESET) {
3475 /* Reset the tuner */
3476 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 0);
f0f4633a 3477 msleep(10);
79025a9e 3478 dib0700_set_gpio(adap->dev, GPIO1, GPIO_OUT, 1);
f0f4633a 3479 msleep(10);
79025a9e
DH		 3480 } else {
3481 err("xc5000: unknown tuner callback command: %d\n", command);
3482 return -EINVAL;
3483 }
cb22cb52
DH		 3484
3485 return 0;
3486}
3487
3488static struct xc5000_config s5h1411_xc5000_tunerconfig = {
3489 .i2c_address = 0x64,
3490 .if_khz = 5380,
cb22cb52
DH		 3491};
3492
3493static int xc5000_tuner_attach(struct dvb_usb_adapter *adap)
3494{
79025a9e 3495 /* FIXME: generalize & move to common area */
77eed219 3496 adap->fe_adap[0].fe->callback = dib0700_xc5000_tuner_callback;
79025a9e 3497
77eed219 3498 return dvb_attach(xc5000_attach, adap->fe_adap[0].fe, &adap->dev->i2c_adap,
767f3b3b 3499 &s5h1411_xc5000_tunerconfig)
cb22cb52
DH		 3500 == NULL ? -ENODEV : 0;
3501}
3502
8d009a0c
DF		 3503static int dib0700_xc4000_tuner_callback(void *priv, int component,
3504 int command, int arg)
3505{
3506 struct dvb_usb_adapter *adap = priv;
8abe4a0a 3507 struct dib0700_adapter_state *state = adap->priv;
8d009a0c
DF		 3508
3509 if (command == XC4000_TUNER_RESET) {
3510 /* Reset the tuner */
8abe4a0a 3511 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 0);
8d009a0c 3512 msleep(10);
8abe4a0a 3513 state->dib7000p_ops.set_gpio(adap->fe_adap[0].fe, 8, 0, 1);
8d009a0c
DF		 3514 } else {
3515 err("xc4000: unknown tuner callback command: %d\n", command);
3516 return -EINVAL;
3517 }
3518
3519 return 0;
3520}
3521
8583fc83
DH		 3522static struct dibx000_agc_config stk7700p_7000p_xc4000_agc_config = {
3523 .band_caps = BAND_UHF | BAND_VHF,
3524 .setup = 0x64,
3525 .inv_gain = 0x02c8,
3526 .time_stabiliz = 0x15,
3527 .alpha_level = 0x00,
3528 .thlock = 0x76,
3529 .wbd_inv = 0x01,
3530 .wbd_ref = 0x0b33,
3531 .wbd_sel = 0x00,
3532 .wbd_alpha = 0x02,
3533 .agc1_max = 0x00,
3534 .agc1_min = 0x00,
3535 .agc2_max = 0x9b26,
3536 .agc2_min = 0x26ca,
3537 .agc1_pt1 = 0x00,
3538 .agc1_pt2 = 0x00,
3539 .agc1_pt3 = 0x00,
3540 .agc1_slope1 = 0x00,
3541 .agc1_slope2 = 0x00,
3542 .agc2_pt1 = 0x00,
3543 .agc2_pt2 = 0x80,
3544 .agc2_slope1 = 0x1d,
3545 .agc2_slope2 = 0x1d,
2df12510 3546 .alpha_mant = 0x11,
8583fc83
DH		 3547 .alpha_exp = 0x1b,
3548 .beta_mant = 0x17,
3549 .beta_exp = 0x33,
3550 .perform_agc_softsplit = 0x00,
3551};
3552
f1c78d34 3553static struct dibx000_bandwidth_config stk7700p_xc4000_pll_config = {
09628b2c
MCC		 3554 .internal = 60000,
3555 .sampling = 30000,
3556 .pll_prediv = 1,
3557 .pll_ratio = 8,
3558 .pll_range = 3,
3559 .pll_reset = 1,
3560 .pll_bypass = 0,
3561 .enable_refdiv = 0,
3562 .bypclk_div = 0,
3563 .IO_CLK_en_core = 1,
3564 .ADClkSrc = 1,
3565 .modulo = 0,
3566 .sad_cfg = (3 << 14) | (1 << 12) | 524, /* sad_cfg: refsel, sel, freq_15k */
3567 .ifreq = 39370534,
3568 .timf = 20452225,
3569 .xtal_hz = 30000000
f1c78d34
DH		 3570};
3571
01f16263
DH		 3572/* FIXME: none of these inputs are validated yet */
3573static struct dib7000p_config pctv_340e_config = {
62956ced 3574 .output_mpeg2_in_188_bytes = 1,
01f16263
DH		 3575
3576 .agc_config_count = 1,
8583fc83 3577 .agc = &stk7700p_7000p_xc4000_agc_config,
f1c78d34 3578 .bw = &stk7700p_xc4000_pll_config,
01f16263 3579
01f16263
DH		 3580 .gpio_dir = DIB7000M_GPIO_DEFAULT_DIRECTIONS,
3581 .gpio_val = DIB7000M_GPIO_DEFAULT_VALUES,
3582 .gpio_pwm_pos = DIB7000M_GPIO_DEFAULT_PWM_POS,
3583};
3584
3585/* PCTV 340e GPIOs map:
3586 dib0700:
3587 GPIO2 - CX25843 sleep
3588 GPIO3 - CS5340 reset
3589 GPIO5 - IRD
3590 GPIO6 - Power Supply
3591 GPIO8 - LNA (1=off 0=on)
3592 GPIO10 - CX25843 reset
3593 dib7000:
3594 GPIO8 - xc4000 reset
3595 */
3596static int pctv340e_frontend_attach(struct dvb_usb_adapter *adap)
3597{
3598 struct dib0700_state *st = adap->dev->priv;
8abe4a0a
MCC		 3599 struct dib0700_adapter_state *state = adap->priv;
3600
3601 if (!dvb_attach(dib7000p_attach, &state->dib7000p_ops))
3602 return -ENODEV;
01f16263
DH		 3603
3604 /* Power Supply on */
3605 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3606 msleep(50);
3607 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3608 msleep(100); /* Allow power supply to settle before probing */
3609
3610 /* cx25843 reset */
3611 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3612 msleep(1); /* cx25843 datasheet say 350us required */
3613 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3614
3615 /* LNA off for now */
3616 dib0700_set_gpio(adap->dev, GPIO8, GPIO_OUT, 1);
3617
3618 /* Put the CX25843 to sleep for now since we're in digital mode */
3619 dib0700_set_gpio(adap->dev, GPIO2, GPIO_OUT, 1);
3620
3621 /* FIXME: not verified yet */
3622 dib0700_ctrl_clock(adap->dev, 72, 1);
3623
2750d9c3
DH		 3624 msleep(500);
3625
8abe4a0a 3626 if (state->dib7000p_ops.dib7000pc_detection(&adap->dev->i2c_adap) == 0) {
01f16263 3627 /* Demodulator not found for some reason? */
eb0c1994 3628 dvb_detach(state->dib7000p_ops.set_wbd_ref);
01f16263
DH		 3629 return -ENODEV;
3630 }
3631
8abe4a0a 3632 adap->fe_adap[0].fe = state->dib7000p_ops.init(&adap->dev->i2c_adap, 0x12,
01f16263
DH		 3633 &pctv_340e_config);
3634 st->is_dib7000pc = 1;
3635
77eed219 3636 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
01f16263
DH		 3637}
3638
8583fc83 3639static struct xc4000_config dib7000p_xc4000_tunerconfig = {
8edeb6eb 3640 .i2c_address = 0x61,
3641 .default_pm = 1,
3642 .dvb_amplitude = 0,
3643 .set_smoothedcvbs = 0,
3644 .if_khz = 5400
8d009a0c
DF		 3645};
3646
3647static int xc4000_tuner_attach(struct dvb_usb_adapter *adap)
3648{
59d0c37b 3649 struct i2c_adapter *tun_i2c;
8abe4a0a 3650 struct dib0700_adapter_state *state = adap->priv;
59d0c37b
DH		 3651
3652 /* The xc4000 is not on the main i2c bus */
8abe4a0a 3653 tun_i2c = state->dib7000p_ops.get_i2c_master(adap->fe_adap[0].fe,
59d0c37b
DH		 3654 DIBX000_I2C_INTERFACE_TUNER, 1);
3655 if (tun_i2c == NULL) {
941830c9 3656 printk(KERN_ERR "Could not reach tuner i2c bus\n");
59d0c37b
DH		 3657 return 0;
3658 }
3659
3660 /* Setup the reset callback */
77eed219 3661 adap->fe_adap[0].fe->callback = dib0700_xc4000_tuner_callback;
8d009a0c 3662
77eed219 3663 return dvb_attach(xc4000_attach, adap->fe_adap[0].fe, tun_i2c,
8583fc83 3664 &dib7000p_xc4000_tunerconfig)
8d009a0c
DF		 3665 == NULL ? -ENODEV : 0;
3666}
3667
ce904bcb
MK		 3668static struct lgdt3305_config hcw_lgdt3305_config = {
3669 .i2c_addr = 0x0e,
3670 .mpeg_mode = LGDT3305_MPEG_PARALLEL,
3671 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
3672 .tpvalid_polarity = LGDT3305_TP_VALID_LOW,
3673 .deny_i2c_rptr = 0,
3674 .spectral_inversion = 1,
3675 .qam_if_khz = 6000,
3676 .vsb_if_khz = 6000,
3677 .usref_8vsb = 0x0500,
3678};
3679
3680static struct mxl5007t_config hcw_mxl5007t_config = {
3681 .xtal_freq_hz = MxL_XTAL_25_MHZ,
3682 .if_freq_hz = MxL_IF_6_MHZ,
3683 .invert_if = 1,
3684};
3685
3686/* TIGER-ATSC map:
3687 GPIO0 - LNA_CTR (H: LNA power enabled, L: LNA power disabled)
3688 GPIO1 - ANT_SEL (H: VPA, L: MCX)
3689 GPIO4 - SCL2
3690 GPIO6 - EN_TUNER
3691 GPIO7 - SDA2
3692 GPIO10 - DEM_RST
3693
3694 MXL is behind LG's i2c repeater. LG is on SCL2/SDA2 gpios on the DIB
3695 */
3696static int lgdt3305_frontend_attach(struct dvb_usb_adapter *adap)
3697{
3698 struct dib0700_state *st = adap->dev->priv;
3699
3700 /* Make use of the new i2c functions from FW 1.20 */
3701 st->fw_use_new_i2c_api = 1;
3702
3703 st->disable_streaming_master_mode = 1;
3704
3705 /* fe power enable */
3706 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3707 msleep(30);
3708 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3709 msleep(30);
3710
3711 /* demod reset */
3712 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3713 msleep(30);
3714 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3715 msleep(30);
3716 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3717 msleep(30);
3718
77eed219 3719 adap->fe_adap[0].fe = dvb_attach(lgdt3305_attach,
ce904bcb
MK		 3720 &hcw_lgdt3305_config,
3721 &adap->dev->i2c_adap);
3722
77eed219 3723 return adap->fe_adap[0].fe == NULL ? -ENODEV : 0;
ce904bcb
MK		 3724}
3725
3726static int mxl5007t_tuner_attach(struct dvb_usb_adapter *adap)
3727{
77eed219 3728 return dvb_attach(mxl5007t_attach, adap->fe_adap[0].fe,
ce904bcb
MK		 3729 &adap->dev->i2c_adap, 0x60,
3730 &hcw_mxl5007t_config) == NULL ? -ENODEV : 0;
3731}
3732
c4d84547
OS		 3733static int xbox_one_attach(struct dvb_usb_adapter *adap)
3734{
3735 struct dib0700_state *st = adap->dev->priv;
3736 struct i2c_client *client_demod, *client_tuner;
3737 struct dvb_usb_device *d = adap->dev;
3738 struct mn88472_config mn88472_config = { };
3739 struct tda18250_config tda18250_config;
3740 struct i2c_board_info info;
3741
3742 st->fw_use_new_i2c_api = 1;
3743 st->disable_streaming_master_mode = 1;
3744
3745 /* fe power enable */
3746 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 0);
3747 msleep(30);
3748 dib0700_set_gpio(adap->dev, GPIO6, GPIO_OUT, 1);
3749 msleep(30);
3750
3751 /* demod reset */
3752 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3753 msleep(30);
3754 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 0);
3755 msleep(30);
3756 dib0700_set_gpio(adap->dev, GPIO10, GPIO_OUT, 1);
3757 msleep(30);
3758
3759 /* attach demod */
3760 mn88472_config.fe = &adap->fe_adap[0].fe;
3761 mn88472_config.i2c_wr_max = 22;
3762 mn88472_config.xtal = 20500000;
3763 mn88472_config.ts_mode = PARALLEL_TS_MODE;
3764 mn88472_config.ts_clock = FIXED_TS_CLOCK;
3765 memset(&info, 0, sizeof(struct i2c_board_info));
c0decac1 3766 strscpy(info.type, "mn88472", I2C_NAME_SIZE);
c4d84547
OS		 3767 info.addr = 0x18;
3768 info.platform_data = &mn88472_config;
3769 request_module(info.type);
6e040e6f
WS		 3770 client_demod = i2c_new_client_device(&d->i2c_adap, &info);
3771 if (!i2c_client_has_driver(client_demod))
c4d84547
OS		 3772 goto fail_demod_device;
3773 if (!try_module_get(client_demod->dev.driver->owner))
3774 goto fail_demod_module;
3775
3776 st->i2c_client_demod = client_demod;
3777
3778 adap->fe_adap[0].fe = mn88472_config.get_dvb_frontend(client_demod);
3779
3780 /* attach tuner */
3781 memset(&tda18250_config, 0, sizeof(tda18250_config));
3782 tda18250_config.if_dvbt_6 = 3950;
3783 tda18250_config.if_dvbt_7 = 4450;
3784 tda18250_config.if_dvbt_8 = 4950;
3785 tda18250_config.if_dvbc_6 = 4950;
3786 tda18250_config.if_dvbc_8 = 4950;
3787 tda18250_config.if_atsc = 4079;
3788 tda18250_config.loopthrough = true;
3789 tda18250_config.xtal_freq = TDA18250_XTAL_FREQ_27MHZ;
3790 tda18250_config.fe = adap->fe_adap[0].fe;
3791
3792 memset(&info, 0, sizeof(struct i2c_board_info));
c0decac1 3793 strscpy(info.type, "tda18250", I2C_NAME_SIZE);
c4d84547
OS		 3794 info.addr = 0x60;
3795 info.platform_data = &tda18250_config;
3796
3797 request_module(info.type);
6e040e6f
WS		 3798 client_tuner = i2c_new_client_device(&adap->dev->i2c_adap, &info);
3799 if (!i2c_client_has_driver(client_tuner))
c4d84547
OS		 3800 goto fail_tuner_device;
3801 if (!try_module_get(client_tuner->dev.driver->owner))
3802 goto fail_tuner_module;
3803
3804 st->i2c_client_tuner = client_tuner;
3805 return 0;
3806
3807fail_tuner_module:
3808 i2c_unregister_device(client_tuner);
3809fail_tuner_device:
3810 module_put(client_demod->dev.driver->owner);
3811fail_demod_module:
3812 i2c_unregister_device(client_demod);
3813fail_demod_device:
3814 return -ENODEV;
3815}
3816
ce904bcb 3817
01373a5c 3818/* DVB-USB and USB stuff follows */
b7f54910 3819struct usb_device_id dib0700_usb_id_table[] = {
01373a5c 3820/* 0 */ { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P) },
6ca8f0b9
AC		 3821 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700P_PC) },
3822 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500) },
3823 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_2) },
3824 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK) },
01373a5c 3825/* 5 */ { USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR) },
6ca8f0b9
AC		 3826 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500) },
3827 { USB_DEVICE(USB_VID_UNIWILL, USB_PID_UNIWILL_STK7700P) },
3828 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P) },
3829 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_2) },
01373a5c 3830/* 10 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_VOLAR_2) },
6ca8f0b9
AC		 3831 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV2000E) },
3832 { USB_DEVICE(USB_VID_TERRATEC,
3833 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY) },
3834 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK) },
3835 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7700D) },
01373a5c 3836/* 15 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070P) },
6ca8f0b9
AC		 3837 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV_DVB_T_FLASH) },
3838 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7070PD) },
3839 { USB_DEVICE(USB_VID_PINNACLE,
3840 USB_PID_PINNACLE_PCTV_DUAL_DIVERSITY_DVB_T) },
3841 { USB_DEVICE(USB_VID_COMPRO, USB_PID_COMPRO_VIDEOMATE_U500_PC) },
fa3b877e 3842/* 20 */{ USB_DEVICE(USB_VID_AVERMEDIA, USB_PID_AVERMEDIA_EXPRESS) },
6ca8f0b9
AC		 3843 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U7000) },
3844 { USB_DEVICE(USB_VID_ULTIMA_ELECTRONIC, USB_PID_ARTEC_T14BR) },
3845 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000) },
3846 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3100) },
3847/* 25 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_STICK_3) },
3848 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_MYTV_T) },
3849 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_USB_XE) },
3850 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_EXPRESSCARD_320CX) },
3851 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV72E) },
3852/* 30 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73E) },
3853 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_EC372S) },
3854 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_HT_EXPRESS) },
dc88807e 3855 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS) },
5da4e2c6 3856 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_STK7700P_2) },
af2a887c 3857/* 35 */{ USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_TD_STICK_52009) },
9a0c04a1 3858 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_NOVA_T_500_3) },
17a370bc 3859 { USB_DEVICE(USB_VID_GIGABYTE, USB_PID_GIGABYTE_U8000) },
8751aaa6 3860 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700PH) },
5769743a 3861 { USB_DEVICE(USB_VID_ASUS, USB_PID_ASUS_U3000H) },
cb22cb52 3862/* 40 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E) },
d2fc3bfc 3863 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV801E_SE) },
bb1b082e 3864 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_EXPRESS) },
db4b2d19
NF		 3865 { USB_DEVICE(USB_VID_TERRATEC,
3866 USB_PID_TERRATEC_CINERGY_DT_XS_DIVERSITY_2) },
0a6e1ed2 3867 { USB_DEVICE(USB_VID_SONY, USB_PID_SONY_PLAYTV) },
9abb6e6f 3868/* 45 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_PD378S) },
ce904bcb
MK		 3869 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC) },
3870 { USB_DEVICE(USB_VID_HAUPPAUGE, USB_PID_HAUPPAUGE_TIGER_ATSC_B210) },
16ba1ee5 3871 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_MC770) },
919a5488 3872 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT) },
513846ec 3873/* 50 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_Dlx) },
f0f4ae76 3874 { USB_DEVICE(USB_VID_LEADTEK, USB_PID_WINFAST_DTV_DONGLE_H) },
a9b8fe30
PB		 3875 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T3) },
3876 { USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_T5) },
c53d83cc 3877 { USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D) },
74b76f21
OG		 3878/* 55 */{ USB_DEVICE(USB_VID_YUAN, USB_PID_YUAN_STK7700D_2) },
3879 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73A) },
e414753c
PB		 3880 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV73ESE) },
3881 { USB_DEVICE(USB_VID_PCTV, USB_PID_PINNACLE_PCTV282E) },
d300bd69 3882 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK7770P) },
db48138f 3883/* 60 */{ USB_DEVICE(USB_VID_TERRATEC, USB_PID_TERRATEC_CINERGY_T_XXS_2) },
ba3fe3a9
PB		 3884 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XPVR) },
3885 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK807XP) },
3bfb317f 3886 { USB_DEVICE_VER(USB_VID_PIXELVIEW, USB_PID_PIXELVIEW_SBTVD, 0x000, 0x3f00) },
8a378e85 3887 { USB_DEVICE(USB_VID_EVOLUTEPC, USB_PID_TVWAY_PLUS) },
20232c47 3888/* 65 */{ USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV73ESE) },
e414753c 3889 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV282E) },
03245a5e 3890 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096GP) },
84e2f037 3891 { USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DIVERSITY) },
be9bae10
OG		 3892 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090M) },
3893/* 70 */{ USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM8096MD) },
3894 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM9090MD) },
3895 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_NIM7090) },
3896 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7090PVR) },
498e677c 3897 { USB_DEVICE(USB_VID_TECHNISAT, USB_PID_TECHNISAT_AIRSTAR_TELESTICK_2) },
d1402307 3898/* 75 */{ USB_DEVICE(USB_VID_MEDION, USB_PID_CREATIX_CTX1921) },
8d009a0c 3899 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E) },
33fb1681 3900 { USB_DEVICE(USB_VID_PINNACLE, USB_PID_PINNACLE_PCTV340E_SE) },
f45f513a
OG		 3901 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE7790P) },
3902 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_TFE8096P) },
3903/* 80 */{ USB_DEVICE(USB_VID_ELGATO, USB_PID_ELGATO_EYETV_DTT_2) },
c859e6ef
MK		 3904 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E) },
3905 { USB_DEVICE(USB_VID_PCTV, USB_PID_PCTV_2002E_SE) },
91be260f 3906 { USB_DEVICE(USB_VID_PCTV, USB_PID_DIBCOM_STK8096PVR) },
ec788795 3907 { USB_DEVICE(USB_VID_DIBCOM, USB_PID_DIBCOM_STK8096PVR) },
c4d84547
OS		 3908/* 85 */{ USB_DEVICE(USB_VID_HAMA, USB_PID_HAMA_DVBT_HYBRID) },
3909 { USB_DEVICE(USB_VID_MICROSOFT, USB_PID_XBOX_ONE_TUNER) },
6ca8f0b9 3910 { 0 } /* Terminating entry */
b7f54910
PB		 3911};
3912MODULE_DEVICE_TABLE(usb, dib0700_usb_id_table);
3913
3914#define DIB0700_DEFAULT_DEVICE_PROPERTIES \
3915 .caps = DVB_USB_IS_AN_I2C_ADAPTER, \
3916 .usb_ctrl = DEVICE_SPECIFIC, \
bdc203e1 3917 .firmware = "dvb-usb-dib0700-1.20.fw", \
b7f54910 3918 .download_firmware = dib0700_download_firmware, \
6958effe 3919 .no_reconnect = 1, \
b7f54910 3920 .size_of_priv = sizeof(struct dib0700_state), \
6958effe
PB		 3921 .i2c_algo = &dib0700_i2c_algo, \
3922 .identify_state = dib0700_identify_state
b7f54910
PB		 3923
3924#define DIB0700_DEFAULT_STREAMING_CONFIG(ep) \
3925 .streaming_ctrl = dib0700_streaming_ctrl, \
3926 .stream = { \
3927 .type = USB_BULK, \
3928 .count = 4, \
3929 .endpoint = ep, \
3930 .u = { \
3931 .bulk = { \
3932 .buffersize = 39480, \
3933 } \
3934 } \
3935 }
3936
0fae1997
MCC		 3937#define DIB0700_NUM_FRONTENDS(n) \
3938 .num_frontends = n, \
3939 .size_of_priv = sizeof(struct dib0700_adapter_state)
3940
b7f54910
PB		 3941struct dvb_usb_device_properties dib0700_devices[] = {
3942 {
3943 DIB0700_DEFAULT_DEVICE_PROPERTIES,
3944
3945 .num_adapters = 1,
3946 .adapter = {
3947 {
0fae1997 3948 DIB0700_NUM_FRONTENDS(1),
77eed219 3949 .fe = {{
f8731f4d
OG		 3950 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
3951 .pid_filter_count = 32,
e192a7cf
OG		 3952 .pid_filter = stk7700p_pid_filter,
3953 .pid_filter_ctrl = stk7700p_pid_filter_ctrl,
b7f54910
PB		 3954 .frontend_attach = stk7700p_frontend_attach,
3955 .tuner_attach = stk7700p_tuner_attach,
3956
3957 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 3958 }},
b7f54910
PB		 3959 },
3960 },
3961
67053a40 3962 .num_device_descs = 8,
b7f54910
PB		 3963 .devices = {
3964 { "DiBcom STK7700P reference design",
49a1376c 3965 { &dib0700_usb_id_table[0], &dib0700_usb_id_table[1] },
b7f54910
PB		 3966 { NULL },
3967 },
3968 { "Hauppauge Nova-T Stick",
f9aeba45 3969 { &dib0700_usb_id_table[4], &dib0700_usb_id_table[9], NULL },
b7f54910
PB		 3970 { NULL },
3971 },
3972 { "AVerMedia AVerTV DVB-T Volar",
ced8feca 3973 { &dib0700_usb_id_table[5], &dib0700_usb_id_table[10] },
b7f54910
PB		 3974 { NULL },
3975 },
49a1376c 3976 { "Compro Videomate U500",
1f8ca4b3 3977 { &dib0700_usb_id_table[6], &dib0700_usb_id_table[19] },
49a1376c 3978 { NULL },
0ce215e1
HS		 3979 },
3980 { "Uniwill STK7700P based (Hama and others)",
3981 { &dib0700_usb_id_table[7], NULL },
3982 { NULL },
8637a875
MK		 3983 },
3984 { "Leadtek Winfast DTV Dongle (STK7700P based)",
1e13c8f0 3985 { &dib0700_usb_id_table[8], &dib0700_usb_id_table[34] },
8637a875 3986 { NULL },
fa3b877e
JS		 3987 },
3988 { "AVerMedia AVerTV DVB-T Express",
3989 { &dib0700_usb_id_table[20] },
3990 { NULL },
67053a40 3991 },
67053a40 3992 { "Gigabyte U7000",
3993 { &dib0700_usb_id_table[21], NULL },
3994 { NULL },
49a1376c 3995 }
b1139e35
DS		 3996 },
3997
72b39310 3998 .rc.core = {
f72a27b8 3999 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4000 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 4001 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4002 .allowed_protos = RC_PROTO_BIT_RC5 |
4003 RC_PROTO_BIT_RC6_MCE |
4004 RC_PROTO_BIT_NEC,
d8b4b582 4005 .change_protocol = dib0700_change_protocol,
f72a27b8 4006 },
b7f54910
PB		 4007 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4008
4009 .num_adapters = 2,
4010 .adapter = {
4011 {
0fae1997 4012 DIB0700_NUM_FRONTENDS(1),
77eed219 4013 .fe = {{
b7f54910
PB		 4014 .frontend_attach = bristol_frontend_attach,
4015 .tuner_attach = bristol_tuner_attach,
4016
4017 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4018 }},
b7f54910 4019 }, {
0fae1997 4020 DIB0700_NUM_FRONTENDS(1),
77eed219 4021 .fe = {{
b7f54910
PB		 4022 .frontend_attach = bristol_frontend_attach,
4023 .tuner_attach = bristol_tuner_attach,
4024
4025 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4026 }},
b7f54910
PB		 4027 }
4028 },
4029
4030 .num_device_descs = 1,
4031 .devices = {
4032 { "Hauppauge Nova-T 500 Dual DVB-T",
49a1376c 4033 { &dib0700_usb_id_table[2], &dib0700_usb_id_table[3], NULL },
b7f54910
PB		 4034 { NULL },
4035 },
82f3d559
JG		 4036 },
4037
72b39310 4038 .rc.core = {
f72a27b8 4039 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4040 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 4041 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4042 .allowed_protos = RC_PROTO_BIT_RC5 |
4043 RC_PROTO_BIT_RC6_MCE |
4044 RC_PROTO_BIT_NEC,
d8b4b582 4045 .change_protocol = dib0700_change_protocol,
f72a27b8 4046 },
54d75eba
OD		 4047 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4048
4049 .num_adapters = 2,
4050 .adapter = {
4051 {
0fae1997 4052 DIB0700_NUM_FRONTENDS(1),
77eed219 4053 .fe = {{
f8731f4d
OG		 4054 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4055 .pid_filter_count = 32,
4056 .pid_filter = stk70x0p_pid_filter,
4057 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 4058 .frontend_attach = stk7700d_frontend_attach,
4059 .tuner_attach = stk7700d_tuner_attach,
4060
4061 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4062 }},
54d75eba 4063 }, {
0fae1997 4064 DIB0700_NUM_FRONTENDS(1),
77eed219 4065 .fe = {{
f8731f4d
OG		 4066 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4067 .pid_filter_count = 32,
4068 .pid_filter = stk70x0p_pid_filter,
4069 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
54d75eba
OD		 4070 .frontend_attach = stk7700d_frontend_attach,
4071 .tuner_attach = stk7700d_tuner_attach,
4072
4073 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4074 }},
54d75eba
OD		 4075 }
4076 },
4077
200e861c 4078 .num_device_descs = 5,
54d75eba
OD		 4079 .devices = {
4080 { "Pinnacle PCTV 2000e",
4081 { &dib0700_usb_id_table[11], NULL },
4082 { NULL },
4083 },
4084 { "Terratec Cinergy DT XS Diversity",
4085 { &dib0700_usb_id_table[12], NULL },
4086 { NULL },
4087 },
faebb914 4088 { "Hauppauge Nova-TD Stick/Elgato Eye-TV Diversity",
54d75eba
OD		 4089 { &dib0700_usb_id_table[13], NULL },
4090 { NULL },
4091 },
01373a5c 4092 { "DiBcom STK7700D reference design",
b6884a17
PB		 4093 { &dib0700_usb_id_table[14], NULL },
4094 { NULL },
bb1b082e 4095 },
200e861c
JW		 4096 { "YUAN High-Tech DiBcom STK7700D",
4097 { &dib0700_usb_id_table[55], NULL },
4098 { NULL },
4099 },
bb1b082e 4100
54d75eba 4101 },
82f3d559 4102
72b39310 4103 .rc.core = {
f72a27b8 4104 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4105 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
0ffd1ab3 4106 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4107 .allowed_protos = RC_PROTO_BIT_RC5 |
4108 RC_PROTO_BIT_RC6_MCE |
4109 RC_PROTO_BIT_NEC,
d8b4b582 4110 .change_protocol = dib0700_change_protocol,
f72a27b8 4111 },
132c3188
DG		 4112 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4113
4114 .num_adapters = 1,
4115 .adapter = {
4116 {
0fae1997 4117 DIB0700_NUM_FRONTENDS(1),
77eed219 4118 .fe = {{
f8731f4d
OG		 4119 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4120 .pid_filter_count = 32,
4121 .pid_filter = stk70x0p_pid_filter,
4122 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
132c3188
DG		 4123 .frontend_attach = stk7700P2_frontend_attach,
4124 .tuner_attach = stk7700d_tuner_attach,
4125
4126 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4127 }},
132c3188
DG		 4128 },
4129 },
4130
bb1b082e 4131 .num_device_descs = 3,
132c3188
DG		 4132 .devices = {
4133 { "ASUS My Cinema U3000 Mini DVBT Tuner",
4134 { &dib0700_usb_id_table[23], NULL },
4135 { NULL },
4136 },
6ca8f0b9
AC		 4137 { "Yuan EC372S",
4138 { &dib0700_usb_id_table[31], NULL },
4139 { NULL },
bb1b082e
YA		 4140 },
4141 { "Terratec Cinergy T Express",
4142 { &dib0700_usb_id_table[42], NULL },
4143 { NULL },
6ca8f0b9 4144 }
48aa7391
CR		 4145 },
4146
72b39310 4147 .rc.core = {
f72a27b8 4148 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4149 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4150 .module_name = "dib0700",
0ffd1ab3 4151 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4152 .allowed_protos = RC_PROTO_BIT_RC5 |
4153 RC_PROTO_BIT_RC6_MCE |
4154 RC_PROTO_BIT_NEC,
d8b4b582 4155 .change_protocol = dib0700_change_protocol,
f72a27b8 4156 },
01373a5c
PB		 4157 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4158
4159 .num_adapters = 1,
4160 .adapter = {
4161 {
0fae1997 4162 DIB0700_NUM_FRONTENDS(1),
77eed219 4163 .fe = {{
f8731f4d
OG		 4164 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4165 .pid_filter_count = 32,
4166 .pid_filter = stk70x0p_pid_filter,
4167 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
01373a5c
PB		 4168 .frontend_attach = stk7070p_frontend_attach,
4169 .tuner_attach = dib7070p_tuner_attach,
4170
4171 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4172 }},
01373a5c
PB		 4173 },
4174 },
4175
0bc9d39b 4176 .num_device_descs = 12,
01373a5c
PB		 4177 .devices = {
4178 { "DiBcom STK7070P reference design",
4179 { &dib0700_usb_id_table[15], NULL },
4180 { NULL },
4181 },
4182 { "Pinnacle PCTV DVB-T Flash Stick",
4183 { &dib0700_usb_id_table[16], NULL },
4184 { NULL },
4185 },
7999a816
YL		 4186 { "Artec T14BR DVB-T",
4187 { &dib0700_usb_id_table[22], NULL },
4188 { NULL },
132c3188
DG		 4189 },
4190 { "ASUS My Cinema U3100 Mini DVBT Tuner",
4191 { &dib0700_usb_id_table[24], NULL },
4192 { NULL },
4193 },
c7637b1a
TT		 4194 { "Hauppauge Nova-T Stick",
4195 { &dib0700_usb_id_table[25], NULL },
4196 { NULL },
4197 },
13b83b5d
DS		 4198 { "Hauppauge Nova-T MyTV.t",
4199 { &dib0700_usb_id_table[26], NULL },
4200 { NULL },
4201 },
6ca8f0b9
AC		 4202 { "Pinnacle PCTV 72e",
4203 { &dib0700_usb_id_table[29], NULL },
4204 { NULL },
4205 },
4206 { "Pinnacle PCTV 73e",
4207 { &dib0700_usb_id_table[30], NULL },
4208 { NULL },
4209 },
919a5488
KF		 4210 { "Elgato EyeTV DTT",
4211 { &dib0700_usb_id_table[49], NULL },
4212 { NULL },
4213 },
9abb6e6f
PT		 4214 { "Yuan PD378S",
4215 { &dib0700_usb_id_table[45], NULL },
4216 { NULL },
4217 },
513846ec
AS		 4218 { "Elgato EyeTV Dtt Dlx PD378S",
4219 { &dib0700_usb_id_table[50], NULL },
4220 { NULL },
4221 },
0bc9d39b 4222 { "Elgato EyeTV DTT rev. 2",
f45f513a 4223 { &dib0700_usb_id_table[80], NULL },
0bc9d39b
GG		 4224 { NULL },
4225 },
c7637b1a
TT		 4226 },
4227
72b39310 4228 .rc.core = {
f72a27b8 4229 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4230 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4231 .module_name = "dib0700",
0ffd1ab3 4232 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4233 .allowed_protos = RC_PROTO_BIT_RC5 |
4234 RC_PROTO_BIT_RC6_MCE |
4235 RC_PROTO_BIT_NEC,
d8b4b582 4236 .change_protocol = dib0700_change_protocol,
f72a27b8 4237 },
74b76f21
OG		 4238 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4239
4240 .num_adapters = 1,
4241 .adapter = {
4242 {
0fae1997 4243 DIB0700_NUM_FRONTENDS(1),
77eed219 4244 .fe = {{
648732fc
MCC		 4245 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4246 .pid_filter_count = 32,
4247 .pid_filter = stk70x0p_pid_filter,
4248 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
74b76f21
OG		 4249 .frontend_attach = stk7070p_frontend_attach,
4250 .tuner_attach = dib7070p_tuner_attach,
4251
4252 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4253 }},
74b76f21
OG		 4254 },
4255 },
4256
20232c47 4257 .num_device_descs = 3,
74b76f21
OG		 4258 .devices = {
4259 { "Pinnacle PCTV 73A",
4260 { &dib0700_usb_id_table[56], NULL },
4261 { NULL },
4262 },
4263 { "Pinnacle PCTV 73e SE",
20232c47 4264 { &dib0700_usb_id_table[57], &dib0700_usb_id_table[65], NULL },
74b76f21
OG		 4265 { NULL },
4266 },
4267 { "Pinnacle PCTV 282e",
20232c47 4268 { &dib0700_usb_id_table[58], &dib0700_usb_id_table[66], NULL },
74b76f21
OG		 4269 { NULL },
4270 },
4271 },
4272
72b39310 4273 .rc.core = {
f72a27b8 4274 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4275 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4276 .module_name = "dib0700",
0ffd1ab3 4277 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4278 .allowed_protos = RC_PROTO_BIT_RC5 |
4279 RC_PROTO_BIT_RC6_MCE |
4280 RC_PROTO_BIT_NEC,
d8b4b582 4281 .change_protocol = dib0700_change_protocol,
f72a27b8 4282 },
01373a5c
PB		 4283 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4284
4285 .num_adapters = 2,
4286 .adapter = {
4287 {
0fae1997 4288 DIB0700_NUM_FRONTENDS(1),
77eed219 4289 .fe = {{
f8731f4d
OG		 4290 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4291 .pid_filter_count = 32,
4292 .pid_filter = stk70x0p_pid_filter,
4293 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4294 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4295 .tuner_attach = dib7070p_tuner_attach,
4296
4297 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4298 }},
01373a5c 4299 }, {
0fae1997 4300 DIB0700_NUM_FRONTENDS(1),
77eed219 4301 .fe = {{
f8731f4d
OG		 4302 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4303 .pid_filter_count = 32,
4304 .pid_filter = stk70x0p_pid_filter,
4305 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
2b05b881 4306 .frontend_attach = novatd_frontend_attach,
01373a5c
PB		 4307 .tuner_attach = dib7070p_tuner_attach,
4308
4309 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4310 }},
01373a5c
PB		 4311 }
4312 },
4313
c859e6ef 4314 .num_device_descs = 3,
9b6ba57b
JS		 4315 .devices = {
4316 { "Hauppauge Nova-TD Stick (52009)",
4317 { &dib0700_usb_id_table[35], NULL },
4318 { NULL },
4319 },
c859e6ef
MK		 4320 { "PCTV 2002e",
4321 { &dib0700_usb_id_table[81], NULL },
4322 { NULL },
4323 },
4324 { "PCTV 2002e SE",
4325 { &dib0700_usb_id_table[82], NULL },
4326 { NULL },
4327 },
9b6ba57b
JS		 4328 },
4329
4330 .rc.core = {
4331 .rc_interval = DEFAULT_RC_INTERVAL,
4332 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4333 .module_name = "dib0700",
4334 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4335 .allowed_protos = RC_PROTO_BIT_RC5 |
4336 RC_PROTO_BIT_RC6_MCE |
4337 RC_PROTO_BIT_NEC,
9b6ba57b
JS		 4338 .change_protocol = dib0700_change_protocol,
4339 },
4340 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4341
4342 .num_adapters = 2,
4343 .adapter = {
4344 {
0fae1997 4345 DIB0700_NUM_FRONTENDS(1),
9b6ba57b
JS		 4346 .fe = {{
4347 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4348 .pid_filter_count = 32,
4349 .pid_filter = stk70x0p_pid_filter,
4350 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4351 .frontend_attach = stk7070pd_frontend_attach0,
4352 .tuner_attach = dib7070p_tuner_attach,
4353
4354 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
4355 }},
9b6ba57b 4356 }, {
0fae1997 4357 DIB0700_NUM_FRONTENDS(1),
9b6ba57b
JS		 4358 .fe = {{
4359 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4360 .pid_filter_count = 32,
4361 .pid_filter = stk70x0p_pid_filter,
4362 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4363 .frontend_attach = stk7070pd_frontend_attach1,
4364 .tuner_attach = dib7070p_tuner_attach,
4365
4366 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
4367 }},
9b6ba57b
JS		 4368 }
4369 },
4370
4371 .num_device_descs = 5,
01373a5c
PB		 4372 .devices = {
4373 { "DiBcom STK7070PD reference design",
4374 { &dib0700_usb_id_table[17], NULL },
4375 { NULL },
4376 },
4377 { "Pinnacle PCTV Dual DVB-T Diversity Stick",
4378 { &dib0700_usb_id_table[18], NULL },
4379 { NULL },
d01eb2dc 4380 },
9a0c04a1
MK		 4381 { "Hauppauge Nova-TD-500 (84xxx)",
4382 { &dib0700_usb_id_table[36], NULL },
4383 { NULL },
db4b2d19 4384 },
a9b8fe30
PB		 4385 { "Terratec Cinergy DT USB XS Diversity/ T5",
4386 { &dib0700_usb_id_table[43],
4387 &dib0700_usb_id_table[53], NULL},
db4b2d19 4388 { NULL },
0a6e1ed2 4389 },
4390 { "Sony PlayTV",
4391 { &dib0700_usb_id_table[44], NULL },
4392 { NULL },
84e2f037 4393 },
5af935cc
MCC		 4394 },
4395
4396 .rc.core = {
4397 .rc_interval = DEFAULT_RC_INTERVAL,
4398 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4399 .module_name = "dib0700",
0ffd1ab3 4400 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4401 .allowed_protos = RC_PROTO_BIT_RC5 |
4402 RC_PROTO_BIT_RC6_MCE |
4403 RC_PROTO_BIT_NEC,
d8b4b582 4404 .change_protocol = dib0700_change_protocol,
5af935cc
MCC		 4405 },
4406 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4407
4408 .num_adapters = 2,
4409 .adapter = {
4410 {
0fae1997 4411 DIB0700_NUM_FRONTENDS(1),
77eed219 4412 .fe = {{
5af935cc
MCC		 4413 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4414 .pid_filter_count = 32,
4415 .pid_filter = stk70x0p_pid_filter,
4416 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4417 .frontend_attach = stk7070pd_frontend_attach0,
4418 .tuner_attach = dib7070p_tuner_attach,
4419
4420 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4421 }},
5af935cc 4422 }, {
0fae1997 4423 DIB0700_NUM_FRONTENDS(1),
77eed219 4424 .fe = {{
5af935cc
MCC		 4425 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4426 .pid_filter_count = 32,
4427 .pid_filter = stk70x0p_pid_filter,
4428 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4429 .frontend_attach = stk7070pd_frontend_attach1,
4430 .tuner_attach = dib7070p_tuner_attach,
4431
4432 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4433 }},
5af935cc
MCC		 4434 }
4435 },
4436
4437 .num_device_descs = 1,
4438 .devices = {
84e2f037
MM		 4439 { "Elgato EyeTV Diversity",
4440 { &dib0700_usb_id_table[68], NULL },
4441 { NULL },
4442 },
c985a8dc 4443 },
f72a27b8 4444
72b39310 4445 .rc.core = {
f72a27b8 4446 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4447 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4448 .module_name = "dib0700",
0ffd1ab3 4449 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4450 .allowed_protos = RC_PROTO_BIT_RC5 |
4451 RC_PROTO_BIT_RC6_MCE |
4452 RC_PROTO_BIT_NEC,
d8b4b582 4453 .change_protocol = dib0700_change_protocol,
f72a27b8 4454 },
6ca8f0b9
AC		 4455 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4456
4457 .num_adapters = 1,
4458 .adapter = {
4459 {
0fae1997 4460 DIB0700_NUM_FRONTENDS(1),
77eed219 4461 .fe = {{
f8731f4d
OG		 4462 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4463 .pid_filter_count = 32,
4464 .pid_filter = stk70x0p_pid_filter,
4465 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
6ca8f0b9
AC		 4466 .frontend_attach = stk7700ph_frontend_attach,
4467 .tuner_attach = stk7700ph_tuner_attach,
4468
4469 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4470 }},
6ca8f0b9
AC		 4471 },
4472 },
4473
430ae126 4474 .num_device_descs = 10,
6ca8f0b9
AC		 4475 .devices = {
4476 { "Terratec Cinergy HT USB XE",
4477 { &dib0700_usb_id_table[27], NULL },
4478 { NULL },
4479 },
4480 { "Pinnacle Expresscard 320cx",
4481 { &dib0700_usb_id_table[28], NULL },
4482 { NULL },
4483 },
4484 { "Terratec Cinergy HT Express",
4485 { &dib0700_usb_id_table[32], NULL },
4486 { NULL },
4487 },
17a370bc
FT		 4488 { "Gigabyte U8000-RH",
4489 { &dib0700_usb_id_table[37], NULL },
4490 { NULL },
4491 },
8751aaa6
DON		 4492 { "YUAN High-Tech STK7700PH",
4493 { &dib0700_usb_id_table[38], NULL },
4494 { NULL },
4495 },
5769743a
AC		 4496 { "Asus My Cinema-U3000Hybrid",
4497 { &dib0700_usb_id_table[39], NULL },
4498 { NULL },
4499 },
16ba1ee5
XL		 4500 { "YUAN High-Tech MC770",
4501 { &dib0700_usb_id_table[48], NULL },
4502 { NULL },
4503 },
f0f4ae76 4504 { "Leadtek WinFast DTV Dongle H",
4505 { &dib0700_usb_id_table[51], NULL },
4506 { NULL },
4507 },
c53d83cc
PH		 4508 { "YUAN High-Tech STK7700D",
4509 { &dib0700_usb_id_table[54], NULL },
4510 { NULL },
4511 },
430ae126
PO		 4512 { "Hama DVB=T Hybrid USB Stick",
4513 { &dib0700_usb_id_table[85], NULL },
4514 { NULL },
4515 },
6ca8f0b9 4516 },
f72a27b8 4517
72b39310 4518 .rc.core = {
f72a27b8 4519 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4520 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4521 .module_name = "dib0700",
0ffd1ab3 4522 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4523 .allowed_protos = RC_PROTO_BIT_RC5 |
4524 RC_PROTO_BIT_RC6_MCE |
4525 RC_PROTO_BIT_NEC,
d8b4b582 4526 .change_protocol = dib0700_change_protocol,
f72a27b8 4527 },
cb22cb52
DH		 4528 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4529 .num_adapters = 1,
4530 .adapter = {
4531 {
0fae1997 4532 DIB0700_NUM_FRONTENDS(1),
77eed219 4533 .fe = {{
cb22cb52
DH		 4534 .frontend_attach = s5h1411_frontend_attach,
4535 .tuner_attach = xc5000_tuner_attach,
4536
4537 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4538 }},
cb22cb52
DH		 4539 },
4540 },
4541
d2fc3bfc 4542 .num_device_descs = 2,
cb22cb52
DH		 4543 .devices = {
4544 { "Pinnacle PCTV HD Pro USB Stick",
4545 { &dib0700_usb_id_table[40], NULL },
4546 { NULL },
4547 },
d2fc3bfc
DH		 4548 { "Pinnacle PCTV HD USB Stick",
4549 { &dib0700_usb_id_table[41], NULL },
4550 { NULL },
4551 },
cb22cb52 4552 },
72b39310
MCC		 4553
4554 .rc.core = {
f72a27b8 4555 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4556 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4557 .module_name = "dib0700",
0ffd1ab3 4558 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4559 .allowed_protos = RC_PROTO_BIT_RC5 |
4560 RC_PROTO_BIT_RC6_MCE |
4561 RC_PROTO_BIT_NEC,
d8b4b582 4562 .change_protocol = dib0700_change_protocol,
f72a27b8 4563 },
ce904bcb
MK		 4564 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4565 .num_adapters = 1,
4566 .adapter = {
4567 {
0fae1997 4568 DIB0700_NUM_FRONTENDS(1),
77eed219 4569 .fe = {{
ce904bcb
MK		 4570 .frontend_attach = lgdt3305_frontend_attach,
4571 .tuner_attach = mxl5007t_tuner_attach,
4572
4573 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4574 }},
ce904bcb
MK		 4575 },
4576 },
4577
4578 .num_device_descs = 2,
4579 .devices = {
4580 { "Hauppauge ATSC MiniCard (B200)",
4581 { &dib0700_usb_id_table[46], NULL },
4582 { NULL },
4583 },
4584 { "Hauppauge ATSC MiniCard (B210)",
4585 { &dib0700_usb_id_table[47], NULL },
4586 { NULL },
4587 },
4588 },
d300bd69
OG		 4589 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4590
4591 .num_adapters = 1,
4592 .adapter = {
4593 {
0fae1997 4594 DIB0700_NUM_FRONTENDS(1),
77eed219 4595 .fe = {{
f8731f4d
OG		 4596 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4597 .pid_filter_count = 32,
4598 .pid_filter = stk70x0p_pid_filter,
4599 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
90e12cec 4600 .frontend_attach = stk7770p_frontend_attach,
d300bd69
OG		 4601 .tuner_attach = dib7770p_tuner_attach,
4602
4603 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4604 }},
d300bd69
OG		 4605 },
4606 },
4607
d1402307 4608 .num_device_descs = 4,
d300bd69
OG		 4609 .devices = {
4610 { "DiBcom STK7770P reference design",
4611 { &dib0700_usb_id_table[59], NULL },
4612 { NULL },
4613 },
1e13c8f0
PB		 4614 { "Terratec Cinergy T USB XXS (HD)/ T3",
4615 { &dib0700_usb_id_table[33],
4616 &dib0700_usb_id_table[52],
4617 &dib0700_usb_id_table[60], NULL},
db48138f
PB		 4618 { NULL },
4619 },
498e677c
LMF		 4620 { "TechniSat AirStar TeleStick 2",
4621 { &dib0700_usb_id_table[74], NULL },
4622 { NULL },
4623 },
d1402307
SE		 4624 { "Medion CTX1921 DVB-T USB",
4625 { &dib0700_usb_id_table[75], NULL },
4626 { NULL },
4627 },
d300bd69 4628 },
72b39310
MCC		 4629
4630 .rc.core = {
f72a27b8 4631 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4632 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4633 .module_name = "dib0700",
0ffd1ab3 4634 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4635 .allowed_protos = RC_PROTO_BIT_RC5 |
4636 RC_PROTO_BIT_RC6_MCE |
4637 RC_PROTO_BIT_NEC,
d8b4b582 4638 .change_protocol = dib0700_change_protocol,
f72a27b8 4639 },
ba3fe3a9
PB		 4640 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4641 .num_adapters = 1,
4642 .adapter = {
4643 {
0fae1997 4644 DIB0700_NUM_FRONTENDS(1),
77eed219 4645 .fe = {{
f8731f4d
OG		 4646 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4647 .pid_filter_count = 32,
03245a5e
OG		 4648 .pid_filter = stk80xx_pid_filter,
4649 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4650 .frontend_attach = stk807x_frontend_attach,
4651 .tuner_attach = dib807x_tuner_attach,
4652
4653 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4654 }},
ba3fe3a9
PB		 4655 },
4656 },
4657
8a378e85 4658 .num_device_descs = 3,
ba3fe3a9
PB		 4659 .devices = {
4660 { "DiBcom STK807xP reference design",
4661 { &dib0700_usb_id_table[62], NULL },
4662 { NULL },
4663 },
aaeab30f
MCC		 4664 { "Prolink Pixelview SBTVD",
4665 { &dib0700_usb_id_table[63], NULL },
4666 { NULL },
4667 },
8a378e85
F		 4668 { "EvolutePC TVWay+",
4669 { &dib0700_usb_id_table[64], NULL },
4670 { NULL },
4671 },
ba3fe3a9
PB		 4672 },
4673
72b39310 4674 .rc.core = {
f72a27b8 4675 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4676 .rc_codes = RC_MAP_DIB0700_NEC_TABLE,
72b39310 4677 .module_name = "dib0700",
0ffd1ab3 4678 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4679 .allowed_protos = RC_PROTO_BIT_RC5 |
4680 RC_PROTO_BIT_RC6_MCE |
4681 RC_PROTO_BIT_NEC,
d8b4b582 4682 .change_protocol = dib0700_change_protocol,
f72a27b8 4683 },
ba3fe3a9
PB		 4684 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4685 .num_adapters = 2,
4686 .adapter = {
4687 {
0fae1997 4688 DIB0700_NUM_FRONTENDS(1),
77eed219 4689 .fe = {{
f8731f4d
OG		 4690 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4691 .pid_filter_count = 32,
03245a5e
OG		 4692 .pid_filter = stk80xx_pid_filter,
4693 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4694 .frontend_attach = stk807xpvr_frontend_attach0,
4695 .tuner_attach = dib807x_tuner_attach,
4696
4697 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4698 }},
ba3fe3a9
PB		 4699 },
4700 {
0fae1997 4701 DIB0700_NUM_FRONTENDS(1),
77eed219 4702 .fe = {{
f8731f4d
OG		 4703 .caps = DVB_USB_ADAP_HAS_PID_FILTER | DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4704 .pid_filter_count = 32,
03245a5e
OG		 4705 .pid_filter = stk80xx_pid_filter,
4706 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
ba3fe3a9
PB		 4707 .frontend_attach = stk807xpvr_frontend_attach1,
4708 .tuner_attach = dib807x_tuner_attach,
4709
4710 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4711 }},
ba3fe3a9
PB		 4712 },
4713 },
4714
4715 .num_device_descs = 1,
4716 .devices = {
4717 { "DiBcom STK807xPVR reference design",
4718 { &dib0700_usb_id_table[61], NULL },
4719 { NULL },
4720 },
4721 },
4722
72b39310 4723 .rc.core = {
f72a27b8 4724 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 4725 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 4726 .module_name = "dib0700",
0ffd1ab3 4727 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4728 .allowed_protos = RC_PROTO_BIT_RC5 |
4729 RC_PROTO_BIT_RC6_MCE |
4730 RC_PROTO_BIT_NEC,
d8b4b582 4731 .change_protocol = dib0700_change_protocol,
f72a27b8 4732 },
03245a5e
OG		 4733 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4734 .num_adapters = 1,
4735 .adapter = {
4736 {
0fae1997 4737 DIB0700_NUM_FRONTENDS(1),
77eed219 4738 .fe = {{
03245a5e
OG		 4739 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4740 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4741 .pid_filter_count = 32,
4742 .pid_filter = stk80xx_pid_filter,
4743 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4744 .frontend_attach = stk809x_frontend_attach,
4745 .tuner_attach = dib809x_tuner_attach,
4746
4747 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4748 }},
03245a5e
OG		 4749 },
4750 },
4751
4752 .num_device_descs = 1,
4753 .devices = {
4754 { "DiBcom STK8096GP reference design",
4755 { &dib0700_usb_id_table[67], NULL },
4756 { NULL },
4757 },
4758 },
4759
be9bae10
OG		 4760 .rc.core = {
4761 .rc_interval = DEFAULT_RC_INTERVAL,
4762 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4763 .module_name = "dib0700",
4764 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4765 .allowed_protos = RC_PROTO_BIT_RC5 |
4766 RC_PROTO_BIT_RC6_MCE |
4767 RC_PROTO_BIT_NEC,
be9bae10
OG		 4768 .change_protocol = dib0700_change_protocol,
4769 },
4770 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4771 .num_adapters = 1,
4772 .adapter = {
4773 {
0fae1997 4774 DIB0700_NUM_FRONTENDS(1),
77eed219 4775 .fe = {{
be9bae10
OG		 4776 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4777 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4778 .pid_filter_count = 32,
4779 .pid_filter = dib90x0_pid_filter,
4780 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4781 .frontend_attach = stk9090m_frontend_attach,
4782 .tuner_attach = dib9090_tuner_attach,
4783
4784 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4785 }},
be9bae10
OG		 4786 },
4787 },
4788
4789 .num_device_descs = 1,
4790 .devices = {
4791 { "DiBcom STK9090M reference design",
4792 { &dib0700_usb_id_table[69], NULL },
4793 { NULL },
4794 },
4795 },
4796
4797 .rc.core = {
4798 .rc_interval = DEFAULT_RC_INTERVAL,
4799 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4800 .module_name = "dib0700",
4801 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4802 .allowed_protos = RC_PROTO_BIT_RC5 |
4803 RC_PROTO_BIT_RC6_MCE |
4804 RC_PROTO_BIT_NEC,
be9bae10
OG		 4805 .change_protocol = dib0700_change_protocol,
4806 },
4807 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4808 .num_adapters = 1,
4809 .adapter = {
4810 {
0fae1997 4811 DIB0700_NUM_FRONTENDS(1),
77eed219 4812 .fe = {{
be9bae10
OG		 4813 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4814 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4815 .pid_filter_count = 32,
4816 .pid_filter = stk80xx_pid_filter,
4817 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
4818 .frontend_attach = nim8096md_frontend_attach,
4819 .tuner_attach = nim8096md_tuner_attach,
4820
4821 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4822 }},
be9bae10
OG		 4823 },
4824 },
4825
4826 .num_device_descs = 1,
4827 .devices = {
4828 { "DiBcom NIM8096MD reference design",
4829 { &dib0700_usb_id_table[70], NULL },
4830 { NULL },
4831 },
4832 },
4833
4834 .rc.core = {
4835 .rc_interval = DEFAULT_RC_INTERVAL,
4836 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4837 .module_name = "dib0700",
4838 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4839 .allowed_protos = RC_PROTO_BIT_RC5 |
4840 RC_PROTO_BIT_RC6_MCE |
4841 RC_PROTO_BIT_NEC,
be9bae10
OG		 4842 .change_protocol = dib0700_change_protocol,
4843 },
4844 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4845 .num_adapters = 1,
4846 .adapter = {
4847 {
0fae1997 4848 DIB0700_NUM_FRONTENDS(1),
77eed219 4849 .fe = {{
be9bae10
OG		 4850 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4851 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4852 .pid_filter_count = 32,
4853 .pid_filter = dib90x0_pid_filter,
4854 .pid_filter_ctrl = dib90x0_pid_filter_ctrl,
4855 .frontend_attach = nim9090md_frontend_attach,
4856 .tuner_attach = nim9090md_tuner_attach,
4857
4858 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4859 }},
be9bae10
OG		 4860 },
4861 },
4862
4863 .num_device_descs = 1,
4864 .devices = {
4865 { "DiBcom NIM9090MD reference design",
4866 { &dib0700_usb_id_table[71], NULL },
4867 { NULL },
4868 },
4869 },
4870
4871 .rc.core = {
4872 .rc_interval = DEFAULT_RC_INTERVAL,
4873 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4874 .module_name = "dib0700",
4875 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4876 .allowed_protos = RC_PROTO_BIT_RC5 |
4877 RC_PROTO_BIT_RC6_MCE |
4878 RC_PROTO_BIT_NEC,
be9bae10
OG		 4879 .change_protocol = dib0700_change_protocol,
4880 },
4881 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4882 .num_adapters = 1,
4883 .adapter = {
4884 {
0fae1997 4885 DIB0700_NUM_FRONTENDS(1),
77eed219 4886 .fe = {{
be9bae10
OG		 4887 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4888 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4889 .pid_filter_count = 32,
4890 .pid_filter = stk70x0p_pid_filter,
4891 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4892 .frontend_attach = nim7090_frontend_attach,
4893 .tuner_attach = nim7090_tuner_attach,
4894
4895 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4896 }},
be9bae10
OG		 4897 },
4898 },
4899
4900 .num_device_descs = 1,
4901 .devices = {
4902 { "DiBcom NIM7090 reference design",
4903 { &dib0700_usb_id_table[72], NULL },
4904 { NULL },
4905 },
4906 },
4907
4908 .rc.core = {
4909 .rc_interval = DEFAULT_RC_INTERVAL,
4910 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4911 .module_name = "dib0700",
4912 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4913 .allowed_protos = RC_PROTO_BIT_RC5 |
4914 RC_PROTO_BIT_RC6_MCE |
4915 RC_PROTO_BIT_NEC,
be9bae10
OG		 4916 .change_protocol = dib0700_change_protocol,
4917 },
4918 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4919 .num_adapters = 2,
4920 .adapter = {
4921 {
0fae1997 4922 DIB0700_NUM_FRONTENDS(1),
77eed219 4923 .fe = {{
be9bae10
OG		 4924 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4925 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4926 .pid_filter_count = 32,
4927 .pid_filter = stk70x0p_pid_filter,
4928 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4929 .frontend_attach = tfe7090pvr_frontend0_attach,
4930 .tuner_attach = tfe7090pvr_tuner0_attach,
4931
4932 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
77eed219 4933 }},
be9bae10
OG		 4934 },
4935 {
0fae1997 4936 DIB0700_NUM_FRONTENDS(1),
77eed219 4937 .fe = {{
be9bae10
OG		 4938 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
4939 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
4940 .pid_filter_count = 32,
4941 .pid_filter = stk70x0p_pid_filter,
4942 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
4943 .frontend_attach = tfe7090pvr_frontend1_attach,
4944 .tuner_attach = tfe7090pvr_tuner1_attach,
4945
4946 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4947 }},
be9bae10
OG		 4948 },
4949 },
4950
4951 .num_device_descs = 1,
4952 .devices = {
4953 { "DiBcom TFE7090PVR reference design",
4954 { &dib0700_usb_id_table[73], NULL },
4955 { NULL },
4956 },
4957 },
4958
8d009a0c
DF		 4959 .rc.core = {
4960 .rc_interval = DEFAULT_RC_INTERVAL,
4961 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4962 .module_name = "dib0700",
4963 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4964 .allowed_protos = RC_PROTO_BIT_RC5 |
4965 RC_PROTO_BIT_RC6_MCE |
4966 RC_PROTO_BIT_NEC,
8d009a0c
DF		 4967 .change_protocol = dib0700_change_protocol,
4968 },
4969 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
4970 .num_adapters = 1,
4971 .adapter = {
4972 {
0fae1997 4973 DIB0700_NUM_FRONTENDS(1),
77eed219 4974 .fe = {{
01f16263 4975 .frontend_attach = pctv340e_frontend_attach,
8d009a0c
DF		 4976 .tuner_attach = xc4000_tuner_attach,
4977
4978 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
77eed219 4979 }},
8d009a0c
DF		 4980 },
4981 },
4982
33fb1681 4983 .num_device_descs = 2,
8d009a0c
DF		 4984 .devices = {
4985 { "Pinnacle PCTV 340e HD Pro USB Stick",
4986 { &dib0700_usb_id_table[76], NULL },
4987 { NULL },
4988 },
33fb1681
DH		 4989 { "Pinnacle PCTV Hybrid Stick Solo",
4990 { &dib0700_usb_id_table[77], NULL },
4991 { NULL },
4992 },
8d009a0c 4993 },
6724a2f4
OG		 4994 .rc.core = {
4995 .rc_interval = DEFAULT_RC_INTERVAL,
4996 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
4997 .module_name = "dib0700",
4998 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 4999 .allowed_protos = RC_PROTO_BIT_RC5 |
5000 RC_PROTO_BIT_RC6_MCE |
5001 RC_PROTO_BIT_NEC,
6724a2f4
OG		 5002 .change_protocol = dib0700_change_protocol,
5003 },
5004 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5005 .num_adapters = 1,
5006 .adapter = {
5007 {
0fae1997 5008 DIB0700_NUM_FRONTENDS(1),
6724a2f4
OG		 5009 .fe = {{
5010 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5011 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5012 .pid_filter_count = 32,
5013 .pid_filter = stk70x0p_pid_filter,
5014 .pid_filter_ctrl = stk70x0p_pid_filter_ctrl,
f45f513a
OG		 5015 .frontend_attach = tfe7790p_frontend_attach,
5016 .tuner_attach = tfe7790p_tuner_attach,
b293f304
OG		 5017
5018 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
5019 } },
b293f304
OG		 5020 },
5021 },
5022
5023 .num_device_descs = 1,
5024 .devices = {
f45f513a
OG		 5025 { "DiBcom TFE7790P reference design",
5026 { &dib0700_usb_id_table[78], NULL },
b293f304
OG		 5027 { NULL },
5028 },
5029 },
5030
88f3a358
OG		 5031 .rc.core = {
5032 .rc_interval = DEFAULT_RC_INTERVAL,
5033 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
5034 .module_name = "dib0700",
5035 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 5036 .allowed_protos = RC_PROTO_BIT_RC5 |
5037 RC_PROTO_BIT_RC6_MCE |
5038 RC_PROTO_BIT_NEC,
88f3a358
OG		 5039 .change_protocol = dib0700_change_protocol,
5040 },
5041 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5042 .num_adapters = 1,
5043 .adapter = {
5044 {
0fae1997 5045 DIB0700_NUM_FRONTENDS(1),
88f3a358
OG		 5046 .fe = {{
5047 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5048 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5049 .pid_filter_count = 32,
5050 .pid_filter = stk80xx_pid_filter,
5051 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
5052 .frontend_attach = tfe8096p_frontend_attach,
5053 .tuner_attach = tfe8096p_tuner_attach,
5054
5055 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
5056
5057 } },
88f3a358
OG		 5058 },
5059 },
5060
5061 .num_device_descs = 1,
5062 .devices = {
5063 { "DiBcom TFE8096P reference design",
f45f513a 5064 { &dib0700_usb_id_table[79], NULL },
88f3a358
OG		 5065 { NULL },
5066 },
5067 },
5068
72b39310 5069 .rc.core = {
f72a27b8 5070 .rc_interval = DEFAULT_RC_INTERVAL,
5af935cc 5071 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
72b39310 5072 .module_name = "dib0700",
0ffd1ab3 5073 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 5074 .allowed_protos = RC_PROTO_BIT_RC5 |
5075 RC_PROTO_BIT_RC6_MCE |
5076 RC_PROTO_BIT_NEC,
d8b4b582 5077 .change_protocol = dib0700_change_protocol,
f72a27b8 5078 },
91be260f
NS		 5079 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5080 .num_adapters = 2,
5081 .adapter = {
5082 {
5083 .num_frontends = 1,
5084 .fe = {{
5085 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5086 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5087 .pid_filter_count = 32,
5088 .pid_filter = stk80xx_pid_filter,
5089 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
5090 .frontend_attach = stk809x_frontend_attach,
5091 .tuner_attach = dib809x_tuner_attach,
5092
5093 DIB0700_DEFAULT_STREAMING_CONFIG(0x02),
5094 } },
5095 .size_of_priv =
5096 sizeof(struct dib0700_adapter_state),
5097 }, {
5098 .num_frontends = 1,
5099 .fe = { {
5100 .caps = DVB_USB_ADAP_HAS_PID_FILTER |
5101 DVB_USB_ADAP_PID_FILTER_CAN_BE_TURNED_OFF,
5102 .pid_filter_count = 32,
5103 .pid_filter = stk80xx_pid_filter,
5104 .pid_filter_ctrl = stk80xx_pid_filter_ctrl,
5105 .frontend_attach = stk809x_frontend1_attach,
5106 .tuner_attach = dib809x_tuner_attach,
5107
5108 DIB0700_DEFAULT_STREAMING_CONFIG(0x03),
5109 } },
5110 .size_of_priv =
5111 sizeof(struct dib0700_adapter_state),
5112 },
5113 },
5114 .num_device_descs = 1,
5115 .devices = {
5116 { "DiBcom STK8096-PVR reference design",
ec788795
AT		 5117 { &dib0700_usb_id_table[83],
5118 &dib0700_usb_id_table[84], NULL},
91be260f
NS		 5119 { NULL },
5120 },
5121 },
5122
5123 .rc.core = {
5124 .rc_interval = DEFAULT_RC_INTERVAL,
5125 .rc_codes = RC_MAP_DIB0700_RC5_TABLE,
5126 .module_name = "dib0700",
5127 .rc_query = dib0700_rc_query_old_firmware,
6d741bfe
SY		 5128 .allowed_protos = RC_PROTO_BIT_RC5 |
5129 RC_PROTO_BIT_RC6_MCE |
5130 RC_PROTO_BIT_NEC,
91be260f
NS		 5131 .change_protocol = dib0700_change_protocol,
5132 },
c4d84547
OS		 5133 }, { DIB0700_DEFAULT_DEVICE_PROPERTIES,
5134 .num_adapters = 1,
5135 .adapter = {
5136 {
5137 DIB0700_NUM_FRONTENDS(1),
5138 .fe = {{
5139 .frontend_attach = xbox_one_attach,
5140
5141 DIB0700_DEFAULT_STREAMING_CONFIG(0x82),
5142 } },
5143 },
5144 },
5145 .num_device_descs = 1,
5146 .devices = {
5147 { "Microsoft Xbox One Digital TV Tuner",
5148 { &dib0700_usb_id_table[86], NULL },
5149 { NULL },
5150 },
5151 },
01373a5c 5152 },
b7f54910
PB		 5153};
5154
5155int dib0700_device_count = ARRAY_SIZE(dib0700_devices);
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