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[mirror_ubuntu-eoan-kernel.git] / drivers / media / usb / em28xx / em28xx-i2c.c
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1// SPDX-License-Identifier: GPL-2.0+
2//
3// em28xx-i2c.c - driver for Empia EM2800/EM2820/2840 USB video capture devices
4//
5// Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it>
6// Markus Rechberger <mrechberger@gmail.com>
32590819 7// Mauro Carvalho Chehab <mchehab@kernel.org>
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8// Sascha Sommer <saschasommer@freenet.de>
9// Copyright (C) 2013 Frank Schäfer <fschaefer.oss@googlemail.com>
10//
11// This program is free software; you can redistribute it and/or modify
12// it under the terms of the GNU General Public License as published by
13// the Free Software Foundation; either version 2 of the License, or
14// (at your option) any later version.
15//
16// This program is distributed in the hope that it will be useful,
17// but WITHOUT ANY WARRANTY; without even the implied warranty of
18// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19// GNU General Public License for more details.
a6c2ba28 20
8314d402
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21#include "em28xx.h"
22
a6c2ba28 23#include <linux/module.h>
24#include <linux/kernel.h>
25#include <linux/usb.h>
26#include <linux/i2c.h>
4b83626a 27#include <linux/jiffies.h>
a6c2ba28 28
6c362c8e 29#include "tuner-xc2028.h"
5e453dc7 30#include <media/v4l2-common.h>
d5e52653 31#include <media/tuner.h>
a6c2ba28 32
33/* ----------------------------------------------------------- */
34
ff699e6b 35static unsigned int i2c_scan;
a6c2ba28 36module_param(i2c_scan, int, 0444);
37MODULE_PARM_DESC(i2c_scan, "scan i2c bus at insmod time");
38
ff699e6b 39static unsigned int i2c_debug;
a6c2ba28 40module_param(i2c_debug, int, 0644);
50f0a9df 41MODULE_PARM_DESC(i2c_debug, "i2c debug message level (1: normal debug, 2: show I2C transfers)");
a6c2ba28 42
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43#define dprintk(level, fmt, arg...) do { \
44 if (i2c_debug > level) \
29b05e22 45 dev_printk(KERN_DEBUG, &dev->intf->dev, \
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46 "i2c: %s: " fmt, __func__, ## arg); \
47} while (0)
48
cf68c22f
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49/*
50 * Time in msecs to wait for i2c xfers to finish.
51 * 35ms is the maximum time a SMBUS device could wait when
52 * clock stretching is used. As the transfer itself will take
53 * some time to happen, set it to 35 ms.
54 *
55 * Ok, I2C doesn't specify any limit. So, eventually, we may need
56 * to increase this timeout.
57 */
58#define EM28XX_I2C_XFER_TIMEOUT 35 /* ms */
59
60static int em28xx_i2c_timeout(struct em28xx *dev)
61{
62 int time = EM28XX_I2C_XFER_TIMEOUT;
63
64 switch (dev->i2c_speed & 0x03) {
65 case EM28XX_I2C_FREQ_25_KHZ:
66 time += 4; /* Assume 4 ms for transfers */
67 break;
68 case EM28XX_I2C_FREQ_100_KHZ:
69 case EM28XX_I2C_FREQ_400_KHZ:
70 time += 1; /* Assume 1 ms for transfers */
71 break;
72 default: /* EM28XX_I2C_FREQ_1_5_MHZ */
73 break;
74 }
75
76 return msecs_to_jiffies(time);
77}
78
a6c2ba28 79/*
f5ae371a
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80 * em2800_i2c_send_bytes()
81 * send up to 4 bytes to the em2800 i2c device
596d92d5 82 */
f5ae371a 83static int em2800_i2c_send_bytes(struct em28xx *dev, u8 addr, u8 *buf, u16 len)
596d92d5 84{
cf68c22f 85 unsigned long timeout = jiffies + em28xx_i2c_timeout(dev);
596d92d5 86 int ret;
a6bad040 87 u8 b2[6];
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88
89 if (len < 1 || len > 4)
90 return -EOPNOTSUPP;
91
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92 b2[5] = 0x80 + len - 1;
93 b2[4] = addr;
94 b2[3] = buf[0];
95 if (len > 1)
96 b2[2] = buf[1];
97 if (len > 2)
98 b2[1] = buf[2];
99 if (len > 3)
100 b2[0] = buf[3];
101
2fcc82d8 102 /* trigger write */
3acf2809 103 ret = dev->em28xx_write_regs(dev, 4 - len, &b2[4 - len], 2 + len);
596d92d5 104 if (ret != 2 + len) {
29b05e22 105 dev_warn(&dev->intf->dev,
ce8591ff 106 "failed to trigger write to i2c address 0x%x (error=%i)\n",
d230d5ad 107 addr, ret);
45f04e82 108 return (ret < 0) ? ret : -EIO;
596d92d5 109 }
2fcc82d8 110 /* wait for completion */
4b83626a 111 while (time_is_after_jiffies(timeout)) {
3acf2809 112 ret = dev->em28xx_read_reg(dev, 0x05);
4b83626a 113 if (ret == 0x80 + len - 1)
596d92d5 114 return len;
4b83626a 115 if (ret == 0x94 + len - 1) {
ce8591ff 116 dprintk(1, "R05 returned 0x%02x: I2C ACK error\n", ret);
e63b009d 117 return -ENXIO;
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118 }
119 if (ret < 0) {
29b05e22 120 dev_warn(&dev->intf->dev,
ce8591ff 121 "failed to get i2c transfer status from bridge register (error=%i)\n",
2a96f60e 122 ret);
45f04e82
FS
123 return ret;
124 }
8adbc7d6 125 usleep_range(5000, 6000);
596d92d5 126 }
ce8591ff 127 dprintk(0, "write to i2c device at 0x%x timed out\n", addr);
e63b009d 128 return -ETIMEDOUT;
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129}
130
596d92d5 131/*
2fcc82d8
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132 * em2800_i2c_recv_bytes()
133 * read up to 4 bytes from the em2800 i2c device
596d92d5 134 */
2fcc82d8 135static int em2800_i2c_recv_bytes(struct em28xx *dev, u8 addr, u8 *buf, u16 len)
596d92d5 136{
cf68c22f 137 unsigned long timeout = jiffies + em28xx_i2c_timeout(dev);
2fcc82d8 138 u8 buf2[4];
596d92d5 139 int ret;
2fcc82d8
FS
140 int i;
141
142 if (len < 1 || len > 4)
143 return -EOPNOTSUPP;
144
145 /* trigger read */
146 buf2[1] = 0x84 + len - 1;
147 buf2[0] = addr;
148 ret = dev->em28xx_write_regs(dev, 0x04, buf2, 2);
149 if (ret != 2) {
29b05e22 150 dev_warn(&dev->intf->dev,
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151 "failed to trigger read from i2c address 0x%x (error=%i)\n",
152 addr, ret);
2fcc82d8 153 return (ret < 0) ? ret : -EIO;
596d92d5 154 }
d45b9b8a 155
2fcc82d8 156 /* wait for completion */
4b83626a 157 while (time_is_after_jiffies(timeout)) {
2fcc82d8 158 ret = dev->em28xx_read_reg(dev, 0x05);
4b83626a 159 if (ret == 0x84 + len - 1)
2fcc82d8 160 break;
4b83626a 161 if (ret == 0x94 + len - 1) {
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162 dprintk(1, "R05 returned 0x%02x: I2C ACK error\n",
163 ret);
e63b009d 164 return -ENXIO;
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165 }
166 if (ret < 0) {
29b05e22 167 dev_warn(&dev->intf->dev,
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168 "failed to get i2c transfer status from bridge register (error=%i)\n",
169 ret);
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170 return ret;
171 }
8adbc7d6 172 usleep_range(5000, 6000);
596d92d5 173 }
8adbc7d6 174 if (ret != 0x84 + len - 1)
ce8591ff 175 dprintk(0, "read from i2c device at 0x%x timed out\n", addr);
2fcc82d8
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176
177 /* get the received message */
8adbc7d6 178 ret = dev->em28xx_read_reg_req_len(dev, 0x00, 4 - len, buf2, len);
2fcc82d8 179 if (ret != len) {
29b05e22 180 dev_warn(&dev->intf->dev,
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181 "reading from i2c device at 0x%x failed: couldn't get the received message from the bridge (error=%i)\n",
182 addr, ret);
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183 return (ret < 0) ? ret : -EIO;
184 }
185 for (i = 0; i < len; i++)
186 buf[i] = buf2[len - 1 - i];
187
188 return ret;
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189}
190
191/*
2fcc82d8
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192 * em2800_i2c_check_for_device()
193 * check if there is an i2c device at the supplied address
596d92d5 194 */
2fcc82d8 195static int em2800_i2c_check_for_device(struct em28xx *dev, u8 addr)
596d92d5 196{
2fcc82d8 197 u8 buf;
596d92d5 198 int ret;
f5ae371a 199
2fcc82d8
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200 ret = em2800_i2c_recv_bytes(dev, addr, &buf, 1);
201 if (ret == 1)
202 return 0;
203 return (ret < 0) ? ret : -EIO;
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204}
205
206/*
3acf2809 207 * em28xx_i2c_send_bytes()
a6c2ba28 208 */
a6bad040
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209static int em28xx_i2c_send_bytes(struct em28xx *dev, u16 addr, u8 *buf,
210 u16 len, int stop)
a6c2ba28 211{
cf68c22f 212 unsigned long timeout = jiffies + em28xx_i2c_timeout(dev);
4b83626a 213 int ret;
a6c2ba28 214
f5ae371a
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215 if (len < 1 || len > 64)
216 return -EOPNOTSUPP;
fa74aca3
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217 /*
218 * NOTE: limited by the USB ctrl message constraints
219 * Zero length reads always succeed, even if no device is connected
220 */
f5ae371a 221
45f04e82
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222 /* Write to i2c device */
223 ret = dev->em28xx_write_regs_req(dev, stop ? 2 : 3, addr, buf, len);
224 if (ret != len) {
225 if (ret < 0) {
29b05e22 226 dev_warn(&dev->intf->dev,
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227 "writing to i2c device at 0x%x failed (error=%i)\n",
228 addr, ret);
45f04e82 229 return ret;
45f04e82 230 }
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231 dev_warn(&dev->intf->dev,
232 "%i bytes write to i2c device at 0x%x requested, but %i bytes written\n",
233 len, addr, ret);
234 return -EIO;
45f04e82 235 }
a6c2ba28 236
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237 /* wait for completion */
238 while (time_is_after_jiffies(timeout)) {
bbc70e64 239 ret = dev->em28xx_read_reg(dev, 0x05);
4b83626a 240 if (ret == 0) /* success */
45f04e82 241 return len;
4b83626a 242 if (ret == 0x10) {
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243 dprintk(1, "I2C ACK error on writing to addr 0x%02x\n",
244 addr);
e63b009d 245 return -ENXIO;
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246 }
247 if (ret < 0) {
29b05e22 248 dev_warn(&dev->intf->dev,
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249 "failed to get i2c transfer status from bridge register (error=%i)\n",
250 ret);
45f04e82
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251 return ret;
252 }
8adbc7d6 253 usleep_range(5000, 6000);
fa74aca3
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254 /*
255 * NOTE: do we really have to wait for success ?
256 * Never seen anything else than 0x00 or 0x10
257 * (even with high payload) ...
258 */
bbc70e64 259 }
123a17d1
FS
260
261 if (ret == 0x02 || ret == 0x04) {
262 /* NOTE: these errors seem to be related to clock stretching */
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263 dprintk(0,
264 "write to i2c device at 0x%x timed out (status=%i)\n",
265 addr, ret);
123a17d1
FS
266 return -ETIMEDOUT;
267 }
268
29b05e22 269 dev_warn(&dev->intf->dev,
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270 "write to i2c device at 0x%x failed with unknown error (status=%i)\n",
271 addr, ret);
123a17d1 272 return -EIO;
a6c2ba28 273}
274
275/*
3acf2809 276 * em28xx_i2c_recv_bytes()
a6c2ba28 277 * read a byte from the i2c device
278 */
a6bad040 279static int em28xx_i2c_recv_bytes(struct em28xx *dev, u16 addr, u8 *buf, u16 len)
a6c2ba28 280{
281 int ret;
f5ae371a
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282
283 if (len < 1 || len > 64)
284 return -EOPNOTSUPP;
fa74aca3
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285 /*
286 * NOTE: limited by the USB ctrl message constraints
287 * Zero length reads always succeed, even if no device is connected
288 */
f5ae371a 289
45f04e82 290 /* Read data from i2c device */
3acf2809 291 ret = dev->em28xx_read_reg_req_len(dev, 2, addr, buf, len);
7f6301d1 292 if (ret < 0) {
29b05e22 293 dev_warn(&dev->intf->dev,
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294 "reading from i2c device at 0x%x failed (error=%i)\n",
295 addr, ret);
7f6301d1 296 return ret;
45f04e82 297 }
fa74aca3
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298 /*
299 * NOTE: some devices with two i2c busses have the bad habit to return 0
7f6301d1
FS
300 * bytes if we are on bus B AND there was no write attempt to the
301 * specified slave address before AND no device is present at the
302 * requested slave address.
e63b009d 303 * Anyway, the next check will fail with -ENXIO in this case, so avoid
7f6301d1
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304 * spamming the system log on device probing and do nothing here.
305 */
45f04e82
FS
306
307 /* Check success of the i2c operation */
308 ret = dev->em28xx_read_reg(dev, 0x05);
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309 if (ret == 0) /* success */
310 return len;
a6c2ba28 311 if (ret < 0) {
29b05e22 312 dev_warn(&dev->intf->dev,
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313 "failed to get i2c transfer status from bridge register (error=%i)\n",
314 ret);
a6c2ba28 315 return ret;
316 }
d845fb3a 317 if (ret == 0x10) {
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318 dprintk(1, "I2C ACK error on writing to addr 0x%02x\n",
319 addr);
e63b009d 320 return -ENXIO;
d845fb3a 321 }
4b83626a 322
123a17d1
FS
323 if (ret == 0x02 || ret == 0x04) {
324 /* NOTE: these errors seem to be related to clock stretching */
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325 dprintk(0,
326 "write to i2c device at 0x%x timed out (status=%i)\n",
327 addr, ret);
123a17d1
FS
328 return -ETIMEDOUT;
329 }
330
29b05e22 331 dev_warn(&dev->intf->dev,
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332 "write to i2c device at 0x%x failed with unknown error (status=%i)\n",
333 addr, ret);
123a17d1 334 return -EIO;
a6c2ba28 335}
336
337/*
3acf2809 338 * em28xx_i2c_check_for_device()
a6c2ba28 339 * check if there is a i2c_device at the supplied address
340 */
a6bad040 341static int em28xx_i2c_check_for_device(struct em28xx *dev, u16 addr)
a6c2ba28 342{
a6c2ba28 343 int ret;
45f04e82 344 u8 buf;
a6c2ba28 345
45f04e82
FS
346 ret = em28xx_i2c_recv_bytes(dev, addr, &buf, 1);
347 if (ret == 1)
348 return 0;
349 return (ret < 0) ? ret : -EIO;
a6c2ba28 350}
351
a3ea4bf9
FS
352/*
353 * em25xx_bus_B_send_bytes
354 * write bytes to the i2c device
355 */
356static int em25xx_bus_B_send_bytes(struct em28xx *dev, u16 addr, u8 *buf,
357 u16 len)
358{
359 int ret;
360
361 if (len < 1 || len > 64)
362 return -EOPNOTSUPP;
363 /*
364 * NOTE: limited by the USB ctrl message constraints
365 * Zero length reads always succeed, even if no device is connected
366 */
367
368 /* Set register and write value */
369 ret = dev->em28xx_write_regs_req(dev, 0x06, addr, buf, len);
370 if (ret != len) {
371 if (ret < 0) {
29b05e22 372 dev_warn(&dev->intf->dev,
ce8591ff
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373 "writing to i2c device at 0x%x failed (error=%i)\n",
374 addr, ret);
a3ea4bf9 375 return ret;
a3ea4bf9 376 }
8adbc7d6
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377
378 dev_warn(&dev->intf->dev,
379 "%i bytes write to i2c device at 0x%x requested, but %i bytes written\n",
380 len, addr, ret);
381 return -EIO;
a3ea4bf9
FS
382 }
383 /* Check success */
384 ret = dev->em28xx_read_reg_req(dev, 0x08, 0x0000);
385 /*
386 * NOTE: the only error we've seen so far is
387 * 0x01 when the slave device is not present
388 */
389 if (!ret)
390 return len;
8adbc7d6
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391
392 if (ret > 0) {
ce8591ff 393 dprintk(1, "Bus B R08 returned 0x%02x: I2C ACK error\n", ret);
e63b009d 394 return -ENXIO;
d845fb3a 395 }
a3ea4bf9
FS
396
397 return ret;
398 /*
399 * NOTE: With chip types (other chip IDs) which actually don't support
400 * this operation, it seems to succeed ALWAYS ! (even if there is no
401 * slave device or even no second i2c bus provided)
402 */
403}
404
405/*
406 * em25xx_bus_B_recv_bytes
407 * read bytes from the i2c device
408 */
409static int em25xx_bus_B_recv_bytes(struct em28xx *dev, u16 addr, u8 *buf,
410 u16 len)
411{
412 int ret;
413
414 if (len < 1 || len > 64)
415 return -EOPNOTSUPP;
416 /*
417 * NOTE: limited by the USB ctrl message constraints
418 * Zero length reads always succeed, even if no device is connected
419 */
420
421 /* Read value */
422 ret = dev->em28xx_read_reg_req_len(dev, 0x06, addr, buf, len);
423 if (ret < 0) {
29b05e22 424 dev_warn(&dev->intf->dev,
ce8591ff
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425 "reading from i2c device at 0x%x failed (error=%i)\n",
426 addr, ret);
a3ea4bf9
FS
427 return ret;
428 }
429 /*
430 * NOTE: some devices with two i2c busses have the bad habit to return 0
431 * bytes if we are on bus B AND there was no write attempt to the
432 * specified slave address before AND no device is present at the
433 * requested slave address.
e63b009d 434 * Anyway, the next check will fail with -ENXIO in this case, so avoid
a3ea4bf9
FS
435 * spamming the system log on device probing and do nothing here.
436 */
437
438 /* Check success */
439 ret = dev->em28xx_read_reg_req(dev, 0x08, 0x0000);
440 /*
441 * NOTE: the only error we've seen so far is
442 * 0x01 when the slave device is not present
443 */
444 if (!ret)
445 return len;
8adbc7d6
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446
447 if (ret > 0) {
ce8591ff 448 dprintk(1, "Bus B R08 returned 0x%02x: I2C ACK error\n", ret);
e63b009d 449 return -ENXIO;
d845fb3a 450 }
a3ea4bf9
FS
451
452 return ret;
453 /*
454 * NOTE: With chip types (other chip IDs) which actually don't support
455 * this operation, it seems to succeed ALWAYS ! (even if there is no
456 * slave device or even no second i2c bus provided)
457 */
458}
459
460/*
461 * em25xx_bus_B_check_for_device()
462 * check if there is a i2c device at the supplied address
463 */
464static int em25xx_bus_B_check_for_device(struct em28xx *dev, u16 addr)
465{
466 u8 buf;
467 int ret;
468
469 ret = em25xx_bus_B_recv_bytes(dev, addr, &buf, 1);
470 if (ret < 0)
471 return ret;
472
473 return 0;
474 /*
475 * NOTE: With chips which do not support this operation,
476 * it seems to succeed ALWAYS ! (even if no device connected)
477 */
478}
479
480static inline int i2c_check_for_device(struct em28xx_i2c_bus *i2c_bus, u16 addr)
481{
482 struct em28xx *dev = i2c_bus->dev;
483 int rc = -EOPNOTSUPP;
484
485 if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX)
486 rc = em28xx_i2c_check_for_device(dev, addr);
487 else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800)
488 rc = em2800_i2c_check_for_device(dev, addr);
489 else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B)
490 rc = em25xx_bus_B_check_for_device(dev, addr);
a3ea4bf9
FS
491 return rc;
492}
493
494static inline int i2c_recv_bytes(struct em28xx_i2c_bus *i2c_bus,
495 struct i2c_msg msg)
496{
497 struct em28xx *dev = i2c_bus->dev;
498 u16 addr = msg.addr << 1;
50f0a9df 499 int rc = -EOPNOTSUPP;
a3ea4bf9
FS
500
501 if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX)
502 rc = em28xx_i2c_recv_bytes(dev, addr, msg.buf, msg.len);
503 else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800)
504 rc = em2800_i2c_recv_bytes(dev, addr, msg.buf, msg.len);
505 else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B)
506 rc = em25xx_bus_B_recv_bytes(dev, addr, msg.buf, msg.len);
a3ea4bf9
FS
507 return rc;
508}
509
510static inline int i2c_send_bytes(struct em28xx_i2c_bus *i2c_bus,
511 struct i2c_msg msg, int stop)
512{
513 struct em28xx *dev = i2c_bus->dev;
514 u16 addr = msg.addr << 1;
50f0a9df 515 int rc = -EOPNOTSUPP;
a3ea4bf9 516
a3ea4bf9
FS
517 if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX)
518 rc = em28xx_i2c_send_bytes(dev, addr, msg.buf, msg.len, stop);
519 else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800)
520 rc = em2800_i2c_send_bytes(dev, addr, msg.buf, msg.len);
521 else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B)
522 rc = em25xx_bus_B_send_bytes(dev, addr, msg.buf, msg.len);
523 return rc;
524}
525
a6c2ba28 526/*
3acf2809 527 * em28xx_i2c_xfer()
a6c2ba28 528 * the main i2c transfer function
529 */
3acf2809 530static int em28xx_i2c_xfer(struct i2c_adapter *i2c_adap,
a6c2ba28 531 struct i2c_msg msgs[], int num)
532{
aab3125c
MCC
533 struct em28xx_i2c_bus *i2c_bus = i2c_adap->algo_data;
534 struct em28xx *dev = i2c_bus->dev;
8adbc7d6 535 unsigned int bus = i2c_bus->bus;
a3ea4bf9 536 int addr, rc, i;
3190fbee 537 u8 reg;
a6c2ba28 538
8adbc7d6
MCC
539 /*
540 * prevent i2c xfer attempts after device is disconnected
541 * some fe's try to do i2c writes/reads from their release
542 * interfaces when called in disconnect path
543 */
cc5c5d20
SK
544 if (dev->disconnected)
545 return -ENODEV;
546
e44c153b
DC
547 if (!rt_mutex_trylock(&dev->i2c_bus_lock))
548 return -EAGAIN;
aab3125c
MCC
549
550 /* Switch I2C bus if needed */
a3ea4bf9
FS
551 if (bus != dev->cur_i2c_bus &&
552 i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX) {
aab3125c 553 if (bus == 1)
3190fbee 554 reg = EM2874_I2C_SECONDARY_BUS_SELECT;
aab3125c 555 else
3190fbee
MCC
556 reg = 0;
557 em28xx_write_reg_bits(dev, EM28XX_R06_I2C_CLK, reg,
558 EM2874_I2C_SECONDARY_BUS_SELECT);
aab3125c
MCC
559 dev->cur_i2c_bus = bus;
560 }
561
562 if (num <= 0) {
563 rt_mutex_unlock(&dev->i2c_bus_lock);
a6c2ba28 564 return 0;
aab3125c 565 }
a6c2ba28 566 for (i = 0; i < num; i++) {
567 addr = msgs[i].addr << 1;
e63b009d
MCC
568 if (!msgs[i].len) {
569 /*
570 * no len: check only for device presence
571 * This code is only called during device probe.
572 */
a3ea4bf9 573 rc = i2c_check_for_device(i2c_bus, addr);
ce8591ff
MCC
574
575 if (rc == -ENXIO)
576 rc = -ENODEV;
596d92d5 577 } else if (msgs[i].flags & I2C_M_RD) {
a6c2ba28 578 /* read bytes */
a3ea4bf9 579 rc = i2c_recv_bytes(i2c_bus, msgs[i]);
a6c2ba28 580 } else {
581 /* write bytes */
a3ea4bf9 582 rc = i2c_send_bytes(i2c_bus, msgs[i], i == num - 1);
a6c2ba28 583 }
ce8591ff
MCC
584
585 if (rc < 0)
586 goto error;
587
588 dprintk(2, "%s %s addr=%02x len=%d: %*ph\n",
589 (msgs[i].flags & I2C_M_RD) ? "read" : "write",
590 i == num - 1 ? "stop" : "nonstop",
591 addr, msgs[i].len,
592 msgs[i].len, msgs[i].buf);
a6c2ba28 593 }
594
aab3125c 595 rt_mutex_unlock(&dev->i2c_bus_lock);
a6c2ba28 596 return num;
ce8591ff
MCC
597
598error:
599 dprintk(2, "%s %s addr=%02x len=%d: %sERROR: %i\n",
600 (msgs[i].flags & I2C_M_RD) ? "read" : "write",
601 i == num - 1 ? "stop" : "nonstop",
602 addr, msgs[i].len,
603 (rc == -ENODEV) ? "no device " : "",
604 rc);
605
606 rt_mutex_unlock(&dev->i2c_bus_lock);
607 return rc;
a6c2ba28 608}
609
fa74aca3
FS
610/*
611 * based on linux/sunrpc/svcauth.h and linux/hash.h
03910cc3 612 * The original hash function returns a different value, if arch is x86_64
fa74aca3 613 * or i386.
03910cc3
MCC
614 */
615static inline unsigned long em28xx_hash_mem(char *buf, int length, int bits)
616{
617 unsigned long hash = 0;
618 unsigned long l = 0;
619 int len = 0;
620 unsigned char c;
fdf1bc9f 621
03910cc3
MCC
622 do {
623 if (len == length) {
624 c = (char)len;
625 len = -1;
8adbc7d6 626 } else {
03910cc3 627 c = *buf++;
8adbc7d6 628 }
03910cc3
MCC
629 l = (l << 8) | c;
630 len++;
631 if ((len & (32 / 8 - 1)) == 0)
8adbc7d6 632 hash = ((hash ^ l) * 0x9e370001UL);
03910cc3
MCC
633 } while (len);
634
635 return (hash >> (32 - bits)) & 0xffffffffUL;
636}
637
fa74aca3
FS
638/*
639 * Helper function to read data blocks from i2c clients with 8 or 16 bit
640 * address width, 8 bit register width and auto incrementation been activated
641 */
8adbc7d6 642static int em28xx_i2c_read_block(struct em28xx *dev, unsigned int bus, u16 addr,
aab3125c 643 bool addr_w16, u16 len, u8 *data)
d832c5b2
FS
644{
645 int remain = len, rsize, rsize_max, ret;
646 u8 buf[2];
647
648 /* Sanity check */
649 if (addr + remain > (addr_w16 * 0xff00 + 0xff + 1))
650 return -EINVAL;
651 /* Select address */
652 buf[0] = addr >> 8;
653 buf[1] = addr & 0xff;
8adbc7d6
MCC
654 ret = i2c_master_send(&dev->i2c_client[bus],
655 buf + !addr_w16, 1 + addr_w16);
d832c5b2
FS
656 if (ret < 0)
657 return ret;
658 /* Read data */
659 if (dev->board.is_em2800)
660 rsize_max = 4;
661 else
662 rsize_max = 64;
663 while (remain > 0) {
664 if (remain > rsize_max)
665 rsize = rsize_max;
666 else
667 rsize = remain;
668
aab3125c 669 ret = i2c_master_recv(&dev->i2c_client[bus], data, rsize);
d832c5b2
FS
670 if (ret < 0)
671 return ret;
672
673 remain -= rsize;
674 data += rsize;
675 }
676
677 return len;
678}
679
8adbc7d6 680static int em28xx_i2c_eeprom(struct em28xx *dev, unsigned int bus,
aab3125c 681 u8 **eedata, u16 *eedata_len)
a6c2ba28 682{
510e884c 683 const u16 len = 256;
fa74aca3
FS
684 /*
685 * FIXME common length/size for bytes to read, to display, hash
510e884c 686 * calculation and returned device dataset. Simplifies the code a lot,
fa74aca3
FS
687 * but we might have to deal with multiple sizes in the future !
688 */
50f0a9df 689 int err;
510e884c
FS
690 struct em28xx_eeprom *dev_config;
691 u8 buf, *data;
a6c2ba28 692
a217968f 693 *eedata = NULL;
510e884c 694 *eedata_len = 0;
a217968f 695
aab3125c
MCC
696 /* EEPROM is always on i2c bus 0 on all known devices. */
697
698 dev->i2c_client[bus].addr = 0xa0 >> 1;
596d92d5
MCC
699
700 /* Check if board has eeprom */
aab3125c 701 err = i2c_master_recv(&dev->i2c_client[bus], &buf, 0);
f2a01a00 702 if (err < 0) {
29b05e22 703 dev_info(&dev->intf->dev, "board has no eeprom\n");
c41109fc 704 return -ENODEV;
f2a01a00 705 }
596d92d5 706
a217968f 707 data = kzalloc(len, GFP_KERNEL);
8adbc7d6 708 if (!data)
a217968f
FS
709 return -ENOMEM;
710
d832c5b2 711 /* Read EEPROM content */
aab3125c
MCC
712 err = em28xx_i2c_read_block(dev, bus, 0x0000,
713 dev->eeprom_addrwidth_16bit,
a217968f 714 len, data);
d832c5b2 715 if (err != len) {
29b05e22 716 dev_err(&dev->intf->dev,
ce8591ff 717 "failed to read eeprom (err=%d)\n", err);
510e884c 718 goto error;
a6c2ba28 719 }
90271964 720
50f0a9df
MCC
721 if (i2c_debug) {
722 /* Display eeprom content */
ce8591ff 723 print_hex_dump(KERN_DEBUG, "em28xx eeprom ", DUMP_PREFIX_OFFSET,
50f0a9df
MCC
724 16, 1, data, len, true);
725
726 if (dev->eeprom_addrwidth_16bit)
29b05e22 727 dev_info(&dev->intf->dev,
ce8591ff 728 "eeprom %06x: ... (skipped)\n", 256);
a6c2ba28 729 }
730
87b52439 731 if (dev->eeprom_addrwidth_16bit &&
a217968f 732 data[0] == 0x26 && data[3] == 0x00) {
87b52439 733 /* new eeprom format; size 4-64kb */
510e884c
FS
734 u16 mc_start;
735 u16 hwconf_offset;
736
a217968f 737 dev->hash = em28xx_hash_mem(data, len, 32);
510e884c
FS
738 mc_start = (data[1] << 8) + 4; /* usually 0x0004 */
739
29b05e22 740 dev_info(&dev->intf->dev,
290ef7d8
AC
741 "EEPROM ID = %4ph, EEPROM hash = 0x%08lx\n",
742 data, dev->hash);
29b05e22 743 dev_info(&dev->intf->dev,
ce8591ff 744 "EEPROM info:\n");
29b05e22 745 dev_info(&dev->intf->dev,
ce8591ff
MCC
746 "\tmicrocode start address = 0x%04x, boot configuration = 0x%02x\n",
747 mc_start, data[2]);
fa74aca3
FS
748 /*
749 * boot configuration (address 0x0002):
87b52439
FS
750 * [0] microcode download speed: 1 = 400 kHz; 0 = 100 kHz
751 * [1] always selects 12 kb RAM
752 * [2] USB device speed: 1 = force Full Speed; 0 = auto detect
753 * [4] 1 = force fast mode and no suspend for device testing
754 * [5:7] USB PHY tuning registers; determined by device
755 * characterization
756 */
757
fa74aca3
FS
758 /*
759 * Read hardware config dataset offset from address
760 * (microcode start + 46)
761 */
aab3125c
MCC
762 err = em28xx_i2c_read_block(dev, bus, mc_start + 46, 1, 2,
763 data);
510e884c 764 if (err != 2) {
29b05e22 765 dev_err(&dev->intf->dev,
ce8591ff
MCC
766 "failed to read hardware configuration data from eeprom (err=%d)\n",
767 err);
510e884c
FS
768 goto error;
769 }
770
771 /* Calculate hardware config dataset start address */
772 hwconf_offset = mc_start + data[0] + (data[1] << 8);
773
774 /* Read hardware config dataset */
fa74aca3
FS
775 /*
776 * NOTE: the microcode copy can be multiple pages long, but
510e884c
FS
777 * we assume the hardware config dataset is the same as in
778 * the old eeprom and not longer than 256 bytes.
779 * tveeprom is currently also limited to 256 bytes.
87b52439 780 */
aab3125c
MCC
781 err = em28xx_i2c_read_block(dev, bus, hwconf_offset, 1, len,
782 data);
510e884c 783 if (err != len) {
29b05e22 784 dev_err(&dev->intf->dev,
ce8591ff
MCC
785 "failed to read hardware configuration data from eeprom (err=%d)\n",
786 err);
510e884c
FS
787 goto error;
788 }
87b52439 789
510e884c
FS
790 /* Verify hardware config dataset */
791 /* NOTE: not all devices provide this type of dataset */
792 if (data[0] != 0x1a || data[1] != 0xeb ||
793 data[2] != 0x67 || data[3] != 0x95) {
29b05e22 794 dev_info(&dev->intf->dev,
ce8591ff 795 "\tno hardware configuration dataset found in eeprom\n");
510e884c
FS
796 kfree(data);
797 return 0;
798 }
799
8adbc7d6
MCC
800 /*
801 * TODO: decrypt eeprom data for camera bridges
802 * (em25xx, em276x+)
803 */
510e884c
FS
804
805 } else if (!dev->eeprom_addrwidth_16bit &&
806 data[0] == 0x1a && data[1] == 0xeb &&
807 data[2] == 0x67 && data[3] == 0x95) {
808 dev->hash = em28xx_hash_mem(data, len, 32);
29b05e22 809 dev_info(&dev->intf->dev,
290ef7d8
AC
810 "EEPROM ID = %4ph, EEPROM hash = 0x%08lx\n",
811 data, dev->hash);
29b05e22 812 dev_info(&dev->intf->dev,
ce8591ff 813 "EEPROM info:\n");
510e884c 814 } else {
29b05e22 815 dev_info(&dev->intf->dev,
ce8591ff 816 "unknown eeprom format or eeprom corrupted !\n");
510e884c
FS
817 err = -ENODEV;
818 goto error;
f55eacbe
FS
819 }
820
a217968f 821 *eedata = data;
510e884c 822 *eedata_len = len;
32bf7c6c 823 dev_config = (void *)*eedata;
a217968f 824
510e884c 825 switch (le16_to_cpu(dev_config->chip_conf) >> 4 & 0x3) {
a6c2ba28 826 case 0:
29b05e22 827 dev_info(&dev->intf->dev, "\tNo audio on board.\n");
a6c2ba28 828 break;
829 case 1:
29b05e22 830 dev_info(&dev->intf->dev, "\tAC97 audio (5 sample rates)\n");
a6c2ba28 831 break;
832 case 2:
687ff8b0 833 if (dev->chip_id < CHIP_ID_EM2860)
29b05e22 834 dev_info(&dev->intf->dev,
ce8591ff 835 "\tI2S audio, sample rate=32k\n");
687ff8b0 836 else
29b05e22 837 dev_info(&dev->intf->dev,
ce8591ff 838 "\tI2S audio, 3 sample rates\n");
a6c2ba28 839 break;
840 case 3:
687ff8b0 841 if (dev->chip_id < CHIP_ID_EM2860)
29b05e22 842 dev_info(&dev->intf->dev,
ce8591ff 843 "\tI2S audio, 3 sample rates\n");
687ff8b0 844 else
29b05e22 845 dev_info(&dev->intf->dev,
ce8591ff 846 "\tI2S audio, 5 sample rates\n");
a6c2ba28 847 break;
848 }
849
510e884c 850 if (le16_to_cpu(dev_config->chip_conf) & 1 << 3)
29b05e22 851 dev_info(&dev->intf->dev, "\tUSB Remote wakeup capable\n");
a6c2ba28 852
510e884c 853 if (le16_to_cpu(dev_config->chip_conf) & 1 << 2)
29b05e22 854 dev_info(&dev->intf->dev, "\tUSB Self power capable\n");
a6c2ba28 855
510e884c 856 switch (le16_to_cpu(dev_config->chip_conf) & 0x3) {
a6c2ba28 857 case 0:
29b05e22 858 dev_info(&dev->intf->dev, "\t500mA max power\n");
a6c2ba28 859 break;
860 case 1:
29b05e22 861 dev_info(&dev->intf->dev, "\t400mA max power\n");
a6c2ba28 862 break;
863 case 2:
29b05e22 864 dev_info(&dev->intf->dev, "\t300mA max power\n");
a6c2ba28 865 break;
866 case 3:
29b05e22 867 dev_info(&dev->intf->dev, "\t200mA max power\n");
a6c2ba28 868 break;
869 }
29b05e22 870 dev_info(&dev->intf->dev,
ce8591ff
MCC
871 "\tTable at offset 0x%02x, strings=0x%04x, 0x%04x, 0x%04x\n",
872 dev_config->string_idx_table,
873 le16_to_cpu(dev_config->string1),
874 le16_to_cpu(dev_config->string2),
875 le16_to_cpu(dev_config->string3));
a6c2ba28 876
877 return 0;
510e884c
FS
878
879error:
880 kfree(data);
881 return err;
a6c2ba28 882}
883
884/* ----------------------------------------------------------- */
885
a6c2ba28 886/*
887 * functionality()
888 */
aab3125c 889static u32 functionality(struct i2c_adapter *i2c_adap)
a6c2ba28 890{
aab3125c 891 struct em28xx_i2c_bus *i2c_bus = i2c_adap->algo_data;
aab3125c 892
8adbc7d6
MCC
893 if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM28XX ||
894 i2c_bus->algo_type == EM28XX_I2C_ALGO_EM25XX_BUS_B) {
a3ea4bf9
FS
895 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
896 } else if (i2c_bus->algo_type == EM28XX_I2C_ALGO_EM2800) {
897 return (I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL) &
898 ~I2C_FUNC_SMBUS_WRITE_BLOCK_DATA;
899 }
900
901 WARN(1, "Unknown i2c bus algorithm.\n");
902 return 0;
a6c2ba28 903}
904
78f2c50b 905static const struct i2c_algorithm em28xx_algo = {
3acf2809 906 .master_xfer = em28xx_i2c_xfer,
a6c2ba28 907 .functionality = functionality,
908};
909
6843868f 910static const struct i2c_adapter em28xx_adap_template = {
a6c2ba28 911 .owner = THIS_MODULE,
3acf2809 912 .name = "em28xx",
3acf2809 913 .algo = &em28xx_algo,
a6c2ba28 914};
915
2b83247f 916static const struct i2c_client em28xx_client_template = {
3acf2809 917 .name = "em28xx internal",
a6c2ba28 918};
919
920/* ----------------------------------------------------------- */
921
922/*
923 * i2c_devs
924 * incomplete list of known devices
925 */
926static char *i2c_devs[128] = {
8adbc7d6 927 [0x1c >> 1] = "lgdt330x",
0b3966e4 928 [0x3e >> 1] = "remote IR sensor",
a6c2ba28 929 [0x4a >> 1] = "saa7113h",
729841ed 930 [0x52 >> 1] = "drxk",
a6c2ba28 931 [0x60 >> 1] = "remote IR sensor",
da45a2a5 932 [0x8e >> 1] = "remote IR sensor",
a6c2ba28 933 [0x86 >> 1] = "tda9887",
934 [0x80 >> 1] = "msp34xx",
935 [0x88 >> 1] = "msp34xx",
936 [0xa0 >> 1] = "eeprom",
2bd1d9eb 937 [0xb0 >> 1] = "tda9874",
a6c2ba28 938 [0xb8 >> 1] = "tvp5150a",
791a08fc 939 [0xba >> 1] = "webcam sensor or tvp5150a",
a6c2ba28 940 [0xc0 >> 1] = "tuner (analog)",
941 [0xc2 >> 1] = "tuner (analog)",
942 [0xc4 >> 1] = "tuner (analog)",
943 [0xc6 >> 1] = "tuner (analog)",
944};
945
946/*
947 * do_i2c_scan()
948 * check i2c address range for devices
949 */
8adbc7d6 950void em28xx_do_i2c_scan(struct em28xx *dev, unsigned int bus)
a6c2ba28 951{
fad7b958 952 u8 i2c_devicelist[128];
a6c2ba28 953 unsigned char buf;
954 int i, rc;
955
fad7b958
SS
956 memset(i2c_devicelist, 0, ARRAY_SIZE(i2c_devicelist));
957
53c4e955 958 for (i = 0; i < ARRAY_SIZE(i2c_devs); i++) {
aab3125c
MCC
959 dev->i2c_client[bus].addr = i;
960 rc = i2c_master_recv(&dev->i2c_client[bus], &buf, 0);
a6c2ba28 961 if (rc < 0)
962 continue;
fad7b958 963 i2c_devicelist[i] = i;
29b05e22 964 dev_info(&dev->intf->dev,
ce8591ff
MCC
965 "found i2c device @ 0x%x on bus %d [%s]\n",
966 i << 1, bus, i2c_devs[i] ? i2c_devs[i] : "???");
a6c2ba28 967 }
fad7b958 968
aab3125c
MCC
969 if (bus == dev->def_i2c_bus)
970 dev->i2c_hash = em28xx_hash_mem(i2c_devicelist,
971 ARRAY_SIZE(i2c_devicelist), 32);
a6c2ba28 972}
973
a6c2ba28 974/*
3acf2809 975 * em28xx_i2c_register()
a6c2ba28 976 * register i2c bus
977 */
8adbc7d6 978int em28xx_i2c_register(struct em28xx *dev, unsigned int bus,
a3ea4bf9 979 enum em28xx_i2c_algo_type algo_type)
a6c2ba28 980{
f2a01a00
DSL
981 int retval;
982
8adbc7d6
MCC
983 if (WARN_ON(!dev->em28xx_write_regs || !dev->em28xx_read_reg ||
984 !dev->em28xx_write_regs_req || !dev->em28xx_read_reg_req))
985 return -ENODEV;
f2a01a00 986
aab3125c
MCC
987 if (bus >= NUM_I2C_BUSES)
988 return -ENODEV;
989
990 dev->i2c_adap[bus] = em28xx_adap_template;
29b05e22
MCC
991 dev->i2c_adap[bus].dev.parent = &dev->intf->dev;
992 strcpy(dev->i2c_adap[bus].name, dev_name(&dev->intf->dev));
aab3125c
MCC
993
994 dev->i2c_bus[bus].bus = bus;
a3ea4bf9 995 dev->i2c_bus[bus].algo_type = algo_type;
aab3125c
MCC
996 dev->i2c_bus[bus].dev = dev;
997 dev->i2c_adap[bus].algo_data = &dev->i2c_bus[bus];
aab3125c
MCC
998
999 retval = i2c_add_adapter(&dev->i2c_adap[bus]);
f2a01a00 1000 if (retval < 0) {
29b05e22 1001 dev_err(&dev->intf->dev,
ce8591ff
MCC
1002 "%s: i2c_add_adapter failed! retval [%d]\n",
1003 __func__, retval);
f2a01a00
DSL
1004 return retval;
1005 }
a6c2ba28 1006
aab3125c
MCC
1007 dev->i2c_client[bus] = em28xx_client_template;
1008 dev->i2c_client[bus].adapter = &dev->i2c_adap[bus];
a6c2ba28 1009
aab3125c
MCC
1010 /* Up to now, all eeproms are at bus 0 */
1011 if (!bus) {
8adbc7d6
MCC
1012 retval = em28xx_i2c_eeprom(dev, bus,
1013 &dev->eedata, &dev->eedata_len);
1014 if (retval < 0 && retval != -ENODEV) {
29b05e22 1015 dev_err(&dev->intf->dev,
ce8591ff
MCC
1016 "%s: em28xx_i2_eeprom failed! retval [%d]\n",
1017 __func__, retval);
aab3125c 1018 }
f2a01a00 1019 }
a6c2ba28 1020
1021 if (i2c_scan)
aab3125c 1022 em28xx_do_i2c_scan(dev, bus);
c41109fc 1023
a6c2ba28 1024 return 0;
1025}
1026
1027/*
3acf2809 1028 * em28xx_i2c_unregister()
a6c2ba28 1029 * unregister i2c_bus
1030 */
8adbc7d6 1031int em28xx_i2c_unregister(struct em28xx *dev, unsigned int bus)
a6c2ba28 1032{
aab3125c
MCC
1033 if (bus >= NUM_I2C_BUSES)
1034 return -ENODEV;
1035
1036 i2c_del_adapter(&dev->i2c_adap[bus]);
a6c2ba28 1037 return 0;
1038}