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Commit | Line | Data |
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a6c2ba28 | 1 | /* |
0e7072ef | 2 | em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices |
a6c2ba28 | 3 | |
4 | Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com> | |
4ac97914 | 5 | Ludovico Cavedon <cavedon@sssup.it> |
2e7c6dc3 | 6 | Mauro Carvalho Chehab <mchehab@infradead.org> |
0cf544a6 | 7 | Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com> |
a6c2ba28 | 8 | |
9 | Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de> | |
10 | ||
11 | This program is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
13 | the Free Software Foundation; either version 2 of the License, or | |
14 | (at your option) any later version. | |
15 | ||
16 | This program is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
22 | along with this program; if not, write to the Free Software | |
23 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | */ | |
25 | ||
3acf2809 MCC |
26 | #ifndef _EM28XX_H |
27 | #define _EM28XX_H | |
a6c2ba28 | 28 | |
39a96b4c MCC |
29 | #include <linux/workqueue.h> |
30 | #include <linux/i2c.h> | |
31 | #include <linux/mutex.h> | |
cb77d010 | 32 | #include <linux/videodev2.h> |
39a96b4c | 33 | |
d3829fad | 34 | #include <media/videobuf2-vmalloc.h> |
f2cf250a | 35 | #include <media/v4l2-device.h> |
081b945e | 36 | #include <media/v4l2-ctrls.h> |
69a61642 | 37 | #include <media/v4l2-fh.h> |
d5e52653 | 38 | #include <media/ir-kbd-i2c.h> |
6bda9644 | 39 | #include <media/rc-core.h> |
3ca9c093 | 40 | #include "tuner-xc2028.h" |
82e7dbbd | 41 | #include "xc5000.h" |
2ba890ec | 42 | #include "em28xx-reg.h" |
3aefb79a MCC |
43 | |
44 | /* Boards supported by driver */ | |
d5b6a746 FS |
45 | #define EM2800_BOARD_UNKNOWN 0 |
46 | #define EM2820_BOARD_UNKNOWN 1 | |
47 | #define EM2820_BOARD_TERRATEC_CINERGY_250 2 | |
48 | #define EM2820_BOARD_PINNACLE_USB_2 3 | |
49 | #define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4 | |
50 | #define EM2820_BOARD_MSI_VOX_USB_2 5 | |
51 | #define EM2800_BOARD_TERRATEC_CINERGY_200 6 | |
52 | #define EM2800_BOARD_LEADTEK_WINFAST_USBII 7 | |
53 | #define EM2800_BOARD_KWORLD_USB2800 8 | |
54 | #define EM2820_BOARD_PINNACLE_DVC_90 9 | |
55 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10 | |
56 | #define EM2880_BOARD_TERRATEC_HYBRID_XS 11 | |
57 | #define EM2820_BOARD_KWORLD_PVRTV2800RF 12 | |
58 | #define EM2880_BOARD_TERRATEC_PRODIGY_XS 13 | |
59 | #define EM2820_BOARD_PROLINK_PLAYTV_USB2 14 | |
60 | #define EM2800_BOARD_VGEAR_POCKETTV 15 | |
61 | #define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16 | |
62 | #define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17 | |
63 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18 | |
64 | #define EM2860_BOARD_SAA711X_REFERENCE_DESIGN 19 | |
65 | #define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20 | |
66 | #define EM2800_BOARD_GRABBEEX_USB2800 21 | |
95b86a9a DSL |
67 | #define EM2750_BOARD_UNKNOWN 22 |
68 | #define EM2750_BOARD_DLCW_130 23 | |
69 | #define EM2820_BOARD_DLINK_USB_TV 24 | |
70 | #define EM2820_BOARD_GADMEI_UTV310 25 | |
71 | #define EM2820_BOARD_HERCULES_SMART_TV_USB2 26 | |
72 | #define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27 | |
73 | #define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28 | |
443fed9f | 74 | #define EM2860_BOARD_TVP5150_REFERENCE_DESIGN 29 |
95b86a9a DSL |
75 | #define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30 |
76 | #define EM2821_BOARD_USBGEAR_VD204 31 | |
77 | #define EM2821_BOARD_SUPERCOMP_USB_2 32 | |
8298f2f8 | 78 | #define EM2860_BOARD_ELGATO_VIDEO_CAPTURE 33 |
95b86a9a DSL |
79 | #define EM2860_BOARD_TERRATEC_HYBRID_XS 34 |
80 | #define EM2860_BOARD_TYPHOON_DVD_MAKER 35 | |
81 | #define EM2860_BOARD_NETGMBH_CAM 36 | |
82 | #define EM2860_BOARD_GADMEI_UTV330 37 | |
83 | #define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38 | |
84 | #define EM2861_BOARD_KWORLD_PVRTV_300U 39 | |
85 | #define EM2861_BOARD_PLEXTOR_PX_TV100U 40 | |
86 | #define EM2870_BOARD_KWORLD_350U 41 | |
87 | #define EM2870_BOARD_KWORLD_355U 42 | |
88 | #define EM2870_BOARD_TERRATEC_XS 43 | |
89 | #define EM2870_BOARD_TERRATEC_XS_MT2060 44 | |
90 | #define EM2870_BOARD_PINNACLE_PCTV_DVB 45 | |
91 | #define EM2870_BOARD_COMPRO_VIDEOMATE 46 | |
92 | #define EM2880_BOARD_KWORLD_DVB_305U 47 | |
93 | #define EM2880_BOARD_KWORLD_DVB_310U 48 | |
94 | #define EM2880_BOARD_MSI_DIGIVOX_AD 49 | |
95 | #define EM2880_BOARD_MSI_DIGIVOX_AD_II 50 | |
96 | #define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51 | |
97 | #define EM2881_BOARD_DNT_DA2_HYBRID 52 | |
98 | #define EM2881_BOARD_PINNACLE_HYBRID_PRO 53 | |
99 | #define EM2882_BOARD_KWORLD_VS_DVBT 54 | |
100 | #define EM2882_BOARD_TERRATEC_HYBRID_XS 55 | |
09bc1942 | 101 | #define EM2882_BOARD_PINNACLE_HYBRID_PRO_330E 56 |
d5b6a746 | 102 | #define EM2883_BOARD_KWORLD_HYBRID_330U 57 |
ee281b85 | 103 | #define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58 |
f89bc329 | 104 | #define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60 |
1e1addd5 | 105 | #define EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2 61 |
f7fe3e6f | 106 | #define EM2820_BOARD_GADMEI_TVR200 62 |
d5b6a746 FS |
107 | #define EM2860_BOARD_KAIOMY_TVNPC_U2 63 |
108 | #define EM2860_BOARD_EASYCAP 64 | |
f74a61e3 | 109 | #define EM2820_BOARD_IODATA_GVMVP_SZ 65 |
e5db5d44 | 110 | #define EM2880_BOARD_EMPIRE_DUAL_TV 66 |
4557af9c | 111 | #define EM2860_BOARD_TERRATEC_GRABBY 67 |
766ed64d | 112 | #define EM2860_BOARD_TERRATEC_AV350 68 |
d7de5d8f | 113 | #define EM2882_BOARD_KWORLD_ATSC_315U 69 |
19859229 | 114 | #define EM2882_BOARD_EVGA_INDTUBE 70 |
d5b6a746 FS |
115 | #define EM2820_BOARD_SILVERCREST_WEBCAM 71 |
116 | #define EM2861_BOARD_GADMEI_UTV330PLUS 72 | |
117 | #define EM2870_BOARD_REDDO_DVB_C_USB_BOX 73 | |
694a101e | 118 | #define EM2800_BOARD_VC211A 74 |
7ca7ef60 | 119 | #define EM2882_BOARD_DIKOM_DK300 75 |
7e48b30a | 120 | #define EM2870_BOARD_KWORLD_A340 76 |
fec528b7 | 121 | #define EM2874_BOARD_LEADERSHIP_ISDBT 77 |
d5b6a746 | 122 | #define EM28174_BOARD_PCTV_290E 78 |
fec528b7 | 123 | #define EM2884_BOARD_TERRATEC_H5 79 |
d5b6a746 | 124 | #define EM28174_BOARD_PCTV_460E 80 |
82e7dbbd | 125 | #define EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C 81 |
a1ed02e9 | 126 | #define EM2884_BOARD_CINERGY_HTC_STICK 82 |
d5b6a746 FS |
127 | #define EM2860_BOARD_HT_VIDBOX_NW03 83 |
128 | #define EM2874_BOARD_MAXMEDIA_UB425_TC 84 | |
129 | #define EM2884_BOARD_PCTV_510E 85 | |
130 | #define EM2884_BOARD_PCTV_520E 86 | |
89040136 | 131 | #define EM2884_BOARD_TERRATEC_HTC_USB_XS 87 |
3aefb79a MCC |
132 | |
133 | /* Limits minimum and default number of buffers */ | |
134 | #define EM28XX_MIN_BUF 4 | |
135 | #define EM28XX_DEF_BUF 8 | |
a6c2ba28 | 136 | |
c4a98793 MCC |
137 | /*Limits the max URB message size */ |
138 | #define URB_MAX_CTRL_SIZE 80 | |
139 | ||
95b86a9a DSL |
140 | /* Params for validated field */ |
141 | #define EM28XX_BOARD_NOT_VALIDATED 1 | |
142 | #define EM28XX_BOARD_VALIDATED 0 | |
143 | ||
22cff7b3 DSL |
144 | /* Params for em28xx_cmd() audio */ |
145 | #define EM28XX_START_AUDIO 1 | |
146 | #define EM28XX_STOP_AUDIO 0 | |
147 | ||
596d92d5 | 148 | /* maximum number of em28xx boards */ |
3687e1e6 | 149 | #define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */ |
596d92d5 | 150 | |
a6c2ba28 | 151 | /* maximum number of frames that can be queued */ |
3acf2809 | 152 | #define EM28XX_NUM_FRAMES 5 |
a6c2ba28 | 153 | /* number of frames that get used for v4l2_read() */ |
3acf2809 | 154 | #define EM28XX_NUM_READ_FRAMES 2 |
a6c2ba28 | 155 | |
156 | /* number of buffers for isoc transfers */ | |
3acf2809 | 157 | #define EM28XX_NUM_BUFS 5 |
86d38d1e | 158 | #define EM28XX_DVB_NUM_BUFS 5 |
a6c2ba28 | 159 | |
c7a45e5b MCC |
160 | /* max number of I2C buses on em28xx devices */ |
161 | #define NUM_I2C_BUSES 2 | |
162 | ||
515688a8 | 163 | /* isoc transfers: number of packets for each buffer |
33c02fac | 164 | windows requests only 64 packets .. so we better do the same |
d5e52653 MCC |
165 | this is what I found out for all alternate numbers there! |
166 | */ | |
515688a8 FS |
167 | #define EM28XX_NUM_ISOC_PACKETS 64 |
168 | #define EM28XX_DVB_NUM_ISOC_PACKETS 64 | |
a6c2ba28 | 169 | |
c647a91a FS |
170 | /* bulk transfers: transfer buffer size = packet size * packet multiplier |
171 | USB 2.0 spec says bulk packet size is always 512 bytes | |
172 | */ | |
173 | #define EM28XX_BULK_PACKET_MULTIPLIER 384 | |
174 | #define EM28XX_DVB_BULK_PACKET_MULTIPLIER 384 | |
175 | ||
3acf2809 | 176 | #define EM28XX_INTERLACED_DEFAULT 1 |
a6c2ba28 | 177 | |
596d92d5 | 178 | /* time in msecs to wait for i2c writes to finish */ |
2fcc82d8 | 179 | #define EM2800_I2C_XFER_TIMEOUT 20 |
596d92d5 | 180 | |
3aefb79a | 181 | enum em28xx_mode { |
2fe3e2ee | 182 | EM28XX_SUSPEND, |
3aefb79a MCC |
183 | EM28XX_ANALOG_MODE, |
184 | EM28XX_DIGITAL_MODE, | |
185 | }; | |
186 | ||
a6c2ba28 | 187 | |
579f72e4 AT |
188 | struct em28xx; |
189 | ||
f0fa9936 | 190 | struct em28xx_usb_bufs { |
ad0ebb96 MCC |
191 | /* max packet size of isoc transaction */ |
192 | int max_pkt_size; | |
193 | ||
86d38d1e GG |
194 | /* number of packets in each buffer */ |
195 | int num_packets; | |
196 | ||
ad0ebb96 MCC |
197 | /* number of allocated urbs */ |
198 | int num_bufs; | |
199 | ||
f0fa9936 | 200 | /* urb for isoc/bulk transfers */ |
ad0ebb96 MCC |
201 | struct urb **urb; |
202 | ||
f0fa9936 | 203 | /* transfer buffers for isoc/bulk transfer */ |
ad0ebb96 | 204 | char **transfer_buffer; |
86d38d1e GG |
205 | }; |
206 | ||
74209dc0 FS |
207 | struct em28xx_usb_ctl { |
208 | /* isoc/bulk transfer buffers for analog mode */ | |
f0fa9936 | 209 | struct em28xx_usb_bufs analog_bufs; |
86d38d1e | 210 | |
74209dc0 | 211 | /* isoc/bulk transfer buffers for digital mode */ |
f0fa9936 | 212 | struct em28xx_usb_bufs digital_bufs; |
ad0ebb96 | 213 | |
ad0ebb96 | 214 | /* Stores already requested buffers */ |
28abf083 DH |
215 | struct em28xx_buffer *vid_buf; |
216 | struct em28xx_buffer *vbi_buf; | |
ad0ebb96 | 217 | |
74209dc0 FS |
218 | /* copy data from URB */ |
219 | int (*urb_data_copy) (struct em28xx *dev, struct urb *urb); | |
579f72e4 | 220 | |
ad0ebb96 MCC |
221 | }; |
222 | ||
bddcf633 | 223 | /* Struct to enumberate video formats */ |
ad0ebb96 MCC |
224 | struct em28xx_fmt { |
225 | char *name; | |
226 | u32 fourcc; /* v4l2 format id */ | |
bddcf633 MCC |
227 | int depth; |
228 | int reg; | |
ad0ebb96 MCC |
229 | }; |
230 | ||
231 | /* buffer for one video frame */ | |
232 | struct em28xx_buffer { | |
233 | /* common v4l buffer stuff -- must be first */ | |
d3829fad DH |
234 | struct vb2_buffer vb; |
235 | struct list_head list; | |
ad0ebb96 | 236 | |
d3829fad DH |
237 | void *mem; |
238 | unsigned int length; | |
a6c2ba28 | 239 | int top_field; |
8732533b FS |
240 | |
241 | /* counter to control buffer fill */ | |
242 | unsigned int pos; | |
243 | /* NOTE; in interlaced mode, this value is reset to zero at | |
244 | * the start of each new field (not frame !) */ | |
4078d625 FS |
245 | |
246 | /* pointer to vmalloc memory address in vb */ | |
247 | char *vb_buf; | |
ad0ebb96 MCC |
248 | }; |
249 | ||
250 | struct em28xx_dmaqueue { | |
251 | struct list_head active; | |
ad0ebb96 MCC |
252 | |
253 | wait_queue_head_t wq; | |
a6c2ba28 | 254 | }; |
255 | ||
a6c2ba28 | 256 | /* inputs */ |
257 | ||
3acf2809 MCC |
258 | #define MAX_EM28XX_INPUT 4 |
259 | enum enum28xx_itype { | |
260 | EM28XX_VMUX_COMPOSITE1 = 1, | |
261 | EM28XX_VMUX_COMPOSITE2, | |
262 | EM28XX_VMUX_COMPOSITE3, | |
263 | EM28XX_VMUX_COMPOSITE4, | |
264 | EM28XX_VMUX_SVIDEO, | |
265 | EM28XX_VMUX_TELEVISION, | |
266 | EM28XX_VMUX_CABLE, | |
267 | EM28XX_VMUX_DVB, | |
268 | EM28XX_VMUX_DEBUG, | |
269 | EM28XX_RADIO, | |
a6c2ba28 | 270 | }; |
271 | ||
35643943 MCC |
272 | enum em28xx_ac97_mode { |
273 | EM28XX_NO_AC97 = 0, | |
274 | EM28XX_AC97_EM202, | |
209acc02 | 275 | EM28XX_AC97_SIGMATEL, |
35643943 MCC |
276 | EM28XX_AC97_OTHER, |
277 | }; | |
278 | ||
279 | struct em28xx_audio_mode { | |
280 | enum em28xx_ac97_mode ac97; | |
281 | ||
282 | u16 ac97_feat; | |
16c7bcad | 283 | u32 ac97_vendor_id; |
35643943 MCC |
284 | |
285 | unsigned int has_audio:1; | |
286 | ||
287 | unsigned int i2s_3rates:1; | |
288 | unsigned int i2s_5rates:1; | |
5c2231c8 DH |
289 | }; |
290 | ||
5faff789 MCC |
291 | /* em28xx has two audio inputs: tuner and line in. |
292 | However, on most devices, an auxiliary AC97 codec device is used. | |
293 | The AC97 device may have several different inputs and outputs, | |
294 | depending on their model. So, it is possible to use AC97 mixer to | |
295 | address more than two different entries. | |
296 | */ | |
539c96d0 | 297 | enum em28xx_amux { |
5faff789 MCC |
298 | /* This is the only entry for em28xx tuner input */ |
299 | EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */ | |
300 | ||
301 | EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */ | |
302 | ||
303 | /* Some less-common mixer setups */ | |
304 | EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */ | |
305 | EM28XX_AMUX_PHONE, | |
306 | EM28XX_AMUX_MIC, | |
307 | EM28XX_AMUX_CD, | |
308 | EM28XX_AMUX_AUX, | |
309 | EM28XX_AMUX_PCM_OUT, | |
539c96d0 MCC |
310 | }; |
311 | ||
35ae6f04 | 312 | enum em28xx_aout { |
8866f9cf | 313 | /* AC97 outputs */ |
e879b8eb MCC |
314 | EM28XX_AOUT_MASTER = 1 << 0, |
315 | EM28XX_AOUT_LINE = 1 << 1, | |
316 | EM28XX_AOUT_MONO = 1 << 2, | |
317 | EM28XX_AOUT_LFE = 1 << 3, | |
318 | EM28XX_AOUT_SURR = 1 << 4, | |
8866f9cf MCC |
319 | |
320 | /* PCM IN Mixer - used by AC97_RECORD_SELECT register */ | |
321 | EM28XX_AOUT_PCM_IN = 1 << 7, | |
322 | ||
323 | /* Bits 10-8 are used to indicate the PCM IN record select */ | |
324 | EM28XX_AOUT_PCM_MIC_PCM = 0 << 8, | |
325 | EM28XX_AOUT_PCM_CD = 1 << 8, | |
326 | EM28XX_AOUT_PCM_VIDEO = 2 << 8, | |
327 | EM28XX_AOUT_PCM_AUX = 3 << 8, | |
328 | EM28XX_AOUT_PCM_LINE = 4 << 8, | |
329 | EM28XX_AOUT_PCM_STEREO = 5 << 8, | |
330 | EM28XX_AOUT_PCM_MONO = 6 << 8, | |
331 | EM28XX_AOUT_PCM_PHONE = 7 << 8, | |
35ae6f04 MCC |
332 | }; |
333 | ||
32929fb4 | 334 | static inline int ac97_return_record_select(int a_out) |
8866f9cf MCC |
335 | { |
336 | return (a_out & 0x700) >> 8; | |
337 | } | |
338 | ||
122b77e5 MCC |
339 | struct em28xx_reg_seq { |
340 | int reg; | |
341 | unsigned char val, mask; | |
342 | int sleep; | |
343 | }; | |
344 | ||
3acf2809 MCC |
345 | struct em28xx_input { |
346 | enum enum28xx_itype type; | |
a6c2ba28 | 347 | unsigned int vmux; |
539c96d0 | 348 | enum em28xx_amux amux; |
35ae6f04 | 349 | enum em28xx_aout aout; |
122b77e5 | 350 | struct em28xx_reg_seq *gpio; |
a6c2ba28 | 351 | }; |
352 | ||
3acf2809 | 353 | #define INPUT(nr) (&em28xx_boards[dev->model].input[nr]) |
a6c2ba28 | 354 | |
3acf2809 | 355 | enum em28xx_decoder { |
527f09a9 | 356 | EM28XX_NODECODER = 0, |
3acf2809 | 357 | EM28XX_TVP5150, |
ec5de990 | 358 | EM28XX_SAA711X, |
527f09a9 MCC |
359 | }; |
360 | ||
361 | enum em28xx_sensor { | |
362 | EM28XX_NOSENSOR = 0, | |
02e7804b | 363 | EM28XX_MT9V011, |
b80fd2d8 | 364 | EM28XX_MT9M001, |
f2e26ae7 | 365 | EM28XX_MT9M111, |
a6c2ba28 | 366 | }; |
367 | ||
df7fa09c MCC |
368 | enum em28xx_adecoder { |
369 | EM28XX_NOADECODER = 0, | |
370 | EM28XX_TVAUDIO, | |
371 | }; | |
372 | ||
3acf2809 | 373 | struct em28xx_board { |
a6c2ba28 | 374 | char *name; |
505b6d0b | 375 | int vchannels; |
a6c2ba28 | 376 | int tuner_type; |
66767920 | 377 | int tuner_addr; |
aab3125c | 378 | unsigned def_i2c_bus; /* Default I2C bus */ |
a6c2ba28 | 379 | |
380 | /* i2c flags */ | |
381 | unsigned int tda9887_conf; | |
382 | ||
017ab4b1 | 383 | /* GPIO sequences */ |
122b77e5 | 384 | struct em28xx_reg_seq *dvb_gpio; |
2fe3e2ee | 385 | struct em28xx_reg_seq *suspend_gpio; |
017ab4b1 | 386 | struct em28xx_reg_seq *tuner_gpio; |
2bd1d9eb | 387 | struct em28xx_reg_seq *mute_gpio; |
122b77e5 | 388 | |
74f38a82 | 389 | unsigned int is_em2800:1; |
a6c2ba28 | 390 | unsigned int has_msp34xx:1; |
5add9a6f | 391 | unsigned int mts_firmware:1; |
c8793b03 | 392 | unsigned int max_range_640_480:1; |
3aefb79a | 393 | unsigned int has_dvb:1; |
a9fc52bc | 394 | unsigned int has_snapshot_button:1; |
c43221df | 395 | unsigned int is_webcam:1; |
95b86a9a | 396 | unsigned int valid:1; |
ac07bb73 | 397 | unsigned int has_ir_i2c:1; |
3abee53e | 398 | |
a2070c66 | 399 | unsigned char xclk, i2c_speed; |
f2cf250a DSL |
400 | unsigned char radio_addr; |
401 | unsigned short tvaudio_addr; | |
a2070c66 | 402 | |
3acf2809 | 403 | enum em28xx_decoder decoder; |
df7fa09c | 404 | enum em28xx_adecoder adecoder; |
a6c2ba28 | 405 | |
3acf2809 | 406 | struct em28xx_input input[MAX_EM28XX_INPUT]; |
0be43754 | 407 | struct em28xx_input radio; |
02858eed | 408 | char *ir_codes; |
a6c2ba28 | 409 | }; |
410 | ||
3acf2809 | 411 | struct em28xx_eeprom { |
0c28dcc0 FS |
412 | u8 id[4]; /* 1a eb 67 95 */ |
413 | __le16 vendor_ID; | |
414 | __le16 product_ID; | |
a6c2ba28 | 415 | |
0c28dcc0 | 416 | __le16 chip_conf; |
a6c2ba28 | 417 | |
0c28dcc0 | 418 | __le16 board_conf; |
a6c2ba28 | 419 | |
0c28dcc0 | 420 | __le16 string1, string2, string3; |
a6c2ba28 | 421 | |
422 | u8 string_idx_table; | |
423 | }; | |
424 | ||
6d79468d MCC |
425 | #define EM28XX_AUDIO_BUFS 5 |
426 | #define EM28XX_NUM_AUDIO_PACKETS 64 | |
427 | #define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */ | |
428 | #define EM28XX_CAPTURE_STREAM_EN 1 | |
3aefb79a MCC |
429 | |
430 | /* em28xx extensions */ | |
6d79468d | 431 | #define EM28XX_AUDIO 0x10 |
3aefb79a | 432 | #define EM28XX_DVB 0x20 |
f4d4e765 | 433 | #define EM28XX_RC 0x30 |
6d79468d | 434 | |
8c873d31 DH |
435 | /* em28xx resource types (used for res_get/res_lock etc */ |
436 | #define EM28XX_RESOURCE_VIDEO 0x01 | |
437 | #define EM28XX_RESOURCE_VBI 0x02 | |
438 | ||
6d79468d MCC |
439 | struct em28xx_audio { |
440 | char name[50]; | |
441 | char *transfer_buffer[EM28XX_AUDIO_BUFS]; | |
442 | struct urb *urb[EM28XX_AUDIO_BUFS]; | |
443 | struct usb_device *udev; | |
444 | unsigned int capture_transfer_done; | |
445 | struct snd_pcm_substream *capture_pcm_substream; | |
446 | ||
447 | unsigned int hwptr_done_capture; | |
448 | struct snd_card *sndcard; | |
449 | ||
c744dff2 | 450 | int users; |
6d79468d MCC |
451 | spinlock_t slock; |
452 | }; | |
453 | ||
52284c3e MCC |
454 | struct em28xx; |
455 | ||
456 | struct em28xx_fh { | |
69a61642 | 457 | struct v4l2_fh fh; |
52284c3e | 458 | struct em28xx *dev; |
52284c3e MCC |
459 | |
460 | enum v4l2_buf_type type; | |
461 | }; | |
462 | ||
aab3125c MCC |
463 | struct em28xx_i2c_bus { |
464 | struct em28xx *dev; | |
465 | ||
466 | unsigned bus; | |
467 | }; | |
468 | ||
469 | ||
a6c2ba28 | 470 | /* main device struct */ |
3acf2809 | 471 | struct em28xx { |
a6c2ba28 | 472 | /* generic device properties */ |
473 | char name[30]; /* name (including minor) of the device */ | |
474 | int model; /* index in the device_data struct */ | |
e5589bef | 475 | int devno; /* marks the number of this device */ |
600bd7f0 | 476 | enum em28xx_chip_id chip_id; |
505b6d0b | 477 | |
2665c299 FS |
478 | unsigned char disconnected:1; /* device has been diconnected */ |
479 | ||
4f83e7b3 MCC |
480 | int audio_ifnum; |
481 | ||
f2cf250a | 482 | struct v4l2_device v4l2_dev; |
081b945e | 483 | struct v4l2_ctrl_handler ctrl_handler; |
505b6d0b MCC |
484 | struct em28xx_board board; |
485 | ||
d36bb4e7 | 486 | /* Webcam specific fields */ |
527f09a9 | 487 | enum em28xx_sensor em28xx_sensor; |
55699964 | 488 | int sensor_xres, sensor_yres; |
d36bb4e7 | 489 | int sensor_xtal; |
527f09a9 | 490 | |
8c301567 | 491 | /* Progressive (non-interlaced) mode */ |
c2a6b54a MCC |
492 | int progressive; |
493 | ||
579d3152 MCC |
494 | /* Vinmode/Vinctl used at the driver */ |
495 | int vinmode, vinctl; | |
496 | ||
d7448a8d | 497 | unsigned int has_audio_class:1; |
24a613e4 | 498 | unsigned int has_alsa_audio:1; |
4f83e7b3 | 499 | unsigned int is_audio_only:1; |
a2070c66 | 500 | |
39a96b4c | 501 | /* Controls audio streaming */ |
d5b6a746 FS |
502 | struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */ |
503 | atomic_t stream_started; /* stream should be running if true */ | |
39a96b4c | 504 | |
bddcf633 MCC |
505 | struct em28xx_fmt *format; |
506 | ||
a924a499 MCC |
507 | struct em28xx_IR *ir; |
508 | ||
89b329ef MCC |
509 | /* Some older em28xx chips needs a waiting time after writing */ |
510 | unsigned int wait_after_write; | |
511 | ||
74f38a82 MCC |
512 | struct list_head devlist; |
513 | ||
9bb13a6d MCC |
514 | u32 i2s_speed; /* I2S speed for audio digital stream */ |
515 | ||
35643943 | 516 | struct em28xx_audio_mode audio_mode; |
a6c2ba28 | 517 | |
518 | int tuner_type; /* type of the tuner */ | |
519 | int tuner_addr; /* tuner address */ | |
520 | int tda9887_conf; | |
c7a45e5b | 521 | |
a6c2ba28 | 522 | /* i2c i/o */ |
c7a45e5b MCC |
523 | struct i2c_adapter i2c_adap[NUM_I2C_BUSES]; |
524 | struct i2c_client i2c_client[NUM_I2C_BUSES]; | |
aab3125c MCC |
525 | struct em28xx_i2c_bus i2c_bus[NUM_I2C_BUSES]; |
526 | ||
87b52439 | 527 | unsigned char eeprom_addrwidth_16bit:1; |
aab3125c MCC |
528 | unsigned def_i2c_bus; /* Default I2C bus */ |
529 | unsigned cur_i2c_bus; /* Current I2C bus */ | |
530 | struct rt_mutex i2c_bus_lock; | |
c7a45e5b | 531 | |
a6c2ba28 | 532 | /* video for linux */ |
533 | int users; /* user count for exclusive use */ | |
d3829fad | 534 | int streaming_users; /* Number of actively streaming users */ |
a6c2ba28 | 535 | struct video_device *vdev; /* video for linux device struct */ |
7d497f8a | 536 | v4l2_std_id norm; /* selected tv norm */ |
a6c2ba28 | 537 | int ctl_freq; /* selected frequency */ |
538 | unsigned int ctl_input; /* selected input */ | |
95b86a9a | 539 | unsigned int ctl_ainput;/* selected audio input */ |
35ae6f04 | 540 | unsigned int ctl_aoutput;/* selected audio output */ |
a6c2ba28 | 541 | int mute; |
542 | int volume; | |
543 | /* frame properties */ | |
a6c2ba28 | 544 | int width; /* current frame width */ |
545 | int height; /* current frame height */ | |
d45b9b8a HV |
546 | unsigned hscale; /* horizontal scale factor (see datasheet) */ |
547 | unsigned vscale; /* vertical scale factor (see datasheet) */ | |
a6c2ba28 | 548 | int interlaced; /* 1=interlace fileds, 0=just top fileds */ |
9e31ced8 | 549 | unsigned int video_bytesread; /* Number of bytes read */ |
a6c2ba28 | 550 | |
03910cc3 | 551 | unsigned long hash; /* eeprom hash - for boards with generic ID */ |
6ea54d93 DSL |
552 | unsigned long i2c_hash; /* i2c devicelist hash - |
553 | for boards with generic ID */ | |
03910cc3 | 554 | |
9baed99e | 555 | struct em28xx_audio adev; |
6d79468d | 556 | |
960da93b | 557 | /* capture state tracking */ |
da52a55c | 558 | int capture_type; |
0455eebf | 559 | unsigned char top_field:1; |
960da93b | 560 | int vbi_read; |
66d9cbad DH |
561 | unsigned int vbi_width; |
562 | unsigned int vbi_height; /* lines per field */ | |
da52a55c | 563 | |
d7448a8d MCC |
564 | struct work_struct request_module_wk; |
565 | ||
a6c2ba28 | 566 | /* locks */ |
5a80415b | 567 | struct mutex lock; |
f2a2e491 | 568 | struct mutex ctrl_urb_lock; /* protects urb_buf */ |
d7aa8020 | 569 | /* spinlock_t queue_lock; */ |
a6c2ba28 | 570 | struct list_head inqueue, outqueue; |
a6c2ba28 | 571 | struct video_device *vbi_dev; |
0be43754 | 572 | struct video_device *radio_dev; |
a6c2ba28 | 573 | |
d3829fad DH |
574 | /* Videobuf2 */ |
575 | struct vb2_queue vb_vidq; | |
576 | struct vb2_queue vb_vbiq; | |
577 | struct mutex vb_queue_lock; | |
578 | struct mutex vb_vbi_queue_lock; | |
579 | ||
8c873d31 DH |
580 | /* resources in use */ |
581 | unsigned int resources; | |
582 | ||
510e884c FS |
583 | /* eeprom content */ |
584 | u8 *eedata; | |
585 | u16 eedata_len; | |
a6c2ba28 | 586 | |
ad0ebb96 MCC |
587 | /* Isoc control struct */ |
588 | struct em28xx_dmaqueue vidq; | |
28abf083 | 589 | struct em28xx_dmaqueue vbiq; |
74209dc0 | 590 | struct em28xx_usb_ctl usb_ctl; |
ad0ebb96 MCC |
591 | spinlock_t slock; |
592 | ||
d3829fad DH |
593 | unsigned int field_count; |
594 | unsigned int vbi_field_count; | |
595 | ||
a6c2ba28 | 596 | /* usb transfer */ |
597 | struct usb_device *udev; /* the usb device */ | |
c647a91a FS |
598 | u8 analog_ep_isoc; /* address of isoc endpoint for analog */ |
599 | u8 analog_ep_bulk; /* address of bulk endpoint for analog */ | |
600 | u8 dvb_ep_isoc; /* address of isoc endpoint for DVB */ | |
d5b6a746 | 601 | u8 dvb_ep_bulk; /* address of bulk endpoint for DVB */ |
0cf544a6 FS |
602 | int alt; /* alternate setting */ |
603 | int max_pkt_size; /* max packet size of the selected ep at alt */ | |
c647a91a FS |
604 | int packet_multiplier; /* multiplier for wMaxPacketSize, used for |
605 | URB buffer size definition */ | |
0cf544a6 FS |
606 | int num_alt; /* number of alternative settings */ |
607 | unsigned int *alt_max_pkt_size_isoc; /* array of isoc wMaxPacketSize */ | |
7312f2c9 FS |
608 | unsigned int analog_xfer_bulk:1; /* use bulk instead of isoc |
609 | transfers for analog */ | |
0cf544a6 FS |
610 | int dvb_alt_isoc; /* alternate setting for DVB isoc transfers */ |
611 | unsigned int dvb_max_pkt_size_isoc; /* isoc max packet size of the | |
612 | selected DVB ep at dvb_alt */ | |
7312f2c9 FS |
613 | unsigned int dvb_xfer_bulk:1; /* use bulk instead of isoc |
614 | transfers for DVB */ | |
c4a98793 MCC |
615 | char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */ |
616 | ||
a6c2ba28 | 617 | /* helper funcs that call usb_control_msg */ |
6ea54d93 | 618 | int (*em28xx_write_regs) (struct em28xx *dev, u16 reg, |
a6c2ba28 | 619 | char *buf, int len); |
6ea54d93 DSL |
620 | int (*em28xx_read_reg) (struct em28xx *dev, u16 reg); |
621 | int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg, | |
622 | char *buf, int len); | |
623 | int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg, | |
a6c2ba28 | 624 | char *buf, int len); |
6ea54d93 | 625 | int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg); |
3aefb79a MCC |
626 | |
627 | enum em28xx_mode mode; | |
628 | ||
6a1acc3b DH |
629 | /* register numbers for GPO/GPIO registers */ |
630 | u16 reg_gpo_num, reg_gpio_num; | |
631 | ||
c67ec53f MCC |
632 | /* Caches GPO and GPIO registers */ |
633 | unsigned char reg_gpo, reg_gpio; | |
634 | ||
a9fc52bc DH |
635 | /* Snapshot button */ |
636 | char snapshot_button_path[30]; /* path of the input dev */ | |
637 | struct input_dev *sbutton_input_dev; | |
638 | struct delayed_work sbutton_query_work; | |
639 | ||
3421b778 | 640 | struct em28xx_dvb *dvb; |
a6c2ba28 | 641 | }; |
642 | ||
6d79468d MCC |
643 | struct em28xx_ops { |
644 | struct list_head next; | |
645 | char *name; | |
646 | int id; | |
647 | int (*init)(struct em28xx *); | |
648 | int (*fini)(struct em28xx *); | |
a3a048ce MCC |
649 | }; |
650 | ||
3acf2809 | 651 | /* Provided by em28xx-i2c.c */ |
aab3125c MCC |
652 | void em28xx_do_i2c_scan(struct em28xx *dev, unsigned bus); |
653 | int em28xx_i2c_register(struct em28xx *dev, unsigned bus); | |
654 | int em28xx_i2c_unregister(struct em28xx *dev, unsigned bus); | |
a6c2ba28 | 655 | |
3acf2809 | 656 | /* Provided by em28xx-core.c */ |
3acf2809 | 657 | int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, |
a6c2ba28 | 658 | char *buf, int len); |
3acf2809 MCC |
659 | int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg); |
660 | int em28xx_read_reg(struct em28xx *dev, u16 reg); | |
661 | int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, | |
a6c2ba28 | 662 | int len); |
3acf2809 | 663 | int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len); |
b6972489 | 664 | int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val); |
1bad429e MCC |
665 | int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val, |
666 | u8 bitmask); | |
b6972489 | 667 | |
531c98e7 MCC |
668 | int em28xx_read_ac97(struct em28xx *dev, u8 reg); |
669 | int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val); | |
670 | ||
3acf2809 | 671 | int em28xx_audio_analog_set(struct em28xx *dev); |
35643943 | 672 | int em28xx_audio_setup(struct em28xx *dev); |
539c96d0 | 673 | |
3acf2809 MCC |
674 | int em28xx_colorlevels_set_default(struct em28xx *dev); |
675 | int em28xx_capture_start(struct em28xx *dev, int start); | |
da52a55c | 676 | int em28xx_vbi_supported(struct em28xx *dev); |
bddcf633 | 677 | int em28xx_set_outfmt(struct em28xx *dev); |
3acf2809 | 678 | int em28xx_resolution_set(struct em28xx *dev); |
3acf2809 | 679 | int em28xx_set_alternate(struct em28xx *dev); |
6ddd89d0 FS |
680 | int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk, |
681 | int num_bufs, int max_pkt_size, int packet_multiplier); | |
057ca0da FS |
682 | int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode, |
683 | int xfer_bulk, | |
684 | int num_bufs, int max_pkt_size, int packet_multiplier, | |
685 | int (*urb_data_copy) | |
686 | (struct em28xx *dev, struct urb *urb)); | |
afb177e0 | 687 | void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode); |
5f5f147f | 688 | void em28xx_stop_urbs(struct em28xx *dev); |
c67ec53f MCC |
689 | int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode); |
690 | int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio); | |
1a23f81b | 691 | void em28xx_wake_i2c(struct em28xx *dev); |
6d79468d MCC |
692 | int em28xx_register_extension(struct em28xx_ops *dev); |
693 | void em28xx_unregister_extension(struct em28xx_ops *dev); | |
1a23f81b MCC |
694 | void em28xx_init_extension(struct em28xx *dev); |
695 | void em28xx_close_extension(struct em28xx *dev); | |
696 | ||
697 | /* Provided by em28xx-video.c */ | |
d3829fad | 698 | int em28xx_vb2_setup(struct em28xx *dev); |
1a23f81b MCC |
699 | int em28xx_register_analog_devices(struct em28xx *dev); |
700 | void em28xx_release_analog_resources(struct em28xx *dev); | |
081b945e | 701 | void em28xx_ctrl_notify(struct v4l2_ctrl *ctrl, void *priv); |
d3829fad DH |
702 | int em28xx_start_analog_streaming(struct vb2_queue *vq, unsigned int count); |
703 | int em28xx_stop_vbi_streaming(struct vb2_queue *vq); | |
081b945e | 704 | extern const struct v4l2_ctrl_ops em28xx_ctrl_ops; |
6d79468d | 705 | |
3acf2809 | 706 | /* Provided by em28xx-cards.c */ |
3acf2809 MCC |
707 | extern struct em28xx_board em28xx_boards[]; |
708 | extern struct usb_device_id em28xx_id_table[]; | |
d7cba043 | 709 | int em28xx_tuner_callback(void *ptr, int component, int command, int arg); |
1a23f81b | 710 | void em28xx_release_resources(struct em28xx *dev); |
c8793b03 | 711 | |
28abf083 | 712 | /* Provided by em28xx-vbi.c */ |
d3829fad | 713 | extern struct vb2_ops em28xx_vbi_qops; |
28abf083 | 714 | |
a6c2ba28 | 715 | /* printk macros */ |
716 | ||
3acf2809 | 717 | #define em28xx_err(fmt, arg...) do {\ |
f85c657f | 718 | printk(KERN_ERR fmt , ##arg); } while (0) |
a6c2ba28 | 719 | |
3acf2809 | 720 | #define em28xx_errdev(fmt, arg...) do {\ |
4ac97914 | 721 | printk(KERN_ERR "%s: "fmt,\ |
f85c657f | 722 | dev->name , ##arg); } while (0) |
a6c2ba28 | 723 | |
3acf2809 | 724 | #define em28xx_info(fmt, arg...) do {\ |
4ac97914 | 725 | printk(KERN_INFO "%s: "fmt,\ |
f85c657f | 726 | dev->name , ##arg); } while (0) |
3acf2809 | 727 | #define em28xx_warn(fmt, arg...) do {\ |
4ac97914 | 728 | printk(KERN_WARNING "%s: "fmt,\ |
f85c657f | 729 | dev->name , ##arg); } while (0) |
a6c2ba28 | 730 | |
6ea54d93 | 731 | static inline int em28xx_compression_disable(struct em28xx *dev) |
a6c2ba28 | 732 | { |
733 | /* side effect of disabling scaler and mixer */ | |
2a29a0d7 | 734 | return em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00); |
a6c2ba28 | 735 | } |
736 | ||
a6c2ba28 | 737 | /*FIXME: maxw should be dependent of alt mode */ |
6ea54d93 | 738 | static inline unsigned int norm_maxw(struct em28xx *dev) |
30556b23 | 739 | { |
55699964 MCC |
740 | if (dev->board.is_webcam) |
741 | return dev->sensor_xres; | |
742 | ||
1020d13d | 743 | if (dev->board.max_range_640_480) |
7d497f8a | 744 | return 640; |
55699964 MCC |
745 | |
746 | return 720; | |
30556b23 MR |
747 | } |
748 | ||
6ea54d93 | 749 | static inline unsigned int norm_maxh(struct em28xx *dev) |
a6c2ba28 | 750 | { |
55699964 MCC |
751 | if (dev->board.is_webcam) |
752 | return dev->sensor_yres; | |
753 | ||
505b6d0b | 754 | if (dev->board.max_range_640_480) |
7d497f8a | 755 | return 480; |
55699964 MCC |
756 | |
757 | return (dev->norm & V4L2_STD_625_50) ? 576 : 480; | |
a6c2ba28 | 758 | } |
a6c2ba28 | 759 | #endif |