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[media] v4l2-ctrls: add a notify callback
[mirror_ubuntu-artful-kernel.git] / drivers / media / usb / em28xx / em28xx.h
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a6c2ba28 1/*
0e7072ef 2 em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices
a6c2ba28 3
4 Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com>
4ac97914 5 Ludovico Cavedon <cavedon@sssup.it>
2e7c6dc3 6 Mauro Carvalho Chehab <mchehab@infradead.org>
0cf544a6 7 Copyright (C) 2012 Frank Schäfer <fschaefer.oss@googlemail.com>
a6c2ba28 8
9 Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de>
10
11 This program is free software; you can redistribute it and/or modify
12 it under the terms of the GNU General Public License as published by
13 the Free Software Foundation; either version 2 of the License, or
14 (at your option) any later version.
15
16 This program is distributed in the hope that it will be useful,
17 but WITHOUT ANY WARRANTY; without even the implied warranty of
18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 GNU General Public License for more details.
20
21 You should have received a copy of the GNU General Public License
22 along with this program; if not, write to the Free Software
23 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 */
25
3acf2809
MCC		 26#ifndef _EM28XX_H
27#define _EM28XX_H
a6c2ba28 28
39a96b4c
MCC		 29#include <linux/workqueue.h>
30#include <linux/i2c.h>
31#include <linux/mutex.h>
cb77d010 32#include <linux/videodev2.h>
39a96b4c 33
ad0ebb96 34#include <media/videobuf-vmalloc.h>
f2cf250a 35#include <media/v4l2-device.h>
d5e52653 36#include <media/ir-kbd-i2c.h>
6bda9644 37#include <media/rc-core.h>
3aefb79a
MCC		 38#if defined(CONFIG_VIDEO_EM28XX_DVB) || defined(CONFIG_VIDEO_EM28XX_DVB_MODULE)
39#include <media/videobuf-dvb.h>
40#endif
3ca9c093 41#include "tuner-xc2028.h"
82e7dbbd 42#include "xc5000.h"
2ba890ec 43#include "em28xx-reg.h"
3aefb79a
MCC		 44
45/* Boards supported by driver */
46#define EM2800_BOARD_UNKNOWN 0
47#define EM2820_BOARD_UNKNOWN 1
48#define EM2820_BOARD_TERRATEC_CINERGY_250 2
49#define EM2820_BOARD_PINNACLE_USB_2 3
50#define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4
51#define EM2820_BOARD_MSI_VOX_USB_2 5
52#define EM2800_BOARD_TERRATEC_CINERGY_200 6
53#define EM2800_BOARD_LEADTEK_WINFAST_USBII 7
54#define EM2800_BOARD_KWORLD_USB2800 8
55#define EM2820_BOARD_PINNACLE_DVC_90 9
56#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10
57#define EM2880_BOARD_TERRATEC_HYBRID_XS 11
58#define EM2820_BOARD_KWORLD_PVRTV2800RF 12
59#define EM2880_BOARD_TERRATEC_PRODIGY_XS 13
60#define EM2820_BOARD_PROLINK_PLAYTV_USB2 14
61#define EM2800_BOARD_VGEAR_POCKETTV 15
10ac6603 62#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_950 16
4fd305b2 63#define EM2880_BOARD_PINNACLE_PCTV_HD_PRO 17
17d9d558 64#define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900_R2 18
3ed58baf 65#define EM2860_BOARD_SAA711X_REFERENCE_DESIGN 19
e14b3658 66#define EM2880_BOARD_AMD_ATI_TV_WONDER_HD_600 20
59d07f1b 67#define EM2800_BOARD_GRABBEEX_USB2800 21
95b86a9a
DSL		 68#define EM2750_BOARD_UNKNOWN 22
69#define EM2750_BOARD_DLCW_130 23
70#define EM2820_BOARD_DLINK_USB_TV 24
71#define EM2820_BOARD_GADMEI_UTV310 25
72#define EM2820_BOARD_HERCULES_SMART_TV_USB2 26
73#define EM2820_BOARD_PINNACLE_USB_2_FM1216ME 27
74#define EM2820_BOARD_LEADTEK_WINFAST_USBII_DELUXE 28
443fed9f 75#define EM2860_BOARD_TVP5150_REFERENCE_DESIGN 29
95b86a9a
DSL		 76#define EM2820_BOARD_VIDEOLOGY_20K14XUSB 30
77#define EM2821_BOARD_USBGEAR_VD204 31
78#define EM2821_BOARD_SUPERCOMP_USB_2 32
8298f2f8 79#define EM2860_BOARD_ELGATO_VIDEO_CAPTURE 33
95b86a9a
DSL		 80#define EM2860_BOARD_TERRATEC_HYBRID_XS 34
81#define EM2860_BOARD_TYPHOON_DVD_MAKER 35
82#define EM2860_BOARD_NETGMBH_CAM 36
83#define EM2860_BOARD_GADMEI_UTV330 37
84#define EM2861_BOARD_YAKUMO_MOVIE_MIXER 38
85#define EM2861_BOARD_KWORLD_PVRTV_300U 39
86#define EM2861_BOARD_PLEXTOR_PX_TV100U 40
87#define EM2870_BOARD_KWORLD_350U 41
88#define EM2870_BOARD_KWORLD_355U 42
89#define EM2870_BOARD_TERRATEC_XS 43
90#define EM2870_BOARD_TERRATEC_XS_MT2060 44
91#define EM2870_BOARD_PINNACLE_PCTV_DVB 45
92#define EM2870_BOARD_COMPRO_VIDEOMATE 46
93#define EM2880_BOARD_KWORLD_DVB_305U 47
94#define EM2880_BOARD_KWORLD_DVB_310U 48
95#define EM2880_BOARD_MSI_DIGIVOX_AD 49
96#define EM2880_BOARD_MSI_DIGIVOX_AD_II 50
97#define EM2880_BOARD_TERRATEC_HYBRID_XS_FR 51
98#define EM2881_BOARD_DNT_DA2_HYBRID 52
99#define EM2881_BOARD_PINNACLE_HYBRID_PRO 53
100#define EM2882_BOARD_KWORLD_VS_DVBT 54
101#define EM2882_BOARD_TERRATEC_HYBRID_XS 55
09bc1942 102#define EM2882_BOARD_PINNACLE_HYBRID_PRO_330E 56
6e7b9ea0 103#define EM2883_BOARD_KWORLD_HYBRID_330U 57
ee281b85 104#define EM2820_BOARD_COMPRO_VIDEOMATE_FORYOU 58
f89bc329 105#define EM2883_BOARD_HAUPPAUGE_WINTV_HVR_850 60
1e1addd5 106#define EM2820_BOARD_PROLINK_PLAYTV_BOX4_USB2 61
f7fe3e6f 107#define EM2820_BOARD_GADMEI_TVR200 62
56ee3807
MCC		 108#define EM2860_BOARD_KAIOMY_TVNPC_U2 63
109#define EM2860_BOARD_EASYCAP 64
f74a61e3 110#define EM2820_BOARD_IODATA_GVMVP_SZ 65
e5db5d44 111#define EM2880_BOARD_EMPIRE_DUAL_TV 66
4557af9c 112#define EM2860_BOARD_TERRATEC_GRABBY 67
766ed64d 113#define EM2860_BOARD_TERRATEC_AV350 68
d7de5d8f 114#define EM2882_BOARD_KWORLD_ATSC_315U 69
19859229 115#define EM2882_BOARD_EVGA_INDTUBE 70
02e7804b 116#define EM2820_BOARD_SILVERCREST_WEBCAM 71
6d888a66 117#define EM2861_BOARD_GADMEI_UTV330PLUS 72
285eb1a4 118#define EM2870_BOARD_REDDO_DVB_C_USB_BOX 73
694a101e 119#define EM2800_BOARD_VC211A 74
7ca7ef60 120#define EM2882_BOARD_DIKOM_DK300 75
7e48b30a 121#define EM2870_BOARD_KWORLD_A340 76
fec528b7 122#define EM2874_BOARD_LEADERSHIP_ISDBT 77
d6a5f921 123#define EM28174_BOARD_PCTV_290E 78
fec528b7 124#define EM2884_BOARD_TERRATEC_H5 79
36588715 125#define EM28174_BOARD_PCTV_460E 80
82e7dbbd 126#define EM2884_BOARD_HAUPPAUGE_WINTV_HVR_930C 81
a1ed02e9 127#define EM2884_BOARD_CINERGY_HTC_STICK 82
4d28d3d9 128#define EM2860_BOARD_HT_VIDBOX_NW03 83
3553085c 129#define EM2874_BOARD_MAXMEDIA_UB425_TC 84
fa5527cd
IK		 130#define EM2884_BOARD_PCTV_510E 85
131#define EM2884_BOARD_PCTV_520E 86
89040136 132#define EM2884_BOARD_TERRATEC_HTC_USB_XS 87
3aefb79a
MCC		 133
134/* Limits minimum and default number of buffers */
135#define EM28XX_MIN_BUF 4
136#define EM28XX_DEF_BUF 8
a6c2ba28 137
c4a98793
MCC		 138/*Limits the max URB message size */
139#define URB_MAX_CTRL_SIZE 80
140
95b86a9a
DSL		 141/* Params for validated field */
142#define EM28XX_BOARD_NOT_VALIDATED 1
143#define EM28XX_BOARD_VALIDATED 0
144
22cff7b3
DSL		 145/* Params for em28xx_cmd() audio */
146#define EM28XX_START_AUDIO 1
147#define EM28XX_STOP_AUDIO 0
148
596d92d5 149/* maximum number of em28xx boards */
3687e1e6 150#define EM28XX_MAXBOARDS 4 /*FIXME: should be bigger */
596d92d5 151
a6c2ba28 152/* maximum number of frames that can be queued */
3acf2809 153#define EM28XX_NUM_FRAMES 5
a6c2ba28 154/* number of frames that get used for v4l2_read() */
3acf2809 155#define EM28XX_NUM_READ_FRAMES 2
a6c2ba28 156
157/* number of buffers for isoc transfers */
3acf2809 158#define EM28XX_NUM_BUFS 5
86d38d1e 159#define EM28XX_DVB_NUM_BUFS 5
a6c2ba28 160
515688a8 161/* isoc transfers: number of packets for each buffer
33c02fac 162 windows requests only 64 packets .. so we better do the same
d5e52653
MCC		 163 this is what I found out for all alternate numbers there!
164 */
515688a8
FS		 165#define EM28XX_NUM_ISOC_PACKETS 64
166#define EM28XX_DVB_NUM_ISOC_PACKETS 64
a6c2ba28 167
c647a91a
FS		 168/* bulk transfers: transfer buffer size = packet size * packet multiplier
169 USB 2.0 spec says bulk packet size is always 512 bytes
170 */
171#define EM28XX_BULK_PACKET_MULTIPLIER 384
172#define EM28XX_DVB_BULK_PACKET_MULTIPLIER 384
173
3acf2809 174#define EM28XX_INTERLACED_DEFAULT 1
a6c2ba28 175
176/*
177#define (use usbview if you want to get the other alternate number infos)
178#define
179#define alternate number 2
180#define Endpoint Address: 82
181 Direction: in
182 Attribute: 1
183 Type: Isoc
184 Max Packet Size: 1448
185 Interval: 125us
186
187 alternate number 7
188
189 Endpoint Address: 82
190 Direction: in
191 Attribute: 1
192 Type: Isoc
193 Max Packet Size: 3072
194 Interval: 125us
195*/
196
596d92d5
MCC		 197/* time in msecs to wait for i2c writes to finish */
198#define EM2800_I2C_WRITE_TIMEOUT 20
199
3aefb79a 200enum em28xx_mode {
2fe3e2ee 201 EM28XX_SUSPEND,
3aefb79a
MCC		 202 EM28XX_ANALOG_MODE,
203 EM28XX_DIGITAL_MODE,
204};
205
a6c2ba28 206
579f72e4
AT		 207struct em28xx;
208
f0fa9936 209struct em28xx_usb_bufs {
ad0ebb96
MCC		 210 /* max packet size of isoc transaction */
211 int max_pkt_size;
212
86d38d1e
GG		 213 /* number of packets in each buffer */
214 int num_packets;
215
ad0ebb96
MCC		 216 /* number of allocated urbs */
217 int num_bufs;
218
f0fa9936 219 /* urb for isoc/bulk transfers */
ad0ebb96
MCC		 220 struct urb **urb;
221
f0fa9936 222 /* transfer buffers for isoc/bulk transfer */
ad0ebb96 223 char **transfer_buffer;
86d38d1e
GG		 224};
225
74209dc0
FS		 226struct em28xx_usb_ctl {
227 /* isoc/bulk transfer buffers for analog mode */
f0fa9936 228 struct em28xx_usb_bufs analog_bufs;
86d38d1e 229
74209dc0 230 /* isoc/bulk transfer buffers for digital mode */
f0fa9936 231 struct em28xx_usb_bufs digital_bufs;
ad0ebb96 232
ad0ebb96 233 /* Stores already requested buffers */
28abf083
DH		 234 struct em28xx_buffer *vid_buf;
235 struct em28xx_buffer *vbi_buf;
ad0ebb96 236
74209dc0
FS		 237 /* copy data from URB */
238 int (*urb_data_copy) (struct em28xx *dev, struct urb *urb);
579f72e4 239
ad0ebb96
MCC		 240};
241
bddcf633 242/* Struct to enumberate video formats */
ad0ebb96
MCC		 243struct em28xx_fmt {
244 char *name;
245 u32 fourcc; /* v4l2 format id */
bddcf633
MCC		 246 int depth;
247 int reg;
ad0ebb96
MCC		 248};
249
250/* buffer for one video frame */
251struct em28xx_buffer {
252 /* common v4l buffer stuff -- must be first */
253 struct videobuf_buffer vb;
254
a6c2ba28 255 int top_field;
8732533b
FS		 256
257 /* counter to control buffer fill */
258 unsigned int pos;
259 /* NOTE; in interlaced mode, this value is reset to zero at
260 * the start of each new field (not frame !) */
4078d625
FS		 261
262 /* pointer to vmalloc memory address in vb */
263 char *vb_buf;
ad0ebb96
MCC		 264};
265
266struct em28xx_dmaqueue {
267 struct list_head active;
ad0ebb96
MCC		 268
269 wait_queue_head_t wq;
a6c2ba28 270};
271
a6c2ba28 272/* inputs */
273
3acf2809
MCC		 274#define MAX_EM28XX_INPUT 4
275enum enum28xx_itype {
276 EM28XX_VMUX_COMPOSITE1 = 1,
277 EM28XX_VMUX_COMPOSITE2,
278 EM28XX_VMUX_COMPOSITE3,
279 EM28XX_VMUX_COMPOSITE4,
280 EM28XX_VMUX_SVIDEO,
281 EM28XX_VMUX_TELEVISION,
282 EM28XX_VMUX_CABLE,
283 EM28XX_VMUX_DVB,
284 EM28XX_VMUX_DEBUG,
285 EM28XX_RADIO,
a6c2ba28 286};
287
35643943
MCC		 288enum em28xx_ac97_mode {
289 EM28XX_NO_AC97 = 0,
290 EM28XX_AC97_EM202,
209acc02 291 EM28XX_AC97_SIGMATEL,
35643943
MCC		 292 EM28XX_AC97_OTHER,
293};
294
295struct em28xx_audio_mode {
296 enum em28xx_ac97_mode ac97;
297
298 u16 ac97_feat;
16c7bcad 299 u32 ac97_vendor_id;
35643943
MCC		 300
301 unsigned int has_audio:1;
302
303 unsigned int i2s_3rates:1;
304 unsigned int i2s_5rates:1;
5c2231c8
DH		 305};
306
5faff789
MCC		 307/* em28xx has two audio inputs: tuner and line in.
308 However, on most devices, an auxiliary AC97 codec device is used.
309 The AC97 device may have several different inputs and outputs,
310 depending on their model. So, it is possible to use AC97 mixer to
311 address more than two different entries.
312 */
539c96d0 313enum em28xx_amux {
5faff789
MCC		 314 /* This is the only entry for em28xx tuner input */
315 EM28XX_AMUX_VIDEO, /* em28xx tuner, AC97 mixer Video */
316
317 EM28XX_AMUX_LINE_IN, /* AC97 mixer Line In */
318
319 /* Some less-common mixer setups */
320 EM28XX_AMUX_VIDEO2, /* em28xx Line in, AC97 mixer Video */
321 EM28XX_AMUX_PHONE,
322 EM28XX_AMUX_MIC,
323 EM28XX_AMUX_CD,
324 EM28XX_AMUX_AUX,
325 EM28XX_AMUX_PCM_OUT,
539c96d0
MCC		 326};
327
35ae6f04 328enum em28xx_aout {
8866f9cf 329 /* AC97 outputs */
e879b8eb
MCC		 330 EM28XX_AOUT_MASTER = 1 << 0,
331 EM28XX_AOUT_LINE = 1 << 1,
332 EM28XX_AOUT_MONO = 1 << 2,
333 EM28XX_AOUT_LFE = 1 << 3,
334 EM28XX_AOUT_SURR = 1 << 4,
8866f9cf
MCC		 335
336 /* PCM IN Mixer - used by AC97_RECORD_SELECT register */
337 EM28XX_AOUT_PCM_IN = 1 << 7,
338
339 /* Bits 10-8 are used to indicate the PCM IN record select */
340 EM28XX_AOUT_PCM_MIC_PCM = 0 << 8,
341 EM28XX_AOUT_PCM_CD = 1 << 8,
342 EM28XX_AOUT_PCM_VIDEO = 2 << 8,
343 EM28XX_AOUT_PCM_AUX = 3 << 8,
344 EM28XX_AOUT_PCM_LINE = 4 << 8,
345 EM28XX_AOUT_PCM_STEREO = 5 << 8,
346 EM28XX_AOUT_PCM_MONO = 6 << 8,
347 EM28XX_AOUT_PCM_PHONE = 7 << 8,
35ae6f04
MCC		 348};
349
32929fb4 350static inline int ac97_return_record_select(int a_out)
8866f9cf
MCC		 351{
352 return (a_out & 0x700) >> 8;
353}
354
122b77e5
MCC		 355struct em28xx_reg_seq {
356 int reg;
357 unsigned char val, mask;
358 int sleep;
359};
360
3acf2809
MCC		 361struct em28xx_input {
362 enum enum28xx_itype type;
a6c2ba28 363 unsigned int vmux;
539c96d0 364 enum em28xx_amux amux;
35ae6f04 365 enum em28xx_aout aout;
122b77e5 366 struct em28xx_reg_seq *gpio;
a6c2ba28 367};
368
3acf2809 369#define INPUT(nr) (&em28xx_boards[dev->model].input[nr])
a6c2ba28 370
3acf2809 371enum em28xx_decoder {
527f09a9 372 EM28XX_NODECODER = 0,
3acf2809 373 EM28XX_TVP5150,
ec5de990 374 EM28XX_SAA711X,
527f09a9
MCC		 375};
376
377enum em28xx_sensor {
378 EM28XX_NOSENSOR = 0,
02e7804b 379 EM28XX_MT9V011,
b80fd2d8 380 EM28XX_MT9M001,
f2e26ae7 381 EM28XX_MT9M111,
a6c2ba28 382};
383
df7fa09c
MCC		 384enum em28xx_adecoder {
385 EM28XX_NOADECODER = 0,
386 EM28XX_TVAUDIO,
387};
388
3acf2809 389struct em28xx_board {
a6c2ba28 390 char *name;
505b6d0b 391 int vchannels;
a6c2ba28 392 int tuner_type;
66767920 393 int tuner_addr;
a6c2ba28 394
395 /* i2c flags */
396 unsigned int tda9887_conf;
397
017ab4b1 398 /* GPIO sequences */
122b77e5 399 struct em28xx_reg_seq *dvb_gpio;
2fe3e2ee 400 struct em28xx_reg_seq *suspend_gpio;
017ab4b1 401 struct em28xx_reg_seq *tuner_gpio;
2bd1d9eb 402 struct em28xx_reg_seq *mute_gpio;
122b77e5 403
74f38a82 404 unsigned int is_em2800:1;
a6c2ba28 405 unsigned int has_msp34xx:1;
5add9a6f 406 unsigned int mts_firmware:1;
c8793b03 407 unsigned int max_range_640_480:1;
3aefb79a 408 unsigned int has_dvb:1;
a9fc52bc 409 unsigned int has_snapshot_button:1;
c43221df 410 unsigned int is_webcam:1;
95b86a9a 411 unsigned int valid:1;
ac07bb73 412 unsigned int has_ir_i2c:1;
3abee53e 413
a2070c66 414 unsigned char xclk, i2c_speed;
f2cf250a
DSL		 415 unsigned char radio_addr;
416 unsigned short tvaudio_addr;
a2070c66 417
3acf2809 418 enum em28xx_decoder decoder;
df7fa09c 419 enum em28xx_adecoder adecoder;
a6c2ba28 420
3acf2809 421 struct em28xx_input input[MAX_EM28XX_INPUT];
0be43754 422 struct em28xx_input radio;
02858eed 423 char *ir_codes;
a6c2ba28 424};
425
3acf2809 426struct em28xx_eeprom {
a6c2ba28 427 u32 id; /* 0x9567eb1a */
428 u16 vendor_ID;
429 u16 product_ID;
430
431 u16 chip_conf;
432
433 u16 board_conf;
434
435 u16 string1, string2, string3;
436
437 u8 string_idx_table;
438};
439
440/* device states */
3acf2809 441enum em28xx_dev_state {
a6c2ba28 442 DEV_INITIALIZED = 0x01,
443 DEV_DISCONNECTED = 0x02,
444 DEV_MISCONFIGURED = 0x04,
445};
446
6d79468d
MCC		 447#define EM28XX_AUDIO_BUFS 5
448#define EM28XX_NUM_AUDIO_PACKETS 64
449#define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */
450#define EM28XX_CAPTURE_STREAM_EN 1
3aefb79a
MCC		 451
452/* em28xx extensions */
6d79468d 453#define EM28XX_AUDIO 0x10
3aefb79a 454#define EM28XX_DVB 0x20
f4d4e765 455#define EM28XX_RC 0x30
6d79468d 456
8c873d31
DH		 457/* em28xx resource types (used for res_get/res_lock etc */
458#define EM28XX_RESOURCE_VIDEO 0x01
459#define EM28XX_RESOURCE_VBI 0x02
460
6d79468d
MCC		 461struct em28xx_audio {
462 char name[50];
463 char *transfer_buffer[EM28XX_AUDIO_BUFS];
464 struct urb *urb[EM28XX_AUDIO_BUFS];
465 struct usb_device *udev;
466 unsigned int capture_transfer_done;
467 struct snd_pcm_substream *capture_pcm_substream;
468
469 unsigned int hwptr_done_capture;
470 struct snd_card *sndcard;
471
c744dff2 472 int users;
6d79468d
MCC		 473 spinlock_t slock;
474};
475
52284c3e
MCC		 476struct em28xx;
477
478struct em28xx_fh {
479 struct em28xx *dev;
52284c3e 480 int radio;
8c873d31 481 unsigned int resources;
52284c3e
MCC		 482
483 struct videobuf_queue vb_vidq;
28abf083 484 struct videobuf_queue vb_vbiq;
52284c3e
MCC		 485
486 enum v4l2_buf_type type;
487};
488
a6c2ba28 489/* main device struct */
3acf2809 490struct em28xx {
a6c2ba28 491 /* generic device properties */
492 char name[30]; /* name (including minor) of the device */
493 int model; /* index in the device_data struct */
e5589bef 494 int devno; /* marks the number of this device */
600bd7f0 495 enum em28xx_chip_id chip_id;
505b6d0b 496
4f83e7b3
MCC		 497 int audio_ifnum;
498
f2cf250a 499 struct v4l2_device v4l2_dev;
505b6d0b
MCC		 500 struct em28xx_board board;
501
d36bb4e7 502 /* Webcam specific fields */
527f09a9 503 enum em28xx_sensor em28xx_sensor;
55699964 504 int sensor_xres, sensor_yres;
d36bb4e7 505 int sensor_xtal;
527f09a9 506
8c301567 507 /* Progressive (non-interlaced) mode */
c2a6b54a
MCC		 508 int progressive;
509
579d3152
MCC		 510 /* Vinmode/Vinctl used at the driver */
511 int vinmode, vinctl;
512
d7448a8d 513 unsigned int has_audio_class:1;
24a613e4 514 unsigned int has_alsa_audio:1;
4f83e7b3 515 unsigned int is_audio_only:1;
a2070c66 516
39a96b4c
MCC		 517 /* Controls audio streaming */
518 struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */
519 atomic_t stream_started; /* stream should be running if true */
520
bddcf633
MCC		 521 struct em28xx_fmt *format;
522
a924a499
MCC		 523 struct em28xx_IR *ir;
524
89b329ef
MCC		 525 /* Some older em28xx chips needs a waiting time after writing */
526 unsigned int wait_after_write;
527
74f38a82
MCC		 528 struct list_head devlist;
529
9bb13a6d
MCC		 530 u32 i2s_speed; /* I2S speed for audio digital stream */
531
35643943 532 struct em28xx_audio_mode audio_mode;
a6c2ba28 533
534 int tuner_type; /* type of the tuner */
535 int tuner_addr; /* tuner address */
536 int tda9887_conf;
537 /* i2c i/o */
538 struct i2c_adapter i2c_adap;
539 struct i2c_client i2c_client;
540 /* video for linux */
541 int users; /* user count for exclusive use */
542 struct video_device *vdev; /* video for linux device struct */
7d497f8a 543 v4l2_std_id norm; /* selected tv norm */
a6c2ba28 544 int ctl_freq; /* selected frequency */
545 unsigned int ctl_input; /* selected input */
95b86a9a 546 unsigned int ctl_ainput;/* selected audio input */
35ae6f04 547 unsigned int ctl_aoutput;/* selected audio output */
a6c2ba28 548 int mute;
549 int volume;
550 /* frame properties */
a6c2ba28 551 int width; /* current frame width */
552 int height; /* current frame height */
d45b9b8a
HV		 553 unsigned hscale; /* horizontal scale factor (see datasheet) */
554 unsigned vscale; /* vertical scale factor (see datasheet) */
a6c2ba28 555 int interlaced; /* 1=interlace fileds, 0=just top fileds */
9e31ced8 556 unsigned int video_bytesread; /* Number of bytes read */
a6c2ba28 557
03910cc3 558 unsigned long hash; /* eeprom hash - for boards with generic ID */
6ea54d93
DSL		 559 unsigned long i2c_hash; /* i2c devicelist hash -
560 for boards with generic ID */
03910cc3 561
9baed99e 562 struct em28xx_audio adev;
6d79468d 563
a6c2ba28 564 /* states */
3acf2809 565 enum em28xx_dev_state state;
9e31ced8 566
960da93b 567 /* capture state tracking */
da52a55c 568 int capture_type;
0455eebf 569 unsigned char top_field:1;
960da93b 570 int vbi_read;
66d9cbad
DH		 571 unsigned int vbi_width;
572 unsigned int vbi_height; /* lines per field */
da52a55c 573
d7448a8d
MCC		 574 struct work_struct request_module_wk;
575
a6c2ba28 576 /* locks */
5a80415b 577 struct mutex lock;
f2a2e491 578 struct mutex ctrl_urb_lock; /* protects urb_buf */
d7aa8020 579 /* spinlock_t queue_lock; */
a6c2ba28 580 struct list_head inqueue, outqueue;
a6c2ba28 581 struct video_device *vbi_dev;
0be43754 582 struct video_device *radio_dev;
a6c2ba28 583
8c873d31
DH		 584 /* resources in use */
585 unsigned int resources;
586
a6c2ba28 587 unsigned char eedata[256];
588
ad0ebb96
MCC		 589 /* Isoc control struct */
590 struct em28xx_dmaqueue vidq;
28abf083 591 struct em28xx_dmaqueue vbiq;
74209dc0 592 struct em28xx_usb_ctl usb_ctl;
ad0ebb96
MCC		 593 spinlock_t slock;
594
a6c2ba28 595 /* usb transfer */
596 struct usb_device *udev; /* the usb device */
c647a91a
FS		 597 u8 analog_ep_isoc; /* address of isoc endpoint for analog */
598 u8 analog_ep_bulk; /* address of bulk endpoint for analog */
599 u8 dvb_ep_isoc; /* address of isoc endpoint for DVB */
600 u8 dvb_ep_bulk; /* address of bulk endpoint for DVC */
0cf544a6
FS		 601 int alt; /* alternate setting */
602 int max_pkt_size; /* max packet size of the selected ep at alt */
c647a91a
FS		 603 int packet_multiplier; /* multiplier for wMaxPacketSize, used for
604 URB buffer size definition */
0cf544a6
FS		 605 int num_alt; /* number of alternative settings */
606 unsigned int *alt_max_pkt_size_isoc; /* array of isoc wMaxPacketSize */
7312f2c9
FS		 607 unsigned int analog_xfer_bulk:1; /* use bulk instead of isoc
608 transfers for analog */
0cf544a6
FS		 609 int dvb_alt_isoc; /* alternate setting for DVB isoc transfers */
610 unsigned int dvb_max_pkt_size_isoc; /* isoc max packet size of the
611 selected DVB ep at dvb_alt */
7312f2c9
FS		 612 unsigned int dvb_xfer_bulk:1; /* use bulk instead of isoc
613 transfers for DVB */
c4a98793
MCC		 614 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
615
a6c2ba28 616 /* helper funcs that call usb_control_msg */
6ea54d93 617 int (*em28xx_write_regs) (struct em28xx *dev, u16 reg,
a6c2ba28 618 char *buf, int len);
6ea54d93
DSL		 619 int (*em28xx_read_reg) (struct em28xx *dev, u16 reg);
620 int (*em28xx_read_reg_req_len) (struct em28xx *dev, u8 req, u16 reg,
621 char *buf, int len);
622 int (*em28xx_write_regs_req) (struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 623 char *buf, int len);
6ea54d93 624 int (*em28xx_read_reg_req) (struct em28xx *dev, u8 req, u16 reg);
3aefb79a
MCC		 625
626 enum em28xx_mode mode;
627
6a1acc3b
DH		 628 /* register numbers for GPO/GPIO registers */
629 u16 reg_gpo_num, reg_gpio_num;
630
c67ec53f
MCC		 631 /* Caches GPO and GPIO registers */
632 unsigned char reg_gpo, reg_gpio;
633
a9fc52bc
DH		 634 /* Snapshot button */
635 char snapshot_button_path[30]; /* path of the input dev */
636 struct input_dev *sbutton_input_dev;
637 struct delayed_work sbutton_query_work;
638
3421b778 639 struct em28xx_dvb *dvb;
d2ebd0f8
MCC		 640
641 /* I2C keyboard data */
d2ebd0f8 642 struct IR_i2c_init_data init_data;
a6c2ba28 643};
644
6d79468d
MCC		 645struct em28xx_ops {
646 struct list_head next;
647 char *name;
648 int id;
649 int (*init)(struct em28xx *);
650 int (*fini)(struct em28xx *);
a3a048ce
MCC		 651};
652
3acf2809 653/* Provided by em28xx-i2c.c */
fad7b958 654void em28xx_do_i2c_scan(struct em28xx *dev);
f2cf250a
DSL		 655int em28xx_i2c_register(struct em28xx *dev);
656int em28xx_i2c_unregister(struct em28xx *dev);
a6c2ba28 657
3acf2809 658/* Provided by em28xx-core.c */
a6c2ba28 659
3acf2809
MCC		 660u32 em28xx_request_buffers(struct em28xx *dev, u32 count);
661void em28xx_queue_unusedframes(struct em28xx *dev);
662void em28xx_release_buffers(struct em28xx *dev);
a6c2ba28 663
3acf2809 664int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg,
a6c2ba28 665 char *buf, int len);
3acf2809
MCC		 666int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg);
667int em28xx_read_reg(struct em28xx *dev, u16 reg);
668int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf,
a6c2ba28 669 int len);
3acf2809 670int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len);
b6972489 671int em28xx_write_reg(struct em28xx *dev, u16 reg, u8 val);
1bad429e
MCC		 672int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val,
673 u8 bitmask);
b6972489 674
531c98e7
MCC		 675int em28xx_read_ac97(struct em28xx *dev, u8 reg);
676int em28xx_write_ac97(struct em28xx *dev, u8 reg, u16 val);
677
3acf2809 678int em28xx_audio_analog_set(struct em28xx *dev);
35643943 679int em28xx_audio_setup(struct em28xx *dev);
539c96d0 680
3acf2809
MCC		 681int em28xx_colorlevels_set_default(struct em28xx *dev);
682int em28xx_capture_start(struct em28xx *dev, int start);
da52a55c 683int em28xx_vbi_supported(struct em28xx *dev);
bddcf633 684int em28xx_set_outfmt(struct em28xx *dev);
3acf2809 685int em28xx_resolution_set(struct em28xx *dev);
3acf2809 686int em28xx_set_alternate(struct em28xx *dev);
6ddd89d0
FS		 687int em28xx_alloc_urbs(struct em28xx *dev, enum em28xx_mode mode, int xfer_bulk,
688 int num_bufs, int max_pkt_size, int packet_multiplier);
057ca0da
FS		 689int em28xx_init_usb_xfer(struct em28xx *dev, enum em28xx_mode mode,
690 int xfer_bulk,
691 int num_bufs, int max_pkt_size, int packet_multiplier,
692 int (*urb_data_copy)
693 (struct em28xx *dev, struct urb *urb));
afb177e0 694void em28xx_uninit_usb_xfer(struct em28xx *dev, enum em28xx_mode mode);
5f5f147f 695void em28xx_stop_urbs(struct em28xx *dev);
d18e2fda 696int em28xx_isoc_dvb_max_packetsize(struct em28xx *dev);
c67ec53f
MCC		 697int em28xx_set_mode(struct em28xx *dev, enum em28xx_mode set_mode);
698int em28xx_gpio_set(struct em28xx *dev, struct em28xx_reg_seq *gpio);
1a23f81b 699void em28xx_wake_i2c(struct em28xx *dev);
6d79468d
MCC		 700int em28xx_register_extension(struct em28xx_ops *dev);
701void em28xx_unregister_extension(struct em28xx_ops *dev);
1a23f81b
MCC		 702void em28xx_init_extension(struct em28xx *dev);
703void em28xx_close_extension(struct em28xx *dev);
704
705/* Provided by em28xx-video.c */
1a23f81b
MCC		 706int em28xx_register_analog_devices(struct em28xx *dev);
707void em28xx_release_analog_resources(struct em28xx *dev);
6d79468d 708
3acf2809 709/* Provided by em28xx-cards.c */
6ea54d93 710extern int em2800_variant_detect(struct usb_device *udev, int model);
3acf2809
MCC		 711extern struct em28xx_board em28xx_boards[];
712extern struct usb_device_id em28xx_id_table[];
713extern const unsigned int em28xx_bcount;
d7cba043 714int em28xx_tuner_callback(void *ptr, int component, int command, int arg);
1a23f81b 715void em28xx_release_resources(struct em28xx *dev);
c8793b03 716
28abf083
DH		 717/* Provided by em28xx-vbi.c */
718extern struct videobuf_queue_ops em28xx_vbi_qops;
719
a6c2ba28 720/* printk macros */
721
3acf2809 722#define em28xx_err(fmt, arg...) do {\
f85c657f 723 printk(KERN_ERR fmt , ##arg); } while (0)
a6c2ba28 724
3acf2809 725#define em28xx_errdev(fmt, arg...) do {\
4ac97914 726 printk(KERN_ERR "%s: "fmt,\
f85c657f 727 dev->name , ##arg); } while (0)
a6c2ba28 728
3acf2809 729#define em28xx_info(fmt, arg...) do {\
4ac97914 730 printk(KERN_INFO "%s: "fmt,\
f85c657f 731 dev->name , ##arg); } while (0)
3acf2809 732#define em28xx_warn(fmt, arg...) do {\
4ac97914 733 printk(KERN_WARNING "%s: "fmt,\
f85c657f 734 dev->name , ##arg); } while (0)
a6c2ba28 735
6ea54d93 736static inline int em28xx_compression_disable(struct em28xx *dev)
a6c2ba28 737{
738 /* side effect of disabling scaler and mixer */
2a29a0d7 739 return em28xx_write_reg(dev, EM28XX_R26_COMPR, 0x00);
a6c2ba28 740}
741
6ea54d93 742static inline int em28xx_contrast_get(struct em28xx *dev)
a6c2ba28 743{
41facaa4 744 return em28xx_read_reg(dev, EM28XX_R20_YGAIN) & 0x1f;
a6c2ba28 745}
746
6ea54d93 747static inline int em28xx_brightness_get(struct em28xx *dev)
a6c2ba28 748{
41facaa4 749 return em28xx_read_reg(dev, EM28XX_R21_YOFFSET);
a6c2ba28 750}
751
6ea54d93 752static inline int em28xx_saturation_get(struct em28xx *dev)
a6c2ba28 753{
41facaa4 754 return em28xx_read_reg(dev, EM28XX_R22_UVGAIN) & 0x1f;
a6c2ba28 755}
756
6ea54d93 757static inline int em28xx_u_balance_get(struct em28xx *dev)
a6c2ba28 758{
41facaa4 759 return em28xx_read_reg(dev, EM28XX_R23_UOFFSET);
a6c2ba28 760}
761
6ea54d93 762static inline int em28xx_v_balance_get(struct em28xx *dev)
a6c2ba28 763{
41facaa4 764 return em28xx_read_reg(dev, EM28XX_R24_VOFFSET);
a6c2ba28 765}
766
6ea54d93 767static inline int em28xx_gamma_get(struct em28xx *dev)
a6c2ba28 768{
41facaa4 769 return em28xx_read_reg(dev, EM28XX_R14_GAMMA) & 0x3f;
a6c2ba28 770}
771
6ea54d93 772static inline int em28xx_contrast_set(struct em28xx *dev, s32 val)
a6c2ba28 773{
774 u8 tmp = (u8) val;
41facaa4 775 return em28xx_write_regs(dev, EM28XX_R20_YGAIN, &tmp, 1);
a6c2ba28 776}
777
6ea54d93 778static inline int em28xx_brightness_set(struct em28xx *dev, s32 val)
a6c2ba28 779{
780 u8 tmp = (u8) val;
41facaa4 781 return em28xx_write_regs(dev, EM28XX_R21_YOFFSET, &tmp, 1);
a6c2ba28 782}
783
6ea54d93 784static inline int em28xx_saturation_set(struct em28xx *dev, s32 val)
a6c2ba28 785{
786 u8 tmp = (u8) val;
41facaa4 787 return em28xx_write_regs(dev, EM28XX_R22_UVGAIN, &tmp, 1);
a6c2ba28 788}
789
6ea54d93 790static inline int em28xx_u_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 791{
792 u8 tmp = (u8) val;
41facaa4 793 return em28xx_write_regs(dev, EM28XX_R23_UOFFSET, &tmp, 1);
a6c2ba28 794}
795
6ea54d93 796static inline int em28xx_v_balance_set(struct em28xx *dev, s32 val)
a6c2ba28 797{
798 u8 tmp = (u8) val;
41facaa4 799 return em28xx_write_regs(dev, EM28XX_R24_VOFFSET, &tmp, 1);
a6c2ba28 800}
801
6ea54d93 802static inline int em28xx_gamma_set(struct em28xx *dev, s32 val)
a6c2ba28 803{
804 u8 tmp = (u8) val;
41facaa4 805 return em28xx_write_regs(dev, EM28XX_R14_GAMMA, &tmp, 1);
a6c2ba28 806}
807
808/*FIXME: maxw should be dependent of alt mode */
6ea54d93 809static inline unsigned int norm_maxw(struct em28xx *dev)
30556b23 810{
55699964
MCC		 811 if (dev->board.is_webcam)
812 return dev->sensor_xres;
813
1020d13d 814 if (dev->board.max_range_640_480)
7d497f8a 815 return 640;
55699964
MCC		 816
817 return 720;
30556b23
MR		 818}
819
6ea54d93 820static inline unsigned int norm_maxh(struct em28xx *dev)
a6c2ba28 821{
55699964
MCC		 822 if (dev->board.is_webcam)
823 return dev->sensor_yres;
824
505b6d0b 825 if (dev->board.max_range_640_480)
7d497f8a 826 return 480;
55699964
MCC		 827
828 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
a6c2ba28 829}
a6c2ba28 830#endif
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