projects / mirror_ubuntu-artful-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| c27cea03 HG |
1 | /* |
| 2 | * GSPCA Endpoints (formerly known as AOX) se401 USB Camera sub Driver | |
| 3 | * | |
| 4 | * Copyright (C) 2011 Hans de Goede <hdegoede@redhat.com> | |
| 5 | * | |
| 6 | * Based on the v4l1 se401 driver which is: | |
| 7 | * | |
| 8 | * Copyright (c) 2000 Jeroen B. Vreeken (pe1rxq@amsat.org) | |
| 9 | * | |
| 10 | * This program is free software; you can redistribute it and/or modify | |
| 11 | * it under the terms of the GNU General Public License as published by | |
| 12 | * the Free Software Foundation; either version 2 of the License, or | |
| 13 | * (at your option) any later version. | |
| 14 | * | |
| 15 | * This program is distributed in the hope that it will be useful, | |
| 16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 18 | * GNU General Public License for more details. | |
| 19 | * | |
| c27cea03 HG |
20 | */ |
| 21 | ||
| 22 | #define SE401_REQ_GET_CAMERA_DESCRIPTOR 0x06 | |
| 23 | #define SE401_REQ_START_CONTINUOUS_CAPTURE 0x41 | |
| 24 | #define SE401_REQ_STOP_CONTINUOUS_CAPTURE 0x42 | |
| 25 | #define SE401_REQ_CAPTURE_FRAME 0x43 | |
| 26 | #define SE401_REQ_GET_BRT 0x44 | |
| 27 | #define SE401_REQ_SET_BRT 0x45 | |
| 28 | #define SE401_REQ_GET_WIDTH 0x4c | |
| 29 | #define SE401_REQ_SET_WIDTH 0x4d | |
| 30 | #define SE401_REQ_GET_HEIGHT 0x4e | |
| 31 | #define SE401_REQ_SET_HEIGHT 0x4f | |
| 32 | #define SE401_REQ_GET_OUTPUT_MODE 0x50 | |
| 33 | #define SE401_REQ_SET_OUTPUT_MODE 0x51 | |
| 34 | #define SE401_REQ_GET_EXT_FEATURE 0x52 | |
| 35 | #define SE401_REQ_SET_EXT_FEATURE 0x53 | |
| 36 | #define SE401_REQ_CAMERA_POWER 0x56 | |
| 37 | #define SE401_REQ_LED_CONTROL 0x57 | |
| 38 | #define SE401_REQ_BIOS 0xff | |
| 39 | ||
| 40 | #define SE401_BIOS_READ 0x07 | |
| 41 | ||
| 42 | #define SE401_FORMAT_BAYER 0x40 | |
| 43 | ||
| 44 | /* Hyundai hv7131b registers | |
| 45 | 7121 and 7141 should be the same (haven't really checked...) */ | |
| 46 | /* Mode registers: */ | |
| 47 | #define HV7131_REG_MODE_A 0x00 | |
| 48 | #define HV7131_REG_MODE_B 0x01 | |
| 49 | #define HV7131_REG_MODE_C 0x02 | |
| 50 | /* Frame registers: */ | |
| 51 | #define HV7131_REG_FRSU 0x10 | |
| 52 | #define HV7131_REG_FRSL 0x11 | |
| 53 | #define HV7131_REG_FCSU 0x12 | |
| 54 | #define HV7131_REG_FCSL 0x13 | |
| 55 | #define HV7131_REG_FWHU 0x14 | |
| 56 | #define HV7131_REG_FWHL 0x15 | |
| 57 | #define HV7131_REG_FWWU 0x16 | |
| 58 | #define HV7131_REG_FWWL 0x17 | |
| 59 | /* Timing registers: */ | |
| 60 | #define HV7131_REG_THBU 0x20 | |
| 61 | #define HV7131_REG_THBL 0x21 | |
| 62 | #define HV7131_REG_TVBU 0x22 | |
| 63 | #define HV7131_REG_TVBL 0x23 | |
| 64 | #define HV7131_REG_TITU 0x25 | |
| 65 | #define HV7131_REG_TITM 0x26 | |
| 66 | #define HV7131_REG_TITL 0x27 | |
| 67 | #define HV7131_REG_TMCD 0x28 | |
| 68 | /* Adjust Registers: */ | |
| 69 | #define HV7131_REG_ARLV 0x30 | |
| 70 | #define HV7131_REG_ARCG 0x31 | |
| 71 | #define HV7131_REG_AGCG 0x32 | |
| 72 | #define HV7131_REG_ABCG 0x33 | |
| 73 | #define HV7131_REG_APBV 0x34 | |
| 74 | #define HV7131_REG_ASLP 0x54 | |
| 75 | /* Offset Registers: */ | |
| 76 | #define HV7131_REG_OFSR 0x50 | |
| 77 | #define HV7131_REG_OFSG 0x51 | |
| 78 | #define HV7131_REG_OFSB 0x52 | |
| 79 | /* REset level statistics registers: */ | |
| 80 | #define HV7131_REG_LOREFNOH 0x57 | |
| 81 | #define HV7131_REG_LOREFNOL 0x58 | |
| 82 | #define HV7131_REG_HIREFNOH 0x59 | |
| 83 | #define HV7131_REG_HIREFNOL 0x5a | |
| 84 | ||
| 85 | /* se401 registers */ | |
| 86 | #define SE401_OPERATINGMODE 0x2000 |