]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/media/usb/pvrusb2/pvrusb2-i2c-core.c
Merge branches 'for-4.11/upstream-fixes', 'for-4.12/accutouch', 'for-4.12/cp2112...
[mirror_ubuntu-artful-kernel.git] / drivers / media / usb / pvrusb2 / pvrusb2-i2c-core.c
CommitLineData
d855497e
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1/*
2 *
d855497e
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3 *
4 * Copyright (C) 2005 Mike Isely <isely@pobox.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
d855497e
MI
15 */
16
59af3367 17#include <linux/i2c.h>
7a707b89 18#include <linux/module.h>
b5dcee22 19#include <media/i2c/ir-kbd-i2c.h>
d855497e
MI
20#include "pvrusb2-i2c-core.h"
21#include "pvrusb2-hdw-internal.h"
22#include "pvrusb2-debug.h"
8d364363 23#include "pvrusb2-fx2-cmd.h"
5c808e64 24#include "pvrusb2.h"
d855497e
MI
25
26#define trace_i2c(...) pvr2_trace(PVR2_TRACE_I2C,__VA_ARGS__)
27
28/*
29
30 This module attempts to implement a compliant I2C adapter for the pvrusb2
59af3367 31 device.
d855497e
MI
32
33*/
34
ff699e6b 35static unsigned int i2c_scan;
d855497e
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36module_param(i2c_scan, int, S_IRUGO|S_IWUSR);
37MODULE_PARM_DESC(i2c_scan,"scan i2c bus at insmod time");
38
5c808e64
MI
39static int ir_mode[PVR_NUM] = { [0 ... PVR_NUM-1] = 1 };
40module_param_array(ir_mode, int, NULL, 0444);
41MODULE_PARM_DESC(ir_mode,"specify: 0=disable IR reception, 1=normal IR");
42
7e111185 43static int pvr2_disable_ir_video;
cd85b7af
MI
44module_param_named(disable_autoload_ir_video, pvr2_disable_ir_video,
45 int, S_IRUGO|S_IWUSR);
46MODULE_PARM_DESC(disable_autoload_ir_video,
47 "1=do not try to autoload ir_video IR receiver");
48
d855497e
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49static int pvr2_i2c_write(struct pvr2_hdw *hdw, /* Context */
50 u8 i2c_addr, /* I2C address we're talking to */
51 u8 *data, /* Data to write */
52 u16 length) /* Size of data to write */
53{
54 /* Return value - default 0 means success */
55 int ret;
56
57
58 if (!data) length = 0;
59 if (length > (sizeof(hdw->cmd_buffer) - 3)) {
60 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
96292c89 61 "Killing an I2C write to %u that is too large (desired=%u limit=%u)",
d855497e
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62 i2c_addr,
63 length,(unsigned int)(sizeof(hdw->cmd_buffer) - 3));
64 return -ENOTSUPP;
65 }
66
67 LOCK_TAKE(hdw->ctl_lock);
68
69 /* Clear the command buffer (likely to be paranoia) */
70 memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer));
71
72 /* Set up command buffer for an I2C write */
8d364363 73 hdw->cmd_buffer[0] = FX2CMD_I2C_WRITE; /* write prefix */
d855497e
MI
74 hdw->cmd_buffer[1] = i2c_addr; /* i2c addr of chip */
75 hdw->cmd_buffer[2] = length; /* length of what follows */
76 if (length) memcpy(hdw->cmd_buffer + 3, data, length);
77
78 /* Do the operation */
79 ret = pvr2_send_request(hdw,
80 hdw->cmd_buffer,
81 length + 3,
82 hdw->cmd_buffer,
83 1);
84 if (!ret) {
85 if (hdw->cmd_buffer[0] != 8) {
86 ret = -EIO;
87 if (hdw->cmd_buffer[0] != 7) {
96292c89 88 trace_i2c("unexpected status from i2_write[%d]: %d",
d855497e
MI
89 i2c_addr,hdw->cmd_buffer[0]);
90 }
91 }
92 }
93
94 LOCK_GIVE(hdw->ctl_lock);
95
96 return ret;
97}
98
99static int pvr2_i2c_read(struct pvr2_hdw *hdw, /* Context */
100 u8 i2c_addr, /* I2C address we're talking to */
101 u8 *data, /* Data to write */
102 u16 dlen, /* Size of data to write */
103 u8 *res, /* Where to put data we read */
104 u16 rlen) /* Amount of data to read */
105{
106 /* Return value - default 0 means success */
107 int ret;
108
109
110 if (!data) dlen = 0;
111 if (dlen > (sizeof(hdw->cmd_buffer) - 4)) {
112 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
96292c89 113 "Killing an I2C read to %u that has wlen too large (desired=%u limit=%u)",
d855497e
MI
114 i2c_addr,
115 dlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 4));
116 return -ENOTSUPP;
117 }
118 if (res && (rlen > (sizeof(hdw->cmd_buffer) - 1))) {
119 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
96292c89 120 "Killing an I2C read to %u that has rlen too large (desired=%u limit=%u)",
d855497e
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121 i2c_addr,
122 rlen,(unsigned int)(sizeof(hdw->cmd_buffer) - 1));
123 return -ENOTSUPP;
124 }
125
126 LOCK_TAKE(hdw->ctl_lock);
127
128 /* Clear the command buffer (likely to be paranoia) */
129 memset(hdw->cmd_buffer, 0, sizeof(hdw->cmd_buffer));
130
131 /* Set up command buffer for an I2C write followed by a read */
8d364363 132 hdw->cmd_buffer[0] = FX2CMD_I2C_READ; /* read prefix */
d855497e
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133 hdw->cmd_buffer[1] = dlen; /* arg length */
134 hdw->cmd_buffer[2] = rlen; /* answer length. Device will send one
135 more byte (status). */
136 hdw->cmd_buffer[3] = i2c_addr; /* i2c addr of chip */
137 if (dlen) memcpy(hdw->cmd_buffer + 4, data, dlen);
138
139 /* Do the operation */
140 ret = pvr2_send_request(hdw,
141 hdw->cmd_buffer,
142 4 + dlen,
143 hdw->cmd_buffer,
144 rlen + 1);
145 if (!ret) {
146 if (hdw->cmd_buffer[0] != 8) {
147 ret = -EIO;
148 if (hdw->cmd_buffer[0] != 7) {
96292c89 149 trace_i2c("unexpected status from i2_read[%d]: %d",
d855497e
MI
150 i2c_addr,hdw->cmd_buffer[0]);
151 }
152 }
153 }
154
155 /* Copy back the result */
156 if (res && rlen) {
157 if (ret) {
158 /* Error, just blank out the return buffer */
159 memset(res, 0, rlen);
160 } else {
161 memcpy(res, hdw->cmd_buffer + 1, rlen);
162 }
163 }
164
165 LOCK_GIVE(hdw->ctl_lock);
166
167 return ret;
168}
169
170/* This is the common low level entry point for doing I2C operations to the
171 hardware. */
07e337ee
AB
172static int pvr2_i2c_basic_op(struct pvr2_hdw *hdw,
173 u8 i2c_addr,
174 u8 *wdata,
175 u16 wlen,
176 u8 *rdata,
177 u16 rlen)
d855497e
MI
178{
179 if (!rdata) rlen = 0;
180 if (!wdata) wlen = 0;
181 if (rlen || !wlen) {
182 return pvr2_i2c_read(hdw,i2c_addr,wdata,wlen,rdata,rlen);
183 } else {
184 return pvr2_i2c_write(hdw,i2c_addr,wdata,wlen);
185 }
186}
187
cc75aede
MI
188
189/* This is a special entry point for cases of I2C transaction attempts to
190 the IR receiver. The implementation here simulates the IR receiver by
191 issuing a command to the FX2 firmware and using that response to return
192 what the real I2C receiver would have returned. We use this for 24xxx
193 devices, where the IR receiver chip has been removed and replaced with
194 FX2 related logic. */
195static int i2c_24xxx_ir(struct pvr2_hdw *hdw,
196 u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen)
197{
198 u8 dat[4];
199 unsigned int stat;
200
201 if (!(rlen || wlen)) {
202 /* This is a probe attempt. Just let it succeed. */
203 return 0;
204 }
205
206 /* We don't understand this kind of transaction */
207 if ((wlen != 0) || (rlen == 0)) return -EIO;
208
209 if (rlen < 3) {
210 /* Mike Isely <isely@pobox.com> Appears to be a probe
211 attempt from lirc. Just fill in zeroes and return. If
212 we try instead to do the full transaction here, then bad
213 things seem to happen within the lirc driver module
214 (version 0.8.0-7 sources from Debian, when run under
215 vanilla 2.6.17.6 kernel) - and I don't have the patience
216 to chase it down. */
217 if (rlen > 0) rdata[0] = 0;
218 if (rlen > 1) rdata[1] = 0;
219 return 0;
220 }
221
222 /* Issue a command to the FX2 to read the IR receiver. */
223 LOCK_TAKE(hdw->ctl_lock); do {
8d364363 224 hdw->cmd_buffer[0] = FX2CMD_GET_IR_CODE;
cc75aede
MI
225 stat = pvr2_send_request(hdw,
226 hdw->cmd_buffer,1,
227 hdw->cmd_buffer,4);
228 dat[0] = hdw->cmd_buffer[0];
229 dat[1] = hdw->cmd_buffer[1];
230 dat[2] = hdw->cmd_buffer[2];
231 dat[3] = hdw->cmd_buffer[3];
232 } while (0); LOCK_GIVE(hdw->ctl_lock);
233
234 /* Give up if that operation failed. */
235 if (stat != 0) return stat;
236
237 /* Mangle the results into something that looks like the real IR
238 receiver. */
239 rdata[2] = 0xc1;
240 if (dat[0] != 1) {
241 /* No code received. */
242 rdata[0] = 0;
243 rdata[1] = 0;
244 } else {
245 u16 val;
246 /* Mash the FX2 firmware-provided IR code into something
247 that the normal i2c chip-level driver expects. */
248 val = dat[1];
249 val <<= 8;
250 val |= dat[2];
251 val >>= 1;
252 val &= ~0x0003;
253 val |= 0x8000;
254 rdata[0] = (val >> 8) & 0xffu;
255 rdata[1] = val & 0xffu;
256 }
257
258 return 0;
259}
260
d855497e
MI
261/* This is a special entry point that is entered if an I2C operation is
262 attempted to a wm8775 chip on model 24xxx hardware. Autodetect of this
263 part doesn't work, but we know it is really there. So let's look for
264 the autodetect attempt and just return success if we see that. */
265static int i2c_hack_wm8775(struct pvr2_hdw *hdw,
266 u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen)
267{
268 if (!(rlen || wlen)) {
269 // This is a probe attempt. Just let it succeed.
270 return 0;
271 }
272 return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen);
273}
274
5c808e64
MI
275/* This is an entry point designed to always fail any attempt to perform a
276 transfer. We use this to cause certain I2C addresses to not be
277 probed. */
278static int i2c_black_hole(struct pvr2_hdw *hdw,
279 u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen)
280{
281 return -EIO;
282}
283
d855497e
MI
284/* This is a special entry point that is entered if an I2C operation is
285 attempted to a cx25840 chip on model 24xxx hardware. This chip can
286 sometimes wedge itself. Worse still, when this happens msp3400 can
287 falsely detect this part and then the system gets hosed up after msp3400
288 gets confused and dies. What we want to do here is try to keep msp3400
289 away and also try to notice if the chip is wedged and send a warning to
290 the system log. */
291static int i2c_hack_cx25840(struct pvr2_hdw *hdw,
292 u8 i2c_addr,u8 *wdata,u16 wlen,u8 *rdata,u16 rlen)
293{
294 int ret;
295 unsigned int subaddr;
296 u8 wbuf[2];
297 int state = hdw->i2c_cx25840_hack_state;
298
299 if (!(rlen || wlen)) {
300 // Probe attempt - always just succeed and don't bother the
301 // hardware (this helps to make the state machine further
302 // down somewhat easier).
303 return 0;
304 }
305
306 if (state == 3) {
307 return pvr2_i2c_basic_op(hdw,i2c_addr,wdata,wlen,rdata,rlen);
308 }
309
310 /* We're looking for the exact pattern where the revision register
311 is being read. The cx25840 module will always look at the
312 revision register first. Any other pattern of access therefore
313 has to be a probe attempt from somebody else so we'll reject it.
314 Normally we could just let each client just probe the part
315 anyway, but when the cx25840 is wedged, msp3400 will get a false
316 positive and that just screws things up... */
317
318 if (wlen == 0) {
319 switch (state) {
320 case 1: subaddr = 0x0100; break;
321 case 2: subaddr = 0x0101; break;
322 default: goto fail;
323 }
324 } else if (wlen == 2) {
325 subaddr = (wdata[0] << 8) | wdata[1];
326 switch (subaddr) {
327 case 0x0100: state = 1; break;
328 case 0x0101: state = 2; break;
329 default: goto fail;
330 }
331 } else {
332 goto fail;
333 }
334 if (!rlen) goto success;
335 state = 0;
336 if (rlen != 1) goto fail;
337
338 /* If we get to here then we have a legitimate read for one of the
339 two revision bytes, so pass it through. */
340 wbuf[0] = subaddr >> 8;
341 wbuf[1] = subaddr;
342 ret = pvr2_i2c_basic_op(hdw,i2c_addr,wbuf,2,rdata,rlen);
343
344 if ((ret != 0) || (*rdata == 0x04) || (*rdata == 0x0a)) {
345 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
96292c89 346 "WARNING: Detected a wedged cx25840 chip; the device will not work.");
d855497e
MI
347 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
348 "WARNING: Try power cycling the pvrusb2 device.");
349 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
96292c89 350 "WARNING: Disabling further access to the device to prevent other foul-ups.");
d855497e 351 // This blocks all further communication with the part.
a0fd1cb1 352 hdw->i2c_func[0x44] = NULL;
d855497e
MI
353 pvr2_hdw_render_useless(hdw);
354 goto fail;
355 }
356
357 /* Success! */
358 pvr2_trace(PVR2_TRACE_CHIPS,"cx25840 appears to be OK.");
359 state = 3;
360
361 success:
362 hdw->i2c_cx25840_hack_state = state;
363 return 0;
364
365 fail:
366 hdw->i2c_cx25840_hack_state = state;
367 return -EIO;
368}
369
d855497e
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370/* This is a very, very limited I2C adapter implementation. We can only
371 support what we actually know will work on the device... */
372static int pvr2_i2c_xfer(struct i2c_adapter *i2c_adap,
373 struct i2c_msg msgs[],
374 int num)
375{
376 int ret = -ENOTSUPP;
a0fd1cb1 377 pvr2_i2c_func funcp = NULL;
d855497e
MI
378 struct pvr2_hdw *hdw = (struct pvr2_hdw *)(i2c_adap->algo_data);
379
380 if (!num) {
381 ret = -EINVAL;
382 goto done;
383 }
d855497e
MI
384 if (msgs[0].addr < PVR2_I2C_FUNC_CNT) {
385 funcp = hdw->i2c_func[msgs[0].addr];
386 }
387 if (!funcp) {
388 ret = -EIO;
389 goto done;
390 }
391
392 if (num == 1) {
393 if (msgs[0].flags & I2C_M_RD) {
394 /* Simple read */
395 u16 tcnt,bcnt,offs;
396 if (!msgs[0].len) {
397 /* Length == 0 read. This is a probe. */
a0fd1cb1 398 if (funcp(hdw,msgs[0].addr,NULL,0,NULL,0)) {
d855497e
MI
399 ret = -EIO;
400 goto done;
401 }
402 ret = 1;
403 goto done;
404 }
405 /* If the read is short enough we'll do the whole
406 thing atomically. Otherwise we have no choice
407 but to break apart the reads. */
408 tcnt = msgs[0].len;
409 offs = 0;
410 while (tcnt) {
411 bcnt = tcnt;
412 if (bcnt > sizeof(hdw->cmd_buffer)-1) {
413 bcnt = sizeof(hdw->cmd_buffer)-1;
414 }
a0fd1cb1 415 if (funcp(hdw,msgs[0].addr,NULL,0,
d855497e
MI
416 msgs[0].buf+offs,bcnt)) {
417 ret = -EIO;
418 goto done;
419 }
420 offs += bcnt;
421 tcnt -= bcnt;
422 }
423 ret = 1;
424 goto done;
425 } else {
426 /* Simple write */
427 ret = 1;
428 if (funcp(hdw,msgs[0].addr,
a0fd1cb1 429 msgs[0].buf,msgs[0].len,NULL,0)) {
d855497e
MI
430 ret = -EIO;
431 }
432 goto done;
433 }
434 } else if (num == 2) {
435 if (msgs[0].addr != msgs[1].addr) {
96292c89 436 trace_i2c("i2c refusing 2 phase transfer with conflicting target addresses");
d855497e
MI
437 ret = -ENOTSUPP;
438 goto done;
439 }
440 if ((!((msgs[0].flags & I2C_M_RD))) &&
441 (msgs[1].flags & I2C_M_RD)) {
442 u16 tcnt,bcnt,wcnt,offs;
443 /* Write followed by atomic read. If the read
444 portion is short enough we'll do the whole thing
445 atomically. Otherwise we have no choice but to
446 break apart the reads. */
447 tcnt = msgs[1].len;
448 wcnt = msgs[0].len;
449 offs = 0;
450 while (tcnt || wcnt) {
451 bcnt = tcnt;
452 if (bcnt > sizeof(hdw->cmd_buffer)-1) {
453 bcnt = sizeof(hdw->cmd_buffer)-1;
454 }
455 if (funcp(hdw,msgs[0].addr,
456 msgs[0].buf,wcnt,
457 msgs[1].buf+offs,bcnt)) {
458 ret = -EIO;
459 goto done;
460 }
461 offs += bcnt;
462 tcnt -= bcnt;
463 wcnt = 0;
464 }
465 ret = 2;
466 goto done;
467 } else {
96292c89 468 trace_i2c("i2c refusing complex transfer read0=%d read1=%d",
d855497e
MI
469 (msgs[0].flags & I2C_M_RD),
470 (msgs[1].flags & I2C_M_RD));
471 }
472 } else {
473 trace_i2c("i2c refusing %d phase transfer",num);
474 }
475
476 done:
477 if (pvrusb2_debug & PVR2_TRACE_I2C_TRAF) {
478 unsigned int idx,offs,cnt;
479 for (idx = 0; idx < num; idx++) {
480 cnt = msgs[idx].len;
481 printk(KERN_INFO
96292c89 482 "pvrusb2 i2c xfer %u/%u: addr=0x%x len=%d %s",
d855497e
MI
483 idx+1,num,
484 msgs[idx].addr,
485 cnt,
486 (msgs[idx].flags & I2C_M_RD ?
7fb0dfc8 487 "read" : "write"));
d855497e
MI
488 if ((ret > 0) || !(msgs[idx].flags & I2C_M_RD)) {
489 if (cnt > 8) cnt = 8;
6dc3a355 490 printk(KERN_CONT " [");
d855497e 491 for (offs = 0; offs < (cnt>8?8:cnt); offs++) {
6dc3a355
MCC
492 if (offs) printk(KERN_CONT " ");
493 printk(KERN_CONT "%02x",msgs[idx].buf[offs]);
d855497e 494 }
6dc3a355
MCC
495 if (offs < cnt) printk(KERN_CONT " ...");
496 printk(KERN_CONT "]");
d855497e
MI
497 }
498 if (idx+1 == num) {
6dc3a355 499 printk(KERN_CONT " result=%d",ret);
d855497e 500 }
6dc3a355 501 printk(KERN_CONT "\n");
d855497e
MI
502 }
503 if (!num) {
504 printk(KERN_INFO
505 "pvrusb2 i2c xfer null transfer result=%d\n",
506 ret);
507 }
508 }
509 return ret;
510}
511
d855497e
MI
512static u32 pvr2_i2c_functionality(struct i2c_adapter *adap)
513{
7fb0dfc8 514 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
d855497e
MI
515}
516
d855497e
MI
517static struct i2c_algorithm pvr2_i2c_algo_template = {
518 .master_xfer = pvr2_i2c_xfer,
d855497e
MI
519 .functionality = pvr2_i2c_functionality,
520};
521
522static struct i2c_adapter pvr2_i2c_adap_template = {
523 .owner = THIS_MODULE,
15b47442 524 .class = 0,
d855497e
MI
525};
526
0cc11867
MI
527
528/* Return true if device exists at given address */
529static int do_i2c_probe(struct pvr2_hdw *hdw, int addr)
d855497e
MI
530{
531 struct i2c_msg msg[1];
0cc11867 532 int rc;
d855497e
MI
533 msg[0].addr = 0;
534 msg[0].flags = I2C_M_RD;
535 msg[0].len = 0;
a0fd1cb1 536 msg[0].buf = NULL;
0cc11867
MI
537 msg[0].addr = addr;
538 rc = i2c_transfer(&hdw->i2c_adap, msg, ARRAY_SIZE(msg));
539 return rc == 1;
540}
541
542static void do_i2c_scan(struct pvr2_hdw *hdw)
543{
544 int i;
545 printk(KERN_INFO "%s: i2c scan beginning\n", hdw->name);
d855497e 546 for (i = 0; i < 128; i++) {
0cc11867
MI
547 if (do_i2c_probe(hdw, i)) {
548 printk(KERN_INFO "%s: i2c scan: found device @ 0x%x\n",
549 hdw->name, i);
550 }
d855497e 551 }
0cc11867 552 printk(KERN_INFO "%s: i2c scan done.\n", hdw->name);
d855497e
MI
553}
554
cd85b7af
MI
555static void pvr2_i2c_register_ir(struct pvr2_hdw *hdw)
556{
557 struct i2c_board_info info;
4999e27a 558 struct IR_i2c_init_data *init_data = &hdw->ir_init_data;
cd85b7af
MI
559 if (pvr2_disable_ir_video) {
560 pvr2_trace(PVR2_TRACE_INFO,
561 "Automatic binding of ir_video has been disabled.");
562 return;
563 }
4999e27a
AW
564 memset(&info, 0, sizeof(struct i2c_board_info));
565 switch (hdw->ir_scheme_active) {
566 case PVR2_IR_SCHEME_24XXX: /* FX2-controlled IR */
567 case PVR2_IR_SCHEME_29XXX: /* Original 29xxx device */
af86ce79 568 init_data->ir_codes = RC_MAP_HAUPPAUGE;
4999e27a 569 init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP;
c003ab1b 570 init_data->type = RC_BIT_RC5;
4999e27a
AW
571 init_data->name = hdw->hdw_desc->description;
572 init_data->polling_interval = 100; /* ms From ir-kbd-i2c */
573 /* IR Receiver */
574 info.addr = 0x18;
575 info.platform_data = init_data;
576 strlcpy(info.type, "ir_video", I2C_NAME_SIZE);
577 pvr2_trace(PVR2_TRACE_INFO, "Binding %s to i2c address 0x%02x.",
578 info.type, info.addr);
579 i2c_new_device(&hdw->i2c_adap, &info);
580 break;
581 case PVR2_IR_SCHEME_ZILOG: /* HVR-1950 style */
582 case PVR2_IR_SCHEME_24XXX_MCE: /* 24xxx MCE device */
af86ce79 583 init_data->ir_codes = RC_MAP_HAUPPAUGE;
4999e27a 584 init_data->internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR;
00bb8207
SY
585 init_data->type = RC_BIT_RC5 | RC_BIT_RC6_MCE |
586 RC_BIT_RC6_6A_32;
4999e27a 587 init_data->name = hdw->hdw_desc->description;
4999e27a
AW
588 /* IR Receiver */
589 info.addr = 0x71;
590 info.platform_data = init_data;
591 strlcpy(info.type, "ir_rx_z8f0811_haup", I2C_NAME_SIZE);
592 pvr2_trace(PVR2_TRACE_INFO, "Binding %s to i2c address 0x%02x.",
593 info.type, info.addr);
594 i2c_new_device(&hdw->i2c_adap, &info);
595 /* IR Trasmitter */
596 info.addr = 0x70;
597 info.platform_data = init_data;
598 strlcpy(info.type, "ir_tx_z8f0811_haup", I2C_NAME_SIZE);
599 pvr2_trace(PVR2_TRACE_INFO, "Binding %s to i2c address 0x%02x.",
600 info.type, info.addr);
601 i2c_new_device(&hdw->i2c_adap, &info);
602 break;
603 default:
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604 /* The device either doesn't support I2C-based IR or we
605 don't know (yet) how to operate IR on the device. */
4999e27a 606 break;
cd85b7af 607 }
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MI
608}
609
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610void pvr2_i2c_core_init(struct pvr2_hdw *hdw)
611{
612 unsigned int idx;
613
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614 /* The default action for all possible I2C addresses is just to do
615 the transfer normally. */
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616 for (idx = 0; idx < PVR2_I2C_FUNC_CNT; idx++) {
617 hdw->i2c_func[idx] = pvr2_i2c_basic_op;
618 }
619
cc75aede 620 /* However, deal with various special cases for 24xxx hardware. */
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MI
621 if (ir_mode[hdw->unit_number] == 0) {
622 printk(KERN_INFO "%s: IR disabled\n",hdw->name);
623 hdw->i2c_func[0x18] = i2c_black_hole;
624 } else if (ir_mode[hdw->unit_number] == 1) {
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MI
625 if (hdw->ir_scheme_active == PVR2_IR_SCHEME_24XXX) {
626 /* Set up translation so that our IR looks like a
627 29xxx device */
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MI
628 hdw->i2c_func[0x18] = i2c_24xxx_ir;
629 }
630 }
989eb154 631 if (hdw->hdw_desc->flag_has_cx25840) {
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MI
632 hdw->i2c_func[0x44] = i2c_hack_cx25840;
633 }
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MI
634 if (hdw->hdw_desc->flag_has_wm8775) {
635 hdw->i2c_func[0x1b] = i2c_hack_wm8775;
636 }
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MI
637
638 // Configure the adapter and set up everything else related to it.
5338c169
EG
639 hdw->i2c_adap = pvr2_i2c_adap_template;
640 hdw->i2c_algo = pvr2_i2c_algo_template;
d855497e 641 strlcpy(hdw->i2c_adap.name,hdw->name,sizeof(hdw->i2c_adap.name));
12a917f6 642 hdw->i2c_adap.dev.parent = &hdw->usb_dev->dev;
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MI
643 hdw->i2c_adap.algo = &hdw->i2c_algo;
644 hdw->i2c_adap.algo_data = hdw;
d855497e 645 hdw->i2c_linked = !0;
e9c64a78 646 i2c_set_adapdata(&hdw->i2c_adap, &hdw->v4l2_dev);
d855497e 647 i2c_add_adapter(&hdw->i2c_adap);
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MI
648 if (hdw->i2c_func[0x18] == i2c_24xxx_ir) {
649 /* Probe for a different type of IR receiver on this
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MI
650 device. This is really the only way to differentiate
651 older 24xxx devices from 24xxx variants that include an
652 IR blaster. If the IR blaster is present, the IR
653 receiver is part of that chip and thus we must disable
654 the emulated IR receiver. */
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MI
655 if (do_i2c_probe(hdw, 0x71)) {
656 pvr2_trace(PVR2_TRACE_INFO,
96292c89 657 "Device has newer IR hardware; disabling unneeded virtual IR device");
0cc11867 658 hdw->i2c_func[0x18] = NULL;
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MI
659 /* Remember that this is a different device... */
660 hdw->ir_scheme_active = PVR2_IR_SCHEME_24XXX_MCE;
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MI
661 }
662 }
d855497e 663 if (i2c_scan) do_i2c_scan(hdw);
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664
665 pvr2_i2c_register_ir(hdw);
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MI
666}
667
668void pvr2_i2c_core_done(struct pvr2_hdw *hdw)
669{
670 if (hdw->i2c_linked) {
671 i2c_del_adapter(&hdw->i2c_adap);
672 hdw->i2c_linked = 0;
673 }
674}