projects / mirror_ubuntu-artful-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 9cb2173e EG |
1 | /* |
| 2 | * STK1160 driver | |
| 3 | * | |
| 4 | * Copyright (C) 2012 Ezequiel Garcia | |
| 5 | * <elezegarcia--a.t--gmail.com> | |
| 6 | * | |
| 7 | * Based on Easycap driver by R.M. Thomas | |
| 8 | * Copyright (C) 2010 R.M. Thomas | |
| 9 | * <rmthomas--a.t--sciolus.org> | |
| 10 | * | |
| 11 | * This program is free software; you can redistribute it and/or modify | |
| 12 | * it under the terms of the GNU General Public License as published by | |
| 13 | * the Free Software Foundation; either version 2 of the License, or | |
| 14 | * (at your option) any later version. | |
| 15 | * | |
| 16 | * This program is distributed in the hope that it will be useful, | |
| 17 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 19 | * GNU General Public License for more details. | |
| 20 | * | |
| 21 | */ | |
| 22 | ||
| 23 | /* GPIO Control */ | |
| 24 | #define STK1160_GCTRL 0x000 | |
| 25 | ||
| 26 | /* Remote Wakup Control */ | |
| 27 | #define STK1160_RMCTL 0x00c | |
| 28 | ||
| 1dc7df4d MH |
29 | /* Power-on Strapping Data */ |
| 30 | #define STK1160_POSVA 0x010 | |
| 31 | #define STK1160_POSV_L 0x010 | |
| 32 | #define STK1160_POSV_M 0x011 | |
| 33 | #define STK1160_POSV_H 0x012 | |
| 34 | #define STK1160_POSV_L_ACDOUT BIT(3) | |
| 35 | #define STK1160_POSV_L_ACSYNC BIT(2) | |
| 36 | ||
| 9cb2173e EG |
37 | /* |
| 38 | * Decoder Control Register: | |
| 39 | * This byte controls capture start/stop | |
| 40 | * with bit #7 (0x?? OR 0x80 to activate). | |
| 41 | */ | |
| 42 | #define STK1160_DCTRL 0x100 | |
| 43 | ||
| d3194520 EG |
44 | /* |
| 45 | * Decimation Control Register: | |
| 46 | * Byte 104: Horizontal Decimation Line Unit Count | |
| 47 | * Byte 105: Vertical Decimation Line Unit Count | |
| 48 | * Byte 106: Decimation Control | |
| 49 | * Bit 0 - Horizontal Decimation Control | |
| 50 | * 0 Horizontal decimation is disabled. | |
| 51 | * 1 Horizontal decimation is enabled. | |
| 52 | * Bit 1 - Decimates Half or More Column | |
| 53 | * 0 Decimates less than half from original column, | |
| 54 | * send count unit (0x105) before each unit skipped. | |
| 55 | * 1 Decimates half or more from original column, | |
| 56 | * skip count unit (0x105) before each unit sent. | |
| 57 | * Bit 2 - Vertical Decimation Control | |
| 58 | * 0 Vertical decimation is disabled. | |
| 59 | * 1 Vertical decimation is enabled. | |
| 60 | * Bit 3 - Vertical Greater or Equal to Half | |
| 61 | * 0 Decimates less than half from original row, | |
| 62 | * send count unit (0x105) before each unit skipped. | |
| 63 | * 1 Decimates half or more from original row, | |
| 64 | * skip count unit (0x105) before each unit sent. | |
| 65 | * Bit 4 - Decimation Unit | |
| 66 | * 0 Decimation will work with 2 rows or columns per unit. | |
| 67 | * 1 Decimation will work with 4 rows or columns per unit. | |
| 68 | */ | |
| 69 | #define STK1160_DMCTRL_H_UNITS 0x104 | |
| 70 | #define STK1160_DMCTRL_V_UNITS 0x105 | |
| 71 | #define STK1160_DMCTRL 0x106 | |
| 72 | #define STK1160_H_DEC_EN BIT(0) | |
| 73 | #define STK1160_H_DEC_MODE BIT(1) | |
| 74 | #define STK1160_V_DEC_EN BIT(2) | |
| 75 | #define STK1160_V_DEC_MODE BIT(3) | |
| 76 | #define STK1160_DEC_UNIT_SIZE BIT(4) | |
| 77 | ||
| 9cb2173e EG |
78 | /* Capture Frame Start Position */ |
| 79 | #define STK116_CFSPO 0x110 | |
| 80 | #define STK116_CFSPO_STX_L 0x110 | |
| 81 | #define STK116_CFSPO_STX_H 0x111 | |
| 82 | #define STK116_CFSPO_STY_L 0x112 | |
| 83 | #define STK116_CFSPO_STY_H 0x113 | |
| 84 | ||
| 85 | /* Capture Frame End Position */ | |
| 86 | #define STK116_CFEPO 0x114 | |
| 87 | #define STK116_CFEPO_ENX_L 0x114 | |
| 88 | #define STK116_CFEPO_ENX_H 0x115 | |
| 89 | #define STK116_CFEPO_ENY_L 0x116 | |
| 90 | #define STK116_CFEPO_ENY_H 0x117 | |
| 91 | ||
| 92 | /* Serial Interface Control */ | |
| 93 | #define STK1160_SICTL 0x200 | |
| 94 | #define STK1160_SICTL_CD 0x202 | |
| 95 | #define STK1160_SICTL_SDA 0x203 | |
| 96 | ||
| 97 | /* Serial Bus Write */ | |
| 98 | #define STK1160_SBUSW 0x204 | |
| 99 | #define STK1160_SBUSW_WA 0x204 | |
| 100 | #define STK1160_SBUSW_WD 0x205 | |
| 101 | ||
| 102 | /* Serial Bus Read */ | |
| 103 | #define STK1160_SBUSR 0x208 | |
| 104 | #define STK1160_SBUSR_RA 0x208 | |
| 105 | #define STK1160_SBUSR_RD 0x209 | |
| 106 | ||
| 107 | /* Alternate Serial Inteface Control */ | |
| 108 | #define STK1160_ASIC 0x2fc | |
| 109 | ||
| 110 | /* PLL Select Options */ | |
| 111 | #define STK1160_PLLSO 0x018 | |
| 112 | ||
| 113 | /* PLL Frequency Divider */ | |
| 114 | #define STK1160_PLLFD 0x01c | |
| 115 | ||
| 116 | /* Timing Generator */ | |
| 117 | #define STK1160_TIGEN 0x300 | |
| 118 | ||
| 119 | /* Timing Control Parameter */ | |
| 120 | #define STK1160_TICTL 0x350 | |
| 121 | ||
| 122 | /* AC97 Audio Control */ | |
| 123 | #define STK1160_AC97CTL_0 0x500 | |
| 124 | #define STK1160_AC97CTL_1 0x504 | |
| 9a4825ed MH |
125 | #define STK1160_AC97CTL_0_CR BIT(1) |
| 126 | #define STK1160_AC97CTL_0_CW BIT(2) | |
| 9cb2173e EG |
127 | |
| 128 | /* Use [0:6] bits of register 0x504 to set codec command address */ | |
| 129 | #define STK1160_AC97_ADDR 0x504 | |
| 130 | /* Use [16:31] bits of register 0x500 to set codec command data */ | |
| 131 | #define STK1160_AC97_CMD 0x502 | |
| 132 | ||
| 133 | /* Audio I2S Interface */ | |
| 134 | #define STK1160_I2SCTL 0x50c | |
| 135 | ||
| 136 | /* EEPROM Interface */ | |
| 137 | #define STK1160_EEPROM_SZ 0x5f0 |