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Commit | Line | Data |
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1c1e45d1 HV |
1 | /* |
2 | * cx18 ADEC firmware functions | |
3 | * | |
4 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version 2 | |
9 | * of the License, or (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | |
19 | * 02110-1301, USA. | |
20 | */ | |
21 | ||
22 | #include "cx18-driver.h" | |
b1526421 | 23 | #include "cx18-io.h" |
1c1e45d1 HV |
24 | #include <linux/firmware.h> |
25 | ||
81cb727d | 26 | #define CX18_AUDIO_ENABLE 0xc72014 |
1c1e45d1 HV |
27 | #define FWFILE "v4l-cx23418-dig.fw" |
28 | ||
29 | int cx18_av_loadfw(struct cx18 *cx) | |
30 | { | |
31 | const struct firmware *fw = NULL; | |
32 | u32 size; | |
33 | u32 v; | |
9b8a3e4c | 34 | const u8 *ptr; |
1c1e45d1 | 35 | int i; |
c6eb8eaf | 36 | int retries1 = 0; |
1c1e45d1 HV |
37 | |
38 | if (request_firmware(&fw, FWFILE, &cx->dev->dev) != 0) { | |
39 | CX18_ERR("unable to open firmware %s\n", FWFILE); | |
40 | return -EINVAL; | |
41 | } | |
42 | ||
f313da11 HV |
43 | /* The firmware load often has byte errors, so allow for several |
44 | retries, both at byte level and at the firmware load level. */ | |
c6eb8eaf | 45 | while (retries1 < 5) { |
ced07371 AW |
46 | cx18_av_write4_expect(cx, CXADEC_CHIP_CTRL, 0x00010000, |
47 | 0x00008430, 0xffffffff); /* cx25843 */ | |
48 | cx18_av_write_expect(cx, CXADEC_STD_DET_CTL, 0xf6, 0xf6, 0xff); | |
1c1e45d1 | 49 | |
ced07371 AW |
50 | /* Reset the Mako core, Register is alias of CXADEC_CHIP_CTRL */ |
51 | cx18_av_write4_expect(cx, 0x8100, 0x00010000, | |
52 | 0x00008430, 0xffffffff); /* cx25843 */ | |
1c1e45d1 | 53 | |
f313da11 | 54 | /* Put the 8051 in reset and enable firmware upload */ |
d267d851 | 55 | cx18_av_write4_noretry(cx, CXADEC_DL_CTL, 0x0F000000); |
1c1e45d1 | 56 | |
f313da11 HV |
57 | ptr = fw->data; |
58 | size = fw->size; | |
1c1e45d1 | 59 | |
f313da11 HV |
60 | for (i = 0; i < size; i++) { |
61 | u32 dl_control = 0x0F000000 | i | ((u32)ptr[i] << 16); | |
62 | u32 value = 0; | |
c6eb8eaf | 63 | int retries2; |
d267d851 | 64 | int unrec_err = 0; |
1c1e45d1 | 65 | |
f7823f8f | 66 | for (retries2 = 0; retries2 < CX18_MAX_MMIO_WR_RETRIES; |
d267d851 AW |
67 | retries2++) { |
68 | cx18_av_write4_noretry(cx, CXADEC_DL_CTL, | |
69 | dl_control); | |
f313da11 | 70 | udelay(10); |
d267d851 AW |
71 | value = cx18_av_read4_noretry(cx, |
72 | CXADEC_DL_CTL); | |
f313da11 HV |
73 | if (value == dl_control) |
74 | break; | |
75 | /* Check if we can correct the byte by changing | |
76 | the address. We can only write the lower | |
77 | address byte of the address. */ | |
78 | if ((value & 0x3F00) != (dl_control & 0x3F00)) { | |
d267d851 | 79 | unrec_err = 1; |
f313da11 HV |
80 | break; |
81 | } | |
82 | } | |
d267d851 AW |
83 | cx18_log_write_retries(cx, retries2, |
84 | cx->reg_mem + 0xc40000 + CXADEC_DL_CTL); | |
f7823f8f | 85 | if (unrec_err || retries2 >= CX18_MAX_MMIO_WR_RETRIES) |
1c1e45d1 HV |
86 | break; |
87 | } | |
f313da11 HV |
88 | if (i == size) |
89 | break; | |
c6eb8eaf | 90 | retries1++; |
f313da11 | 91 | } |
c6eb8eaf | 92 | if (retries1 >= 5) { |
f313da11 HV |
93 | CX18_ERR("unable to load firmware %s\n", FWFILE); |
94 | release_firmware(fw); | |
95 | return -EIO; | |
1c1e45d1 HV |
96 | } |
97 | ||
ced07371 AW |
98 | cx18_av_write4_expect(cx, CXADEC_DL_CTL, |
99 | 0x13000000 | fw->size, 0x13000000, 0x13000000); | |
1c1e45d1 HV |
100 | |
101 | /* Output to the 416 */ | |
102 | cx18_av_and_or4(cx, CXADEC_PIN_CTRL1, ~0, 0x78000); | |
103 | ||
104 | /* Audio input control 1 set to Sony mode */ | |
105 | /* Audio output input 2 is 0 for slave operation input */ | |
106 | /* 0xC4000914[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */ | |
107 | /* 0xC4000914[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge | |
108 | after WS transition for first bit of audio word. */ | |
109 | cx18_av_write4(cx, CXADEC_I2S_IN_CTL, 0x000000A0); | |
110 | ||
111 | /* Audio output control 1 is set to Sony mode */ | |
112 | /* Audio output control 2 is set to 1 for master mode */ | |
113 | /* 0xC4000918[5]: 0 = left sample on WS=0, 1 = left sample on WS=1 */ | |
114 | /* 0xC4000918[7]: 0 = Philips mode, 1 = Sony mode (1st SCK rising edge | |
115 | after WS transition for first bit of audio word. */ | |
116 | /* 0xC4000918[8]: 0 = slave operation, 1 = master (SCK_OUT and WS_OUT | |
117 | are generated) */ | |
118 | cx18_av_write4(cx, CXADEC_I2S_OUT_CTL, 0x000001A0); | |
119 | ||
120 | /* set alt I2s master clock to /16 and enable alt divider i2s | |
121 | passthrough */ | |
122 | cx18_av_write4(cx, CXADEC_PIN_CFG3, 0x5000B687); | |
123 | ||
ced07371 AW |
124 | cx18_av_write4_expect(cx, CXADEC_STD_DET_CTL, 0x000000F6, 0x000000F6, |
125 | 0x3F00FFFF); | |
1c1e45d1 HV |
126 | /* CxDevWrReg(CXADEC_STD_DET_CTL, 0x000000FF); */ |
127 | ||
128 | /* Set bit 0 in register 0x9CC to signify that this is MiniMe. */ | |
129 | /* Register 0x09CC is defined by the Merlin firmware, and doesn't | |
130 | have a name in the spec. */ | |
131 | cx18_av_write4(cx, 0x09CC, 1); | |
132 | ||
b1526421 AW |
133 | v = cx18_read_reg(cx, CX18_AUDIO_ENABLE); |
134 | /* If bit 11 is 1, clear bit 10 */ | |
1c1e45d1 | 135 | if (v & 0x800) |
b1526421 | 136 | cx18_write_reg(cx, v & 0xFFFFFBFF, CX18_AUDIO_ENABLE); |
1c1e45d1 HV |
137 | |
138 | /* Enable WW auto audio standard detection */ | |
139 | v = cx18_av_read4(cx, CXADEC_STD_DET_CTL); | |
140 | v |= 0xFF; /* Auto by default */ | |
141 | v |= 0x400; /* Stereo by default */ | |
142 | v |= 0x14000000; | |
ced07371 | 143 | cx18_av_write4_expect(cx, CXADEC_STD_DET_CTL, v, v, 0x3F00FFFF); |
1c1e45d1 HV |
144 | |
145 | release_firmware(fw); | |
146 | ||
147 | CX18_INFO("loaded %s firmware (%d bytes)\n", FWFILE, size); | |
148 | return 0; | |
149 | } |