]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/media/video/cx18/cx18-driver.h
[media] EM28xx - Fix memory leak on disconnect or error
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / cx18 / cx18-driver.h
CommitLineData
1c1e45d1
HV
1/*
2 * cx18 driver internal defines and structures
3 *
4 * Derived from ivtv-driver.h
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
6afdeaf8 7 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
1c1e45d1
HV
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25#ifndef CX18_DRIVER_H
26#define CX18_DRIVER_H
27
1c1e45d1
HV
28#include <linux/module.h>
29#include <linux/moduleparam.h>
30#include <linux/init.h>
31#include <linux/delay.h>
32#include <linux/sched.h>
33#include <linux/fs.h>
34#include <linux/pci.h>
35#include <linux/interrupt.h>
36#include <linux/spinlock.h>
37#include <linux/i2c.h>
38#include <linux/i2c-algo-bit.h>
39#include <linux/list.h>
40#include <linux/unistd.h>
1c1e45d1
HV
41#include <linux/pagemap.h>
42#include <linux/workqueue.h>
43#include <linux/mutex.h>
5a0e3ad6 44#include <linux/slab.h>
1a651a00 45#include <asm/byteorder.h>
1c1e45d1
HV
46
47#include <linux/dvb/video.h>
48#include <linux/dvb/audio.h>
49#include <media/v4l2-common.h>
35ea11ff 50#include <media/v4l2-ioctl.h>
888cdb07 51#include <media/v4l2-device.h>
0b5f265a 52#include <media/v4l2-fh.h>
1c1e45d1 53#include <media/tuner.h>
83526190 54#include <media/ir-kbd-i2c.h>
1c1e45d1
HV
55#include "cx18-mailbox.h"
56#include "cx18-av-core.h"
57#include "cx23418.h"
58
59/* DVB */
60#include "demux.h"
61#include "dmxdev.h"
62#include "dvb_demux.h"
63#include "dvb_frontend.h"
64#include "dvb_net.h"
65#include "dvbdev.h"
66
b7101de3
ST
67/* Videobuf / YUV support */
68#include <media/videobuf-core.h>
69#include <media/videobuf-vmalloc.h>
70
1c1e45d1
HV
71#ifndef CONFIG_PCI
72# error "This driver requires kernel PCI support."
73#endif
74
75#define CX18_MEM_OFFSET 0x00000000
76#define CX18_MEM_SIZE 0x04000000
77#define CX18_REG_OFFSET 0x02000000
78
79/* Maximum cx18 driver instances. */
80#define CX18_MAX_CARDS 32
81
82/* Supported cards */
83#define CX18_CARD_HVR_1600_ESMT 0 /* Hauppauge HVR 1600 (ESMT memory) */
84#define CX18_CARD_HVR_1600_SAMSUNG 1 /* Hauppauge HVR 1600 (Samsung memory) */
85#define CX18_CARD_COMPRO_H900 2 /* Compro VideoMate H900 */
86#define CX18_CARD_YUAN_MPC718 3 /* Yuan MPC718 */
03c28085 87#define CX18_CARD_CNXT_RAPTOR_PAL 4 /* Conexant Raptor PAL */
9eee4fb6 88#define CX18_CARD_TOSHIBA_QOSMIO_DVBT 5 /* Toshiba Qosmio Interal DVB-T/Analog*/
9d5af862
AW
89#define CX18_CARD_LEADTEK_PVR2100 6 /* Leadtek WinFast PVR2100 */
90#define CX18_CARD_LEADTEK_DVR3100H 7 /* Leadtek WinFast DVR3100 H */
a3634363 91#define CX18_CARD_GOTVIEW_PCI_DVD3 8 /* GoTView PCI DVD3 Hybrid */
e3bfeabb
DH
92#define CX18_CARD_HVR_1600_S5H1411 9 /* Hauppauge HVR 1600 s5h1411/tda18271*/
93#define CX18_CARD_LAST 9
1c1e45d1
HV
94
95#define CX18_ENC_STREAM_TYPE_MPG 0
96#define CX18_ENC_STREAM_TYPE_TS 1
97#define CX18_ENC_STREAM_TYPE_YUV 2
98#define CX18_ENC_STREAM_TYPE_VBI 3
99#define CX18_ENC_STREAM_TYPE_PCM 4
100#define CX18_ENC_STREAM_TYPE_IDX 5
101#define CX18_ENC_STREAM_TYPE_RAD 6
102#define CX18_MAX_STREAMS 7
103
104/* system vendor and device IDs */
105#define PCI_VENDOR_ID_CX 0x14f1
106#define PCI_DEVICE_ID_CX23418 0x5b7a
107
108/* subsystem vendor ID */
109#define CX18_PCI_ID_HAUPPAUGE 0x0070
110#define CX18_PCI_ID_COMPRO 0x185b
111#define CX18_PCI_ID_YUAN 0x12ab
03c28085 112#define CX18_PCI_ID_CONEXANT 0x14f1
9eee4fb6
AW
113#define CX18_PCI_ID_TOSHIBA 0x1179
114#define CX18_PCI_ID_LEADTEK 0x107D
a3634363 115#define CX18_PCI_ID_GOTVIEW 0x5854
1c1e45d1
HV
116
117/* ======================================================================== */
118/* ========================== START USER SETTABLE DMA VARIABLES =========== */
119/* ======================================================================== */
120
121/* DMA Buffers, Default size in MB allocated */
122#define CX18_DEFAULT_ENC_TS_BUFFERS 1
123#define CX18_DEFAULT_ENC_MPG_BUFFERS 2
124#define CX18_DEFAULT_ENC_IDX_BUFFERS 1
125#define CX18_DEFAULT_ENC_YUV_BUFFERS 2
126#define CX18_DEFAULT_ENC_VBI_BUFFERS 1
127#define CX18_DEFAULT_ENC_PCM_BUFFERS 1
128
6ecd86dc 129/* Maximum firmware DMA buffers per stream */
0ef02892 130#define CX18_MAX_FW_MDLS_PER_STREAM 63
6ecd86dc 131
22dce188
AW
132/* YUV buffer sizes in bytes to ensure integer # of frames per buffer */
133#define CX18_UNIT_ENC_YUV_BUFSIZE (720 * 32 * 3 / 2) /* bytes */
134#define CX18_625_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 576/32)
135#define CX18_525_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 480/32)
136
efc0b127
AW
137/* IDX buffer size should be a multiple of the index entry size from the chip */
138struct cx18_enc_idx_entry {
139 __le32 length;
140 __le32 offset_low;
141 __le32 offset_high;
142 __le32 flags;
143 __le32 pts_low;
144 __le32 pts_high;
145} __attribute__ ((packed));
146#define CX18_UNIT_ENC_IDX_BUFSIZE \
147 (sizeof(struct cx18_enc_idx_entry) * V4L2_ENC_IDX_ENTRIES)
148
6ecd86dc
AW
149/* DMA buffer, default size in kB allocated */
150#define CX18_DEFAULT_ENC_TS_BUFSIZE 32
151#define CX18_DEFAULT_ENC_MPG_BUFSIZE 32
efc0b127 152#define CX18_DEFAULT_ENC_IDX_BUFSIZE (CX18_UNIT_ENC_IDX_BUFSIZE * 1 / 1024 + 1)
22dce188 153#define CX18_DEFAULT_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 3 / 1024 + 1)
6ecd86dc
AW
154#define CX18_DEFAULT_ENC_PCM_BUFSIZE 4
155
1c1e45d1
HV
156/* i2c stuff */
157#define I2C_CLIENTS_MAX 16
158
159/* debugging */
160
161/* Flag to turn on high volume debugging */
162#define CX18_DBGFLG_WARN (1 << 0)
163#define CX18_DBGFLG_INFO (1 << 1)
164#define CX18_DBGFLG_API (1 << 2)
165#define CX18_DBGFLG_DMA (1 << 3)
166#define CX18_DBGFLG_IOCTL (1 << 4)
167#define CX18_DBGFLG_FILE (1 << 5)
168#define CX18_DBGFLG_I2C (1 << 6)
169#define CX18_DBGFLG_IRQ (1 << 7)
170/* Flag to turn on high volume debugging */
171#define CX18_DBGFLG_HIGHVOL (1 << 8)
172
5811cf99 173/* NOTE: extra space before comma in 'fmt , ## args' is required for
1c1e45d1
HV
174 gcc-2.95, otherwise it won't compile. */
175#define CX18_DEBUG(x, type, fmt, args...) \
176 do { \
177 if ((x) & cx18_debug) \
5811cf99 178 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
1c1e45d1
HV
179 } while (0)
180#define CX18_DEBUG_WARN(fmt, args...) CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args)
181#define CX18_DEBUG_INFO(fmt, args...) CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args)
182#define CX18_DEBUG_API(fmt, args...) CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args)
183#define CX18_DEBUG_DMA(fmt, args...) CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args)
184#define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
185#define CX18_DEBUG_FILE(fmt, args...) CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args)
186#define CX18_DEBUG_I2C(fmt, args...) CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
187#define CX18_DEBUG_IRQ(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
188
189#define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \
190 do { \
191 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
5811cf99 192 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
1c1e45d1
HV
193 } while (0)
194#define CX18_DEBUG_HI_WARN(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args)
195#define CX18_DEBUG_HI_INFO(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args)
196#define CX18_DEBUG_HI_API(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args)
197#define CX18_DEBUG_HI_DMA(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args)
198#define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
199#define CX18_DEBUG_HI_FILE(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args)
200#define CX18_DEBUG_HI_I2C(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
201#define CX18_DEBUG_HI_IRQ(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
202
203/* Standard kernel messages */
5811cf99
AW
204#define CX18_ERR(fmt, args...) v4l2_err(&cx->v4l2_dev, fmt , ## args)
205#define CX18_WARN(fmt, args...) v4l2_warn(&cx->v4l2_dev, fmt , ## args)
206#define CX18_INFO(fmt, args...) v4l2_info(&cx->v4l2_dev, fmt , ## args)
1c1e45d1 207
6246d4e1
AW
208/* Messages for internal subdevs to use */
209#define CX18_DEBUG_DEV(x, dev, type, fmt, args...) \
210 do { \
211 if ((x) & cx18_debug) \
212 v4l2_info(dev, " " type ": " fmt , ## args); \
213 } while (0)
214#define CX18_DEBUG_WARN_DEV(dev, fmt, args...) \
215 CX18_DEBUG_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
216#define CX18_DEBUG_INFO_DEV(dev, fmt, args...) \
217 CX18_DEBUG_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
218#define CX18_DEBUG_API_DEV(dev, fmt, args...) \
219 CX18_DEBUG_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
220#define CX18_DEBUG_DMA_DEV(dev, fmt, args...) \
221 CX18_DEBUG_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
222#define CX18_DEBUG_IOCTL_DEV(dev, fmt, args...) \
223 CX18_DEBUG_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
224#define CX18_DEBUG_FILE_DEV(dev, fmt, args...) \
225 CX18_DEBUG_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
226#define CX18_DEBUG_I2C_DEV(dev, fmt, args...) \
227 CX18_DEBUG_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
228#define CX18_DEBUG_IRQ_DEV(dev, fmt, args...) \
229 CX18_DEBUG_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
230
231#define CX18_DEBUG_HIGH_VOL_DEV(x, dev, type, fmt, args...) \
232 do { \
233 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
234 v4l2_info(dev, " " type ": " fmt , ## args); \
235 } while (0)
236#define CX18_DEBUG_HI_WARN_DEV(dev, fmt, args...) \
237 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
238#define CX18_DEBUG_HI_INFO_DEV(dev, fmt, args...) \
239 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
240#define CX18_DEBUG_HI_API_DEV(dev, fmt, args...) \
241 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
242#define CX18_DEBUG_HI_DMA_DEV(dev, fmt, args...) \
243 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
244#define CX18_DEBUG_HI_IOCTL_DEV(dev, fmt, args...) \
245 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
246#define CX18_DEBUG_HI_FILE_DEV(dev, fmt, args...) \
247 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
248#define CX18_DEBUG_HI_I2C_DEV(dev, fmt, args...) \
249 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
250#define CX18_DEBUG_HI_IRQ_DEV(dev, fmt, args...) \
251 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
252
253#define CX18_ERR_DEV(dev, fmt, args...) v4l2_err(dev, fmt , ## args)
254#define CX18_WARN_DEV(dev, fmt, args...) v4l2_warn(dev, fmt , ## args)
255#define CX18_INFO_DEV(dev, fmt, args...) v4l2_info(dev, fmt , ## args)
256
1c1e45d1
HV
257extern int cx18_debug;
258
1c1e45d1
HV
259struct cx18_options {
260 int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */
261 int cardtype; /* force card type on load */
262 int tuner; /* set tuner on load */
263 int radio; /* enable/disable radio */
264};
265
52fcb3ec
AW
266/* per-mdl bit flags */
267#define CX18_F_M_NEED_SWAP 0 /* mdl buffer data must be endianess swapped */
1c1e45d1
HV
268
269/* per-stream, s_flags */
270#define CX18_F_S_CLAIMED 3 /* this stream is claimed */
271#define CX18_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
272#define CX18_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
273#define CX18_F_S_STREAMOFF 7 /* signal end of stream EOS */
274#define CX18_F_S_APPL_IO 8 /* this stream is used read/written by an application */
87116159 275#define CX18_F_S_STOPPING 9 /* telling the fw to stop capturing */
1c1e45d1
HV
276
277/* per-cx18, i_flags */
1d6782bd
AW
278#define CX18_F_I_LOADED_FW 0 /* Loaded firmware 1st time */
279#define CX18_F_I_EOS 4 /* End of encoder stream */
280#define CX18_F_I_RADIO_USER 5 /* radio tuner is selected */
281#define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */
1d6782bd
AW
282#define CX18_F_I_INITED 21 /* set after first open */
283#define CX18_F_I_FAILED 22 /* set if first open failed */
1c1e45d1
HV
284
285/* These are the VBI types as they appear in the embedded VBI private packets. */
286#define CX18_SLICED_TYPE_TELETEXT_B (1)
287#define CX18_SLICED_TYPE_CAPTION_525 (4)
288#define CX18_SLICED_TYPE_WSS_625 (5)
289#define CX18_SLICED_TYPE_VPS (7)
290
82acdc84
AW
291/**
292 * list_entry_is_past_end - check if a previous loop cursor is off list end
293 * @pos: the type * previously used as a loop cursor.
294 * @head: the head for your list.
295 * @member: the name of the list_struct within the struct.
296 *
297 * Check if the entry's list_head is the head of the list, thus it's not a
298 * real entry but was the loop cursor that walked past the end
299 */
300#define list_entry_is_past_end(pos, head, member) \
301 (&pos->member == (head))
302
1c1e45d1
HV
303struct cx18_buffer {
304 struct list_head list;
305 dma_addr_t dma_handle;
1c1e45d1
HV
306 char *buf;
307
308 u32 bytesused;
309 u32 readpos;
310};
311
52fcb3ec
AW
312struct cx18_mdl {
313 struct list_head list;
314 u32 id; /* index into cx->scb->cpu_mdl[] of 1st cx18_mdl_ent */
315
316 unsigned int skipped;
317 unsigned long m_flags;
318
319 struct list_head buf_list;
320 struct cx18_buffer *curr_buf; /* current buffer in list for reading */
321
322 u32 bytesused;
323 u32 readpos;
324};
325
1c1e45d1
HV
326struct cx18_queue {
327 struct list_head list;
c37b11bf 328 atomic_t depth;
1c1e45d1 329 u32 bytesused;
40c5520f 330 spinlock_t lock;
1c1e45d1
HV
331};
332
754f9969
AW
333struct cx18_stream; /* forward reference */
334
1c1e45d1 335struct cx18_dvb {
754f9969 336 struct cx18_stream *stream;
1c1e45d1
HV
337 struct dmx_frontend hw_frontend;
338 struct dmx_frontend mem_frontend;
339 struct dmxdev dmxdev;
340 struct dvb_adapter dvb_adapter;
341 struct dvb_demux demux;
342 struct dvb_frontend *fe;
343 struct dvb_net dvbnet;
344 int enabled;
345 int feeding;
1c1e45d1 346 struct mutex feedlock;
1c1e45d1
HV
347};
348
349struct cx18; /* forward reference */
350struct cx18_scb; /* forward reference */
351
72a4f808 352
ee2d64f5 353#define CX18_MAX_MDL_ACKS 2
deed75ed 354#define CX18_MAX_IN_WORK_ORDERS (CX18_MAX_FW_MDLS_PER_STREAM + 7)
0ef02892 355/* CPU_DE_RELEASE_MDL can burst CX18_MAX_FW_MDLS_PER_STREAM orders in a group */
ee2d64f5 356
72a4f808
AW
357#define CX18_F_EWO_MB_STALE_UPON_RECEIPT 0x1
358#define CX18_F_EWO_MB_STALE_WHILE_PROC 0x2
359#define CX18_F_EWO_MB_STALE \
360 (CX18_F_EWO_MB_STALE_UPON_RECEIPT | CX18_F_EWO_MB_STALE_WHILE_PROC)
361
deed75ed 362struct cx18_in_work_order {
ee2d64f5
AW
363 struct work_struct work;
364 atomic_t pending;
365 struct cx18 *cx;
72a4f808 366 unsigned long flags;
ee2d64f5
AW
367 int rpu;
368 struct cx18_mailbox mb;
369 struct cx18_mdl_ack mdl_ack[CX18_MAX_MDL_ACKS];
370 char *str;
371};
372
d3c5e707
AW
373#define CX18_INVALID_TASK_HANDLE 0xffffffff
374
1c1e45d1 375struct cx18_stream {
754f9969 376 /* These first five fields are always set, even if the stream
1c1e45d1 377 is not actually created. */
3d05913d 378 struct video_device *video_dev; /* NULL when stream not created */
754f9969 379 struct cx18_dvb *dvb; /* DVB / Digital Transport */
1c1e45d1
HV
380 struct cx18 *cx; /* for ease of use */
381 const char *name; /* name of the stream */
382 int type; /* stream type */
383 u32 handle; /* task handle */
fa655dda 384 unsigned int mdl_base_idx;
1c1e45d1
HV
385
386 u32 id;
1c1e45d1
HV
387 unsigned long s_flags; /* status flags, see above */
388 int dma; /* can be PCI_DMA_TODEVICE,
389 PCI_DMA_FROMDEVICE or
390 PCI_DMA_NONE */
1c1e45d1
HV
391 wait_queue_head_t waitq;
392
52fcb3ec
AW
393 /* Buffers */
394 struct list_head buf_pool; /* buffers not attached to an MDL */
395 u32 buffers; /* total buffers owned by this stream */
396 u32 buf_size; /* size in bytes of a single buffer */
397
398 /* MDL sizes - all stream MDLs are the same size */
399 u32 bufs_per_mdl;
400 u32 mdl_size; /* total bytes in all buffers in a mdl */
1c1e45d1 401
52fcb3ec
AW
402 /* MDL Queues */
403 struct cx18_queue q_free; /* free - in rotation, not committed */
404 struct cx18_queue q_busy; /* busy - in use by firmware */
405 struct cx18_queue q_full; /* full - data for user apps */
406 struct cx18_queue q_idle; /* idle - not in rotation */
1c1e45d1 407
21a278b8 408 struct work_struct out_work_order;
b7101de3
ST
409
410 /* Videobuf for YUV video */
411 u32 pixelformat;
412 struct list_head vb_capture; /* video capture queue */
413 spinlock_t vb_lock;
b7101de3 414 struct timer_list vb_timeout;
1bf5842f
SF
415
416 struct videobuf_queue vbuf_q;
417 spinlock_t vbuf_q_lock; /* Protect vbuf_q */
418 enum v4l2_buf_type vb_type;
b7101de3
ST
419};
420
421struct cx18_videobuf_buffer {
422 /* Common video buffer sub-system struct */
423 struct videobuf_buffer vb;
424 v4l2_std_id tvnorm; /* selected tv norm */
425 u32 bytes_used;
1c1e45d1
HV
426};
427
428struct cx18_open_id {
0b5f265a 429 struct v4l2_fh fh;
1c1e45d1
HV
430 u32 open_id;
431 int type;
1c1e45d1 432 struct cx18 *cx;
b7101de3
ST
433
434 struct videobuf_queue vbuf_q;
435 spinlock_t s_lock; /* Protect vbuf_q */
436 enum v4l2_buf_type vb_type;
1c1e45d1
HV
437};
438
0b5f265a
HV
439static inline struct cx18_open_id *fh2id(struct v4l2_fh *fh)
440{
441 return container_of(fh, struct cx18_open_id, fh);
442}
443
444static inline struct cx18_open_id *file2id(struct file *file)
445{
446 return fh2id(file->private_data);
447}
448
1c1e45d1
HV
449/* forward declaration of struct defined in cx18-cards.h */
450struct cx18_card;
451
302df970
AW
452/*
453 * A note about "sliced" VBI data as implemented in this driver:
454 *
455 * Currently we collect the sliced VBI in the form of Ancillary Data
456 * packets, inserted by the AV core decoder/digitizer/slicer in the
457 * horizontal blanking region of the VBI lines, in "raw" mode as far as
458 * the Encoder is concerned. We don't ever tell the Encoder itself
459 * to provide sliced VBI. (AV Core: sliced mode - Encoder: raw mode)
460 *
461 * We then process the ancillary data ourselves to send the sliced data
462 * to the user application directly or build up MPEG-2 private stream 1
463 * packets to splice into (only!) MPEG-2 PS streams for the user app.
464 *
465 * (That's how ivtv essentially does it.)
466 *
467 * The Encoder should be able to extract certain sliced VBI data for
468 * us and provide it in a separate stream or splice it into any type of
469 * MPEG PS or TS stream, but this isn't implemented yet.
470 */
471
472/*
473 * Number of "raw" VBI samples per horizontal line we tell the Encoder to
474 * grab from the decoder/digitizer/slicer output for raw or sliced VBI.
475 * It depends on the pixel clock and the horiz rate:
476 *
477 * (1/Fh)*(2*Fp) = Samples/line
478 * = 4 bytes EAV + Anc data in hblank + 4 bytes SAV + active samples
479 *
480 * Sliced VBI data is sent as ancillary data during horizontal blanking
481 * Raw VBI is sent as active video samples during vertcal blanking
482 *
483 * We use a BT.656 pxiel clock of 13.5 MHz and a BT.656 active line
484 * length of 720 pixels @ 4:2:2 sampling. Thus...
485 *
486 * For systems that use a 15.734 kHz horizontal rate, such as
487 * NTSC-M, PAL-M, PAL-60, and other 60 Hz/525 line systems, we have:
488 *
489 * (1/15.734 kHz) * 2 * 13.5 MHz = 1716 samples/line =
490 * 4 bytes SAV + 268 bytes anc data + 4 bytes SAV + 1440 active samples
491 *
492 * For systems that use a 15.625 kHz horizontal rate, such as
493 * PAL-B/G/H, PAL-I, SECAM-L and other 50 Hz/625 line systems, we have:
494 *
495 * (1/15.625 kHz) * 2 * 13.5 MHz = 1728 samples/line =
496 * 4 bytes SAV + 280 bytes anc data + 4 bytes SAV + 1440 active samples
497 */
498static const u32 vbi_active_samples = 1444; /* 4 byte SAV + 720 Y + 720 U/V */
499static const u32 vbi_hblank_samples_60Hz = 272; /* 4 byte EAV + 268 anc/fill */
500static const u32 vbi_hblank_samples_50Hz = 284; /* 4 byte EAV + 280 anc/fill */
1c1e45d1
HV
501
502#define CX18_VBI_FRAMES 32
503
1c1e45d1 504struct vbi_info {
302df970 505 /* Current state of v4l2 VBI settings for this device */
1c1e45d1 506 struct v4l2_format in;
302df970
AW
507 struct v4l2_sliced_vbi_format *sliced_in; /* pointer to in.fmt.sliced */
508 u32 count; /* Count of VBI data lines: 60 Hz: 12 or 50 Hz: 18 */
509 u32 start[2]; /* First VBI data line per field: 10 & 273 or 6 & 318 */
1c1e45d1 510
302df970 511 u32 frame; /* Count of VBI buffers/frames received from Encoder */
1c1e45d1 512
302df970
AW
513 /*
514 * Vars for creation and insertion of MPEG Private Stream 1 packets
515 * of sliced VBI data into an MPEG PS
516 */
1c1e45d1 517
302df970
AW
518 /* Boolean: create and insert Private Stream 1 packets into the PS */
519 int insert_mpeg;
520
521 /*
522 * Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
523 * Used in cx18-vbi.c only for collecting sliced data, and as a source
524 * during conversion of sliced VBI data into MPEG Priv Stream 1 packets.
525 * We don't need to save state here, but the array may have been a bit
526 * too big (2304 bytes) to alloc from the stack.
527 */
528 struct v4l2_sliced_vbi_data sliced_data[36];
1c1e45d1 529
302df970
AW
530 /*
531 * A ring buffer of driver-generated MPEG-2 PS
532 * Program Pack/Private Stream 1 packets for sliced VBI data insertion
533 * into the MPEG PS stream.
534 *
535 * In each sliced_mpeg_data[] buffer is:
536 * 16 byte MPEG-2 PS Program Pack Header
537 * 16 byte MPEG-2 Private Stream 1 PES Header
538 * 4 byte magic number: "itv0" or "ITV0"
539 * 4 byte first field line mask, if "itv0"
540 * 4 byte second field line mask, if "itv0"
541 * 36 lines, if "ITV0"; or <36 lines, if "itv0"; of sliced VBI data
542 *
543 * Each line in the payload is
544 * 1 byte line header derived from the SDID (WSS, CC, VPS, etc.)
545 * 42 bytes of line data
546 *
547 * That's a maximum 1552 bytes of payload in the Private Stream 1 packet
548 * which is the payload size a PVR-350 (CX23415) MPEG decoder will
549 * accept for VBI data. So, including the headers, it's a maximum 1584
550 * bytes total.
551 */
552#define CX18_SLICED_MPEG_DATA_MAXSZ 1584
553 /* copy_vbi_buf() needs 8 temp bytes on the end for the worst case */
554#define CX18_SLICED_MPEG_DATA_BUFSZ (CX18_SLICED_MPEG_DATA_MAXSZ+8)
1c1e45d1
HV
555 u8 *sliced_mpeg_data[CX18_VBI_FRAMES];
556 u32 sliced_mpeg_size[CX18_VBI_FRAMES];
302df970
AW
557
558 /* Count of Program Pack/Program Stream 1 packets inserted into PS */
1c1e45d1
HV
559 u32 inserted_frame;
560
302df970 561 /*
52fcb3ec 562 * A dummy driver stream transfer mdl & buffer with a copy of the next
302df970
AW
563 * sliced_mpeg_data[] buffer for output to userland apps.
564 * Only used in cx18-fileops.c, but its state needs to persist at times.
565 */
52fcb3ec 566 struct cx18_mdl sliced_mpeg_mdl;
302df970 567 struct cx18_buffer sliced_mpeg_buf;
1c1e45d1
HV
568};
569
570/* Per cx23418, per I2C bus private algo callback data */
571struct cx18_i2c_algo_callback_data {
572 struct cx18 *cx;
573 int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */
574};
575
f7823f8f 576#define CX18_MAX_MMIO_WR_RETRIES 10
330c6ec8 577
1c1e45d1
HV
578/* Struct to hold info about cx18 cards */
579struct cx18 {
5811cf99 580 int instance;
3d05913d 581 struct pci_dev *pci_dev;
888cdb07 582 struct v4l2_device v4l2_dev;
ff2a2001 583 struct v4l2_subdev *sd_av; /* A/V decoder/digitizer sub-device */
eefe1010 584 struct v4l2_subdev *sd_extmux; /* External multiplexer sub-dev */
888cdb07 585
1c1e45d1
HV
586 const struct cx18_card *card; /* card information */
587 const char *card_name; /* full name of the card */
588 const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
589 u8 is_50hz;
590 u8 is_60hz;
1c1e45d1
HV
591 u8 nof_inputs; /* number of video inputs */
592 u8 nof_audio_inputs; /* number of audio inputs */
1c1e45d1
HV
593 u32 v4l2_cap; /* V4L2 capabilities of card */
594 u32 hw_flags; /* Hardware description of the board */
fa655dda 595 unsigned int free_mdl_idx;
72c2d6d3
AW
596 struct cx18_scb __iomem *scb; /* pointer to SCB */
597 struct mutex epu2apu_mb_lock; /* protect driver to chip mailbox in SCB*/
598 struct mutex epu2cpu_mb_lock; /* protect driver to chip mailbox in SCB*/
599
1c1e45d1
HV
600 struct cx18_av_state av_state;
601
602 /* codec settings */
a75b9be1 603 struct cx2341x_handler cxhdl;
1c1e45d1
HV
604 u32 filter_mode;
605 u32 temporal_strength;
606 u32 spatial_strength;
607
608 /* dualwatch */
609 unsigned long dualwatch_jiffies;
0d82fe80 610 u32 dualwatch_stereo_mode;
1c1e45d1 611
1c1e45d1
HV
612 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
613 struct cx18_options options; /* User options */
6ecd86dc 614 int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */
1c1e45d1
HV
615 int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */
616 struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */
9722c8f9 617 struct snd_cx18_card *alsa; /* ALSA interface for PCM capture stream */
9972de90
DH
618 void (*pcm_announce_callback)(struct snd_cx18_card *card, u8 *pcm_data,
619 size_t num_bytes);
620
1c1e45d1 621 unsigned long i_flags; /* global cx18 flags */
31554ae5
HV
622 atomic_t ana_capturing; /* count number of active analog capture streams */
623 atomic_t tot_capturing; /* total count number of active capture streams */
1c1e45d1
HV
624 int search_pack_header;
625
1c1e45d1
HV
626 int open_id; /* incremented each time an open occurs, used as
627 unique ID. Starts at 1, so 0 can be used as
628 uninitialized value in the stream->id. */
629
630 u32 base_addr;
1c1e45d1
HV
631
632 u8 card_rev;
633 void __iomem *enc_mem, *reg_mem;
634
635 struct vbi_info vbi;
636
1c1e45d1
HV
637 u64 mpg_data_received;
638 u64 vbi_data_inserted;
639
640 wait_queue_head_t mb_apu_waitq;
641 wait_queue_head_t mb_cpu_waitq;
1c1e45d1
HV
642 wait_queue_head_t cap_w;
643 /* when the current DMA is finished this queue is woken up */
644 wait_queue_head_t dma_waitq;
645
d6c7e5f8
AW
646 u32 sw1_irq_mask;
647 u32 sw2_irq_mask;
648 u32 hw2_irq_mask;
649
deed75ed
AW
650 struct workqueue_struct *in_work_queue;
651 char in_workq_name[11]; /* "cx18-NN-in" */
652 struct cx18_in_work_order in_work_order[CX18_MAX_IN_WORK_ORDERS];
ee2d64f5 653 char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */
1d6782bd 654
1c1e45d1
HV
655 /* i2c */
656 struct i2c_adapter i2c_adap[2];
657 struct i2c_algo_bit_data i2c_algo[2];
658 struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2];
1c1e45d1 659
83526190
AW
660 struct IR_i2c_init_data ir_i2c_init_data;
661
ba60bc67
HV
662 /* gpio */
663 u32 gpio_dir;
664 u32 gpio_val;
8abdd00d 665 struct mutex gpio_lock;
eefe1010
AW
666 struct v4l2_subdev sd_gpiomux;
667 struct v4l2_subdev sd_resetctrl;
ba60bc67 668
1c1e45d1
HV
669 /* v4l2 and User settings */
670
671 /* codec settings */
672 u32 audio_input;
673 u32 active_input;
1c1e45d1
HV
674 v4l2_std_id std;
675 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
d68b687b
DH
676
677 /* Used for cx18-alsa module loading */
678 struct work_struct request_module_wk;
1c1e45d1
HV
679};
680
5811cf99
AW
681static inline struct cx18 *to_cx18(struct v4l2_device *v4l2_dev)
682{
683 return container_of(v4l2_dev, struct cx18, v4l2_dev);
684}
685
d68b687b
DH
686/* cx18 extensions to be loaded */
687extern int (*cx18_ext_init)(struct cx18 *);
688
1c1e45d1 689/* Globals */
1c1e45d1 690extern int cx18_first_minor;
1c1e45d1
HV
691
692/*==============Prototypes==================*/
693
694/* Return non-zero if a signal is pending */
695int cx18_msleep_timeout(unsigned int msecs, int intr);
696
1c1e45d1
HV
697/* Read Hauppauge eeprom */
698struct tveeprom; /* forward reference */
699void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv);
700
701/* First-open initialization: load firmware, etc. */
702int cx18_init_on_first_open(struct cx18 *cx);
703
dd073434
AW
704/* Test if the current VBI mode is raw (1) or sliced (0) */
705static inline int cx18_raw_vbi(const struct cx18 *cx)
706{
707 return cx->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;
708}
709
ff2a2001
AW
710/* Call the specified callback for all subdevs with a grp_id bit matching the
711 * mask in hw (if 0, then match them all). Ignore any errors. */
6c2d4dd1
GL
712#define cx18_call_hw(cx, hw, o, f, args...) \
713 do { \
714 struct v4l2_subdev *__sd; \
715 __v4l2_device_call_subdevs_p(&(cx)->v4l2_dev, __sd, \
716 !(hw) || (__sd->grp_id & (hw)), o, f , ##args); \
717 } while (0)
ff2a2001
AW
718
719#define cx18_call_all(cx, o, f, args...) cx18_call_hw(cx, 0, o, f , ##args)
720
721/* Call the specified callback for all subdevs with a grp_id bit matching the
722 * mask in hw (if 0, then match them all). If the callback returns an error
723 * other than 0 or -ENOIOCTLCMD, then return with that error code. */
6c2d4dd1
GL
724#define cx18_call_hw_err(cx, hw, o, f, args...) \
725({ \
726 struct v4l2_subdev *__sd; \
727 __v4l2_device_call_subdevs_until_err_p(&(cx)->v4l2_dev, \
728 __sd, !(hw) || (__sd->grp_id & (hw)), o, f, \
729 ##args); \
730})
ff2a2001
AW
731
732#define cx18_call_all_err(cx, o, f, args...) \
733 cx18_call_hw_err(cx, 0, o, f , ##args)
734
1c1e45d1 735#endif /* CX18_DRIVER_H */