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Commit | Line | Data |
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1c1e45d1 HV |
1 | /* |
2 | * cx18 driver internal defines and structures | |
3 | * | |
4 | * Derived from ivtv-driver.h | |
5 | * | |
6 | * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl> | |
1ed9dcc8 | 7 | * Copyright (C) 2008 Andy Walls <awalls@radix.net> |
1c1e45d1 HV |
8 | * |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA | |
22 | * 02111-1307 USA | |
23 | */ | |
24 | ||
25 | #ifndef CX18_DRIVER_H | |
26 | #define CX18_DRIVER_H | |
27 | ||
28 | #include <linux/version.h> | |
29 | #include <linux/module.h> | |
30 | #include <linux/moduleparam.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/delay.h> | |
33 | #include <linux/sched.h> | |
34 | #include <linux/fs.h> | |
35 | #include <linux/pci.h> | |
36 | #include <linux/interrupt.h> | |
37 | #include <linux/spinlock.h> | |
38 | #include <linux/i2c.h> | |
39 | #include <linux/i2c-algo-bit.h> | |
40 | #include <linux/list.h> | |
41 | #include <linux/unistd.h> | |
1c1e45d1 HV |
42 | #include <linux/pagemap.h> |
43 | #include <linux/workqueue.h> | |
44 | #include <linux/mutex.h> | |
1a651a00 | 45 | #include <asm/byteorder.h> |
1c1e45d1 HV |
46 | |
47 | #include <linux/dvb/video.h> | |
48 | #include <linux/dvb/audio.h> | |
49 | #include <media/v4l2-common.h> | |
35ea11ff | 50 | #include <media/v4l2-ioctl.h> |
1c1e45d1 HV |
51 | #include <media/tuner.h> |
52 | #include "cx18-mailbox.h" | |
53 | #include "cx18-av-core.h" | |
54 | #include "cx23418.h" | |
55 | ||
56 | /* DVB */ | |
57 | #include "demux.h" | |
58 | #include "dmxdev.h" | |
59 | #include "dvb_demux.h" | |
60 | #include "dvb_frontend.h" | |
61 | #include "dvb_net.h" | |
62 | #include "dvbdev.h" | |
63 | ||
64 | #ifndef CONFIG_PCI | |
65 | # error "This driver requires kernel PCI support." | |
66 | #endif | |
67 | ||
68 | #define CX18_MEM_OFFSET 0x00000000 | |
69 | #define CX18_MEM_SIZE 0x04000000 | |
70 | #define CX18_REG_OFFSET 0x02000000 | |
71 | ||
72 | /* Maximum cx18 driver instances. */ | |
73 | #define CX18_MAX_CARDS 32 | |
74 | ||
75 | /* Supported cards */ | |
76 | #define CX18_CARD_HVR_1600_ESMT 0 /* Hauppauge HVR 1600 (ESMT memory) */ | |
77 | #define CX18_CARD_HVR_1600_SAMSUNG 1 /* Hauppauge HVR 1600 (Samsung memory) */ | |
78 | #define CX18_CARD_COMPRO_H900 2 /* Compro VideoMate H900 */ | |
79 | #define CX18_CARD_YUAN_MPC718 3 /* Yuan MPC718 */ | |
03c28085 | 80 | #define CX18_CARD_CNXT_RAPTOR_PAL 4 /* Conexant Raptor PAL */ |
9eee4fb6 AW |
81 | #define CX18_CARD_TOSHIBA_QOSMIO_DVBT 5 /* Toshiba Qosmio Interal DVB-T/Analog*/ |
82 | #define CX18_CARD_LEADTEK_PVR2100 6 /* Leadtek WinFast PVR2100 */ | |
83 | #define CX18_CARD_LAST 6 | |
1c1e45d1 HV |
84 | |
85 | #define CX18_ENC_STREAM_TYPE_MPG 0 | |
86 | #define CX18_ENC_STREAM_TYPE_TS 1 | |
87 | #define CX18_ENC_STREAM_TYPE_YUV 2 | |
88 | #define CX18_ENC_STREAM_TYPE_VBI 3 | |
89 | #define CX18_ENC_STREAM_TYPE_PCM 4 | |
90 | #define CX18_ENC_STREAM_TYPE_IDX 5 | |
91 | #define CX18_ENC_STREAM_TYPE_RAD 6 | |
92 | #define CX18_MAX_STREAMS 7 | |
93 | ||
94 | /* system vendor and device IDs */ | |
95 | #define PCI_VENDOR_ID_CX 0x14f1 | |
96 | #define PCI_DEVICE_ID_CX23418 0x5b7a | |
97 | ||
98 | /* subsystem vendor ID */ | |
99 | #define CX18_PCI_ID_HAUPPAUGE 0x0070 | |
100 | #define CX18_PCI_ID_COMPRO 0x185b | |
101 | #define CX18_PCI_ID_YUAN 0x12ab | |
03c28085 | 102 | #define CX18_PCI_ID_CONEXANT 0x14f1 |
9eee4fb6 AW |
103 | #define CX18_PCI_ID_TOSHIBA 0x1179 |
104 | #define CX18_PCI_ID_LEADTEK 0x107D | |
1c1e45d1 HV |
105 | |
106 | /* ======================================================================== */ | |
107 | /* ========================== START USER SETTABLE DMA VARIABLES =========== */ | |
108 | /* ======================================================================== */ | |
109 | ||
110 | /* DMA Buffers, Default size in MB allocated */ | |
111 | #define CX18_DEFAULT_ENC_TS_BUFFERS 1 | |
112 | #define CX18_DEFAULT_ENC_MPG_BUFFERS 2 | |
113 | #define CX18_DEFAULT_ENC_IDX_BUFFERS 1 | |
114 | #define CX18_DEFAULT_ENC_YUV_BUFFERS 2 | |
115 | #define CX18_DEFAULT_ENC_VBI_BUFFERS 1 | |
116 | #define CX18_DEFAULT_ENC_PCM_BUFFERS 1 | |
117 | ||
6ecd86dc | 118 | /* Maximum firmware DMA buffers per stream */ |
0ef02892 | 119 | #define CX18_MAX_FW_MDLS_PER_STREAM 63 |
6ecd86dc AW |
120 | |
121 | /* DMA buffer, default size in kB allocated */ | |
122 | #define CX18_DEFAULT_ENC_TS_BUFSIZE 32 | |
123 | #define CX18_DEFAULT_ENC_MPG_BUFSIZE 32 | |
124 | #define CX18_DEFAULT_ENC_IDX_BUFSIZE 32 | |
125 | #define CX18_DEFAULT_ENC_YUV_BUFSIZE 128 | |
126 | /* Default VBI bufsize based on standards supported by card tuner for now */ | |
127 | #define CX18_DEFAULT_ENC_PCM_BUFSIZE 4 | |
128 | ||
1c1e45d1 HV |
129 | /* i2c stuff */ |
130 | #define I2C_CLIENTS_MAX 16 | |
131 | ||
132 | /* debugging */ | |
133 | ||
134 | /* Flag to turn on high volume debugging */ | |
135 | #define CX18_DBGFLG_WARN (1 << 0) | |
136 | #define CX18_DBGFLG_INFO (1 << 1) | |
137 | #define CX18_DBGFLG_API (1 << 2) | |
138 | #define CX18_DBGFLG_DMA (1 << 3) | |
139 | #define CX18_DBGFLG_IOCTL (1 << 4) | |
140 | #define CX18_DBGFLG_FILE (1 << 5) | |
141 | #define CX18_DBGFLG_I2C (1 << 6) | |
142 | #define CX18_DBGFLG_IRQ (1 << 7) | |
143 | /* Flag to turn on high volume debugging */ | |
144 | #define CX18_DBGFLG_HIGHVOL (1 << 8) | |
145 | ||
146 | /* NOTE: extra space before comma in 'cx->num , ## args' is required for | |
147 | gcc-2.95, otherwise it won't compile. */ | |
148 | #define CX18_DEBUG(x, type, fmt, args...) \ | |
149 | do { \ | |
150 | if ((x) & cx18_debug) \ | |
151 | printk(KERN_INFO "cx18-%d " type ": " fmt, cx->num , ## args); \ | |
152 | } while (0) | |
153 | #define CX18_DEBUG_WARN(fmt, args...) CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args) | |
154 | #define CX18_DEBUG_INFO(fmt, args...) CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args) | |
155 | #define CX18_DEBUG_API(fmt, args...) CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args) | |
156 | #define CX18_DEBUG_DMA(fmt, args...) CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args) | |
157 | #define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args) | |
158 | #define CX18_DEBUG_FILE(fmt, args...) CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args) | |
159 | #define CX18_DEBUG_I2C(fmt, args...) CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args) | |
160 | #define CX18_DEBUG_IRQ(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args) | |
161 | ||
162 | #define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \ | |
163 | do { \ | |
164 | if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \ | |
165 | printk(KERN_INFO "cx18%d " type ": " fmt, cx->num , ## args); \ | |
166 | } while (0) | |
167 | #define CX18_DEBUG_HI_WARN(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args) | |
168 | #define CX18_DEBUG_HI_INFO(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args) | |
169 | #define CX18_DEBUG_HI_API(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args) | |
170 | #define CX18_DEBUG_HI_DMA(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args) | |
171 | #define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args) | |
172 | #define CX18_DEBUG_HI_FILE(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args) | |
173 | #define CX18_DEBUG_HI_I2C(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args) | |
174 | #define CX18_DEBUG_HI_IRQ(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args) | |
175 | ||
176 | /* Standard kernel messages */ | |
177 | #define CX18_ERR(fmt, args...) printk(KERN_ERR "cx18-%d: " fmt, cx->num , ## args) | |
178 | #define CX18_WARN(fmt, args...) printk(KERN_WARNING "cx18-%d: " fmt, cx->num , ## args) | |
179 | #define CX18_INFO(fmt, args...) printk(KERN_INFO "cx18-%d: " fmt, cx->num , ## args) | |
180 | ||
181 | /* Values for CX18_API_DEC_PLAYBACK_SPEED mpeg_frame_type_mask parameter: */ | |
182 | #define MPEG_FRAME_TYPE_IFRAME 1 | |
183 | #define MPEG_FRAME_TYPE_IFRAME_PFRAME 3 | |
184 | #define MPEG_FRAME_TYPE_ALL 7 | |
185 | ||
186 | #define CX18_MAX_PGM_INDEX (400) | |
187 | ||
188 | extern int cx18_debug; | |
189 | ||
190 | ||
191 | struct cx18_options { | |
192 | int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */ | |
193 | int cardtype; /* force card type on load */ | |
194 | int tuner; /* set tuner on load */ | |
195 | int radio; /* enable/disable radio */ | |
196 | }; | |
197 | ||
198 | /* per-buffer bit flags */ | |
199 | #define CX18_F_B_NEED_BUF_SWAP 0 /* this buffer should be byte swapped */ | |
200 | ||
201 | /* per-stream, s_flags */ | |
202 | #define CX18_F_S_CLAIMED 3 /* this stream is claimed */ | |
203 | #define CX18_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */ | |
204 | #define CX18_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */ | |
205 | #define CX18_F_S_STREAMOFF 7 /* signal end of stream EOS */ | |
206 | #define CX18_F_S_APPL_IO 8 /* this stream is used read/written by an application */ | |
207 | ||
208 | /* per-cx18, i_flags */ | |
1d6782bd AW |
209 | #define CX18_F_I_LOADED_FW 0 /* Loaded firmware 1st time */ |
210 | #define CX18_F_I_EOS 4 /* End of encoder stream */ | |
211 | #define CX18_F_I_RADIO_USER 5 /* radio tuner is selected */ | |
212 | #define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */ | |
1d6782bd AW |
213 | #define CX18_F_I_INITED 21 /* set after first open */ |
214 | #define CX18_F_I_FAILED 22 /* set if first open failed */ | |
1c1e45d1 HV |
215 | |
216 | /* These are the VBI types as they appear in the embedded VBI private packets. */ | |
217 | #define CX18_SLICED_TYPE_TELETEXT_B (1) | |
218 | #define CX18_SLICED_TYPE_CAPTION_525 (4) | |
219 | #define CX18_SLICED_TYPE_WSS_625 (5) | |
220 | #define CX18_SLICED_TYPE_VPS (7) | |
221 | ||
222 | struct cx18_buffer { | |
223 | struct list_head list; | |
224 | dma_addr_t dma_handle; | |
225 | u32 id; | |
226 | unsigned long b_flags; | |
bca11a57 | 227 | unsigned skipped; |
1c1e45d1 HV |
228 | char *buf; |
229 | ||
230 | u32 bytesused; | |
231 | u32 readpos; | |
232 | }; | |
233 | ||
234 | struct cx18_queue { | |
235 | struct list_head list; | |
b04bce47 | 236 | atomic_t buffers; |
1c1e45d1 HV |
237 | u32 bytesused; |
238 | }; | |
239 | ||
240 | struct cx18_dvb { | |
241 | struct dmx_frontend hw_frontend; | |
242 | struct dmx_frontend mem_frontend; | |
243 | struct dmxdev dmxdev; | |
244 | struct dvb_adapter dvb_adapter; | |
245 | struct dvb_demux demux; | |
246 | struct dvb_frontend *fe; | |
247 | struct dvb_net dvbnet; | |
248 | int enabled; | |
249 | int feeding; | |
1c1e45d1 | 250 | struct mutex feedlock; |
1c1e45d1 HV |
251 | }; |
252 | ||
253 | struct cx18; /* forward reference */ | |
254 | struct cx18_scb; /* forward reference */ | |
255 | ||
72a4f808 | 256 | |
ee2d64f5 | 257 | #define CX18_MAX_MDL_ACKS 2 |
0ef02892 AW |
258 | #define CX18_MAX_EPU_WORK_ORDERS (CX18_MAX_FW_MDLS_PER_STREAM + 7) |
259 | /* CPU_DE_RELEASE_MDL can burst CX18_MAX_FW_MDLS_PER_STREAM orders in a group */ | |
ee2d64f5 | 260 | |
72a4f808 AW |
261 | #define CX18_F_EWO_MB_STALE_UPON_RECEIPT 0x1 |
262 | #define CX18_F_EWO_MB_STALE_WHILE_PROC 0x2 | |
263 | #define CX18_F_EWO_MB_STALE \ | |
264 | (CX18_F_EWO_MB_STALE_UPON_RECEIPT | CX18_F_EWO_MB_STALE_WHILE_PROC) | |
265 | ||
ee2d64f5 AW |
266 | struct cx18_epu_work_order { |
267 | struct work_struct work; | |
268 | atomic_t pending; | |
269 | struct cx18 *cx; | |
72a4f808 | 270 | unsigned long flags; |
ee2d64f5 AW |
271 | int rpu; |
272 | struct cx18_mailbox mb; | |
273 | struct cx18_mdl_ack mdl_ack[CX18_MAX_MDL_ACKS]; | |
274 | char *str; | |
275 | }; | |
276 | ||
d3c5e707 AW |
277 | #define CX18_INVALID_TASK_HANDLE 0xffffffff |
278 | ||
1c1e45d1 HV |
279 | struct cx18_stream { |
280 | /* These first four fields are always set, even if the stream | |
281 | is not actually created. */ | |
3d05913d | 282 | struct video_device *video_dev; /* NULL when stream not created */ |
1c1e45d1 HV |
283 | struct cx18 *cx; /* for ease of use */ |
284 | const char *name; /* name of the stream */ | |
285 | int type; /* stream type */ | |
286 | u32 handle; /* task handle */ | |
287 | unsigned mdl_offset; | |
288 | ||
289 | u32 id; | |
f576ceef | 290 | struct mutex qlock; /* locks access to the queues */ |
1c1e45d1 HV |
291 | unsigned long s_flags; /* status flags, see above */ |
292 | int dma; /* can be PCI_DMA_TODEVICE, | |
293 | PCI_DMA_FROMDEVICE or | |
294 | PCI_DMA_NONE */ | |
295 | u64 dma_pts; | |
296 | wait_queue_head_t waitq; | |
297 | ||
298 | /* Buffer Stats */ | |
299 | u32 buffers; | |
300 | u32 buf_size; | |
1c1e45d1 HV |
301 | |
302 | /* Buffer Queues */ | |
303 | struct cx18_queue q_free; /* free buffers */ | |
66c2a6b0 AW |
304 | struct cx18_queue q_busy; /* busy buffers - in use by firmware */ |
305 | struct cx18_queue q_full; /* full buffers - data for user apps */ | |
1c1e45d1 HV |
306 | |
307 | /* DVB / Digital Transport */ | |
308 | struct cx18_dvb dvb; | |
309 | }; | |
310 | ||
311 | struct cx18_open_id { | |
312 | u32 open_id; | |
313 | int type; | |
314 | enum v4l2_priority prio; | |
315 | struct cx18 *cx; | |
316 | }; | |
317 | ||
318 | /* forward declaration of struct defined in cx18-cards.h */ | |
319 | struct cx18_card; | |
320 | ||
321 | ||
322 | #define CX18_VBI_FRAMES 32 | |
323 | ||
324 | /* VBI data */ | |
325 | struct vbi_info { | |
326 | u32 enc_size; | |
327 | u32 frame; | |
328 | u8 cc_data_odd[256]; | |
329 | u8 cc_data_even[256]; | |
330 | int cc_pos; | |
331 | u8 cc_no_update; | |
332 | u8 vps[5]; | |
333 | u8 vps_found; | |
334 | int wss; | |
335 | u8 wss_found; | |
336 | u8 wss_no_update; | |
337 | u32 raw_decoder_line_size; | |
338 | u8 raw_decoder_sav_odd_field; | |
339 | u8 raw_decoder_sav_even_field; | |
340 | u32 sliced_decoder_line_size; | |
341 | u8 sliced_decoder_sav_odd_field; | |
342 | u8 sliced_decoder_sav_even_field; | |
343 | struct v4l2_format in; | |
344 | /* convenience pointer to sliced struct in vbi_in union */ | |
345 | struct v4l2_sliced_vbi_format *sliced_in; | |
346 | u32 service_set_in; | |
347 | int insert_mpeg; | |
348 | ||
349 | /* Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines. | |
350 | One for /dev/vbi0 and one for /dev/vbi8 */ | |
351 | struct v4l2_sliced_vbi_data sliced_data[36]; | |
352 | ||
353 | /* Buffer for VBI data inserted into MPEG stream. | |
354 | The first byte is a dummy byte that's never used. | |
355 | The next 16 bytes contain the MPEG header for the VBI data, | |
356 | the remainder is the actual VBI data. | |
357 | The max size accepted by the MPEG VBI reinsertion turns out | |
358 | to be 1552 bytes, which happens to be 4 + (1 + 42) * (2 * 18) bytes, | |
359 | where 4 is a four byte header, 42 is the max sliced VBI payload, 1 is | |
360 | a single line header byte and 2 * 18 is the number of VBI lines per frame. | |
361 | ||
362 | However, it seems that the data must be 1K aligned, so we have to | |
363 | pad the data until the 1 or 2 K boundary. | |
364 | ||
365 | This pointer array will allocate 2049 bytes to store each VBI frame. */ | |
366 | u8 *sliced_mpeg_data[CX18_VBI_FRAMES]; | |
367 | u32 sliced_mpeg_size[CX18_VBI_FRAMES]; | |
368 | struct cx18_buffer sliced_mpeg_buf; | |
369 | u32 inserted_frame; | |
370 | ||
371 | u32 start[2], count; | |
372 | u32 raw_size; | |
373 | u32 sliced_size; | |
374 | }; | |
375 | ||
376 | /* Per cx23418, per I2C bus private algo callback data */ | |
377 | struct cx18_i2c_algo_callback_data { | |
378 | struct cx18 *cx; | |
379 | int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */ | |
380 | }; | |
381 | ||
f7823f8f | 382 | #define CX18_MAX_MMIO_WR_RETRIES 10 |
330c6ec8 | 383 | |
1c1e45d1 HV |
384 | /* Struct to hold info about cx18 cards */ |
385 | struct cx18 { | |
386 | int num; /* board number, -1 during init! */ | |
387 | char name[8]; /* board name for printk and interrupts (e.g. 'cx180') */ | |
3d05913d | 388 | struct pci_dev *pci_dev; |
1c1e45d1 HV |
389 | const struct cx18_card *card; /* card information */ |
390 | const char *card_name; /* full name of the card */ | |
391 | const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */ | |
392 | u8 is_50hz; | |
393 | u8 is_60hz; | |
394 | u8 is_out_50hz; | |
395 | u8 is_out_60hz; | |
396 | u8 nof_inputs; /* number of video inputs */ | |
397 | u8 nof_audio_inputs; /* number of audio inputs */ | |
398 | u16 buffer_id; /* buffer ID counter */ | |
399 | u32 v4l2_cap; /* V4L2 capabilities of card */ | |
400 | u32 hw_flags; /* Hardware description of the board */ | |
401 | unsigned mdl_offset; | |
72c2d6d3 AW |
402 | struct cx18_scb __iomem *scb; /* pointer to SCB */ |
403 | struct mutex epu2apu_mb_lock; /* protect driver to chip mailbox in SCB*/ | |
404 | struct mutex epu2cpu_mb_lock; /* protect driver to chip mailbox in SCB*/ | |
405 | ||
1c1e45d1 HV |
406 | struct cx18_av_state av_state; |
407 | ||
408 | /* codec settings */ | |
409 | struct cx2341x_mpeg_params params; | |
410 | u32 filter_mode; | |
411 | u32 temporal_strength; | |
412 | u32 spatial_strength; | |
413 | ||
414 | /* dualwatch */ | |
415 | unsigned long dualwatch_jiffies; | |
0d82fe80 | 416 | u32 dualwatch_stereo_mode; |
1c1e45d1 HV |
417 | |
418 | /* Digitizer type */ | |
419 | int digitizer; /* 0x00EF = saa7114 0x00FO = saa7115 0x0106 = mic */ | |
420 | ||
421 | struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */ | |
422 | struct cx18_options options; /* User options */ | |
6ecd86dc | 423 | int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */ |
1c1e45d1 HV |
424 | int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */ |
425 | struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */ | |
426 | unsigned long i_flags; /* global cx18 flags */ | |
31554ae5 HV |
427 | atomic_t ana_capturing; /* count number of active analog capture streams */ |
428 | atomic_t tot_capturing; /* total count number of active capture streams */ | |
1c1e45d1 HV |
429 | spinlock_t lock; /* lock access to this struct */ |
430 | int search_pack_header; | |
431 | ||
1c1e45d1 HV |
432 | int open_id; /* incremented each time an open occurs, used as |
433 | unique ID. Starts at 1, so 0 can be used as | |
434 | uninitialized value in the stream->id. */ | |
435 | ||
436 | u32 base_addr; | |
437 | struct v4l2_prio_state prio; | |
438 | ||
439 | u8 card_rev; | |
440 | void __iomem *enc_mem, *reg_mem; | |
441 | ||
442 | struct vbi_info vbi; | |
443 | ||
444 | u32 pgm_info_offset; | |
445 | u32 pgm_info_num; | |
446 | u32 pgm_info_write_idx; | |
447 | u32 pgm_info_read_idx; | |
448 | struct v4l2_enc_idx_entry pgm_info[CX18_MAX_PGM_INDEX]; | |
449 | ||
450 | u64 mpg_data_received; | |
451 | u64 vbi_data_inserted; | |
452 | ||
453 | wait_queue_head_t mb_apu_waitq; | |
454 | wait_queue_head_t mb_cpu_waitq; | |
1c1e45d1 HV |
455 | wait_queue_head_t cap_w; |
456 | /* when the current DMA is finished this queue is woken up */ | |
457 | wait_queue_head_t dma_waitq; | |
458 | ||
d6c7e5f8 AW |
459 | u32 sw1_irq_mask; |
460 | u32 sw2_irq_mask; | |
461 | u32 hw2_irq_mask; | |
462 | ||
572bfea7 | 463 | struct workqueue_struct *work_queue; |
ee2d64f5 AW |
464 | struct cx18_epu_work_order epu_work_order[CX18_MAX_EPU_WORK_ORDERS]; |
465 | char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */ | |
1d6782bd | 466 | |
1c1e45d1 HV |
467 | /* i2c */ |
468 | struct i2c_adapter i2c_adap[2]; | |
469 | struct i2c_algo_bit_data i2c_algo[2]; | |
470 | struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2]; | |
471 | struct i2c_client i2c_client[2]; | |
472 | struct mutex i2c_bus_lock[2]; | |
473 | struct i2c_client *i2c_clients[I2C_CLIENTS_MAX]; | |
474 | ||
ba60bc67 HV |
475 | /* gpio */ |
476 | u32 gpio_dir; | |
477 | u32 gpio_val; | |
8abdd00d | 478 | struct mutex gpio_lock; |
ba60bc67 | 479 | |
1c1e45d1 HV |
480 | /* v4l2 and User settings */ |
481 | ||
482 | /* codec settings */ | |
483 | u32 audio_input; | |
484 | u32 active_input; | |
485 | u32 active_output; | |
486 | v4l2_std_id std; | |
487 | v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */ | |
488 | }; | |
489 | ||
490 | /* Globals */ | |
491 | extern struct cx18 *cx18_cards[]; | |
492 | extern int cx18_cards_active; | |
493 | extern int cx18_first_minor; | |
494 | extern spinlock_t cx18_cards_lock; | |
495 | ||
496 | /*==============Prototypes==================*/ | |
497 | ||
498 | /* Return non-zero if a signal is pending */ | |
499 | int cx18_msleep_timeout(unsigned int msecs, int intr); | |
500 | ||
1c1e45d1 HV |
501 | /* Read Hauppauge eeprom */ |
502 | struct tveeprom; /* forward reference */ | |
503 | void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv); | |
504 | ||
505 | /* First-open initialization: load firmware, etc. */ | |
506 | int cx18_init_on_first_open(struct cx18 *cx); | |
507 | ||
dd073434 AW |
508 | /* Test if the current VBI mode is raw (1) or sliced (0) */ |
509 | static inline int cx18_raw_vbi(const struct cx18 *cx) | |
510 | { | |
511 | return cx->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE; | |
512 | } | |
513 | ||
1c1e45d1 | 514 | #endif /* CX18_DRIVER_H */ |