[mirror_ubuntu-hirsute-kernel.git] / drivers / media / video / cx18 / cx18-i2c.c

/*
 *  cx18 I2C functions
 *
 *  Derived from ivtv-i2c.c
 *
 *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
 *  Copyright (C) 2008  Andy Walls <awalls@radix.net>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
 *  02111-1307  USA
 */

#include "cx18-driver.h"
#include "cx18-io.h"
#include "cx18-cards.h"
#include "cx18-gpio.h"
#include "cx18-i2c.h"
#include "cx18-irq.h"

#define CX18_REG_I2C_1_WR   0xf15000
#define CX18_REG_I2C_1_RD   0xf15008
#define CX18_REG_I2C_2_WR   0xf25100
#define CX18_REG_I2C_2_RD   0xf25108

#define SETSCL_BIT      0x0001
#define SETSDL_BIT      0x0002
#define GETSCL_BIT      0x0004
#define GETSDL_BIT      0x0008

#define CX18_CS5345_I2C_ADDR		0x4c

/* This array should match the CX18_HW_ defines */
static const u8 hw_addrs[] = {
	0,			/* CX18_HW_TUNER */
	0,			/* CX18_HW_TVEEPROM */
	CX18_CS5345_I2C_ADDR,	/* CX18_HW_CS5345 */
	0,			/* CX18_HW_DVB */
	0,			/* CX18_HW_418_AV */
	0,			/* CX18_HW_GPIO_MUX */
	0,			/* CX18_HW_GPIO_RESET_CTRL */
};

/* This array should match the CX18_HW_ defines */
/* This might well become a card-specific array */
static const u8 hw_bus[] = {
	1,	/* CX18_HW_TUNER */
	0,	/* CX18_HW_TVEEPROM */
	0,	/* CX18_HW_CS5345 */
	0,	/* CX18_HW_DVB */
	0,	/* CX18_HW_418_AV */
	0,	/* CX18_HW_GPIO_MUX */
	0,	/* CX18_HW_GPIO_RESET_CTRL */
};

/* This array should match the CX18_HW_ defines */
static const char * const hw_modules[] = {
	"tuner",	/* CX18_HW_TUNER */
	NULL,		/* CX18_HW_TVEEPROM */
	"cs5345",	/* CX18_HW_CS5345 */
	NULL,		/* CX18_HW_DVB */
	NULL,		/* CX18_HW_418_AV */
	NULL,		/* CX18_HW_GPIO_MUX */
	NULL,		/* CX18_HW_GPIO_RESET_CTRL */
};

/* This array should match the CX18_HW_ defines */
static const char * const hw_devicenames[] = {
	"tuner",
	"tveeprom",
	"cs5345",
	"cx23418_DTV",
	"cx23418_AV",
	"gpio_mux",
	"gpio_reset_ctrl",
};

int cx18_i2c_register(struct cx18 *cx, unsigned idx)
{
	struct v4l2_subdev *sd;
	int bus = hw_bus[idx];
	struct i2c_adapter *adap = &cx->i2c_adap[bus];
	const char *mod = hw_modules[idx];
	const char *type = hw_devicenames[idx];
	u32 hw = 1 << idx;

	if (idx >= ARRAY_SIZE(hw_addrs))
		return -1;

	if (hw == CX18_HW_TUNER) {
		/* special tuner group handling */
		sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
				adap, mod, type, cx->card_i2c->radio);
		if (sd != NULL)
			sd->grp_id = hw;
		sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
				adap, mod, type, cx->card_i2c->demod);
		if (sd != NULL)
			sd->grp_id = hw;
		sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
				adap, mod, type, cx->card_i2c->tv);
		if (sd != NULL)
			sd->grp_id = hw;
		return sd != NULL ? 0 : -1;
	}

	/* Is it not an I2C device or one we do not wish to register? */
	if (!hw_addrs[idx])
		return -1;

	/* It's an I2C device other than an analog tuner */
	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, mod, type, hw_addrs[idx]);
	if (sd != NULL)
		sd->grp_id = hw;
	return sd != NULL ? 0 : -1;
}

/* Find the first member of the subdev group id in hw */
struct v4l2_subdev *cx18_find_hw(struct cx18 *cx, u32 hw)
{
	struct v4l2_subdev *result = NULL;
	struct v4l2_subdev *sd;

	spin_lock(&cx->v4l2_dev.lock);
	v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
		if (sd->grp_id == hw) {
			result = sd;
			break;
		}
	}
	spin_unlock(&cx->v4l2_dev.lock);
	return result;
}

static void cx18_setscl(void *data, int state)
{
	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
	u32 r = cx18_read_reg(cx, addr);

	if (state)
		cx18_write_reg(cx, r | SETSCL_BIT, addr);
	else
		cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
}

static void cx18_setsda(void *data, int state)
{
	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
	u32 r = cx18_read_reg(cx, addr);

	if (state)
		cx18_write_reg(cx, r | SETSDL_BIT, addr);
	else
		cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
}

static int cx18_getscl(void *data)
{
	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;

	return cx18_read_reg(cx, addr) & GETSCL_BIT;
}

static int cx18_getsda(void *data)
{
	struct cx18 *cx = ((struct cx18_i2c_algo_callback_data *)data)->cx;
	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;

	return cx18_read_reg(cx, addr) & GETSDL_BIT;
}

/* template for i2c-bit-algo */
static struct i2c_adapter cx18_i2c_adap_template = {
	.name = "cx18 i2c driver",
	.algo = NULL,                   /* set by i2c-algo-bit */
	.algo_data = NULL,              /* filled from template */
	.owner = THIS_MODULE,
};

#define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
#define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */

static struct i2c_algo_bit_data cx18_i2c_algo_template = {
	.setsda		= cx18_setsda,
	.setscl		= cx18_setscl,
	.getsda		= cx18_getsda,
	.getscl		= cx18_getscl,
	.udelay		= CX18_SCL_PERIOD/2,       /* 1/2 clock period in usec*/
	.timeout	= CX18_ALGO_BIT_TIMEOUT*HZ /* jiffies */
};

/* init + register i2c algo-bit adapter */
int init_cx18_i2c(struct cx18 *cx)
{
	int i, err;
	CX18_DEBUG_I2C("i2c init\n");

	for (i = 0; i < 2; i++) {
		/* Setup algorithm for adapter */
		memcpy(&cx->i2c_algo[i], &cx18_i2c_algo_template,
			sizeof(struct i2c_algo_bit_data));
		cx->i2c_algo_cb_data[i].cx = cx;
		cx->i2c_algo_cb_data[i].bus_index = i;
		cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];

		/* Setup adapter */
		memcpy(&cx->i2c_adap[i], &cx18_i2c_adap_template,
			sizeof(struct i2c_adapter));
		cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
		sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
				" #%d-%d", cx->instance, i);
		i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
		cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
	}

	if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
		/* Reset/Unreset I2C hardware block */
		/* Clock select 220MHz */
		cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
					  0x00000000, 0x10001000);
		/* Clock Enable */
		cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
					  0x00001000, 0x10001000);
	}
	/* courtesy of Steven Toth <stoth@hauppauge.com> */
	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
	mdelay(10);
	cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
	mdelay(10);
	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
	mdelay(10);

	/* Set to edge-triggered intrs. */
	cx18_write_reg(cx, 0x00c00000, 0xc730c8);
	/* Clear any stale intrs */
	cx18_write_reg_expect(cx, HW2_I2C1_INT|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
		       ~(HW2_I2C1_INT|HW2_I2C2_INT), HW2_I2C1_INT|HW2_I2C2_INT);

	/* Hw I2C1 Clock Freq ~100kHz */
	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
	cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
	cx18_setsda(&cx->i2c_algo_cb_data[0], 1);

	/* Hw I2C2 Clock Freq ~100kHz */
	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
	cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
	cx18_setsda(&cx->i2c_algo_cb_data[1], 1);

	cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
		     core, reset, (u32) CX18_GPIO_RESET_I2C);

	err = i2c_bit_add_bus(&cx->i2c_adap[0]);
	if (err)
		goto err;
	err = i2c_bit_add_bus(&cx->i2c_adap[1]);
	if (err)
		goto err_del_bus_0;
	return 0;

 err_del_bus_0:
	i2c_del_adapter(&cx->i2c_adap[0]);
 err:
	return err;
}

void exit_cx18_i2c(struct cx18 *cx)
{
	int i;
	CX18_DEBUG_I2C("i2c exit\n");
	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) | 4,
							CX18_REG_I2C_1_WR);
	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) | 4,
							CX18_REG_I2C_2_WR);

	for (i = 0; i < 2; i++) {
		i2c_del_adapter(&cx->i2c_adap[i]);
	}
}

/*
   Hauppauge HVR1600 should have:
   32 cx24227
   98 unknown
   a0 eeprom
   c2 tuner
   e? zilog ir
   */
Commit	Line	Data
1c1e45d1 HV	1	/*
	2	* cx18 I2C functions
	3	*
	4	* Derived from ivtv-i2c.c
	5	*
	6	* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
1ed9dcc8	7	* Copyright (C) 2008 Andy Walls <awalls@radix.net>
1c1e45d1 HV	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU General Public License
	20	* along with this program; if not, write to the Free Software
	21	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
	22	* 02111-1307 USA
	23	*/
	24
	25	#include "cx18-driver.h"
b1526421	26	#include "cx18-io.h"
1c1e45d1 HV	27	#include "cx18-cards.h"
1c1e45d1 HV	28	#include "cx18-gpio.h"
50510993	29	#include "cx18-i2c.h"
ced07371	30	#include "cx18-irq.h"
1c1e45d1	31
1c1e45d1 HV	32	#define CX18_REG_I2C_1_WR 0xf15000
	33	#define CX18_REG_I2C_1_RD 0xf15008
	34	#define CX18_REG_I2C_2_WR 0xf25100
	35	#define CX18_REG_I2C_2_RD 0xf25108
	36
	37	#define SETSCL_BIT 0x0001
	38	#define SETSDL_BIT 0x0002
	39	#define GETSCL_BIT 0x0004
	40	#define GETSDL_BIT 0x0008
	41
1c1e45d1 HV	42	#define CX18_CS5345_I2C_ADDR 0x4c
1c1e45d1 HV	43
1c1e45d1 HV	44	/* This array should match the CX18_HW_ defines */
1c1e45d1 HV	45	static const u8 hw_addrs[] = {
ff2a2001 AW	46	0, /* CX18_HW_TUNER */
	47	0, /* CX18_HW_TVEEPROM */
	48	CX18_CS5345_I2C_ADDR, /* CX18_HW_CS5345 */
	49	0, /* CX18_HW_DVB */
	50	0, /* CX18_HW_418_AV */
eefe1010 AW	51	0, /* CX18_HW_GPIO_MUX */
eefe1010 AW	52	0, /* CX18_HW_GPIO_RESET_CTRL */
1c1e45d1 HV	53	};
	54
	55	/* This array should match the CX18_HW_ defines */
	56	/* This might well become a card-specific array */
	57	static const u8 hw_bus[] = {
ff2a2001 AW	58	1, /* CX18_HW_TUNER */
	59	0, /* CX18_HW_TVEEPROM */
	60	0, /* CX18_HW_CS5345 */
	61	0, /* CX18_HW_DVB */
	62	0, /* CX18_HW_418_AV */
eefe1010 AW	63	0, /* CX18_HW_GPIO_MUX */
eefe1010 AW	64	0, /* CX18_HW_GPIO_RESET_CTRL */
ff2a2001 AW	65	};
	66
	67	/* This array should match the CX18_HW_ defines */
	68	static const char * const hw_modules[] = {
	69	"tuner", /* CX18_HW_TUNER */
	70	NULL, /* CX18_HW_TVEEPROM */
	71	"cs5345", /* CX18_HW_CS5345 */
	72	NULL, /* CX18_HW_DVB */
	73	NULL, /* CX18_HW_418_AV */
eefe1010 AW	74	NULL, /* CX18_HW_GPIO_MUX */
eefe1010 AW	75	NULL, /* CX18_HW_GPIO_RESET_CTRL */
1c1e45d1 HV	76	};
	77
	78	/* This array should match the CX18_HW_ defines */
af294867	79	static const char * const hw_devicenames[] = {
1c1e45d1 HV	80	"tuner",
	81	"tveeprom",
	82	"cs5345",
ff2a2001 AW	83	"cx23418_DTV",
ff2a2001 AW	84	"cx23418_AV",
eefe1010 AW	85	"gpio_mux",
eefe1010 AW	86	"gpio_reset_ctrl",
1c1e45d1 HV	87	};
	88
	89	int cx18_i2c_register(struct cx18 *cx, unsigned idx)
	90	{
ff2a2001 AW	91	struct v4l2_subdev *sd;
	92	int bus = hw_bus[idx];
	93	struct i2c_adapter *adap = &cx->i2c_adap[bus];
	94	const char *mod = hw_modules[idx];
	95	const char *type = hw_devicenames[idx];
	96	u32 hw = 1 << idx;
	97
	98	if (idx >= ARRAY_SIZE(hw_addrs))
1c1e45d1	99	return -1;
1c1e45d1	100
ff2a2001 AW	101	if (hw == CX18_HW_TUNER) {
ff2a2001 AW	102	/* special tuner group handling */
e6574f2f HV	103	sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
e6574f2f HV	104	adap, mod, type, cx->card_i2c->radio);
ff2a2001 AW	105	if (sd != NULL)
ff2a2001 AW	106	sd->grp_id = hw;
e6574f2f HV	107	sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
e6574f2f HV	108	adap, mod, type, cx->card_i2c->demod);
ff2a2001 AW	109	if (sd != NULL)
ff2a2001 AW	110	sd->grp_id = hw;
e6574f2f HV	111	sd = v4l2_i2c_new_probed_subdev(&cx->v4l2_dev,
e6574f2f HV	112	adap, mod, type, cx->card_i2c->tv);
ff2a2001 AW	113	if (sd != NULL)
	114	sd->grp_id = hw;
	115	return sd != NULL ? 0 : -1;
1c1e45d1 HV	116	}
1c1e45d1 HV	117
ff2a2001 AW	118	/* Is it not an I2C device or one we do not wish to register? */
	119	if (!hw_addrs[idx])
	120	return -1;
1c1e45d1	121
ff2a2001	122	/* It's an I2C device other than an analog tuner */
e6574f2f	123	sd = v4l2_i2c_new_subdev(&cx->v4l2_dev, adap, mod, type, hw_addrs[idx]);
ff2a2001 AW	124	if (sd != NULL)
	125	sd->grp_id = hw;
	126	return sd != NULL ? 0 : -1;
1c1e45d1 HV	127	}
1c1e45d1 HV	128
ff2a2001 AW	129	/* Find the first member of the subdev group id in hw */
ff2a2001 AW	130	struct v4l2_subdev cx18_find_hw(struct cx18 cx, u32 hw)
1c1e45d1	131	{
ff2a2001 AW	132	struct v4l2_subdev *result = NULL;
ff2a2001 AW	133	struct v4l2_subdev *sd;
1c1e45d1	134
ff2a2001 AW	135	spin_lock(&cx->v4l2_dev.lock);
	136	v4l2_device_for_each_subdev(sd, &cx->v4l2_dev) {
	137	if (sd->grp_id == hw) {
	138	result = sd;
1c1e45d1 HV	139	break;
	140	}
	141	}
ff2a2001 AW	142	spin_unlock(&cx->v4l2_dev.lock);
ff2a2001 AW	143	return result;
1c1e45d1 HV	144	}
	145
	146	static void cx18_setscl(void *data, int state)
	147	{
	148	struct cx18 cx = ((struct cx18_i2c_algo_callback_data )data)->cx;
	149	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	150	u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
b1526421	151	u32 r = cx18_read_reg(cx, addr);
1c1e45d1 HV	152
1c1e45d1 HV	153	if (state)
3f75c616	154	cx18_write_reg(cx, r \| SETSCL_BIT, addr);
1c1e45d1	155	else
3f75c616	156	cx18_write_reg(cx, r & ~SETSCL_BIT, addr);
1c1e45d1 HV	157	}
	158
	159	static void cx18_setsda(void *data, int state)
	160	{
	161	struct cx18 cx = ((struct cx18_i2c_algo_callback_data )data)->cx;
	162	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	163	u32 addr = bus_index ? CX18_REG_I2C_2_WR : CX18_REG_I2C_1_WR;
b1526421	164	u32 r = cx18_read_reg(cx, addr);
1c1e45d1 HV	165
1c1e45d1 HV	166	if (state)
3f75c616	167	cx18_write_reg(cx, r \| SETSDL_BIT, addr);
1c1e45d1	168	else
3f75c616	169	cx18_write_reg(cx, r & ~SETSDL_BIT, addr);
1c1e45d1 HV	170	}
	171
	172	static int cx18_getscl(void *data)
	173	{
	174	struct cx18 cx = ((struct cx18_i2c_algo_callback_data )data)->cx;
	175	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	176	u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
	177
b1526421	178	return cx18_read_reg(cx, addr) & GETSCL_BIT;
1c1e45d1 HV	179	}
	180
	181	static int cx18_getsda(void *data)
	182	{
	183	struct cx18 cx = ((struct cx18_i2c_algo_callback_data )data)->cx;
	184	int bus_index = ((struct cx18_i2c_algo_callback_data *)data)->bus_index;
	185	u32 addr = bus_index ? CX18_REG_I2C_2_RD : CX18_REG_I2C_1_RD;
	186
b1526421	187	return cx18_read_reg(cx, addr) & GETSDL_BIT;
1c1e45d1 HV	188	}
	189
	190	/* template for i2c-bit-algo */
	191	static struct i2c_adapter cx18_i2c_adap_template = {
	192	.name = "cx18 i2c driver",
1c1e45d1 HV	193	.algo = NULL, /* set by i2c-algo-bit */
1c1e45d1 HV	194	.algo_data = NULL, /* filled from template */
1c1e45d1 HV	195	.owner = THIS_MODULE,
	196	};
	197
	198	#define CX18_SCL_PERIOD (10) /* usecs. 10 usec is period for a 100 KHz clock */
	199	#define CX18_ALGO_BIT_TIMEOUT (2) /* seconds */
	200
	201	static struct i2c_algo_bit_data cx18_i2c_algo_template = {
	202	.setsda = cx18_setsda,
	203	.setscl = cx18_setscl,
	204	.getsda = cx18_getsda,
	205	.getscl = cx18_getscl,
	206	.udelay = CX18_SCL_PERIOD/2, /* 1/2 clock period in usec*/
	207	.timeout = CX18_ALGO_BIT_TIMEOUTHZ / jiffies */
	208	};
	209
1c1e45d1 HV	210	/* init + register i2c algo-bit adapter */
	211	int init_cx18_i2c(struct cx18 *cx)
	212	{
272aa396	213	int i, err;
1c1e45d1 HV	214	CX18_DEBUG_I2C("i2c init\n");
	215
	216	for (i = 0; i < 2; i++) {
ff2a2001	217	/* Setup algorithm for adapter */
1c1e45d1 HV	218	memcpy(&cx->i2c_algo[i], &cx18_i2c_algo_template,
	219	sizeof(struct i2c_algo_bit_data));
	220	cx->i2c_algo_cb_data[i].cx = cx;
	221	cx->i2c_algo_cb_data[i].bus_index = i;
	222	cx->i2c_algo[i].data = &cx->i2c_algo_cb_data[i];
1c1e45d1	223
ff2a2001 AW	224	/* Setup adapter */
	225	memcpy(&cx->i2c_adap[i], &cx18_i2c_adap_template,
	226	sizeof(struct i2c_adapter));
	227	cx->i2c_adap[i].algo_data = &cx->i2c_algo[i];
1c1e45d1	228	sprintf(cx->i2c_adap[i].name + strlen(cx->i2c_adap[i].name),
5811cf99	229	" #%d-%d", cx->instance, i);
ff2a2001	230	i2c_set_adapdata(&cx->i2c_adap[i], &cx->v4l2_dev);
3d05913d	231	cx->i2c_adap[i].dev.parent = &cx->pci_dev->dev;
1c1e45d1 HV	232	}
1c1e45d1 HV	233
b1526421	234	if (cx18_read_reg(cx, CX18_REG_I2C_2_WR) != 0x0003c02f) {
1c1e45d1	235	/* Reset/Unreset I2C hardware block */
b1526421	236	/* Clock select 220MHz */
ced07371 AW	237	cx18_write_reg_expect(cx, 0x10000000, 0xc71004,
ced07371 AW	238	0x00000000, 0x10001000);
b1526421	239	/* Clock Enable */
ced07371 AW	240	cx18_write_reg_expect(cx, 0x10001000, 0xc71024,
ced07371 AW	241	0x00001000, 0x10001000);
1c1e45d1 HV	242	}
1c1e45d1 HV	243	/* courtesy of Steven Toth <stoth@hauppauge.com> */
ced07371	244	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
1c1e45d1	245	mdelay(10);
ced07371	246	cx18_write_reg_expect(cx, 0x00c000c0, 0xc7001c, 0x000000c0, 0x00c000c0);
1c1e45d1	247	mdelay(10);
ced07371	248	cx18_write_reg_expect(cx, 0x00c00000, 0xc7001c, 0x00000000, 0x00c000c0);
53ad02ef	249	mdelay(10);
1c1e45d1	250
b1526421	251	/* Set to edge-triggered intrs. */
ced07371	252	cx18_write_reg(cx, 0x00c00000, 0xc730c8);
b1526421	253	/* Clear any stale intrs */
ced07371 AW	254	cx18_write_reg_expect(cx, HW2_I2C1_INT\|HW2_I2C2_INT, HW2_INT_CLR_STATUS,
ced07371 AW	255	~(HW2_I2C1_INT\|HW2_I2C2_INT), HW2_I2C1_INT\|HW2_I2C2_INT);
1c1e45d1 HV	256
1c1e45d1 HV	257	/* Hw I2C1 Clock Freq ~100kHz */
3f75c616	258	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_1_WR);
1c1e45d1 HV	259	cx18_setscl(&cx->i2c_algo_cb_data[0], 1);
	260	cx18_setsda(&cx->i2c_algo_cb_data[0], 1);
	261
	262	/* Hw I2C2 Clock Freq ~100kHz */
3f75c616	263	cx18_write_reg(cx, 0x00021c0f & ~4, CX18_REG_I2C_2_WR);
1c1e45d1 HV	264	cx18_setscl(&cx->i2c_algo_cb_data[1], 1);
	265	cx18_setsda(&cx->i2c_algo_cb_data[1], 1);
	266
eefe1010 AW	267	cx18_call_hw(cx, CX18_HW_GPIO_RESET_CTRL,
eefe1010 AW	268	core, reset, (u32) CX18_GPIO_RESET_I2C);
1f09e8a2	269
272aa396 JD	270	err = i2c_bit_add_bus(&cx->i2c_adap[0]);
	271	if (err)
	272	goto err;
	273	err = i2c_bit_add_bus(&cx->i2c_adap[1]);
	274	if (err)
	275	goto err_del_bus_0;
	276	return 0;
	277
	278	err_del_bus_0:
	279	i2c_del_adapter(&cx->i2c_adap[0]);
	280	err:
	281	return err;
1c1e45d1 HV	282	}
	283
	284	void exit_cx18_i2c(struct cx18 *cx)
	285	{
	286	int i;
	287	CX18_DEBUG_I2C("i2c exit\n");
b1526421 AW	288	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_1_WR) \| 4,
	289	CX18_REG_I2C_1_WR);
	290	cx18_write_reg(cx, cx18_read_reg(cx, CX18_REG_I2C_2_WR) \| 4,
	291	CX18_REG_I2C_2_WR);
1c1e45d1 HV	292
	293	for (i = 0; i < 2; i++) {
	294	i2c_del_adapter(&cx->i2c_adap[i]);
	295	}
	296	}
	297
	298	/*
	299	Hauppauge HVR1600 should have:
	300	32 cx24227
	301	98 unknown
	302	a0 eeprom
	303	c2 tuner
	304	e? zilog ir
	305	*/