[mirror_ubuntu-bionic-kernel.git] / drivers / media / video / cx18 / cx18-io.h

/*
 *  cx18 driver PCI memory mapped IO access routines
 *
 *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
 *  Copyright (C) 2008  Andy Walls <awalls@radix.net>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
 *  02111-1307  USA
 */

#ifndef CX18_IO_H
#define CX18_IO_H

#include "cx18-driver.h"

static inline void cx18_io_delay(struct cx18 *cx)
{
	if (cx->options.mmio_ndelay)
		ndelay(cx->options.mmio_ndelay);
}

/*
 * Readback and retry of MMIO access for reliability:
 * The concept was suggested by Steve Toth <stoth@linuxtv.org>.
 * The implmentation is the fault of Andy Walls <awalls@radix.net>.
 */

/* Statistics gathering */
static inline
void cx18_log_write_retries(struct cx18 *cx, int i, const void __iomem *addr)
{
	if (i > CX18_MAX_MMIO_RETRIES)
		i = CX18_MAX_MMIO_RETRIES;
	atomic_inc(&cx->mmio_stats.retried_write[i]);
	return;
}

static inline
void cx18_log_read_retries(struct cx18 *cx, int i, const void __iomem *addr)
{
	if (i > CX18_MAX_MMIO_RETRIES)
		i = CX18_MAX_MMIO_RETRIES;
	atomic_inc(&cx->mmio_stats.retried_read[i]);
	return;
}

void cx18_log_statistics(struct cx18 *cx);

/* Non byteswapping memory mapped IO */
static inline
void cx18_raw_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr)
{
	__raw_writel(val, addr);
	cx18_io_delay(cx);
}

void cx18_raw_writel_retry(struct cx18 *cx, u32 val, void __iomem *addr);

static inline void cx18_raw_writel(struct cx18 *cx, u32 val, void __iomem *addr)
{
	if (cx18_retry_mmio)
		cx18_raw_writel_retry(cx, val, addr);
	else
		cx18_raw_writel_noretry(cx, val, addr);
}


static inline
u32 cx18_raw_readl_noretry(struct cx18 *cx, const void __iomem *addr)
{
	u32 ret = __raw_readl(addr);
	cx18_io_delay(cx);
	return ret;
}

u32 cx18_raw_readl_retry(struct cx18 *cx, const void __iomem *addr);

static inline u32 cx18_raw_readl(struct cx18 *cx, const void __iomem *addr)
{
	if (cx18_retry_mmio)
		return cx18_raw_readl_retry(cx, addr);

	return cx18_raw_readl_noretry(cx, addr);
}


static inline
u16 cx18_raw_readw_noretry(struct cx18 *cx, const void __iomem *addr)
{
	u16 ret = __raw_readw(addr);
	cx18_io_delay(cx);
	return ret;
}

u16 cx18_raw_readw_retry(struct cx18 *cx, const void __iomem *addr);

static inline u16 cx18_raw_readw(struct cx18 *cx, const void __iomem *addr)
{
	if (cx18_retry_mmio)
		return cx18_raw_readw_retry(cx, addr);

	return cx18_raw_readw_noretry(cx, addr);
}


/* Normal memory mapped IO */
static inline
void cx18_writel_noretry(struct cx18 *cx, u32 val, void __iomem *addr)
{
	writel(val, addr);
	cx18_io_delay(cx);
}

void cx18_writel_retry(struct cx18 *cx, u32 val, void __iomem *addr);

static inline void cx18_writel(struct cx18 *cx, u32 val, void __iomem *addr)
{
	if (cx18_retry_mmio)
		cx18_writel_retry(cx, val, addr);
	else
		cx18_writel_noretry(cx, val, addr);
}


static inline
void cx18_writew_noretry(struct cx18 *cx, u16 val, void __iomem *addr)
{
	writew(val, addr);
	cx18_io_delay(cx);
}

void cx18_writew_retry(struct cx18 *cx, u16 val, void __iomem *addr);

static inline void cx18_writew(struct cx18 *cx, u16 val, void __iomem *addr)
{
	if (cx18_retry_mmio)
		cx18_writew_retry(cx, val, addr);
	else
		cx18_writew_noretry(cx, val, addr);
}


static inline
void cx18_writeb_noretry(struct cx18 *cx, u8 val, void __iomem *addr)
{
	writeb(val, addr);
	cx18_io_delay(cx);
}

void cx18_writeb_retry(struct cx18 *cx, u8 val, void __iomem *addr);

static inline void cx18_writeb(struct cx18 *cx, u8 val, void __iomem *addr)
{
	if (cx18_retry_mmio)
		cx18_writeb_retry(cx, val, addr);
	else
		cx18_writeb_noretry(cx, val, addr);
}


static inline u32 cx18_readl_noretry(struct cx18 *cx, const void __iomem *addr)
{
	u32 ret = readl(addr);
	cx18_io_delay(cx);
	return ret;
}

u32 cx18_readl_retry(struct cx18 *cx, const void __iomem *addr);

static inline u32 cx18_readl(struct cx18 *cx, const void __iomem *addr)
{
	if (cx18_retry_mmio)
		return cx18_readl_retry(cx, addr);

	return cx18_readl_noretry(cx, addr);
}


static inline u16 cx18_readw_noretry(struct cx18 *cx, const void __iomem *addr)
{
	u16 ret = readw(addr);
	cx18_io_delay(cx);
	return ret;
}

u16 cx18_readw_retry(struct cx18 *cx, const void __iomem *addr);

static inline u16 cx18_readw(struct cx18 *cx, const void __iomem *addr)
{
	if (cx18_retry_mmio)
		return cx18_readw_retry(cx, addr);

	return cx18_readw_noretry(cx, addr);
}


static inline u8 cx18_readb_noretry(struct cx18 *cx, const void __iomem *addr)
{
	u8 ret = readb(addr);
	cx18_io_delay(cx);
	return ret;
}

u8 cx18_readb_retry(struct cx18 *cx, const void __iomem *addr);

static inline u8 cx18_readb(struct cx18 *cx, const void __iomem *addr)
{
	if (cx18_retry_mmio)
		return cx18_readb_retry(cx, addr);

	return cx18_readb_noretry(cx, addr);
}


static inline
u32 cx18_write_sync_noretry(struct cx18 *cx, u32 val, void __iomem *addr)
{
	cx18_writel_noretry(cx, val, addr);
	return cx18_readl_noretry(cx, addr);
}

static inline
u32 cx18_write_sync_retry(struct cx18 *cx, u32 val, void __iomem *addr)
{
	cx18_writel_retry(cx, val, addr);
	return cx18_readl_retry(cx, addr);
}

static inline u32 cx18_write_sync(struct cx18 *cx, u32 val, void __iomem *addr)
{
	if (cx18_retry_mmio)
		return cx18_write_sync_retry(cx, val, addr);

	return cx18_write_sync_noretry(cx, val, addr);
}


void cx18_memcpy_fromio(struct cx18 *cx, void *to,
			const void __iomem *from, unsigned int len);
void cx18_memset_io(struct cx18 *cx, void __iomem *addr, int val, size_t count);


/* Access "register" region of CX23418 memory mapped I/O */
static inline void cx18_write_reg_noretry(struct cx18 *cx, u32 val, u32 reg)
{
	cx18_writel_noretry(cx, val, cx->reg_mem + reg);
}

static inline void cx18_write_reg_retry(struct cx18 *cx, u32 val, u32 reg)
{
	cx18_writel_retry(cx, val, cx->reg_mem + reg);
}

static inline void cx18_write_reg(struct cx18 *cx, u32 val, u32 reg)
{
	if (cx18_retry_mmio)
		cx18_write_reg_retry(cx, val, reg);
	else
		cx18_write_reg_noretry(cx, val, reg);
}


static inline u32 cx18_read_reg_noretry(struct cx18 *cx, u32 reg)
{
	return cx18_readl_noretry(cx, cx->reg_mem + reg);
}

static inline u32 cx18_read_reg_retry(struct cx18 *cx, u32 reg)
{
	return cx18_readl_retry(cx, cx->reg_mem + reg);
}

static inline u32 cx18_read_reg(struct cx18 *cx, u32 reg)
{
	if (cx18_retry_mmio)
		return cx18_read_reg_retry(cx, reg);

	return cx18_read_reg_noretry(cx, reg);
}


static inline u32 cx18_write_reg_sync_noretry(struct cx18 *cx, u32 val, u32 reg)
{
	return cx18_write_sync_noretry(cx, val, cx->reg_mem + reg);
}

static inline u32 cx18_write_reg_sync_retry(struct cx18 *cx, u32 val, u32 reg)
{
	return cx18_write_sync_retry(cx, val, cx->reg_mem + reg);
}

static inline u32 cx18_write_reg_sync(struct cx18 *cx, u32 val, u32 reg)
{
	if (cx18_retry_mmio)
		return cx18_write_reg_sync_retry(cx, val, reg);

	return cx18_write_reg_sync_noretry(cx, val, reg);
}


/* Access "encoder memory" region of CX23418 memory mapped I/O */
static inline void cx18_write_enc_noretry(struct cx18 *cx, u32 val, u32 addr)
{
	cx18_writel_noretry(cx, val, cx->enc_mem + addr);
}

static inline void cx18_write_enc_retry(struct cx18 *cx, u32 val, u32 addr)
{
	cx18_writel_retry(cx, val, cx->enc_mem + addr);
}

static inline void cx18_write_enc(struct cx18 *cx, u32 val, u32 addr)
{
	if (cx18_retry_mmio)
		cx18_write_enc_retry(cx, val, addr);
	else
		cx18_write_enc_noretry(cx, val, addr);
}


static inline u32 cx18_read_enc_noretry(struct cx18 *cx, u32 addr)
{
	return cx18_readl_noretry(cx, cx->enc_mem + addr);
}

static inline u32 cx18_read_enc_retry(struct cx18 *cx, u32 addr)
{
	return cx18_readl_retry(cx, cx->enc_mem + addr);
}

static inline u32 cx18_read_enc(struct cx18 *cx, u32 addr)
{
	if (cx18_retry_mmio)
		return cx18_read_enc_retry(cx, addr);

	return cx18_read_enc_noretry(cx, addr);
}

static inline
u32 cx18_write_enc_sync_noretry(struct cx18 *cx, u32 val, u32 addr)
{
	return cx18_write_sync_noretry(cx, val, cx->enc_mem + addr);
}

static inline
u32 cx18_write_enc_sync_retry(struct cx18 *cx, u32 val, u32 addr)
{
	return cx18_write_sync_retry(cx, val, cx->enc_mem + addr);
}

static inline
u32 cx18_write_enc_sync(struct cx18 *cx, u32 val, u32 addr)
{
	if (cx18_retry_mmio)
		return cx18_write_enc_sync_retry(cx, val, addr);

	return cx18_write_enc_sync_noretry(cx, val, addr);
}

void cx18_sw1_irq_enable(struct cx18 *cx, u32 val);
void cx18_sw1_irq_disable(struct cx18 *cx, u32 val);
void cx18_sw2_irq_enable(struct cx18 *cx, u32 val);
void cx18_sw2_irq_disable(struct cx18 *cx, u32 val);
void cx18_setup_page(struct cx18 *cx, u32 addr);

#endif /* CX18_IO_H */
Commit	Line	Data
b1526421 AW	1	/*
	2	* cx18 driver PCI memory mapped IO access routines
	3	*
	4	* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
	5	* Copyright (C) 2008 Andy Walls <awalls@radix.net>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License as published by
	9	* the Free Software Foundation; either version 2 of the License, or
	10	* (at your option) any later version.
	11	*
	12	* This program is distributed in the hope that it will be useful,
	13	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	14	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	15	* GNU General Public License for more details.
	16	*
	17	* You should have received a copy of the GNU General Public License
	18	* along with this program; if not, write to the Free Software
	19	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
	20	* 02111-1307 USA
	21	*/
	22
	23	#ifndef CX18_IO_H
	24	#define CX18_IO_H
	25
	26	#include "cx18-driver.h"
	27
c641d09c AW	28	static inline void cx18_io_delay(struct cx18 *cx)
	29	{
	30	if (cx->options.mmio_ndelay)
	31	ndelay(cx->options.mmio_ndelay);
	32	}
b1526421	33
d267d851 AW	34	/*
	35	* Readback and retry of MMIO access for reliability:
	36	* The concept was suggested by Steve Toth <stoth@linuxtv.org>.
	37	* The implmentation is the fault of Andy Walls <awalls@radix.net>.
	38	*/
	39
	40	/* Statistics gathering */
	41	static inline
06869713	42	void cx18_log_write_retries(struct cx18 cx, int i, const void __iomem addr)
d267d851 AW	43	{
	44	if (i > CX18_MAX_MMIO_RETRIES)
	45	i = CX18_MAX_MMIO_RETRIES;
	46	atomic_inc(&cx->mmio_stats.retried_write[i]);
	47	return;
	48	}
	49
	50	static inline
06869713	51	void cx18_log_read_retries(struct cx18 cx, int i, const void __iomem addr)
d267d851 AW	52	{
	53	if (i > CX18_MAX_MMIO_RETRIES)
	54	i = CX18_MAX_MMIO_RETRIES;
	55	atomic_inc(&cx->mmio_stats.retried_read[i]);
	56	return;
	57	}
	58
	59	void cx18_log_statistics(struct cx18 *cx);
	60
c641d09c	61	/* Non byteswapping memory mapped IO */
d267d851 AW	62	static inline
d267d851 AW	63	void cx18_raw_writel_noretry(struct cx18 cx, u32 val, void __iomem addr)
c641d09c AW	64	{
	65	__raw_writel(val, addr);
	66	cx18_io_delay(cx);
	67	}
b1526421	68
d267d851 AW	69	void cx18_raw_writel_retry(struct cx18 cx, u32 val, void __iomem addr);
	70
	71	static inline void cx18_raw_writel(struct cx18 cx, u32 val, void __iomem addr)
	72	{
	73	if (cx18_retry_mmio)
	74	cx18_raw_writel_retry(cx, val, addr);
	75	else
	76	cx18_raw_writel_noretry(cx, val, addr);
	77	}
	78
	79
	80	static inline
	81	u32 cx18_raw_readl_noretry(struct cx18 cx, const void __iomem addr)
c641d09c AW	82	{
	83	u32 ret = __raw_readl(addr);
	84	cx18_io_delay(cx);
	85	return ret;
	86	}
b1526421	87
d267d851 AW	88	u32 cx18_raw_readl_retry(struct cx18 cx, const void __iomem addr);
	89
	90	static inline u32 cx18_raw_readl(struct cx18 cx, const void __iomem addr)
	91	{
	92	if (cx18_retry_mmio)
	93	return cx18_raw_readl_retry(cx, addr);
	94
	95	return cx18_raw_readl_noretry(cx, addr);
	96	}
	97
	98
	99	static inline
	100	u16 cx18_raw_readw_noretry(struct cx18 cx, const void __iomem addr)
c641d09c AW	101	{
	102	u16 ret = __raw_readw(addr);
	103	cx18_io_delay(cx);
	104	return ret;
	105	}
b1526421	106
d267d851 AW	107	u16 cx18_raw_readw_retry(struct cx18 cx, const void __iomem addr);
	108
	109	static inline u16 cx18_raw_readw(struct cx18 cx, const void __iomem addr)
	110	{
	111	if (cx18_retry_mmio)
	112	return cx18_raw_readw_retry(cx, addr);
	113
	114	return cx18_raw_readw_noretry(cx, addr);
	115	}
	116
	117
c641d09c	118	/* Normal memory mapped IO */
d267d851 AW	119	static inline
d267d851 AW	120	void cx18_writel_noretry(struct cx18 cx, u32 val, void __iomem addr)
c641d09c AW	121	{
	122	writel(val, addr);
	123	cx18_io_delay(cx);
	124	}
b1526421	125
d267d851 AW	126	void cx18_writel_retry(struct cx18 cx, u32 val, void __iomem addr);
	127
	128	static inline void cx18_writel(struct cx18 cx, u32 val, void __iomem addr)
	129	{
	130	if (cx18_retry_mmio)
	131	cx18_writel_retry(cx, val, addr);
	132	else
	133	cx18_writel_noretry(cx, val, addr);
	134	}
	135
	136
	137	static inline
	138	void cx18_writew_noretry(struct cx18 cx, u16 val, void __iomem addr)
c641d09c AW	139	{
	140	writew(val, addr);
	141	cx18_io_delay(cx);
	142	}
	143
d267d851 AW	144	void cx18_writew_retry(struct cx18 cx, u16 val, void __iomem addr);
	145
	146	static inline void cx18_writew(struct cx18 cx, u16 val, void __iomem addr)
	147	{
	148	if (cx18_retry_mmio)
	149	cx18_writew_retry(cx, val, addr);
	150	else
	151	cx18_writew_noretry(cx, val, addr);
	152	}
	153
	154
	155	static inline
	156	void cx18_writeb_noretry(struct cx18 cx, u8 val, void __iomem addr)
c641d09c AW	157	{
	158	writeb(val, addr);
	159	cx18_io_delay(cx);
	160	}
	161
d267d851 AW	162	void cx18_writeb_retry(struct cx18 cx, u8 val, void __iomem addr);
	163
	164	static inline void cx18_writeb(struct cx18 cx, u8 val, void __iomem addr)
	165	{
	166	if (cx18_retry_mmio)
	167	cx18_writeb_retry(cx, val, addr);
	168	else
	169	cx18_writeb_noretry(cx, val, addr);
	170	}
	171
	172
	173	static inline u32 cx18_readl_noretry(struct cx18 cx, const void __iomem addr)
c641d09c AW	174	{
	175	u32 ret = readl(addr);
	176	cx18_io_delay(cx);
	177	return ret;
	178	}
	179
d267d851 AW	180	u32 cx18_readl_retry(struct cx18 cx, const void __iomem addr);
	181
	182	static inline u32 cx18_readl(struct cx18 cx, const void __iomem addr)
	183	{
	184	if (cx18_retry_mmio)
	185	return cx18_readl_retry(cx, addr);
	186
	187	return cx18_readl_noretry(cx, addr);
	188	}
	189
	190
	191	static inline u16 cx18_readw_noretry(struct cx18 cx, const void __iomem addr)
	192	{
	193	u16 ret = readw(addr);
	194	cx18_io_delay(cx);
	195	return ret;
	196	}
	197
	198	u16 cx18_readw_retry(struct cx18 cx, const void __iomem addr);
	199
	200	static inline u16 cx18_readw(struct cx18 cx, const void __iomem addr)
	201	{
	202	if (cx18_retry_mmio)
	203	return cx18_readw_retry(cx, addr);
	204
	205	return cx18_readw_noretry(cx, addr);
	206	}
	207
	208
	209	static inline u8 cx18_readb_noretry(struct cx18 cx, const void __iomem addr)
c641d09c AW	210	{
	211	u8 ret = readb(addr);
	212	cx18_io_delay(cx);
	213	return ret;
	214	}
	215
d267d851 AW	216	u8 cx18_readb_retry(struct cx18 cx, const void __iomem addr);
	217
	218	static inline u8 cx18_readb(struct cx18 cx, const void __iomem addr)
	219	{
	220	if (cx18_retry_mmio)
	221	return cx18_readb_retry(cx, addr);
	222
	223	return cx18_readb_noretry(cx, addr);
	224	}
	225
	226
	227	static inline
	228	u32 cx18_write_sync_noretry(struct cx18 cx, u32 val, void __iomem addr)
	229	{
	230	cx18_writel_noretry(cx, val, addr);
	231	return cx18_readl_noretry(cx, addr);
	232	}
	233
	234	static inline
	235	u32 cx18_write_sync_retry(struct cx18 cx, u32 val, void __iomem addr)
	236	{
	237	cx18_writel_retry(cx, val, addr);
	238	return cx18_readl_retry(cx, addr);
	239	}
	240
c641d09c AW	241	static inline u32 cx18_write_sync(struct cx18 cx, u32 val, void __iomem addr)
c641d09c AW	242	{
d267d851 AW	243	if (cx18_retry_mmio)
	244	return cx18_write_sync_retry(cx, val, addr);
	245
	246	return cx18_write_sync_noretry(cx, val, addr);
c641d09c	247	}
b1526421	248
d267d851	249
b1526421 AW	250	void cx18_memcpy_fromio(struct cx18 cx, void to,
	251	const void __iomem *from, unsigned int len);
	252	void cx18_memset_io(struct cx18 cx, void __iomem addr, int val, size_t count);
	253
d267d851	254
c641d09c	255	/* Access "register" region of CX23418 memory mapped I/O */
d267d851 AW	256	static inline void cx18_write_reg_noretry(struct cx18 *cx, u32 val, u32 reg)
	257	{
	258	cx18_writel_noretry(cx, val, cx->reg_mem + reg);
	259	}
	260
	261	static inline void cx18_write_reg_retry(struct cx18 *cx, u32 val, u32 reg)
	262	{
	263	cx18_writel_retry(cx, val, cx->reg_mem + reg);
	264	}
	265
c641d09c AW	266	static inline void cx18_write_reg(struct cx18 *cx, u32 val, u32 reg)
c641d09c AW	267	{
d267d851 AW	268	if (cx18_retry_mmio)
	269	cx18_write_reg_retry(cx, val, reg);
	270	else
	271	cx18_write_reg_noretry(cx, val, reg);
	272	}
	273
	274
	275	static inline u32 cx18_read_reg_noretry(struct cx18 *cx, u32 reg)
	276	{
	277	return cx18_readl_noretry(cx, cx->reg_mem + reg);
	278	}
	279
	280	static inline u32 cx18_read_reg_retry(struct cx18 *cx, u32 reg)
	281	{
	282	return cx18_readl_retry(cx, cx->reg_mem + reg);
c641d09c AW	283	}
	284
	285	static inline u32 cx18_read_reg(struct cx18 *cx, u32 reg)
	286	{
d267d851 AW	287	if (cx18_retry_mmio)
	288	return cx18_read_reg_retry(cx, reg);
	289
	290	return cx18_read_reg_noretry(cx, reg);
	291	}
	292
	293
	294	static inline u32 cx18_write_reg_sync_noretry(struct cx18 *cx, u32 val, u32 reg)
	295	{
	296	return cx18_write_sync_noretry(cx, val, cx->reg_mem + reg);
	297	}
	298
	299	static inline u32 cx18_write_reg_sync_retry(struct cx18 *cx, u32 val, u32 reg)
	300	{
	301	return cx18_write_sync_retry(cx, val, cx->reg_mem + reg);
c641d09c AW	302	}
	303
	304	static inline u32 cx18_write_reg_sync(struct cx18 *cx, u32 val, u32 reg)
	305	{
d267d851 AW	306	if (cx18_retry_mmio)
	307	return cx18_write_reg_sync_retry(cx, val, reg);
	308
	309	return cx18_write_reg_sync_noretry(cx, val, reg);
c641d09c AW	310	}
c641d09c AW	311
d267d851	312
c641d09c	313	/* Access "encoder memory" region of CX23418 memory mapped I/O */
d267d851 AW	314	static inline void cx18_write_enc_noretry(struct cx18 *cx, u32 val, u32 addr)
	315	{
	316	cx18_writel_noretry(cx, val, cx->enc_mem + addr);
	317	}
	318
	319	static inline void cx18_write_enc_retry(struct cx18 *cx, u32 val, u32 addr)
	320	{
	321	cx18_writel_retry(cx, val, cx->enc_mem + addr);
	322	}
	323
c641d09c AW	324	static inline void cx18_write_enc(struct cx18 *cx, u32 val, u32 addr)
c641d09c AW	325	{
d267d851 AW	326	if (cx18_retry_mmio)
	327	cx18_write_enc_retry(cx, val, addr);
	328	else
	329	cx18_write_enc_noretry(cx, val, addr);
	330	}
	331
	332
	333	static inline u32 cx18_read_enc_noretry(struct cx18 *cx, u32 addr)
	334	{
	335	return cx18_readl_noretry(cx, cx->enc_mem + addr);
	336	}
	337
	338	static inline u32 cx18_read_enc_retry(struct cx18 *cx, u32 addr)
	339	{
	340	return cx18_readl_retry(cx, cx->enc_mem + addr);
c641d09c AW	341	}
	342
	343	static inline u32 cx18_read_enc(struct cx18 *cx, u32 addr)
	344	{
d267d851 AW	345	if (cx18_retry_mmio)
	346	return cx18_read_enc_retry(cx, addr);
	347
	348	return cx18_read_enc_noretry(cx, addr);
	349	}
	350
	351	static inline
	352	u32 cx18_write_enc_sync_noretry(struct cx18 *cx, u32 val, u32 addr)
	353	{
	354	return cx18_write_sync_noretry(cx, val, cx->enc_mem + addr);
c641d09c AW	355	}
c641d09c AW	356
d267d851 AW	357	static inline
d267d851 AW	358	u32 cx18_write_enc_sync_retry(struct cx18 *cx, u32 val, u32 addr)
c641d09c	359	{
d267d851	360	return cx18_write_sync_retry(cx, val, cx->enc_mem + addr);
c641d09c AW	361	}
c641d09c AW	362
d267d851 AW	363	static inline
	364	u32 cx18_write_enc_sync(struct cx18 *cx, u32 val, u32 addr)
	365	{
	366	if (cx18_retry_mmio)
	367	return cx18_write_enc_sync_retry(cx, val, addr);
	368
	369	return cx18_write_enc_sync_noretry(cx, val, addr);
	370	}
c641d09c	371
b1526421 AW	372	void cx18_sw1_irq_enable(struct cx18 *cx, u32 val);
	373	void cx18_sw1_irq_disable(struct cx18 *cx, u32 val);
	374	void cx18_sw2_irq_enable(struct cx18 *cx, u32 val);
	375	void cx18_sw2_irq_disable(struct cx18 *cx, u32 val);
	376	void cx18_setup_page(struct cx18 *cx, u32 addr);
	377
b1526421	378	#endif /* CX18_IO_H */