[mirror_ubuntu-artful-kernel.git] / drivers / media / video / cx18 / cx18-mailbox.c

/*
 *  cx18 mailbox functions
 *
 *  Copyright (C) 2007  Hans Verkuil <hverkuil@xs4all.nl>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
 *  02111-1307  USA
 */

#include <stdarg.h>

#include "cx18-driver.h"
#include "cx18-io.h"
#include "cx18-scb.h"
#include "cx18-irq.h"
#include "cx18-mailbox.h"

#define API_FAST (1 << 2) /* Short timeout */
#define API_SLOW (1 << 3) /* Additional 300ms timeout */

struct cx18_api_info {
	u32 cmd;
	u8 flags;		/* Flags, see above */
	u8 rpu;			/* Processing unit */
	const char *name; 	/* The name of the command */
};

#define API_ENTRY(rpu, x, f) { (x), (f), (rpu), #x }

static const struct cx18_api_info api_info[] = {
	/* MPEG encoder API */
	API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE,		0),
	API_ENTRY(CPU, CX18_EPU_DEBUG, 				0),
	API_ENTRY(CPU, CX18_CREATE_TASK, 			0),
	API_ENTRY(CPU, CX18_DESTROY_TASK, 			0),
	API_ENTRY(CPU, CX18_CPU_CAPTURE_START,                  API_SLOW),
	API_ENTRY(CPU, CX18_CPU_CAPTURE_STOP,                   API_SLOW),
	API_ENTRY(CPU, CX18_CPU_CAPTURE_PAUSE,                  0),
	API_ENTRY(CPU, CX18_CPU_CAPTURE_RESUME,                 0),
	API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE,               0),
	API_ENTRY(CPU, CX18_CPU_SET_STREAM_OUTPUT_TYPE,         0),
	API_ENTRY(CPU, CX18_CPU_SET_VIDEO_IN,                   0),
	API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RATE,                 0),
	API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RESOLUTION,           0),
	API_ENTRY(CPU, CX18_CPU_SET_FILTER_PARAM,               0),
	API_ENTRY(CPU, CX18_CPU_SET_SPATIAL_FILTER_TYPE,        0),
	API_ENTRY(CPU, CX18_CPU_SET_MEDIAN_CORING,              0),
	API_ENTRY(CPU, CX18_CPU_SET_INDEXTABLE,                 0),
	API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PARAMETERS,           0),
	API_ENTRY(CPU, CX18_CPU_SET_VIDEO_MUTE,                 0),
	API_ENTRY(CPU, CX18_CPU_SET_AUDIO_MUTE,                 0),
	API_ENTRY(CPU, CX18_CPU_SET_MISC_PARAMETERS,            0),
	API_ENTRY(CPU, CX18_CPU_SET_RAW_VBI_PARAM,              API_SLOW),
	API_ENTRY(CPU, CX18_CPU_SET_CAPTURE_LINE_NO,            0),
	API_ENTRY(CPU, CX18_CPU_SET_COPYRIGHT,                  0),
	API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PID,                  0),
	API_ENTRY(CPU, CX18_CPU_SET_VIDEO_PID,                  0),
	API_ENTRY(CPU, CX18_CPU_SET_VER_CROP_LINE,              0),
	API_ENTRY(CPU, CX18_CPU_SET_GOP_STRUCTURE,              0),
	API_ENTRY(CPU, CX18_CPU_SET_SCENE_CHANGE_DETECTION,     0),
	API_ENTRY(CPU, CX18_CPU_SET_ASPECT_RATIO,               0),
	API_ENTRY(CPU, CX18_CPU_SET_SKIP_INPUT_FRAME,           0),
	API_ENTRY(CPU, CX18_CPU_SET_SLICED_VBI_PARAM,           0),
	API_ENTRY(CPU, CX18_CPU_SET_USERDATA_PLACE_HOLDER,      0),
	API_ENTRY(CPU, CX18_CPU_GET_ENC_PTS,                    0),
	API_ENTRY(CPU, CX18_CPU_DE_SET_MDL_ACK,			0),
	API_ENTRY(CPU, CX18_CPU_DE_SET_MDL,			API_FAST),
	API_ENTRY(CPU, CX18_APU_RESETAI,			API_FAST),
	API_ENTRY(CPU, CX18_CPU_DE_RELEASE_MDL,			API_SLOW),
	API_ENTRY(0, 0,						0),
};

static const struct cx18_api_info *find_api_info(u32 cmd)
{
	int i;

	for (i = 0; api_info[i].cmd; i++)
		if (api_info[i].cmd == cmd)
			return &api_info[i];
	return NULL;
}

static struct cx18_mailbox __iomem *cx18_mb_is_complete(struct cx18 *cx, int rpu,
		u32 *state, u32 *irq, u32 *req)
{
	struct cx18_mailbox __iomem *mb = NULL;
	int wait_count = 0;
	u32 ack;

	switch (rpu) {
	case APU:
		mb = &cx->scb->epu2apu_mb;
		*state = cx18_readl(cx, &cx->scb->apu_state);
		*irq = cx18_readl(cx, &cx->scb->epu2apu_irq);
		break;

	case CPU:
		mb = &cx->scb->epu2cpu_mb;
		*state = cx18_readl(cx, &cx->scb->cpu_state);
		*irq = cx18_readl(cx, &cx->scb->epu2cpu_irq);
		break;

	default:
		break;
	}

	if (mb == NULL)
		return mb;

	do {
		*req = cx18_readl(cx, &mb->request);
		ack = cx18_readl(cx, &mb->ack);
		wait_count++;
	} while (*req != ack && wait_count < 600);

	if (*req == ack) {
		(*req)++;
		if (*req == 0 || *req == 0xffffffff)
			*req = 1;
		return mb;
	}
	return NULL;
}

long cx18_mb_ack(struct cx18 *cx, const struct cx18_mailbox *mb, int rpu)
{
	struct cx18_mailbox __iomem *ack_mb;
	u32 ack_irq;

	switch (rpu) {
	case APU:
		ack_irq = IRQ_EPU_TO_APU_ACK;
		ack_mb = &cx->scb->apu2epu_mb;
		break;
	case CPU:
		ack_irq = IRQ_EPU_TO_CPU_ACK;
		ack_mb = &cx->scb->cpu2epu_mb;
		break;
	default:
		CX18_WARN("Unhandled RPU (%d) for command %x ack\n",
			  rpu, mb->cmd);
		return -EINVAL;
	}

	cx18_setup_page(cx, SCB_OFFSET);
	cx18_write_sync(cx, mb->request, &ack_mb->ack);
	cx18_write_reg_expect(cx, ack_irq, SW2_INT_SET, ack_irq, ack_irq);
	return 0;
}


static int cx18_api_call(struct cx18 *cx, u32 cmd, int args, u32 data[])
{
	const struct cx18_api_info *info = find_api_info(cmd);
	u32 state = 0, irq = 0, req, oldreq, err;
	struct cx18_mailbox __iomem *mb;
	wait_queue_head_t *waitq;
	struct mutex *mb_lock;
	int timeout = 100;
	int sig = 0;
	int i;

	if (info == NULL) {
		CX18_WARN("unknown cmd %x\n", cmd);
		return -EINVAL;
	}

	if (cmd == CX18_CPU_DE_SET_MDL)
		CX18_DEBUG_HI_API("%s\n", info->name);
	else
		CX18_DEBUG_API("%s\n", info->name);

	switch (info->rpu) {
	case APU:
		waitq = &cx->mb_apu_waitq;
		mb_lock = &cx->epu2apu_mb_lock;
		break;
	case CPU:
		waitq = &cx->mb_cpu_waitq;
		mb_lock = &cx->epu2cpu_mb_lock;
		break;
	default:
		CX18_WARN("Unknown RPU (%d) for API call\n", info->rpu);
		return -EINVAL;
	}

	mutex_lock(mb_lock);
	cx18_setup_page(cx, SCB_OFFSET);
	mb = cx18_mb_is_complete(cx, info->rpu, &state, &irq, &req);

	if (mb == NULL) {
		mutex_unlock(mb_lock);
		CX18_ERR("mb %s busy\n", info->name);
		return -EBUSY;
	}

	oldreq = req - 1;
	cx18_writel(cx, cmd, &mb->cmd);
	for (i = 0; i < args; i++)
		cx18_writel(cx, data[i], &mb->args[i]);
	cx18_writel(cx, 0, &mb->error);
	cx18_writel(cx, req, &mb->request);

	if (info->flags & API_FAST)
		timeout /= 2;
	cx18_write_reg_expect(cx, irq, SW1_INT_SET, irq, irq);

	sig = wait_event_interruptible_timeout(
		       *waitq,
		       cx18_readl(cx, &mb->ack) == cx18_readl(cx, &mb->request),
		       msecs_to_jiffies(timeout));
	if (sig == 0) {
		/* Timed out */
		cx18_writel(cx, oldreq, &mb->request);
		mutex_unlock(mb_lock);
		CX18_ERR("sending %s timed out waiting for RPU to respond\n",
			 info->name);
		return -EINVAL;
	} else if (sig < 0) {
		/* Interrupted */
		cx18_writel(cx, oldreq, &mb->request);
		mutex_unlock(mb_lock);
		CX18_WARN("sending %s interrupted waiting for RPU to respond\n",
			  info->name);
		return -EINTR;
	}

	for (i = 0; i < MAX_MB_ARGUMENTS; i++)
		data[i] = cx18_readl(cx, &mb->args[i]);
	err = cx18_readl(cx, &mb->error);
	mutex_unlock(mb_lock);
	if (info->flags & API_SLOW)
		cx18_msleep_timeout(300, 0);
	if (err)
		CX18_DEBUG_API("mailbox error %08x for command %s\n", err,
				info->name);
	return err ? -EIO : 0;
}

int cx18_api(struct cx18 *cx, u32 cmd, int args, u32 data[])
{
	int res = cx18_api_call(cx, cmd, args, data);

	/* Allow a single retry, probably already too late though.
	   If there is no free mailbox then that is usually an indication
	   of a more serious problem. */
	return (res == -EBUSY) ? cx18_api_call(cx, cmd, args, data) : res;
}

static int cx18_set_filter_param(struct cx18_stream *s)
{
	struct cx18 *cx = s->cx;
	u32 mode;
	int ret;

	mode = (cx->filter_mode & 1) ? 2 : (cx->spatial_strength ? 1 : 0);
	ret = cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,
			s->handle, 1, mode, cx->spatial_strength);
	mode = (cx->filter_mode & 2) ? 2 : (cx->temporal_strength ? 1 : 0);
	ret = ret ? ret : cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,
			s->handle, 0, mode, cx->temporal_strength);
	ret = ret ? ret : cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,
			s->handle, 2, cx->filter_mode >> 2, 0);
	return ret;
}

int cx18_api_func(void *priv, u32 cmd, int in, int out,
		u32 data[CX2341X_MBOX_MAX_DATA])
{
	struct cx18 *cx = priv;
	struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];

	switch (cmd) {
	case CX2341X_ENC_SET_OUTPUT_PORT:
		return 0;
	case CX2341X_ENC_SET_FRAME_RATE:
		return cx18_vapi(cx, CX18_CPU_SET_VIDEO_IN, 6,
				s->handle, 0, 0, 0, 0, data[0]);
	case CX2341X_ENC_SET_FRAME_SIZE:
		return cx18_vapi(cx, CX18_CPU_SET_VIDEO_RESOLUTION, 3,
				s->handle, data[1], data[0]);
	case CX2341X_ENC_SET_STREAM_TYPE:
		return cx18_vapi(cx, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 2,
				s->handle, data[0]);
	case CX2341X_ENC_SET_ASPECT_RATIO:
		return cx18_vapi(cx, CX18_CPU_SET_ASPECT_RATIO, 2,
				s->handle, data[0]);

	case CX2341X_ENC_SET_GOP_PROPERTIES:
		return cx18_vapi(cx, CX18_CPU_SET_GOP_STRUCTURE, 3,
				s->handle, data[0], data[1]);
	case CX2341X_ENC_SET_GOP_CLOSURE:
		return 0;
	case CX2341X_ENC_SET_AUDIO_PROPERTIES:
		return cx18_vapi(cx, CX18_CPU_SET_AUDIO_PARAMETERS, 2,
				s->handle, data[0]);
	case CX2341X_ENC_MUTE_AUDIO:
		return cx18_vapi(cx, CX18_CPU_SET_AUDIO_MUTE, 2,
				s->handle, data[0]);
	case CX2341X_ENC_SET_BIT_RATE:
		return cx18_vapi(cx, CX18_CPU_SET_VIDEO_RATE, 5,
				s->handle, data[0], data[1], data[2], data[3]);
	case CX2341X_ENC_MUTE_VIDEO:
		return cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2,
				s->handle, data[0]);
	case CX2341X_ENC_SET_FRAME_DROP_RATE:
		return cx18_vapi(cx, CX18_CPU_SET_SKIP_INPUT_FRAME, 2,
				s->handle, data[0]);
	case CX2341X_ENC_MISC:
		return cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 4,
				s->handle, data[0], data[1], data[2]);
	case CX2341X_ENC_SET_DNR_FILTER_MODE:
		cx->filter_mode = (data[0] & 3) | (data[1] << 2);
		return cx18_set_filter_param(s);
	case CX2341X_ENC_SET_DNR_FILTER_PROPS:
		cx->spatial_strength = data[0];
		cx->temporal_strength = data[1];
		return cx18_set_filter_param(s);
	case CX2341X_ENC_SET_SPATIAL_FILTER_TYPE:
		return cx18_vapi(cx, CX18_CPU_SET_SPATIAL_FILTER_TYPE, 3,
				s->handle, data[0], data[1]);
	case CX2341X_ENC_SET_CORING_LEVELS:
		return cx18_vapi(cx, CX18_CPU_SET_MEDIAN_CORING, 5,
				s->handle, data[0], data[1], data[2], data[3]);
	}
	CX18_WARN("Unknown cmd %x\n", cmd);
	return 0;
}

int cx18_vapi_result(struct cx18 *cx, u32 data[MAX_MB_ARGUMENTS],
		u32 cmd, int args, ...)
{
	va_list ap;
	int i;

	va_start(ap, args);
	for (i = 0; i < args; i++)
		data[i] = va_arg(ap, u32);
	va_end(ap);
	return cx18_api(cx, cmd, args, data);
}

int cx18_vapi(struct cx18 *cx, u32 cmd, int args, ...)
{
	u32 data[MAX_MB_ARGUMENTS];
	va_list ap;
	int i;

	if (cx == NULL) {
		CX18_ERR("cx == NULL (cmd=%x)\n", cmd);
		return 0;
	}
	if (args > MAX_MB_ARGUMENTS) {
		CX18_ERR("args too big (cmd=%x)\n", cmd);
		args = MAX_MB_ARGUMENTS;
	}
	va_start(ap, args);
	for (i = 0; i < args; i++)
		data[i] = va_arg(ap, u32);
	va_end(ap);
	return cx18_api(cx, cmd, args, data);
}
Commit	Line	Data
1c1e45d1 HV	1	/*
	2	* cx18 mailbox functions
	3	*
	4	* Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License as published by
	8	* the Free Software Foundation; either version 2 of the License, or
	9	* (at your option) any later version.
	10	*
	11	* This program is distributed in the hope that it will be useful,
	12	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	13	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	14	* GNU General Public License for more details.
	15	*
	16	* You should have received a copy of the GNU General Public License
	17	* along with this program; if not, write to the Free Software
	18	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
	19	* 02111-1307 USA
	20	*/
	21
	22	#include <stdarg.h>
	23
	24	#include "cx18-driver.h"
b1526421	25	#include "cx18-io.h"
1c1e45d1 HV	26	#include "cx18-scb.h"
	27	#include "cx18-irq.h"
	28	#include "cx18-mailbox.h"
	29
	30	#define API_FAST (1 << 2) /* Short timeout */
	31	#define API_SLOW (1 << 3) /* Additional 300ms timeout */
	32
1c1e45d1 HV	33	struct cx18_api_info {
	34	u32 cmd;
	35	u8 flags; /* Flags, see above */
	36	u8 rpu; /* Processing unit */
	37	const char name; / The name of the command */
	38	};
	39
	40	#define API_ENTRY(rpu, x, f) { (x), (f), (rpu), #x }
	41
	42	static const struct cx18_api_info api_info[] = {
	43	/* MPEG encoder API */
	44	API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
	45	API_ENTRY(CPU, CX18_EPU_DEBUG, 0),
	46	API_ENTRY(CPU, CX18_CREATE_TASK, 0),
	47	API_ENTRY(CPU, CX18_DESTROY_TASK, 0),
	48	API_ENTRY(CPU, CX18_CPU_CAPTURE_START, API_SLOW),
	49	API_ENTRY(CPU, CX18_CPU_CAPTURE_STOP, API_SLOW),
	50	API_ENTRY(CPU, CX18_CPU_CAPTURE_PAUSE, 0),
	51	API_ENTRY(CPU, CX18_CPU_CAPTURE_RESUME, 0),
	52	API_ENTRY(CPU, CX18_CPU_SET_CHANNEL_TYPE, 0),
	53	API_ENTRY(CPU, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 0),
	54	API_ENTRY(CPU, CX18_CPU_SET_VIDEO_IN, 0),
	55	API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RATE, 0),
	56	API_ENTRY(CPU, CX18_CPU_SET_VIDEO_RESOLUTION, 0),
	57	API_ENTRY(CPU, CX18_CPU_SET_FILTER_PARAM, 0),
	58	API_ENTRY(CPU, CX18_CPU_SET_SPATIAL_FILTER_TYPE, 0),
	59	API_ENTRY(CPU, CX18_CPU_SET_MEDIAN_CORING, 0),
	60	API_ENTRY(CPU, CX18_CPU_SET_INDEXTABLE, 0),
	61	API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PARAMETERS, 0),
	62	API_ENTRY(CPU, CX18_CPU_SET_VIDEO_MUTE, 0),
	63	API_ENTRY(CPU, CX18_CPU_SET_AUDIO_MUTE, 0),
	64	API_ENTRY(CPU, CX18_CPU_SET_MISC_PARAMETERS, 0),
	65	API_ENTRY(CPU, CX18_CPU_SET_RAW_VBI_PARAM, API_SLOW),
	66	API_ENTRY(CPU, CX18_CPU_SET_CAPTURE_LINE_NO, 0),
	67	API_ENTRY(CPU, CX18_CPU_SET_COPYRIGHT, 0),
	68	API_ENTRY(CPU, CX18_CPU_SET_AUDIO_PID, 0),
	69	API_ENTRY(CPU, CX18_CPU_SET_VIDEO_PID, 0),
	70	API_ENTRY(CPU, CX18_CPU_SET_VER_CROP_LINE, 0),
	71	API_ENTRY(CPU, CX18_CPU_SET_GOP_STRUCTURE, 0),
	72	API_ENTRY(CPU, CX18_CPU_SET_SCENE_CHANGE_DETECTION, 0),
	73	API_ENTRY(CPU, CX18_CPU_SET_ASPECT_RATIO, 0),
	74	API_ENTRY(CPU, CX18_CPU_SET_SKIP_INPUT_FRAME, 0),
	75	API_ENTRY(CPU, CX18_CPU_SET_SLICED_VBI_PARAM, 0),
	76	API_ENTRY(CPU, CX18_CPU_SET_USERDATA_PLACE_HOLDER, 0),
	77	API_ENTRY(CPU, CX18_CPU_GET_ENC_PTS, 0),
	78	API_ENTRY(CPU, CX18_CPU_DE_SET_MDL_ACK, 0),
	79	API_ENTRY(CPU, CX18_CPU_DE_SET_MDL, API_FAST),
81cb727d	80	API_ENTRY(CPU, CX18_APU_RESETAI, API_FAST),
4e6b6104	81	API_ENTRY(CPU, CX18_CPU_DE_RELEASE_MDL, API_SLOW),
1c1e45d1 HV	82	API_ENTRY(0, 0, 0),
	83	};
	84
	85	static const struct cx18_api_info *find_api_info(u32 cmd)
	86	{
	87	int i;
	88
	89	for (i = 0; api_info[i].cmd; i++)
	90	if (api_info[i].cmd == cmd)
	91	return &api_info[i];
	92	return NULL;
	93	}
	94
990c81c8	95	static struct cx18_mailbox __iomem cx18_mb_is_complete(struct cx18 cx, int rpu,
1c1e45d1 HV	96	u32 state, u32 irq, u32 *req)
1c1e45d1 HV	97	{
990c81c8	98	struct cx18_mailbox __iomem *mb = NULL;
1c1e45d1 HV	99	int wait_count = 0;
	100	u32 ack;
	101
	102	switch (rpu) {
	103	case APU:
	104	mb = &cx->scb->epu2apu_mb;
b1526421 AW	105	*state = cx18_readl(cx, &cx->scb->apu_state);
b1526421 AW	106	*irq = cx18_readl(cx, &cx->scb->epu2apu_irq);
1c1e45d1 HV	107	break;
	108
	109	case CPU:
	110	mb = &cx->scb->epu2cpu_mb;
b1526421 AW	111	*state = cx18_readl(cx, &cx->scb->cpu_state);
b1526421 AW	112	*irq = cx18_readl(cx, &cx->scb->epu2cpu_irq);
1c1e45d1 HV	113	break;
1c1e45d1 HV	114
72c2d6d3	115	default:
1c1e45d1 HV	116	break;
	117	}
	118
	119	if (mb == NULL)
	120	return mb;
	121
	122	do {
b1526421 AW	123	*req = cx18_readl(cx, &mb->request);
b1526421 AW	124	ack = cx18_readl(cx, &mb->ack);
1c1e45d1 HV	125	wait_count++;
	126	} while (*req != ack && wait_count < 600);
	127
	128	if (*req == ack) {
	129	(*req)++;
	130	if (req == 0 \|\| req == 0xffffffff)
	131	*req = 1;
	132	return mb;
	133	}
	134	return NULL;
	135	}
	136
72c2d6d3	137	long cx18_mb_ack(struct cx18 cx, const struct cx18_mailbox mb, int rpu)
1c1e45d1	138	{
990c81c8	139	struct cx18_mailbox __iomem *ack_mb;
1c1e45d1	140	u32 ack_irq;
1c1e45d1 HV	141
1c1e45d1 HV	142	switch (rpu) {
1c1e45d1 HV	143	case APU:
	144	ack_irq = IRQ_EPU_TO_APU_ACK;
	145	ack_mb = &cx->scb->apu2epu_mb;
	146	break;
	147	case CPU:
	148	ack_irq = IRQ_EPU_TO_CPU_ACK;
	149	ack_mb = &cx->scb->cpu2epu_mb;
	150	break;
	151	default:
72c2d6d3 AW	152	CX18_WARN("Unhandled RPU (%d) for command %x ack\n",
72c2d6d3 AW	153	rpu, mb->cmd);
1c1e45d1 HV	154	return -EINVAL;
	155	}
	156
b1526421 AW	157	cx18_setup_page(cx, SCB_OFFSET);
b1526421 AW	158	cx18_write_sync(cx, mb->request, &ack_mb->ack);
f056d29e	159	cx18_write_reg_expect(cx, ack_irq, SW2_INT_SET, ack_irq, ack_irq);
1c1e45d1 HV	160	return 0;
	161	}
	162
	163
	164	static int cx18_api_call(struct cx18 *cx, u32 cmd, int args, u32 data[])
	165	{
	166	const struct cx18_api_info *info = find_api_info(cmd);
	167	u32 state = 0, irq = 0, req, oldreq, err;
990c81c8	168	struct cx18_mailbox __iomem *mb;
1c1e45d1	169	wait_queue_head_t *waitq;
72c2d6d3	170	struct mutex *mb_lock;
1c1e45d1	171	int timeout = 100;
1c1e45d1 HV	172	int sig = 0;
	173	int i;
	174
	175	if (info == NULL) {
	176	CX18_WARN("unknown cmd %x\n", cmd);
	177	return -EINVAL;
	178	}
	179
	180	if (cmd == CX18_CPU_DE_SET_MDL)
	181	CX18_DEBUG_HI_API("%s\n", info->name);
	182	else
	183	CX18_DEBUG_API("%s\n", info->name);
72c2d6d3 AW	184
	185	switch (info->rpu) {
	186	case APU:
	187	waitq = &cx->mb_apu_waitq;
	188	mb_lock = &cx->epu2apu_mb_lock;
	189	break;
	190	case CPU:
	191	waitq = &cx->mb_cpu_waitq;
	192	mb_lock = &cx->epu2cpu_mb_lock;
	193	break;
	194	default:
	195	CX18_WARN("Unknown RPU (%d) for API call\n", info->rpu);
	196	return -EINVAL;
	197	}
	198
	199	mutex_lock(mb_lock);
b1526421	200	cx18_setup_page(cx, SCB_OFFSET);
1c1e45d1 HV	201	mb = cx18_mb_is_complete(cx, info->rpu, &state, &irq, &req);
	202
	203	if (mb == NULL) {
72c2d6d3	204	mutex_unlock(mb_lock);
1c1e45d1 HV	205	CX18_ERR("mb %s busy\n", info->name);
	206	return -EBUSY;
	207	}
	208
	209	oldreq = req - 1;
b1526421	210	cx18_writel(cx, cmd, &mb->cmd);
1c1e45d1	211	for (i = 0; i < args; i++)
b1526421 AW	212	cx18_writel(cx, data[i], &mb->args[i]);
	213	cx18_writel(cx, 0, &mb->error);
	214	cx18_writel(cx, req, &mb->request);
1c1e45d1	215
1c1e45d1 HV	216	if (info->flags & API_FAST)
1c1e45d1 HV	217	timeout /= 2;
f056d29e	218	cx18_write_reg_expect(cx, irq, SW1_INT_SET, irq, irq);
1c1e45d1	219
72c2d6d3 AW	220	sig = wait_event_interruptible_timeout(
	221	*waitq,
	222	cx18_readl(cx, &mb->ack) == cx18_readl(cx, &mb->request),
	223	msecs_to_jiffies(timeout));
	224	if (sig == 0) {
	225	/* Timed out */
b1526421	226	cx18_writel(cx, oldreq, &mb->request);
72c2d6d3 AW	227	mutex_unlock(mb_lock);
	228	CX18_ERR("sending %s timed out waiting for RPU to respond\n",
	229	info->name);
1c1e45d1	230	return -EINVAL;
72c2d6d3 AW	231	} else if (sig < 0) {
	232	/* Interrupted */
	233	cx18_writel(cx, oldreq, &mb->request);
	234	mutex_unlock(mb_lock);
	235	CX18_WARN("sending %s interrupted waiting for RPU to respond\n",
	236	info->name);
	237	return -EINTR;
1c1e45d1	238	}
72c2d6d3	239
1c1e45d1	240	for (i = 0; i < MAX_MB_ARGUMENTS; i++)
b1526421 AW	241	data[i] = cx18_readl(cx, &mb->args[i]);
b1526421 AW	242	err = cx18_readl(cx, &mb->error);
72c2d6d3 AW	243	mutex_unlock(mb_lock);
72c2d6d3 AW	244	if (info->flags & API_SLOW)
1c1e45d1 HV	245	cx18_msleep_timeout(300, 0);
	246	if (err)
	247	CX18_DEBUG_API("mailbox error %08x for command %s\n", err,
	248	info->name);
	249	return err ? -EIO : 0;
	250	}
	251
	252	int cx18_api(struct cx18 *cx, u32 cmd, int args, u32 data[])
	253	{
	254	int res = cx18_api_call(cx, cmd, args, data);
	255
	256	/* Allow a single retry, probably already too late though.
	257	If there is no free mailbox then that is usually an indication
	258	of a more serious problem. */
	259	return (res == -EBUSY) ? cx18_api_call(cx, cmd, args, data) : res;
	260	}
	261
	262	static int cx18_set_filter_param(struct cx18_stream *s)
	263	{
	264	struct cx18 *cx = s->cx;
	265	u32 mode;
	266	int ret;
	267
	268	mode = (cx->filter_mode & 1) ? 2 : (cx->spatial_strength ? 1 : 0);
	269	ret = cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,
	270	s->handle, 1, mode, cx->spatial_strength);
	271	mode = (cx->filter_mode & 2) ? 2 : (cx->temporal_strength ? 1 : 0);
	272	ret = ret ? ret : cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,
	273	s->handle, 0, mode, cx->temporal_strength);
	274	ret = ret ? ret : cx18_vapi(cx, CX18_CPU_SET_FILTER_PARAM, 4,
	275	s->handle, 2, cx->filter_mode >> 2, 0);
	276	return ret;
	277	}
	278
	279	int cx18_api_func(void *priv, u32 cmd, int in, int out,
	280	u32 data[CX2341X_MBOX_MAX_DATA])
	281	{
	282	struct cx18 *cx = priv;
	283	struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
	284
	285	switch (cmd) {
	286	case CX2341X_ENC_SET_OUTPUT_PORT:
	287	return 0;
	288	case CX2341X_ENC_SET_FRAME_RATE:
	289	return cx18_vapi(cx, CX18_CPU_SET_VIDEO_IN, 6,
	290	s->handle, 0, 0, 0, 0, data[0]);
	291	case CX2341X_ENC_SET_FRAME_SIZE:
	292	return cx18_vapi(cx, CX18_CPU_SET_VIDEO_RESOLUTION, 3,
	293	s->handle, data[1], data[0]);
	294	case CX2341X_ENC_SET_STREAM_TYPE:
	295	return cx18_vapi(cx, CX18_CPU_SET_STREAM_OUTPUT_TYPE, 2,
	296	s->handle, data[0]);
	297	case CX2341X_ENC_SET_ASPECT_RATIO:
	298	return cx18_vapi(cx, CX18_CPU_SET_ASPECT_RATIO, 2,
	299	s->handle, data[0]);
	300
	301	case CX2341X_ENC_SET_GOP_PROPERTIES:
	302	return cx18_vapi(cx, CX18_CPU_SET_GOP_STRUCTURE, 3,
	303	s->handle, data[0], data[1]);
	304	case CX2341X_ENC_SET_GOP_CLOSURE:
	305	return 0;
	306	case CX2341X_ENC_SET_AUDIO_PROPERTIES:
	307	return cx18_vapi(cx, CX18_CPU_SET_AUDIO_PARAMETERS, 2,
	308	s->handle, data[0]);
309	case CX2341X_ENC_MUTE_AUDIO:
310	return cx18_vapi(cx, CX18_CPU_SET_AUDIO_MUTE, 2,
311	s->handle, data[0]);
312	case CX2341X_ENC_SET_BIT_RATE:
313	return cx18_vapi(cx, CX18_CPU_SET_VIDEO_RATE, 5,
314	s->handle, data[0], data[1], data[2], data[3]);
315	case CX2341X_ENC_MUTE_VIDEO:
316	return cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2,
317	s->handle, data[0]);
318	case CX2341X_ENC_SET_FRAME_DROP_RATE:
319	return cx18_vapi(cx, CX18_CPU_SET_SKIP_INPUT_FRAME, 2,
320	s->handle, data[0]);
321	case CX2341X_ENC_MISC:
322	return cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 4,
323	s->handle, data[0], data[1], data[2]);
324	case CX2341X_ENC_SET_DNR_FILTER_MODE:
325	cx->filter_mode = (data[0] & 3) \| (data[1] << 2);
326	return cx18_set_filter_param(s);
327	case CX2341X_ENC_SET_DNR_FILTER_PROPS:
328	cx->spatial_strength = data[0];
329	cx->temporal_strength = data[1];
330	return cx18_set_filter_param(s);
331	case CX2341X_ENC_SET_SPATIAL_FILTER_TYPE:
332	return cx18_vapi(cx, CX18_CPU_SET_SPATIAL_FILTER_TYPE, 3,
333	s->handle, data[0], data[1]);
334	case CX2341X_ENC_SET_CORING_LEVELS:
335	return cx18_vapi(cx, CX18_CPU_SET_MEDIAN_CORING, 5,
336	s->handle, data[0], data[1], data[2], data[3]);
337	}
338	CX18_WARN("Unknown cmd %x\n", cmd);
339	return 0;
340	}
341
342	int cx18_vapi_result(struct cx18 *cx, u32 data[MAX_MB_ARGUMENTS],
343	u32 cmd, int args, ...)
344	{
345	va_list ap;
346	int i;
347
348	va_start(ap, args);
349	for (i = 0; i < args; i++)
350	data[i] = va_arg(ap, u32);
351	va_end(ap);
352	return cx18_api(cx, cmd, args, data);
353	}
354
355	int cx18_vapi(struct cx18 *cx, u32 cmd, int args, ...)
356	{
357	u32 data[MAX_MB_ARGUMENTS];
358	va_list ap;
359	int i;
360
361	if (cx == NULL) {
362	CX18_ERR("cx == NULL (cmd=%x)\n", cmd);
363	return 0;
364	}
365	if (args > MAX_MB_ARGUMENTS) {
366	CX18_ERR("args too big (cmd=%x)\n", cmd);
367	args = MAX_MB_ARGUMENTS;
368	}
369	va_start(ap, args);
370	for (i = 0; i < args; i++)
371	data[i] = va_arg(ap, u32);
372	va_end(ap);
373	return cx18_api(cx, cmd, args, data);
374	}