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V4L/DVB (10135): v4l2: introduce v4l2_file_operations.
[mirror_ubuntu-bionic-kernel.git] / drivers / media / video / cx18 / cx18-streams.c
CommitLineData
1c1e45d1
HV
1/*
2 * cx18 init/start/stop/exit stream functions
3 *
4 * Derived from ivtv-streams.c
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
1ed9dcc8 7 * Copyright (C) 2008 Andy Walls <awalls@radix.net>
1c1e45d1
HV
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
22 * 02111-1307 USA
23 */
24
25#include "cx18-driver.h"
b1526421 26#include "cx18-io.h"
1c1e45d1
HV
27#include "cx18-fileops.h"
28#include "cx18-mailbox.h"
29#include "cx18-i2c.h"
30#include "cx18-queue.h"
31#include "cx18-ioctl.h"
32#include "cx18-streams.h"
33#include "cx18-cards.h"
34#include "cx18-scb.h"
35#include "cx18-av-core.h"
36#include "cx18-dvb.h"
37
38#define CX18_DSP0_INTERRUPT_MASK 0xd0004C
39
bec43661 40static struct v4l2_file_operations cx18_v4l2_enc_fops = {
daf20d95
HV
41 .owner = THIS_MODULE,
42 .read = cx18_v4l2_read,
43 .open = cx18_v4l2_open,
3b6fe58f 44 /* FIXME change to video_ioctl2 if serialization lock can be removed */
daf20d95 45 .ioctl = cx18_v4l2_ioctl,
daf20d95
HV
46 .release = cx18_v4l2_close,
47 .poll = cx18_v4l2_enc_poll,
1c1e45d1
HV
48};
49
50/* offset from 0 to register ts v4l2 minors on */
51#define CX18_V4L2_ENC_TS_OFFSET 16
52/* offset from 0 to register pcm v4l2 minors on */
53#define CX18_V4L2_ENC_PCM_OFFSET 24
54/* offset from 0 to register yuv v4l2 minors on */
55#define CX18_V4L2_ENC_YUV_OFFSET 32
56
57static struct {
58 const char *name;
59 int vfl_type;
dd89601d 60 int num_offset;
1c1e45d1
HV
61 int dma;
62 enum v4l2_buf_type buf_type;
1c1e45d1
HV
63} cx18_stream_info[] = {
64 { /* CX18_ENC_STREAM_TYPE_MPG */
65 "encoder MPEG",
66 VFL_TYPE_GRABBER, 0,
67 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
1c1e45d1
HV
68 },
69 { /* CX18_ENC_STREAM_TYPE_TS */
70 "TS",
71 VFL_TYPE_GRABBER, -1,
72 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
1c1e45d1
HV
73 },
74 { /* CX18_ENC_STREAM_TYPE_YUV */
75 "encoder YUV",
76 VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
77 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
1c1e45d1
HV
78 },
79 { /* CX18_ENC_STREAM_TYPE_VBI */
80 "encoder VBI",
81 VFL_TYPE_VBI, 0,
82 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VBI_CAPTURE,
1c1e45d1
HV
83 },
84 { /* CX18_ENC_STREAM_TYPE_PCM */
85 "encoder PCM audio",
86 VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
87 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_PRIVATE,
1c1e45d1
HV
88 },
89 { /* CX18_ENC_STREAM_TYPE_IDX */
90 "encoder IDX",
91 VFL_TYPE_GRABBER, -1,
92 PCI_DMA_FROMDEVICE, V4L2_BUF_TYPE_VIDEO_CAPTURE,
1c1e45d1
HV
93 },
94 { /* CX18_ENC_STREAM_TYPE_RAD */
95 "encoder radio",
96 VFL_TYPE_RADIO, 0,
97 PCI_DMA_NONE, V4L2_BUF_TYPE_PRIVATE,
1c1e45d1
HV
98 },
99};
100
101static void cx18_stream_init(struct cx18 *cx, int type)
102{
103 struct cx18_stream *s = &cx->streams[type];
104 struct video_device *dev = s->v4l2dev;
1c1e45d1
HV
105
106 /* we need to keep v4l2dev, so restore it afterwards */
107 memset(s, 0, sizeof(*s));
108 s->v4l2dev = dev;
109
110 /* initialize cx18_stream fields */
111 s->cx = cx;
112 s->type = type;
113 s->name = cx18_stream_info[type].name;
d3c5e707 114 s->handle = CX18_INVALID_TASK_HANDLE;
1c1e45d1
HV
115
116 s->dma = cx18_stream_info[type].dma;
6ecd86dc 117 s->buffers = cx->stream_buffers[type];
1c1e45d1 118 s->buf_size = cx->stream_buf_size[type];
6ecd86dc 119
f576ceef 120 mutex_init(&s->qlock);
1c1e45d1
HV
121 init_waitqueue_head(&s->waitq);
122 s->id = -1;
123 cx18_queue_init(&s->q_free);
66c2a6b0 124 cx18_queue_init(&s->q_busy);
1c1e45d1 125 cx18_queue_init(&s->q_full);
1c1e45d1
HV
126}
127
128static int cx18_prep_dev(struct cx18 *cx, int type)
129{
130 struct cx18_stream *s = &cx->streams[type];
131 u32 cap = cx->v4l2_cap;
dd89601d
HV
132 int num_offset = cx18_stream_info[type].num_offset;
133 int num = cx->num + cx18_first_minor + num_offset;
1c1e45d1
HV
134
135 /* These four fields are always initialized. If v4l2dev == NULL, then
136 this stream is not in use. In that case no other fields but these
137 four can be used. */
138 s->v4l2dev = NULL;
139 s->cx = cx;
140 s->type = type;
141 s->name = cx18_stream_info[type].name;
142
143 /* Check whether the radio is supported */
144 if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
145 return 0;
146
147 /* Check whether VBI is supported */
148 if (type == CX18_ENC_STREAM_TYPE_VBI &&
149 !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
150 return 0;
151
1c1e45d1
HV
152 /* User explicitly selected 0 buffers for these streams, so don't
153 create them. */
154 if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
6ecd86dc 155 cx->stream_buffers[type] == 0) {
1c1e45d1
HV
156 CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
157 return 0;
158 }
159
160 cx18_stream_init(cx, type);
161
dd89601d 162 if (num_offset == -1)
1c1e45d1
HV
163 return 0;
164
165 /* allocate and initialize the v4l2 video device structure */
166 s->v4l2dev = video_device_alloc();
167 if (s->v4l2dev == NULL) {
168 CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
169 s->name);
170 return -ENOMEM;
171 }
172
37f89f95
HV
173 snprintf(s->v4l2dev->name, sizeof(s->v4l2dev->name), "cx18-%d",
174 cx->num);
1c1e45d1 175
dd89601d 176 s->v4l2dev->num = num;
5e85e732 177 s->v4l2dev->parent = &cx->dev->dev;
bec43661 178 s->v4l2dev->fops = &cx18_v4l2_enc_fops;
1c1e45d1 179 s->v4l2dev->release = video_device_release;
3b6fe58f
AW
180 s->v4l2dev->tvnorms = V4L2_STD_ALL;
181 cx18_set_funcs(s->v4l2dev);
1c1e45d1
HV
182 return 0;
183}
184
185/* Initialize v4l2 variables and register v4l2 devices */
186int cx18_streams_setup(struct cx18 *cx)
187{
9b4a7c8a 188 int type, ret;
1c1e45d1
HV
189
190 /* Setup V4L2 Devices */
191 for (type = 0; type < CX18_MAX_STREAMS; type++) {
192 /* Prepare device */
9b4a7c8a
AW
193 ret = cx18_prep_dev(cx, type);
194 if (ret < 0)
1c1e45d1
HV
195 break;
196
197 /* Allocate Stream */
9b4a7c8a
AW
198 ret = cx18_stream_alloc(&cx->streams[type]);
199 if (ret < 0)
1c1e45d1
HV
200 break;
201 }
202 if (type == CX18_MAX_STREAMS)
203 return 0;
204
205 /* One or more streams could not be initialized. Clean 'em all up. */
3f98387e 206 cx18_streams_cleanup(cx, 0);
9b4a7c8a 207 return ret;
1c1e45d1
HV
208}
209
210static int cx18_reg_dev(struct cx18 *cx, int type)
211{
212 struct cx18_stream *s = &cx->streams[type];
213 int vfl_type = cx18_stream_info[type].vfl_type;
9b4a7c8a 214 int num, ret;
1c1e45d1
HV
215
216 /* TODO: Shouldn't this be a VFL_TYPE_TRANSPORT or something?
217 * We need a VFL_TYPE_TS defined.
218 */
219 if (strcmp("TS", s->name) == 0) {
220 /* just return if no DVB is supported */
221 if ((cx->card->hw_all & CX18_HW_DVB) == 0)
222 return 0;
9b4a7c8a
AW
223 ret = cx18_dvb_register(s);
224 if (ret < 0) {
1c1e45d1 225 CX18_ERR("DVB failed to register\n");
9b4a7c8a 226 return ret;
1c1e45d1
HV
227 }
228 }
229
230 if (s->v4l2dev == NULL)
231 return 0;
232
dd89601d
HV
233 num = s->v4l2dev->num;
234 /* card number + user defined offset + device offset */
235 if (type != CX18_ENC_STREAM_TYPE_MPG) {
236 struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
237
238 if (s_mpg->v4l2dev)
239 num = s_mpg->v4l2dev->num + cx18_stream_info[type].num_offset;
240 }
1c1e45d1
HV
241
242 /* Register device. First try the desired minor, then any free one. */
9b4a7c8a
AW
243 ret = video_register_device(s->v4l2dev, vfl_type, num);
244 if (ret < 0) {
dd89601d
HV
245 CX18_ERR("Couldn't register v4l2 device for %s kernel number %d\n",
246 s->name, num);
1c1e45d1
HV
247 video_device_release(s->v4l2dev);
248 s->v4l2dev = NULL;
9b4a7c8a 249 return ret;
1c1e45d1 250 }
dd89601d 251 num = s->v4l2dev->num;
1c1e45d1
HV
252
253 switch (vfl_type) {
254 case VFL_TYPE_GRABBER:
6ecd86dc
AW
255 CX18_INFO("Registered device video%d for %s (%d x %d kB)\n",
256 num, s->name, cx->stream_buffers[type],
257 cx->stream_buf_size[type]/1024);
1c1e45d1
HV
258 break;
259
260 case VFL_TYPE_RADIO:
261 CX18_INFO("Registered device radio%d for %s\n",
dd89601d 262 num, s->name);
1c1e45d1
HV
263 break;
264
265 case VFL_TYPE_VBI:
6ecd86dc
AW
266 if (cx->stream_buffers[type])
267 CX18_INFO("Registered device vbi%d for %s "
268 "(%d x %d bytes)\n",
269 num, s->name, cx->stream_buffers[type],
270 cx->stream_buf_size[type]);
1c1e45d1
HV
271 else
272 CX18_INFO("Registered device vbi%d for %s\n",
dd89601d 273 num, s->name);
1c1e45d1
HV
274 break;
275 }
276
277 return 0;
278}
279
280/* Register v4l2 devices */
281int cx18_streams_register(struct cx18 *cx)
282{
283 int type;
9b4a7c8a
AW
284 int err;
285 int ret = 0;
1c1e45d1
HV
286
287 /* Register V4L2 devices */
9b4a7c8a
AW
288 for (type = 0; type < CX18_MAX_STREAMS; type++) {
289 err = cx18_reg_dev(cx, type);
290 if (err && ret == 0)
291 ret = err;
292 }
1c1e45d1 293
9b4a7c8a 294 if (ret == 0)
1c1e45d1
HV
295 return 0;
296
297 /* One or more streams could not be initialized. Clean 'em all up. */
3f98387e 298 cx18_streams_cleanup(cx, 1);
9b4a7c8a 299 return ret;
1c1e45d1
HV
300}
301
302/* Unregister v4l2 devices */
3f98387e 303void cx18_streams_cleanup(struct cx18 *cx, int unregister)
1c1e45d1
HV
304{
305 struct video_device *vdev;
306 int type;
307
308 /* Teardown all streams */
309 for (type = 0; type < CX18_MAX_STREAMS; type++) {
fac3639d 310 if (cx->streams[type].dvb.enabled) {
1c1e45d1 311 cx18_dvb_unregister(&cx->streams[type]);
fac3639d
HV
312 cx->streams[type].dvb.enabled = false;
313 }
1c1e45d1
HV
314
315 vdev = cx->streams[type].v4l2dev;
316
317 cx->streams[type].v4l2dev = NULL;
318 if (vdev == NULL)
319 continue;
320
321 cx18_stream_free(&cx->streams[type]);
322
3f98387e
HV
323 /* Unregister or release device */
324 if (unregister)
325 video_unregister_device(vdev);
326 else
327 video_device_release(vdev);
1c1e45d1
HV
328 }
329}
330
331static void cx18_vbi_setup(struct cx18_stream *s)
332{
333 struct cx18 *cx = s->cx;
dd073434 334 int raw = cx18_raw_vbi(cx);
1c1e45d1
HV
335 u32 data[CX2341X_MBOX_MAX_DATA];
336 int lines;
337
338 if (cx->is_60hz) {
339 cx->vbi.count = 12;
340 cx->vbi.start[0] = 10;
341 cx->vbi.start[1] = 273;
342 } else { /* PAL/SECAM */
343 cx->vbi.count = 18;
344 cx->vbi.start[0] = 6;
345 cx->vbi.start[1] = 318;
346 }
347
348 /* setup VBI registers */
349 cx18_av_cmd(cx, VIDIOC_S_FMT, &cx->vbi.in);
350
351 /* determine number of lines and total number of VBI bytes.
af009cf6 352 A raw line takes 1444 bytes: 4 byte SAV code + 2 * 720
1c1e45d1
HV
353 A sliced line takes 51 bytes: 4 byte frame header, 4 byte internal
354 header, 42 data bytes + checksum (to be confirmed) */
355 if (raw) {
356 lines = cx->vbi.count * 2;
357 } else {
358 lines = cx->is_60hz ? 24 : 38;
359 if (cx->is_60hz)
360 lines += 2;
361 }
362
363 cx->vbi.enc_size = lines *
364 (raw ? cx->vbi.raw_size : cx->vbi.sliced_size);
365
366 data[0] = s->handle;
367 /* Lines per field */
368 data[1] = (lines / 2) | ((lines / 2) << 16);
369 /* bytes per line */
af009cf6
AW
370 data[2] = (raw ? cx->vbi.raw_decoder_line_size
371 : cx->vbi.sliced_decoder_line_size);
1c1e45d1
HV
372 /* Every X number of frames a VBI interrupt arrives
373 (frames as in 25 or 30 fps) */
374 data[3] = 1;
375 /* Setup VBI for the cx25840 digitizer */
376 if (raw) {
377 data[4] = 0x20602060;
af009cf6 378 data[5] = 0x307090d0;
1c1e45d1
HV
379 } else {
380 data[4] = 0xB0F0B0F0;
381 data[5] = 0xA0E0A0E0;
382 }
383
384 CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
385 data[0], data[1], data[2], data[3], data[4], data[5]);
386
387 if (s->type == CX18_ENC_STREAM_TYPE_VBI)
388 cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
389}
390
66c2a6b0
AW
391struct cx18_queue *cx18_stream_put_buf_fw(struct cx18_stream *s,
392 struct cx18_buffer *buf)
393{
394 struct cx18 *cx = s->cx;
395 struct cx18_queue *q;
396
397 /* Don't give it to the firmware, if we're not running a capture */
398 if (s->handle == CX18_INVALID_TASK_HANDLE ||
399 !test_bit(CX18_F_S_STREAMING, &s->s_flags))
400 return cx18_enqueue(s, buf, &s->q_free);
401
402 q = cx18_enqueue(s, buf, &s->q_busy);
403 if (q != &s->q_busy)
404 return q; /* The firmware has the max buffers it can handle */
405
406 cx18_buf_sync_for_device(s, buf);
407 cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
408 (void __iomem *) &cx->scb->cpu_mdl[buf->id] - cx->enc_mem,
409 1, buf->id, s->buf_size);
410 return q;
411}
412
abb096de 413void cx18_stream_load_fw_queue(struct cx18_stream *s)
66c2a6b0 414{
abb096de 415 struct cx18_queue *q;
66c2a6b0 416 struct cx18_buffer *buf;
66c2a6b0 417
abb096de 418 if (atomic_read(&s->q_free.buffers) == 0 ||
0ef02892 419 atomic_read(&s->q_busy.buffers) >= CX18_MAX_FW_MDLS_PER_STREAM)
abb096de
AW
420 return;
421
422 /* Move from q_free to q_busy notifying the firmware, until the limit */
423 do {
424 buf = cx18_dequeue(s, &s->q_free);
425 if (buf == NULL)
426 break;
427 q = cx18_stream_put_buf_fw(s, buf);
0ef02892
AW
428 } while (atomic_read(&s->q_busy.buffers) < CX18_MAX_FW_MDLS_PER_STREAM
429 && q == &s->q_busy);
66c2a6b0
AW
430}
431
1c1e45d1
HV
432int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
433{
434 u32 data[MAX_MB_ARGUMENTS];
435 struct cx18 *cx = s->cx;
66c2a6b0 436 struct cx18_buffer *buf;
1c1e45d1
HV
437 int ts = 0;
438 int captype = 0;
439
440 if (s->v4l2dev == NULL && s->dvb.enabled == 0)
441 return -EINVAL;
442
443 CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
444
445 switch (s->type) {
446 case CX18_ENC_STREAM_TYPE_MPG:
447 captype = CAPTURE_CHANNEL_TYPE_MPEG;
448 cx->mpg_data_received = cx->vbi_data_inserted = 0;
449 cx->dualwatch_jiffies = jiffies;
450 cx->dualwatch_stereo_mode = cx->params.audio_properties & 0x300;
451 cx->search_pack_header = 0;
452 break;
453
454 case CX18_ENC_STREAM_TYPE_TS:
455 captype = CAPTURE_CHANNEL_TYPE_TS;
456 ts = 1;
457 break;
458 case CX18_ENC_STREAM_TYPE_YUV:
459 captype = CAPTURE_CHANNEL_TYPE_YUV;
460 break;
461 case CX18_ENC_STREAM_TYPE_PCM:
462 captype = CAPTURE_CHANNEL_TYPE_PCM;
463 break;
464 case CX18_ENC_STREAM_TYPE_VBI:
dd073434
AW
465 captype = cx18_raw_vbi(cx) ?
466 CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
1c1e45d1
HV
467 cx->vbi.frame = 0;
468 cx->vbi.inserted_frame = 0;
469 memset(cx->vbi.sliced_mpeg_size,
470 0, sizeof(cx->vbi.sliced_mpeg_size));
471 break;
472 default:
473 return -EINVAL;
474 }
1c1e45d1
HV
475
476 /* mute/unmute video */
477 cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2,
478 s->handle, !!test_bit(CX18_F_I_RADIO_USER, &cx->i_flags));
479
480 /* Clear Streamoff flags in case left from last capture */
481 clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
482
483 cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
484 s->handle = data[0];
485 cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
486
31554ae5 487 if (atomic_read(&cx->ana_capturing) == 0 && !ts) {
50b86bac
AW
488 struct cx18_api_func_private priv;
489
1c1e45d1
HV
490 /* Stuff from Windows, we don't know what it is */
491 cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
492 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
493 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
494 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
495 cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2, s->handle, 12);
496
497 cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
498 s->handle, cx->digitizer, cx->digitizer);
499
500 /* Setup VBI */
501 if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
502 cx18_vbi_setup(s);
503
504 /* assign program index info.
505 Mask 7: select I/P/B, Num_req: 400 max */
506 cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 1, 0);
507
508 /* Setup API for Stream */
50b86bac
AW
509 priv.cx = cx;
510 priv.s = s;
511 cx2341x_update(&priv, cx18_api_func, NULL, &cx->params);
1c1e45d1
HV
512 }
513
31554ae5 514 if (atomic_read(&cx->tot_capturing) == 0) {
1c1e45d1 515 clear_bit(CX18_F_I_EOS, &cx->i_flags);
b1526421 516 cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
1c1e45d1
HV
517 }
518
519 cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
990c81c8
AV
520 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
521 (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
1c1e45d1 522
66c2a6b0
AW
523 /* Init all the cpu_mdls for this stream */
524 cx18_flush_queues(s);
525 mutex_lock(&s->qlock);
f6b181ac 526 list_for_each_entry(buf, &s->q_free.list, list) {
b1526421
AW
527 cx18_writel(cx, buf->dma_handle,
528 &cx->scb->cpu_mdl[buf->id].paddr);
529 cx18_writel(cx, s->buf_size, &cx->scb->cpu_mdl[buf->id].length);
1c1e45d1 530 }
66c2a6b0 531 mutex_unlock(&s->qlock);
abb096de 532 cx18_stream_load_fw_queue(s);
66c2a6b0 533
1c1e45d1
HV
534 /* begin_capture */
535 if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
536 CX18_DEBUG_WARN("Error starting capture!\n");
3b5df8ea
AW
537 /* Ensure we're really not capturing before releasing MDLs */
538 if (s->type == CX18_ENC_STREAM_TYPE_MPG)
539 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
540 else
541 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
66c2a6b0
AW
542 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
543 /* FIXME - CX18_F_S_STREAMOFF as well? */
3b5df8ea 544 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
1c1e45d1 545 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
66c2a6b0
AW
546 s->handle = CX18_INVALID_TASK_HANDLE;
547 if (atomic_read(&cx->tot_capturing) == 0) {
548 set_bit(CX18_F_I_EOS, &cx->i_flags);
549 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
550 }
1c1e45d1
HV
551 return -EINVAL;
552 }
553
554 /* you're live! sit back and await interrupts :) */
31554ae5
HV
555 if (!ts)
556 atomic_inc(&cx->ana_capturing);
557 atomic_inc(&cx->tot_capturing);
1c1e45d1
HV
558 return 0;
559}
560
561void cx18_stop_all_captures(struct cx18 *cx)
562{
563 int i;
564
565 for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
566 struct cx18_stream *s = &cx->streams[i];
567
568 if (s->v4l2dev == NULL && s->dvb.enabled == 0)
569 continue;
570 if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
571 cx18_stop_v4l2_encode_stream(s, 0);
572 }
573}
574
575int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
576{
577 struct cx18 *cx = s->cx;
578 unsigned long then;
579
580 if (s->v4l2dev == NULL && s->dvb.enabled == 0)
581 return -EINVAL;
582
583 /* This function assumes that you are allowed to stop the capture
584 and that we are actually capturing */
585
586 CX18_DEBUG_INFO("Stop Capture\n");
587
31554ae5 588 if (atomic_read(&cx->tot_capturing) == 0)
1c1e45d1
HV
589 return 0;
590
591 if (s->type == CX18_ENC_STREAM_TYPE_MPG)
592 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
593 else
594 cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
595
596 then = jiffies;
597
598 if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
599 CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
600 }
601
31554ae5
HV
602 if (s->type != CX18_ENC_STREAM_TYPE_TS)
603 atomic_dec(&cx->ana_capturing);
604 atomic_dec(&cx->tot_capturing);
1c1e45d1
HV
605
606 /* Clear capture and no-read bits */
607 clear_bit(CX18_F_S_STREAMING, &s->s_flags);
608
f68d0cf5
AW
609 /* Tell the CX23418 it can't use our buffers anymore */
610 cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
611
1c1e45d1 612 cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
d3c5e707 613 s->handle = CX18_INVALID_TASK_HANDLE;
1c1e45d1 614
31554ae5 615 if (atomic_read(&cx->tot_capturing) > 0)
1c1e45d1
HV
616 return 0;
617
b1526421 618 cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
1c1e45d1
HV
619 wake_up(&s->waitq);
620
621 return 0;
622}
623
624u32 cx18_find_handle(struct cx18 *cx)
625{
626 int i;
627
628 /* find first available handle to be used for global settings */
629 for (i = 0; i < CX18_MAX_STREAMS; i++) {
630 struct cx18_stream *s = &cx->streams[i];
631
d3c5e707 632 if (s->v4l2dev && (s->handle != CX18_INVALID_TASK_HANDLE))
1c1e45d1
HV
633 return s->handle;
634 }
d3c5e707 635 return CX18_INVALID_TASK_HANDLE;
1c1e45d1 636}
ee2d64f5
AW
637
638struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
639{
640 int i;
641 struct cx18_stream *s;
642
643 if (handle == CX18_INVALID_TASK_HANDLE)
644 return NULL;
645
646 for (i = 0; i < CX18_MAX_STREAMS; i++) {
647 s = &cx->streams[i];
648 if (s->handle != handle)
649 continue;
650 if (s->v4l2dev || s->dvb.enabled)
651 return s;
652 }
653 return NULL;
654}