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Commit | Line | Data |
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e0d3bafd SD |
1 | /* |
2 | cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices | |
3 | ||
4 | Copyright (C) 2008 <srinivasa.deevi at conexant dot com> | |
84b5dbf3 | 5 | Based on em28xx driver |
e0d3bafd SD |
6 | |
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #ifndef _CX231XX_H | |
23 | #define _CX231XX_H | |
24 | ||
25 | #include <linux/videodev2.h> | |
b1196126 SD |
26 | #include <linux/types.h> |
27 | #include <linux/ioctl.h> | |
e0d3bafd SD |
28 | #include <linux/i2c.h> |
29 | #include <linux/i2c-algo-bit.h> | |
30 | #include <linux/mutex.h> | |
b1196126 | 31 | |
64fbf444 | 32 | #include <media/cx2341x.h> |
b1196126 SD |
33 | |
34 | #include <media/videobuf-vmalloc.h> | |
35 | #include <media/v4l2-device.h> | |
96c1f996 | 36 | #include <media/ir-core.h> |
b9255176 SD |
37 | #if defined(CONFIG_VIDEO_CX231XX_DVB) || \ |
38 | defined(CONFIG_VIDEO_CX231XX_DVB_MODULE) | |
e0d3bafd SD |
39 | #include <media/videobuf-dvb.h> |
40 | #endif | |
41 | ||
42 | #include "cx231xx-reg.h" | |
6e4f574b | 43 | #include "cx231xx-pcb-cfg.h" |
e0d3bafd SD |
44 | #include "cx231xx-conf-reg.h" |
45 | ||
e0d3bafd SD |
46 | #define DRIVER_NAME "cx231xx" |
47 | #define PWR_SLEEP_INTERVAL 5 | |
48 | ||
49 | /* I2C addresses for control block in Cx231xx */ | |
ecc67d10 SD |
50 | #define AFE_DEVICE_ADDRESS 0x60 |
51 | #define I2S_BLK_DEVICE_ADDRESS 0x98 | |
52 | #define VID_BLK_I2C_ADDRESS 0x88 | |
64fbf444 | 53 | #define VERVE_I2C_ADDRESS 0x40 |
e0d3bafd SD |
54 | #define DIF_USE_BASEBAND 0xFFFFFFFF |
55 | ||
56 | /* Boards supported by driver */ | |
57 | #define CX231XX_BOARD_UNKNOWN 0 | |
64fbf444 PB |
58 | #define CX231XX_BOARD_CNXT_CARRAERA 1 |
59 | #define CX231XX_BOARD_CNXT_SHELBY 2 | |
60 | #define CX231XX_BOARD_CNXT_RDE_253S 3 | |
61 | #define CX231XX_BOARD_CNXT_RDU_253S 4 | |
62 | #define CX231XX_BOARD_CNXT_VIDEO_GRABBER 5 | |
63 | #define CX231XX_BOARD_CNXT_RDE_250 6 | |
64 | #define CX231XX_BOARD_CNXT_RDU_250 7 | |
1a50fdde | 65 | #define CX231XX_BOARD_HAUPPAUGE_EXETER 8 |
e0d3bafd SD |
66 | |
67 | /* Limits minimum and default number of buffers */ | |
68 | #define CX231XX_MIN_BUF 4 | |
69 | #define CX231XX_DEF_BUF 12 | |
70 | #define CX231XX_DEF_VBI_BUF 6 | |
71 | ||
72 | #define VBI_LINE_COUNT 17 | |
73 | #define VBI_LINE_LENGTH 1440 | |
74 | ||
75 | /*Limits the max URB message size */ | |
76 | #define URB_MAX_CTRL_SIZE 80 | |
77 | ||
78 | /* Params for validated field */ | |
79 | #define CX231XX_BOARD_NOT_VALIDATED 1 | |
84b5dbf3 | 80 | #define CX231XX_BOARD_VALIDATED 0 |
e0d3bafd SD |
81 | |
82 | /* maximum number of cx231xx boards */ | |
83 | #define CX231XX_MAXBOARDS 8 | |
84 | ||
85 | /* maximum number of frames that can be queued */ | |
86 | #define CX231XX_NUM_FRAMES 5 | |
87 | ||
88 | /* number of buffers for isoc transfers */ | |
89 | #define CX231XX_NUM_BUFS 8 | |
90 | ||
91 | /* number of packets for each buffer | |
92 | windows requests only 40 packets .. so we better do the same | |
93 | this is what I found out for all alternate numbers there! | |
94 | */ | |
95 | #define CX231XX_NUM_PACKETS 40 | |
96 | ||
e0d3bafd SD |
97 | /* default alternate; 0 means choose the best */ |
98 | #define CX231XX_PINOUT 0 | |
99 | ||
100 | #define CX231XX_INTERLACED_DEFAULT 1 | |
101 | ||
e0d3bafd | 102 | /* time to wait when stopping the isoc transfer */ |
b9255176 SD |
103 | #define CX231XX_URB_TIMEOUT \ |
104 | msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS) | |
e0d3bafd | 105 | |
64fbf444 PB |
106 | #define CX231xx_NORMS (\ |
107 | V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ | |
108 | V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ | |
109 | V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ | |
110 | V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) | |
111 | #define CX231xx_VERSION_CODE KERNEL_VERSION(0, 0, 2) | |
112 | ||
113 | #define SLEEP_S5H1432 30 | |
114 | #define CX23417_OSC_EN 8 | |
115 | #define CX23417_RESET 9 | |
116 | ||
117 | struct cx23417_fmt { | |
118 | char *name; | |
119 | u32 fourcc; /* v4l2 format id */ | |
120 | int depth; | |
121 | int flags; | |
122 | u32 cxformat; | |
123 | }; | |
e0d3bafd SD |
124 | enum cx231xx_mode { |
125 | CX231XX_SUSPEND, | |
126 | CX231XX_ANALOG_MODE, | |
127 | CX231XX_DIGITAL_MODE, | |
128 | }; | |
129 | ||
130 | enum cx231xx_std_mode { | |
131 | CX231XX_TV_AIR = 0, | |
132 | CX231XX_TV_CABLE | |
133 | }; | |
134 | ||
135 | enum cx231xx_stream_state { | |
136 | STREAM_OFF, | |
137 | STREAM_INTERRUPT, | |
138 | STREAM_ON, | |
139 | }; | |
140 | ||
141 | struct cx231xx; | |
142 | ||
64fbf444 | 143 | struct cx231xx_isoc_ctl { |
84b5dbf3 MCC |
144 | /* max packet size of isoc transaction */ |
145 | int max_pkt_size; | |
e0d3bafd | 146 | |
84b5dbf3 MCC |
147 | /* number of allocated urbs */ |
148 | int num_bufs; | |
e0d3bafd | 149 | |
84b5dbf3 MCC |
150 | /* urb for isoc transfers */ |
151 | struct urb **urb; | |
e0d3bafd | 152 | |
84b5dbf3 MCC |
153 | /* transfer buffers for isoc transfer */ |
154 | char **transfer_buffer; | |
e0d3bafd | 155 | |
84b5dbf3 MCC |
156 | /* Last buffer command and region */ |
157 | u8 cmd; | |
158 | int pos, size, pktsize; | |
e0d3bafd | 159 | |
84b5dbf3 MCC |
160 | /* Last field: ODD or EVEN? */ |
161 | int field; | |
e0d3bafd | 162 | |
84b5dbf3 MCC |
163 | /* Stores incomplete commands */ |
164 | u32 tmp_buf; | |
165 | int tmp_buf_len; | |
e0d3bafd | 166 | |
84b5dbf3 MCC |
167 | /* Stores already requested buffers */ |
168 | struct cx231xx_buffer *buf; | |
e0d3bafd | 169 | |
84b5dbf3 MCC |
170 | /* Stores the number of received fields */ |
171 | int nfields; | |
e0d3bafd | 172 | |
84b5dbf3 | 173 | /* isoc urb callback */ |
cde4362f | 174 | int (*isoc_copy) (struct cx231xx *dev, struct urb *urb); |
e0d3bafd SD |
175 | }; |
176 | ||
64fbf444 PB |
177 | struct cx231xx_bulk_ctl { |
178 | /* max packet size of bulk transaction */ | |
179 | int max_pkt_size; | |
180 | ||
181 | /* number of allocated urbs */ | |
182 | int num_bufs; | |
183 | ||
184 | /* urb for bulk transfers */ | |
185 | struct urb **urb; | |
186 | ||
187 | /* transfer buffers for bulk transfer */ | |
188 | char **transfer_buffer; | |
189 | ||
190 | /* Last buffer command and region */ | |
191 | u8 cmd; | |
192 | int pos, size, pktsize; | |
193 | ||
194 | /* Last field: ODD or EVEN? */ | |
195 | int field; | |
196 | ||
197 | /* Stores incomplete commands */ | |
198 | u32 tmp_buf; | |
199 | int tmp_buf_len; | |
200 | ||
201 | /* Stores already requested buffers */ | |
202 | struct cx231xx_buffer *buf; | |
203 | ||
204 | /* Stores the number of received fields */ | |
205 | int nfields; | |
206 | ||
207 | /* bulk urb callback */ | |
208 | int (*bulk_copy) (struct cx231xx *dev, struct urb *urb); | |
209 | }; | |
210 | ||
e0d3bafd | 211 | struct cx231xx_fmt { |
84b5dbf3 MCC |
212 | char *name; |
213 | u32 fourcc; /* v4l2 format id */ | |
214 | int depth; | |
215 | int reg; | |
e0d3bafd SD |
216 | }; |
217 | ||
218 | /* buffer for one video frame */ | |
219 | struct cx231xx_buffer { | |
220 | /* common v4l buffer stuff -- must be first */ | |
221 | struct videobuf_buffer vb; | |
222 | ||
223 | struct list_head frame; | |
224 | int top_field; | |
225 | int receiving; | |
226 | }; | |
227 | ||
64fbf444 PB |
228 | enum ps_package_head { |
229 | CX231XX_NEED_ADD_PS_PACKAGE_HEAD = 0, | |
230 | CX231XX_NONEED_PS_PACKAGE_HEAD | |
231 | }; | |
232 | ||
e0d3bafd | 233 | struct cx231xx_dmaqueue { |
84b5dbf3 MCC |
234 | struct list_head active; |
235 | struct list_head queued; | |
e0d3bafd | 236 | |
84b5dbf3 | 237 | wait_queue_head_t wq; |
e0d3bafd SD |
238 | |
239 | /* Counters to control buffer fill */ | |
84b5dbf3 MCC |
240 | int pos; |
241 | u8 is_partial_line; | |
242 | u8 partial_buf[8]; | |
243 | u8 last_sav; | |
244 | int current_field; | |
245 | u32 bytes_left_in_line; | |
246 | u32 lines_completed; | |
247 | u8 field1_done; | |
248 | u32 lines_per_field; | |
64fbf444 PB |
249 | |
250 | /*Mpeg2 control buffer*/ | |
251 | u8 *p_left_data; | |
252 | u32 left_data_count; | |
253 | u8 mpeg_buffer_done; | |
254 | u32 mpeg_buffer_completed; | |
255 | enum ps_package_head add_ps_package_head; | |
256 | char ps_head[10]; | |
e0d3bafd SD |
257 | }; |
258 | ||
e0d3bafd SD |
259 | /* inputs */ |
260 | ||
261 | #define MAX_CX231XX_INPUT 4 | |
262 | ||
263 | enum cx231xx_itype { | |
264 | CX231XX_VMUX_COMPOSITE1 = 1, | |
265 | CX231XX_VMUX_SVIDEO, | |
266 | CX231XX_VMUX_TELEVISION, | |
84b5dbf3 MCC |
267 | CX231XX_VMUX_CABLE, |
268 | CX231XX_RADIO, | |
269 | CX231XX_VMUX_DVB, | |
e0d3bafd SD |
270 | CX231XX_VMUX_DEBUG |
271 | }; | |
272 | ||
273 | enum cx231xx_v_input { | |
84b5dbf3 MCC |
274 | CX231XX_VIN_1_1 = 0x1, |
275 | CX231XX_VIN_2_1, | |
276 | CX231XX_VIN_3_1, | |
277 | CX231XX_VIN_4_1, | |
278 | CX231XX_VIN_1_2 = 0x01, | |
279 | CX231XX_VIN_2_2, | |
280 | CX231XX_VIN_3_2, | |
281 | CX231XX_VIN_1_3 = 0x1, | |
282 | CX231XX_VIN_2_3, | |
283 | CX231XX_VIN_3_3, | |
e0d3bafd SD |
284 | }; |
285 | ||
286 | /* cx231xx has two audio inputs: tuner and line in */ | |
287 | enum cx231xx_amux { | |
288 | /* This is the only entry for cx231xx tuner input */ | |
84b5dbf3 | 289 | CX231XX_AMUX_VIDEO, /* cx231xx tuner */ |
e0d3bafd SD |
290 | CX231XX_AMUX_LINE_IN, /* Line In */ |
291 | }; | |
292 | ||
293 | struct cx231xx_reg_seq { | |
294 | unsigned char bit; | |
84b5dbf3 | 295 | unsigned char val; |
e0d3bafd SD |
296 | int sleep; |
297 | }; | |
298 | ||
299 | struct cx231xx_input { | |
300 | enum cx231xx_itype type; | |
301 | unsigned int vmux; | |
302 | enum cx231xx_amux amux; | |
303 | struct cx231xx_reg_seq *gpio; | |
304 | }; | |
305 | ||
306 | #define INPUT(nr) (&cx231xx_boards[dev->model].input[nr]) | |
307 | ||
308 | enum cx231xx_decoder { | |
309 | CX231XX_NODECODER, | |
310 | CX231XX_AVDECODER | |
311 | }; | |
312 | ||
b9255176 | 313 | enum CX231XX_I2C_MASTER_PORT { |
84b5dbf3 MCC |
314 | I2C_0 = 0, |
315 | I2C_1 = 1, | |
316 | I2C_2 = 2, | |
317 | I2C_3 = 3 | |
b9255176 | 318 | }; |
e0d3bafd SD |
319 | |
320 | struct cx231xx_board { | |
321 | char *name; | |
322 | int vchannels; | |
323 | int tuner_type; | |
324 | int tuner_addr; | |
84b5dbf3 | 325 | v4l2_std_id norm; /* tv norm */ |
e0d3bafd | 326 | |
84b5dbf3 MCC |
327 | /* demod related */ |
328 | int demod_addr; | |
329 | u8 demod_xfer_mode; /* 0 - Serial; 1 - parallel */ | |
e0d3bafd SD |
330 | |
331 | /* GPIO Pins */ | |
332 | struct cx231xx_reg_seq *dvb_gpio; | |
333 | struct cx231xx_reg_seq *suspend_gpio; | |
334 | struct cx231xx_reg_seq *tuner_gpio; | |
84b5dbf3 MCC |
335 | u8 tuner_sif_gpio; |
336 | u8 tuner_scl_gpio; | |
337 | u8 tuner_sda_gpio; | |
e0d3bafd | 338 | |
84b5dbf3 MCC |
339 | /* PIN ctrl */ |
340 | u32 ctl_pin_status_mask; | |
341 | u8 agc_analog_digital_select_gpio; | |
342 | u32 gpio_pin_status_mask; | |
e0d3bafd | 343 | |
84b5dbf3 MCC |
344 | /* i2c masters */ |
345 | u8 tuner_i2c_master; | |
346 | u8 demod_i2c_master; | |
e0d3bafd SD |
347 | |
348 | unsigned int max_range_640_480:1; | |
349 | unsigned int has_dvb:1; | |
350 | unsigned int valid:1; | |
351 | ||
352 | unsigned char xclk, i2c_speed; | |
353 | ||
354 | enum cx231xx_decoder decoder; | |
355 | ||
84b5dbf3 MCC |
356 | struct cx231xx_input input[MAX_CX231XX_INPUT]; |
357 | struct cx231xx_input radio; | |
715a2233 | 358 | struct ir_scancode_table *ir_codes; |
e0d3bafd SD |
359 | }; |
360 | ||
361 | /* device states */ | |
362 | enum cx231xx_dev_state { | |
363 | DEV_INITIALIZED = 0x01, | |
364 | DEV_DISCONNECTED = 0x02, | |
365 | DEV_MISCONFIGURED = 0x04, | |
366 | }; | |
367 | ||
84b5dbf3 MCC |
368 | enum AFE_MODE { |
369 | AFE_MODE_LOW_IF, | |
370 | AFE_MODE_BASEBAND, | |
371 | AFE_MODE_EU_HI_IF, | |
372 | AFE_MODE_US_HI_IF, | |
373 | AFE_MODE_JAPAN_HI_IF | |
e0d3bafd SD |
374 | }; |
375 | ||
84b5dbf3 MCC |
376 | enum AUDIO_INPUT { |
377 | AUDIO_INPUT_MUTE, | |
378 | AUDIO_INPUT_LINE, | |
379 | AUDIO_INPUT_TUNER_TV, | |
380 | AUDIO_INPUT_SPDIF, | |
381 | AUDIO_INPUT_TUNER_FM | |
e0d3bafd SD |
382 | }; |
383 | ||
384 | #define CX231XX_AUDIO_BUFS 5 | |
64fbf444 PB |
385 | #define CX231XX_NUM_AUDIO_PACKETS 16 |
386 | #define CX231XX_ISO_NUM_AUDIO_PACKETS 64 | |
e0d3bafd SD |
387 | #define CX231XX_CAPTURE_STREAM_EN 1 |
388 | #define CX231XX_STOP_AUDIO 0 | |
389 | #define CX231XX_START_AUDIO 1 | |
390 | ||
e0d3bafd SD |
391 | /* cx231xx extensions */ |
392 | #define CX231XX_AUDIO 0x10 | |
393 | #define CX231XX_DVB 0x20 | |
394 | ||
395 | struct cx231xx_audio { | |
396 | char name[50]; | |
397 | char *transfer_buffer[CX231XX_AUDIO_BUFS]; | |
398 | struct urb *urb[CX231XX_AUDIO_BUFS]; | |
399 | struct usb_device *udev; | |
400 | unsigned int capture_transfer_done; | |
84b5dbf3 | 401 | struct snd_pcm_substream *capture_pcm_substream; |
e0d3bafd SD |
402 | |
403 | unsigned int hwptr_done_capture; | |
84b5dbf3 | 404 | struct snd_card *sndcard; |
e0d3bafd SD |
405 | |
406 | int users, shutdown; | |
407 | enum cx231xx_stream_state capture_stream; | |
64fbf444 | 408 | /* locks */ |
e0d3bafd SD |
409 | spinlock_t slock; |
410 | ||
84b5dbf3 MCC |
411 | int alt; /* alternate */ |
412 | int max_pkt_size; /* max packet size of isoc transaction */ | |
413 | int num_alt; /* Number of alternative settings */ | |
e0d3bafd | 414 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ |
84b5dbf3 | 415 | u16 end_point_addr; |
e0d3bafd SD |
416 | }; |
417 | ||
418 | struct cx231xx; | |
419 | ||
420 | struct cx231xx_fh { | |
421 | struct cx231xx *dev; | |
84b5dbf3 MCC |
422 | unsigned int stream_on:1; /* Locks streams */ |
423 | int radio; | |
e0d3bafd | 424 | |
84b5dbf3 | 425 | struct videobuf_queue vb_vidq; |
e0d3bafd | 426 | |
84b5dbf3 | 427 | enum v4l2_buf_type type; |
64fbf444 PB |
428 | |
429 | ||
430 | ||
431 | /*following is copyed from cx23885.h*/ | |
432 | u32 resources; | |
433 | ||
434 | /* video overlay */ | |
435 | struct v4l2_window win; | |
436 | struct v4l2_clip *clips; | |
437 | unsigned int nclips; | |
438 | ||
439 | /* video capture */ | |
440 | struct cx23417_fmt *fmt; | |
441 | unsigned int width, height; | |
442 | ||
443 | /* vbi capture */ | |
444 | struct videobuf_queue vidq; | |
445 | struct videobuf_queue vbiq; | |
446 | ||
447 | /* MPEG Encoder specifics ONLY */ | |
448 | ||
449 | atomic_t v4l_reading; | |
e0d3bafd SD |
450 | }; |
451 | ||
b9255176 | 452 | /*****************************************************************/ |
e0d3bafd | 453 | /* set/get i2c */ |
b9255176 SD |
454 | /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */ |
455 | #define I2C_SPEED_1M 0x0 | |
456 | #define I2C_SPEED_400K 0x1 | |
457 | #define I2C_SPEED_100K 0x2 | |
458 | #define I2C_SPEED_5M 0x3 | |
459 | ||
460 | /* 0-- STOP transaction */ | |
461 | #define I2C_STOP 0x0 | |
462 | /* 1-- do not transmit STOP at end of transaction */ | |
463 | #define I2C_NOSTOP 0x1 | |
464 | /* 1--alllow slave to insert clock wait states */ | |
465 | #define I2C_SYNC 0x1 | |
e0d3bafd SD |
466 | |
467 | struct cx231xx_i2c { | |
84b5dbf3 | 468 | struct cx231xx *dev; |
e0d3bafd | 469 | |
84b5dbf3 | 470 | int nr; |
e0d3bafd SD |
471 | |
472 | /* i2c i/o */ | |
84b5dbf3 MCC |
473 | struct i2c_adapter i2c_adap; |
474 | struct i2c_algo_bit_data i2c_algo; | |
475 | struct i2c_client i2c_client; | |
476 | u32 i2c_rc; | |
e0d3bafd SD |
477 | |
478 | /* different settings for each bus */ | |
84b5dbf3 MCC |
479 | u8 i2c_period; |
480 | u8 i2c_nostop; | |
481 | u8 i2c_reserve; | |
e0d3bafd SD |
482 | }; |
483 | ||
84b5dbf3 MCC |
484 | struct cx231xx_i2c_xfer_data { |
485 | u8 dev_addr; | |
486 | u8 direction; /* 1 - IN, 0 - OUT */ | |
487 | u8 saddr_len; /* sub address len */ | |
488 | u16 saddr_dat; /* sub addr data */ | |
489 | u8 buf_size; /* buffer size */ | |
490 | u8 *p_buffer; /* pointer to the buffer */ | |
e0d3bafd SD |
491 | }; |
492 | ||
6e4f574b | 493 | struct VENDOR_REQUEST_IN { |
84b5dbf3 MCC |
494 | u8 bRequest; |
495 | u16 wValue; | |
496 | u16 wIndex; | |
497 | u16 wLength; | |
498 | u8 direction; | |
499 | u8 bData; | |
500 | u8 *pBuff; | |
b9255176 | 501 | }; |
e0d3bafd | 502 | |
64fbf444 PB |
503 | struct cx231xx_tvnorm { |
504 | char *name; | |
505 | v4l2_std_id id; | |
506 | u32 cxiformat; | |
507 | u32 cxoformat; | |
508 | }; | |
509 | ||
e0d3bafd SD |
510 | struct cx231xx_ctrl { |
511 | struct v4l2_queryctrl v; | |
84b5dbf3 MCC |
512 | u32 off; |
513 | u32 reg; | |
514 | u32 mask; | |
515 | u32 shift; | |
e0d3bafd SD |
516 | }; |
517 | ||
6e4f574b | 518 | enum TRANSFER_TYPE { |
84b5dbf3 MCC |
519 | Raw_Video = 0, |
520 | Audio, | |
521 | Vbi, /* VANC */ | |
522 | Sliced_cc, /* HANC */ | |
523 | TS1_serial_mode, | |
524 | TS2, | |
525 | TS1_parallel_mode | |
b9255176 | 526 | } ; |
e0d3bafd SD |
527 | |
528 | struct cx231xx_video_mode { | |
84b5dbf3 | 529 | /* Isoc control struct */ |
e0d3bafd | 530 | struct cx231xx_dmaqueue vidq; |
64fbf444 PB |
531 | struct cx231xx_isoc_ctl isoc_ctl; |
532 | struct cx231xx_bulk_ctl bulk_ctl; | |
533 | /* locks */ | |
e0d3bafd SD |
534 | spinlock_t slock; |
535 | ||
536 | /* usb transfer */ | |
84b5dbf3 MCC |
537 | int alt; /* alternate */ |
538 | int max_pkt_size; /* max packet size of isoc transaction */ | |
539 | int num_alt; /* Number of alternative settings */ | |
e0d3bafd | 540 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ |
84b5dbf3 | 541 | u16 end_point_addr; |
e0d3bafd | 542 | }; |
64fbf444 PB |
543 | /* |
544 | struct cx23885_dmaqueue { | |
545 | struct list_head active; | |
546 | struct list_head queued; | |
547 | struct timer_list timeout; | |
548 | struct btcx_riscmem stopper; | |
549 | u32 count; | |
550 | }; | |
551 | */ | |
552 | struct cx231xx_tsport { | |
553 | struct cx231xx *dev; | |
554 | ||
555 | int nr; | |
556 | int sram_chno; | |
557 | ||
558 | struct videobuf_dvb_frontends frontends; | |
559 | ||
560 | /* dma queues */ | |
561 | ||
562 | u32 ts_packet_size; | |
563 | u32 ts_packet_count; | |
564 | ||
565 | int width; | |
566 | int height; | |
567 | ||
568 | /* locks */ | |
569 | spinlock_t slock; | |
570 | ||
571 | /* registers */ | |
572 | u32 reg_gpcnt; | |
573 | u32 reg_gpcnt_ctl; | |
574 | u32 reg_dma_ctl; | |
575 | u32 reg_lngth; | |
576 | u32 reg_hw_sop_ctrl; | |
577 | u32 reg_gen_ctrl; | |
578 | u32 reg_bd_pkt_status; | |
579 | u32 reg_sop_status; | |
580 | u32 reg_fifo_ovfl_stat; | |
581 | u32 reg_vld_misc; | |
582 | u32 reg_ts_clk_en; | |
583 | u32 reg_ts_int_msk; | |
584 | u32 reg_ts_int_stat; | |
585 | u32 reg_src_sel; | |
586 | ||
587 | /* Default register vals */ | |
588 | int pci_irqmask; | |
589 | u32 dma_ctl_val; | |
590 | u32 ts_int_msk_val; | |
591 | u32 gen_ctrl_val; | |
592 | u32 ts_clk_en_val; | |
593 | u32 src_sel_val; | |
594 | u32 vld_misc_val; | |
595 | u32 hw_sop_ctrl_val; | |
596 | ||
597 | /* Allow a single tsport to have multiple frontends */ | |
598 | u32 num_frontends; | |
599 | void *port_priv; | |
600 | }; | |
e0d3bafd | 601 | |
e0d3bafd SD |
602 | /* main device struct */ |
603 | struct cx231xx { | |
604 | /* generic device properties */ | |
84b5dbf3 MCC |
605 | char name[30]; /* name (including minor) of the device */ |
606 | int model; /* index in the device_data struct */ | |
607 | int devno; /* marks the number of this device */ | |
e0d3bafd SD |
608 | |
609 | struct cx231xx_board board; | |
610 | ||
84b5dbf3 MCC |
611 | unsigned int stream_on:1; /* Locks streams */ |
612 | unsigned int vbi_stream_on:1; /* Locks streams for VBI */ | |
e0d3bafd SD |
613 | unsigned int has_audio_class:1; |
614 | unsigned int has_alsa_audio:1; | |
615 | ||
84b5dbf3 | 616 | struct cx231xx_fmt *format; |
e0d3bafd | 617 | |
b1196126 SD |
618 | struct v4l2_device v4l2_dev; |
619 | struct v4l2_subdev *sd_cx25840; | |
620 | struct v4l2_subdev *sd_tuner; | |
621 | ||
e0d3bafd SD |
622 | struct cx231xx_IR *ir; |
623 | ||
84b5dbf3 | 624 | struct list_head devlist; |
e0d3bafd | 625 | |
84b5dbf3 MCC |
626 | int tuner_type; /* type of the tuner */ |
627 | int tuner_addr; /* tuner address */ | |
e0d3bafd | 628 | |
84b5dbf3 MCC |
629 | /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ |
630 | struct cx231xx_i2c i2c_bus[3]; | |
631 | unsigned int xc_fw_load_done:1; | |
64fbf444 | 632 | /* locks */ |
84b5dbf3 | 633 | struct mutex gpio_i2c_lock; |
64fbf444 | 634 | struct mutex i2c_lock; |
e0d3bafd SD |
635 | |
636 | /* video for linux */ | |
84b5dbf3 MCC |
637 | int users; /* user count for exclusive use */ |
638 | struct video_device *vdev; /* video for linux device struct */ | |
639 | v4l2_std_id norm; /* selected tv norm */ | |
640 | int ctl_freq; /* selected frequency */ | |
641 | unsigned int ctl_ainput; /* selected audio input */ | |
e0d3bafd SD |
642 | int mute; |
643 | int volume; | |
644 | ||
645 | /* frame properties */ | |
84b5dbf3 MCC |
646 | int width; /* current frame width */ |
647 | int height; /* current frame height */ | |
648 | unsigned hscale; /* horizontal scale factor (see datasheet) */ | |
649 | unsigned vscale; /* vertical scale factor (see datasheet) */ | |
650 | int interlaced; /* 1=interlace fileds, 0=just top fileds */ | |
e0d3bafd SD |
651 | |
652 | struct cx231xx_audio adev; | |
653 | ||
654 | /* states */ | |
655 | enum cx231xx_dev_state state; | |
656 | ||
84b5dbf3 | 657 | struct work_struct request_module_wk; |
e0d3bafd SD |
658 | |
659 | /* locks */ | |
660 | struct mutex lock; | |
84b5dbf3 | 661 | struct mutex ctrl_urb_lock; /* protects urb_buf */ |
e0d3bafd SD |
662 | struct list_head inqueue, outqueue; |
663 | wait_queue_head_t open, wait_frame, wait_stream; | |
664 | struct video_device *vbi_dev; | |
665 | struct video_device *radio_dev; | |
666 | ||
667 | unsigned char eedata[256]; | |
668 | ||
84b5dbf3 MCC |
669 | struct cx231xx_video_mode video_mode; |
670 | struct cx231xx_video_mode vbi_mode; | |
671 | struct cx231xx_video_mode sliced_cc_mode; | |
672 | struct cx231xx_video_mode ts1_mode; | |
e0d3bafd | 673 | |
64fbf444 PB |
674 | atomic_t devlist_count; |
675 | ||
84b5dbf3 MCC |
676 | struct usb_device *udev; /* the usb device */ |
677 | char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */ | |
e0d3bafd SD |
678 | |
679 | /* helper funcs that call usb_control_msg */ | |
cde4362f | 680 | int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg, |
e0d3bafd | 681 | char *buf, int len); |
cde4362f | 682 | int (*cx231xx_write_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg, |
84b5dbf3 | 683 | char *buf, int len); |
cde4362f | 684 | int (*cx231xx_send_usb_command) (struct cx231xx_i2c *i2c_bus, |
b9255176 | 685 | struct cx231xx_i2c_xfer_data *req_data); |
cde4362f MCC |
686 | int (*cx231xx_gpio_i2c_read) (struct cx231xx *dev, u8 dev_addr, |
687 | u8 *buf, u8 len); | |
688 | int (*cx231xx_gpio_i2c_write) (struct cx231xx *dev, u8 dev_addr, | |
689 | u8 *buf, u8 len); | |
84b5dbf3 | 690 | |
cde4362f MCC |
691 | int (*cx231xx_set_analog_freq) (struct cx231xx *dev, u32 freq); |
692 | int (*cx231xx_reset_analog_tuner) (struct cx231xx *dev); | |
e0d3bafd SD |
693 | |
694 | enum cx231xx_mode mode; | |
695 | ||
696 | struct cx231xx_dvb *dvb; | |
697 | ||
84b5dbf3 MCC |
698 | /* Cx231xx supported PCB config's */ |
699 | struct pcb_config current_pcb_config; | |
700 | u8 current_scenario_idx; | |
701 | u8 interface_count; | |
702 | u8 max_iad_interface_count; | |
e0d3bafd | 703 | |
84b5dbf3 MCC |
704 | /* GPIO related register direction and values */ |
705 | u32 gpio_dir; | |
706 | u32 gpio_val; | |
e0d3bafd | 707 | |
84b5dbf3 MCC |
708 | /* Power Modes */ |
709 | int power_mode; | |
e0d3bafd | 710 | |
ecc67d10 SD |
711 | /* afe parameters */ |
712 | enum AFE_MODE afe_mode; | |
713 | u32 afe_ref_count; | |
e0d3bafd | 714 | |
84b5dbf3 MCC |
715 | /* video related parameters */ |
716 | u32 video_input; | |
717 | u32 active_mode; | |
718 | u8 vbi_or_sliced_cc_mode; /* 0 - vbi ; 1 - sliced cc mode */ | |
719 | enum cx231xx_std_mode std_mode; /* 0 - Air; 1 - cable */ | |
e0d3bafd | 720 | |
64fbf444 PB |
721 | /*mode: digital=1 or analog=0*/ |
722 | u8 mode_tv; | |
723 | ||
724 | u8 USE_ISO; | |
725 | struct cx231xx_tvnorm encodernorm; | |
726 | struct cx231xx_tsport ts1, ts2; | |
727 | struct cx2341x_mpeg_params mpeg_params; | |
728 | struct video_device *v4l_device; | |
729 | atomic_t v4l_reader_count; | |
730 | u32 freq; | |
731 | unsigned int input; | |
732 | u32 cx23417_mailbox; | |
733 | u32 __iomem *lmmio; | |
734 | u8 __iomem *bmmio; | |
e0d3bafd SD |
735 | }; |
736 | ||
64fbf444 PB |
737 | extern struct list_head cx231xx_devlist; |
738 | ||
b1196126 SD |
739 | #define cx25840_call(cx231xx, o, f, args...) \ |
740 | v4l2_subdev_call(cx231xx->sd_cx25840, o, f, ##args) | |
741 | #define tuner_call(cx231xx, o, f, args...) \ | |
742 | v4l2_subdev_call(cx231xx->sd_tuner, o, f, ##args) | |
743 | #define call_all(dev, o, f, args...) \ | |
744 | v4l2_device_call_until_err(&dev->v4l2_dev, 0, o, f, ##args) | |
745 | ||
e0d3bafd SD |
746 | struct cx231xx_ops { |
747 | struct list_head next; | |
748 | char *name; | |
749 | int id; | |
84b5dbf3 MCC |
750 | int (*init) (struct cx231xx *); |
751 | int (*fini) (struct cx231xx *); | |
e0d3bafd SD |
752 | }; |
753 | ||
754 | /* call back functions in dvb module */ | |
84b5dbf3 MCC |
755 | int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq); |
756 | int cx231xx_reset_analog_tuner(struct cx231xx *dev); | |
e0d3bafd SD |
757 | |
758 | /* Provided by cx231xx-i2c.c */ | |
e0d3bafd SD |
759 | void cx231xx_do_i2c_scan(struct cx231xx *dev, struct i2c_client *c); |
760 | int cx231xx_i2c_register(struct cx231xx_i2c *bus); | |
761 | int cx231xx_i2c_unregister(struct cx231xx_i2c *bus); | |
762 | ||
763 | /* Internal block control functions */ | |
64fbf444 PB |
764 | int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, |
765 | u8 saddr_len, u32 *data, u8 data_len, int master); | |
766 | int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, | |
767 | u8 saddr_len, u32 data, u8 data_len, int master); | |
e0d3bafd | 768 | int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, |
cde4362f | 769 | u16 saddr, u8 saddr_len, u32 *data, u8 data_len); |
e0d3bafd | 770 | int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, |
84b5dbf3 MCC |
771 | u16 saddr, u8 saddr_len, u32 data, u8 data_len); |
772 | int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size, | |
773 | u16 register_address, u8 bit_start, u8 bit_end, | |
774 | u32 value); | |
e0d3bafd | 775 | int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr, |
84b5dbf3 | 776 | u16 saddr, u32 mask, u32 value); |
e0d3bafd SD |
777 | u32 cx231xx_set_field(u32 field_mask, u32 data); |
778 | ||
64fbf444 PB |
779 | /*verve r/w*/ |
780 | void initGPIO(struct cx231xx *dev); | |
781 | void uninitGPIO(struct cx231xx *dev); | |
ecc67d10 SD |
782 | /* afe related functions */ |
783 | int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count); | |
784 | int cx231xx_afe_init_channels(struct cx231xx *dev); | |
785 | int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev); | |
786 | int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux); | |
787 | int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode); | |
788 | int cx231xx_afe_update_power_control(struct cx231xx *dev, | |
6e4f574b | 789 | enum AV_MODE avmode); |
ecc67d10 | 790 | int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input); |
e0d3bafd | 791 | |
ecc67d10 SD |
792 | /* i2s block related functions */ |
793 | int cx231xx_i2s_blk_initialize(struct cx231xx *dev); | |
794 | int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev, | |
6e4f574b | 795 | enum AV_MODE avmode); |
ecc67d10 | 796 | int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input); |
e0d3bafd SD |
797 | |
798 | /* DIF related functions */ | |
799 | int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode, | |
84b5dbf3 | 800 | u32 function_mode, u32 standard); |
64fbf444 PB |
801 | void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq, |
802 | u8 spectral_invert, u32 mode); | |
803 | u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd); | |
804 | void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq, | |
805 | u8 spectral_invert, u32 mode); | |
806 | void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev); | |
807 | void reset_s5h1432_demod(struct cx231xx *dev); | |
808 | void cx231xx_dump_HH_reg(struct cx231xx *dev); | |
809 | void update_HH_register_after_set_DIF(struct cx231xx *dev); | |
810 | void cx231xx_dump_SC_reg(struct cx231xx *dev); | |
811 | ||
812 | ||
813 | ||
e0d3bafd SD |
814 | int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard); |
815 | int cx231xx_tuner_pre_channel_change(struct cx231xx *dev); | |
816 | int cx231xx_tuner_post_channel_change(struct cx231xx *dev); | |
817 | ||
818 | /* video parser functions */ | |
cde4362f MCC |
819 | u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size, |
820 | u32 *p_bytes_used); | |
821 | u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf, | |
822 | u32 *p_bytes_used); | |
e0d3bafd | 823 | int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, |
cde4362f | 824 | u8 *p_buffer, u32 bytes_to_copy); |
84b5dbf3 MCC |
825 | void cx231xx_reset_video_buffer(struct cx231xx *dev, |
826 | struct cx231xx_dmaqueue *dma_q); | |
827 | u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q); | |
828 | u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, | |
cde4362f | 829 | u8 *p_line, u32 length, int field_number); |
84b5dbf3 | 830 | u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, |
cde4362f MCC |
831 | u8 sav_eav, u8 *p_buffer, u32 buffer_size); |
832 | void cx231xx_swab(u16 *from, u16 *to, u16 len); | |
e0d3bafd SD |
833 | |
834 | /* Provided by cx231xx-core.c */ | |
835 | ||
836 | u32 cx231xx_request_buffers(struct cx231xx *dev, u32 count); | |
837 | void cx231xx_queue_unusedframes(struct cx231xx *dev); | |
838 | void cx231xx_release_buffers(struct cx231xx *dev); | |
839 | ||
840 | /* read from control pipe */ | |
841 | int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, | |
84b5dbf3 | 842 | char *buf, int len); |
e0d3bafd SD |
843 | |
844 | /* write to control pipe */ | |
845 | int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, | |
84b5dbf3 | 846 | char *buf, int len); |
e0d3bafd SD |
847 | int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode); |
848 | ||
b9255176 SD |
849 | int cx231xx_send_vendor_cmd(struct cx231xx *dev, |
850 | struct VENDOR_REQUEST_IN *ven_req); | |
e0d3bafd | 851 | int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus, |
b9255176 | 852 | struct cx231xx_i2c_xfer_data *req_data); |
e0d3bafd SD |
853 | |
854 | /* Gpio related functions */ | |
cde4362f | 855 | int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val, |
84b5dbf3 | 856 | u8 len, u8 request, u8 direction); |
cde4362f MCC |
857 | int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val); |
858 | int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val); | |
e0d3bafd | 859 | int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value); |
84b5dbf3 MCC |
860 | int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number, |
861 | int pin_value); | |
e0d3bafd SD |
862 | |
863 | int cx231xx_gpio_i2c_start(struct cx231xx *dev); | |
864 | int cx231xx_gpio_i2c_end(struct cx231xx *dev); | |
865 | int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data); | |
cde4362f | 866 | int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf); |
e0d3bafd SD |
867 | int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev); |
868 | int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev); | |
869 | int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev); | |
870 | ||
cde4362f MCC |
871 | int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len); |
872 | int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len); | |
e0d3bafd SD |
873 | |
874 | /* audio related functions */ | |
84b5dbf3 MCC |
875 | int cx231xx_set_audio_decoder_input(struct cx231xx *dev, |
876 | enum AUDIO_INPUT audio_input); | |
e0d3bafd SD |
877 | |
878 | int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type); | |
879 | int cx231xx_resolution_set(struct cx231xx *dev); | |
880 | int cx231xx_set_video_alternate(struct cx231xx *dev); | |
881 | int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt); | |
64fbf444 PB |
882 | int is_fw_load(struct cx231xx *dev); |
883 | int cx231xx_check_fw(struct cx231xx *dev); | |
e0d3bafd | 884 | int cx231xx_init_isoc(struct cx231xx *dev, int max_packets, |
84b5dbf3 | 885 | int num_bufs, int max_pkt_size, |
cde4362f MCC |
886 | int (*isoc_copy) (struct cx231xx *dev, |
887 | struct urb *urb)); | |
64fbf444 PB |
888 | int cx231xx_init_bulk(struct cx231xx *dev, int max_packets, |
889 | int num_bufs, int max_pkt_size, | |
890 | int (*bulk_copy) (struct cx231xx *dev, | |
891 | struct urb *urb)); | |
892 | void cx231xx_stop_TS1(struct cx231xx *dev); | |
893 | void cx231xx_start_TS1(struct cx231xx *dev); | |
e0d3bafd | 894 | void cx231xx_uninit_isoc(struct cx231xx *dev); |
64fbf444 | 895 | void cx231xx_uninit_bulk(struct cx231xx *dev); |
e0d3bafd | 896 | int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode); |
64fbf444 PB |
897 | int cx231xx_unmute_audio(struct cx231xx *dev); |
898 | int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size); | |
899 | void cx231xx_disable656(struct cx231xx *dev); | |
900 | void cx231xx_enable656(struct cx231xx *dev); | |
901 | int cx231xx_demod_reset(struct cx231xx *dev); | |
e0d3bafd SD |
902 | int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio); |
903 | ||
904 | /* Device list functions */ | |
905 | void cx231xx_release_resources(struct cx231xx *dev); | |
906 | void cx231xx_release_analog_resources(struct cx231xx *dev); | |
907 | int cx231xx_register_analog_devices(struct cx231xx *dev); | |
908 | void cx231xx_remove_from_devlist(struct cx231xx *dev); | |
909 | void cx231xx_add_into_devlist(struct cx231xx *dev); | |
e0d3bafd SD |
910 | void cx231xx_init_extension(struct cx231xx *dev); |
911 | void cx231xx_close_extension(struct cx231xx *dev); | |
912 | ||
913 | /* hardware init functions */ | |
914 | int cx231xx_dev_init(struct cx231xx *dev); | |
915 | void cx231xx_dev_uninit(struct cx231xx *dev); | |
916 | void cx231xx_config_i2c(struct cx231xx *dev); | |
917 | int cx231xx_config(struct cx231xx *dev); | |
918 | ||
919 | /* Stream control functions */ | |
920 | int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask); | |
921 | int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask); | |
922 | ||
923 | int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type); | |
924 | ||
925 | /* Power control functions */ | |
6e4f574b | 926 | int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode); |
e0d3bafd SD |
927 | int cx231xx_power_suspend(struct cx231xx *dev); |
928 | ||
929 | /* chip specific control functions */ | |
930 | int cx231xx_init_ctrl_pin_status(struct cx231xx *dev); | |
84b5dbf3 MCC |
931 | int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev, |
932 | u8 analog_or_digital); | |
e0d3bafd SD |
933 | int cx231xx_enable_i2c_for_tuner(struct cx231xx *dev, u8 I2CIndex); |
934 | ||
935 | /* video audio decoder related functions */ | |
936 | void video_mux(struct cx231xx *dev, int index); | |
937 | int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input); | |
938 | int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input); | |
939 | int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev); | |
940 | int cx231xx_set_audio_input(struct cx231xx *dev, u8 input); | |
e0d3bafd SD |
941 | |
942 | /* Provided by cx231xx-video.c */ | |
943 | int cx231xx_register_extension(struct cx231xx_ops *dev); | |
944 | void cx231xx_unregister_extension(struct cx231xx_ops *dev); | |
945 | void cx231xx_init_extension(struct cx231xx *dev); | |
946 | void cx231xx_close_extension(struct cx231xx *dev); | |
947 | ||
948 | /* Provided by cx231xx-cards.c */ | |
949 | extern void cx231xx_pre_card_setup(struct cx231xx *dev); | |
950 | extern void cx231xx_card_setup(struct cx231xx *dev); | |
951 | extern struct cx231xx_board cx231xx_boards[]; | |
952 | extern struct usb_device_id cx231xx_id_table[]; | |
953 | extern const unsigned int cx231xx_bcount; | |
c668f32d | 954 | void cx231xx_register_i2c_ir(struct cx231xx *dev); |
e0d3bafd SD |
955 | int cx231xx_tuner_callback(void *ptr, int component, int command, int arg); |
956 | ||
957 | /* Provided by cx231xx-input.c */ | |
958 | int cx231xx_ir_init(struct cx231xx *dev); | |
959 | int cx231xx_ir_fini(struct cx231xx *dev); | |
960 | ||
64fbf444 PB |
961 | /* cx23885-417.c */ |
962 | extern int cx231xx_417_register(struct cx231xx *dev); | |
963 | extern void cx231xx_417_unregister(struct cx231xx *dev); | |
964 | ||
e0d3bafd SD |
965 | /* printk macros */ |
966 | ||
967 | #define cx231xx_err(fmt, arg...) do {\ | |
968 | printk(KERN_ERR fmt , ##arg); } while (0) | |
969 | ||
970 | #define cx231xx_errdev(fmt, arg...) do {\ | |
971 | printk(KERN_ERR "%s: "fmt,\ | |
972 | dev->name , ##arg); } while (0) | |
973 | ||
974 | #define cx231xx_info(fmt, arg...) do {\ | |
975 | printk(KERN_INFO "%s: "fmt,\ | |
976 | dev->name , ##arg); } while (0) | |
977 | #define cx231xx_warn(fmt, arg...) do {\ | |
978 | printk(KERN_WARNING "%s: "fmt,\ | |
979 | dev->name , ##arg); } while (0) | |
980 | ||
e0d3bafd SD |
981 | static inline unsigned int norm_maxw(struct cx231xx *dev) |
982 | { | |
983 | if (dev->board.max_range_640_480) | |
984 | return 640; | |
985 | else | |
986 | return 720; | |
987 | } | |
988 | ||
989 | static inline unsigned int norm_maxh(struct cx231xx *dev) | |
990 | { | |
991 | if (dev->board.max_range_640_480) | |
992 | return 480; | |
993 | else | |
994 | return (dev->norm & V4L2_STD_625_50) ? 576 : 480; | |
995 | } | |
996 | #endif |