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Commit | Line | Data |
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e0d3bafd SD |
1 | /* |
2 | cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices | |
3 | ||
4 | Copyright (C) 2008 <srinivasa.deevi at conexant dot com> | |
84b5dbf3 | 5 | Based on em28xx driver |
e0d3bafd SD |
6 | |
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #ifndef _CX231XX_H | |
23 | #define _CX231XX_H | |
24 | ||
25 | #include <linux/videodev2.h> | |
b1196126 SD |
26 | #include <linux/types.h> |
27 | #include <linux/ioctl.h> | |
e0d3bafd SD |
28 | #include <linux/i2c.h> |
29 | #include <linux/i2c-algo-bit.h> | |
61b04cb2 | 30 | #include <linux/workqueue.h> |
e0d3bafd | 31 | #include <linux/mutex.h> |
b1196126 | 32 | |
64fbf444 | 33 | #include <media/cx2341x.h> |
b1196126 SD |
34 | |
35 | #include <media/videobuf-vmalloc.h> | |
36 | #include <media/v4l2-device.h> | |
6bda9644 | 37 | #include <media/rc-core.h> |
9ab66912 | 38 | #include <media/ir-kbd-i2c.h> |
e0d3bafd | 39 | #include <media/videobuf-dvb.h> |
e0d3bafd SD |
40 | |
41 | #include "cx231xx-reg.h" | |
6e4f574b | 42 | #include "cx231xx-pcb-cfg.h" |
e0d3bafd SD |
43 | #include "cx231xx-conf-reg.h" |
44 | ||
e0d3bafd SD |
45 | #define DRIVER_NAME "cx231xx" |
46 | #define PWR_SLEEP_INTERVAL 5 | |
47 | ||
48 | /* I2C addresses for control block in Cx231xx */ | |
ecc67d10 SD |
49 | #define AFE_DEVICE_ADDRESS 0x60 |
50 | #define I2S_BLK_DEVICE_ADDRESS 0x98 | |
51 | #define VID_BLK_I2C_ADDRESS 0x88 | |
64fbf444 | 52 | #define VERVE_I2C_ADDRESS 0x40 |
e0d3bafd SD |
53 | #define DIF_USE_BASEBAND 0xFFFFFFFF |
54 | ||
55 | /* Boards supported by driver */ | |
56 | #define CX231XX_BOARD_UNKNOWN 0 | |
955e6ed8 MCC |
57 | #define CX231XX_BOARD_CNXT_CARRAERA 1 |
58 | #define CX231XX_BOARD_CNXT_SHELBY 2 | |
59 | #define CX231XX_BOARD_CNXT_RDE_253S 3 | |
60 | #define CX231XX_BOARD_CNXT_RDU_253S 4 | |
64fbf444 | 61 | #define CX231XX_BOARD_CNXT_VIDEO_GRABBER 5 |
955e6ed8 MCC |
62 | #define CX231XX_BOARD_CNXT_RDE_250 6 |
63 | #define CX231XX_BOARD_CNXT_RDU_250 7 | |
1a50fdde | 64 | #define CX231XX_BOARD_HAUPPAUGE_EXETER 8 |
4270c3ca | 65 | #define CX231XX_BOARD_HAUPPAUGE_USBLIVE2 9 |
9417bc6d | 66 | #define CX231XX_BOARD_PV_PLAYTV_USB_HYBRID 10 |
e0d3bafd SD |
67 | |
68 | /* Limits minimum and default number of buffers */ | |
69 | #define CX231XX_MIN_BUF 4 | |
70 | #define CX231XX_DEF_BUF 12 | |
71 | #define CX231XX_DEF_VBI_BUF 6 | |
72 | ||
73 | #define VBI_LINE_COUNT 17 | |
74 | #define VBI_LINE_LENGTH 1440 | |
75 | ||
76 | /*Limits the max URB message size */ | |
77 | #define URB_MAX_CTRL_SIZE 80 | |
78 | ||
79 | /* Params for validated field */ | |
80 | #define CX231XX_BOARD_NOT_VALIDATED 1 | |
84b5dbf3 | 81 | #define CX231XX_BOARD_VALIDATED 0 |
e0d3bafd SD |
82 | |
83 | /* maximum number of cx231xx boards */ | |
84 | #define CX231XX_MAXBOARDS 8 | |
85 | ||
86 | /* maximum number of frames that can be queued */ | |
87 | #define CX231XX_NUM_FRAMES 5 | |
88 | ||
89 | /* number of buffers for isoc transfers */ | |
90 | #define CX231XX_NUM_BUFS 8 | |
91 | ||
92 | /* number of packets for each buffer | |
93 | windows requests only 40 packets .. so we better do the same | |
94 | this is what I found out for all alternate numbers there! | |
95 | */ | |
96 | #define CX231XX_NUM_PACKETS 40 | |
97 | ||
e0d3bafd SD |
98 | /* default alternate; 0 means choose the best */ |
99 | #define CX231XX_PINOUT 0 | |
100 | ||
101 | #define CX231XX_INTERLACED_DEFAULT 1 | |
102 | ||
e0d3bafd | 103 | /* time to wait when stopping the isoc transfer */ |
b9255176 SD |
104 | #define CX231XX_URB_TIMEOUT \ |
105 | msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS) | |
e0d3bafd | 106 | |
64fbf444 PB |
107 | #define CX231xx_NORMS (\ |
108 | V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ | |
109 | V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ | |
110 | V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ | |
111 | V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) | |
112 | #define CX231xx_VERSION_CODE KERNEL_VERSION(0, 0, 2) | |
113 | ||
114 | #define SLEEP_S5H1432 30 | |
115 | #define CX23417_OSC_EN 8 | |
116 | #define CX23417_RESET 9 | |
117 | ||
118 | struct cx23417_fmt { | |
119 | char *name; | |
120 | u32 fourcc; /* v4l2 format id */ | |
121 | int depth; | |
122 | int flags; | |
123 | u32 cxformat; | |
124 | }; | |
e0d3bafd SD |
125 | enum cx231xx_mode { |
126 | CX231XX_SUSPEND, | |
127 | CX231XX_ANALOG_MODE, | |
128 | CX231XX_DIGITAL_MODE, | |
129 | }; | |
130 | ||
131 | enum cx231xx_std_mode { | |
132 | CX231XX_TV_AIR = 0, | |
133 | CX231XX_TV_CABLE | |
134 | }; | |
135 | ||
136 | enum cx231xx_stream_state { | |
137 | STREAM_OFF, | |
138 | STREAM_INTERRUPT, | |
139 | STREAM_ON, | |
140 | }; | |
141 | ||
142 | struct cx231xx; | |
143 | ||
64fbf444 | 144 | struct cx231xx_isoc_ctl { |
84b5dbf3 MCC |
145 | /* max packet size of isoc transaction */ |
146 | int max_pkt_size; | |
e0d3bafd | 147 | |
84b5dbf3 MCC |
148 | /* number of allocated urbs */ |
149 | int num_bufs; | |
e0d3bafd | 150 | |
84b5dbf3 MCC |
151 | /* urb for isoc transfers */ |
152 | struct urb **urb; | |
e0d3bafd | 153 | |
84b5dbf3 MCC |
154 | /* transfer buffers for isoc transfer */ |
155 | char **transfer_buffer; | |
e0d3bafd | 156 | |
84b5dbf3 MCC |
157 | /* Last buffer command and region */ |
158 | u8 cmd; | |
159 | int pos, size, pktsize; | |
e0d3bafd | 160 | |
84b5dbf3 MCC |
161 | /* Last field: ODD or EVEN? */ |
162 | int field; | |
e0d3bafd | 163 | |
84b5dbf3 MCC |
164 | /* Stores incomplete commands */ |
165 | u32 tmp_buf; | |
166 | int tmp_buf_len; | |
e0d3bafd | 167 | |
84b5dbf3 MCC |
168 | /* Stores already requested buffers */ |
169 | struct cx231xx_buffer *buf; | |
e0d3bafd | 170 | |
84b5dbf3 MCC |
171 | /* Stores the number of received fields */ |
172 | int nfields; | |
e0d3bafd | 173 | |
84b5dbf3 | 174 | /* isoc urb callback */ |
cde4362f | 175 | int (*isoc_copy) (struct cx231xx *dev, struct urb *urb); |
e0d3bafd SD |
176 | }; |
177 | ||
64fbf444 PB |
178 | struct cx231xx_bulk_ctl { |
179 | /* max packet size of bulk transaction */ | |
180 | int max_pkt_size; | |
181 | ||
182 | /* number of allocated urbs */ | |
183 | int num_bufs; | |
184 | ||
185 | /* urb for bulk transfers */ | |
186 | struct urb **urb; | |
187 | ||
188 | /* transfer buffers for bulk transfer */ | |
189 | char **transfer_buffer; | |
190 | ||
191 | /* Last buffer command and region */ | |
192 | u8 cmd; | |
193 | int pos, size, pktsize; | |
194 | ||
195 | /* Last field: ODD or EVEN? */ | |
196 | int field; | |
197 | ||
198 | /* Stores incomplete commands */ | |
199 | u32 tmp_buf; | |
200 | int tmp_buf_len; | |
201 | ||
202 | /* Stores already requested buffers */ | |
203 | struct cx231xx_buffer *buf; | |
204 | ||
205 | /* Stores the number of received fields */ | |
206 | int nfields; | |
207 | ||
208 | /* bulk urb callback */ | |
209 | int (*bulk_copy) (struct cx231xx *dev, struct urb *urb); | |
210 | }; | |
211 | ||
e0d3bafd | 212 | struct cx231xx_fmt { |
84b5dbf3 MCC |
213 | char *name; |
214 | u32 fourcc; /* v4l2 format id */ | |
215 | int depth; | |
216 | int reg; | |
e0d3bafd SD |
217 | }; |
218 | ||
219 | /* buffer for one video frame */ | |
220 | struct cx231xx_buffer { | |
221 | /* common v4l buffer stuff -- must be first */ | |
222 | struct videobuf_buffer vb; | |
223 | ||
224 | struct list_head frame; | |
225 | int top_field; | |
226 | int receiving; | |
227 | }; | |
228 | ||
64fbf444 PB |
229 | enum ps_package_head { |
230 | CX231XX_NEED_ADD_PS_PACKAGE_HEAD = 0, | |
231 | CX231XX_NONEED_PS_PACKAGE_HEAD | |
232 | }; | |
233 | ||
e0d3bafd | 234 | struct cx231xx_dmaqueue { |
84b5dbf3 MCC |
235 | struct list_head active; |
236 | struct list_head queued; | |
e0d3bafd | 237 | |
84b5dbf3 | 238 | wait_queue_head_t wq; |
e0d3bafd SD |
239 | |
240 | /* Counters to control buffer fill */ | |
84b5dbf3 MCC |
241 | int pos; |
242 | u8 is_partial_line; | |
243 | u8 partial_buf[8]; | |
244 | u8 last_sav; | |
245 | int current_field; | |
246 | u32 bytes_left_in_line; | |
247 | u32 lines_completed; | |
248 | u8 field1_done; | |
249 | u32 lines_per_field; | |
64fbf444 PB |
250 | |
251 | /*Mpeg2 control buffer*/ | |
252 | u8 *p_left_data; | |
253 | u32 left_data_count; | |
254 | u8 mpeg_buffer_done; | |
255 | u32 mpeg_buffer_completed; | |
256 | enum ps_package_head add_ps_package_head; | |
257 | char ps_head[10]; | |
e0d3bafd SD |
258 | }; |
259 | ||
e0d3bafd SD |
260 | /* inputs */ |
261 | ||
262 | #define MAX_CX231XX_INPUT 4 | |
263 | ||
264 | enum cx231xx_itype { | |
265 | CX231XX_VMUX_COMPOSITE1 = 1, | |
266 | CX231XX_VMUX_SVIDEO, | |
267 | CX231XX_VMUX_TELEVISION, | |
84b5dbf3 MCC |
268 | CX231XX_VMUX_CABLE, |
269 | CX231XX_RADIO, | |
270 | CX231XX_VMUX_DVB, | |
e0d3bafd SD |
271 | CX231XX_VMUX_DEBUG |
272 | }; | |
273 | ||
274 | enum cx231xx_v_input { | |
84b5dbf3 MCC |
275 | CX231XX_VIN_1_1 = 0x1, |
276 | CX231XX_VIN_2_1, | |
277 | CX231XX_VIN_3_1, | |
278 | CX231XX_VIN_4_1, | |
279 | CX231XX_VIN_1_2 = 0x01, | |
280 | CX231XX_VIN_2_2, | |
281 | CX231XX_VIN_3_2, | |
282 | CX231XX_VIN_1_3 = 0x1, | |
283 | CX231XX_VIN_2_3, | |
284 | CX231XX_VIN_3_3, | |
e0d3bafd SD |
285 | }; |
286 | ||
287 | /* cx231xx has two audio inputs: tuner and line in */ | |
288 | enum cx231xx_amux { | |
289 | /* This is the only entry for cx231xx tuner input */ | |
84b5dbf3 | 290 | CX231XX_AMUX_VIDEO, /* cx231xx tuner */ |
e0d3bafd SD |
291 | CX231XX_AMUX_LINE_IN, /* Line In */ |
292 | }; | |
293 | ||
294 | struct cx231xx_reg_seq { | |
295 | unsigned char bit; | |
84b5dbf3 | 296 | unsigned char val; |
e0d3bafd SD |
297 | int sleep; |
298 | }; | |
299 | ||
300 | struct cx231xx_input { | |
301 | enum cx231xx_itype type; | |
302 | unsigned int vmux; | |
303 | enum cx231xx_amux amux; | |
304 | struct cx231xx_reg_seq *gpio; | |
305 | }; | |
306 | ||
307 | #define INPUT(nr) (&cx231xx_boards[dev->model].input[nr]) | |
308 | ||
309 | enum cx231xx_decoder { | |
310 | CX231XX_NODECODER, | |
311 | CX231XX_AVDECODER | |
312 | }; | |
313 | ||
b9255176 | 314 | enum CX231XX_I2C_MASTER_PORT { |
84b5dbf3 MCC |
315 | I2C_0 = 0, |
316 | I2C_1 = 1, | |
317 | I2C_2 = 2, | |
318 | I2C_3 = 3 | |
b9255176 | 319 | }; |
e0d3bafd SD |
320 | |
321 | struct cx231xx_board { | |
322 | char *name; | |
323 | int vchannels; | |
324 | int tuner_type; | |
325 | int tuner_addr; | |
84b5dbf3 | 326 | v4l2_std_id norm; /* tv norm */ |
e0d3bafd | 327 | |
84b5dbf3 MCC |
328 | /* demod related */ |
329 | int demod_addr; | |
330 | u8 demod_xfer_mode; /* 0 - Serial; 1 - parallel */ | |
e0d3bafd SD |
331 | |
332 | /* GPIO Pins */ | |
333 | struct cx231xx_reg_seq *dvb_gpio; | |
334 | struct cx231xx_reg_seq *suspend_gpio; | |
335 | struct cx231xx_reg_seq *tuner_gpio; | |
78bb6df6 MCC |
336 | /* Negative means don't use it */ |
337 | s8 tuner_sif_gpio; | |
338 | s8 tuner_scl_gpio; | |
339 | s8 tuner_sda_gpio; | |
e0d3bafd | 340 | |
84b5dbf3 MCC |
341 | /* PIN ctrl */ |
342 | u32 ctl_pin_status_mask; | |
343 | u8 agc_analog_digital_select_gpio; | |
344 | u32 gpio_pin_status_mask; | |
e0d3bafd | 345 | |
84b5dbf3 MCC |
346 | /* i2c masters */ |
347 | u8 tuner_i2c_master; | |
348 | u8 demod_i2c_master; | |
9ab66912 MCC |
349 | u8 ir_i2c_master; |
350 | ||
351 | /* for devices with I2C chips for IR */ | |
29e3ec19 | 352 | char *rc_map_name; |
e0d3bafd SD |
353 | |
354 | unsigned int max_range_640_480:1; | |
355 | unsigned int has_dvb:1; | |
356 | unsigned int valid:1; | |
357 | ||
358 | unsigned char xclk, i2c_speed; | |
359 | ||
360 | enum cx231xx_decoder decoder; | |
88806218 | 361 | int output_mode; |
e0d3bafd | 362 | |
84b5dbf3 MCC |
363 | struct cx231xx_input input[MAX_CX231XX_INPUT]; |
364 | struct cx231xx_input radio; | |
715a2233 | 365 | struct ir_scancode_table *ir_codes; |
e0d3bafd SD |
366 | }; |
367 | ||
368 | /* device states */ | |
369 | enum cx231xx_dev_state { | |
370 | DEV_INITIALIZED = 0x01, | |
371 | DEV_DISCONNECTED = 0x02, | |
372 | DEV_MISCONFIGURED = 0x04, | |
373 | }; | |
374 | ||
84b5dbf3 MCC |
375 | enum AFE_MODE { |
376 | AFE_MODE_LOW_IF, | |
377 | AFE_MODE_BASEBAND, | |
378 | AFE_MODE_EU_HI_IF, | |
379 | AFE_MODE_US_HI_IF, | |
380 | AFE_MODE_JAPAN_HI_IF | |
e0d3bafd SD |
381 | }; |
382 | ||
84b5dbf3 MCC |
383 | enum AUDIO_INPUT { |
384 | AUDIO_INPUT_MUTE, | |
385 | AUDIO_INPUT_LINE, | |
386 | AUDIO_INPUT_TUNER_TV, | |
387 | AUDIO_INPUT_SPDIF, | |
388 | AUDIO_INPUT_TUNER_FM | |
e0d3bafd SD |
389 | }; |
390 | ||
391 | #define CX231XX_AUDIO_BUFS 5 | |
64fbf444 PB |
392 | #define CX231XX_NUM_AUDIO_PACKETS 16 |
393 | #define CX231XX_ISO_NUM_AUDIO_PACKETS 64 | |
e0d3bafd | 394 | |
e0d3bafd SD |
395 | /* cx231xx extensions */ |
396 | #define CX231XX_AUDIO 0x10 | |
397 | #define CX231XX_DVB 0x20 | |
398 | ||
399 | struct cx231xx_audio { | |
400 | char name[50]; | |
401 | char *transfer_buffer[CX231XX_AUDIO_BUFS]; | |
402 | struct urb *urb[CX231XX_AUDIO_BUFS]; | |
403 | struct usb_device *udev; | |
404 | unsigned int capture_transfer_done; | |
84b5dbf3 | 405 | struct snd_pcm_substream *capture_pcm_substream; |
e0d3bafd SD |
406 | |
407 | unsigned int hwptr_done_capture; | |
84b5dbf3 | 408 | struct snd_card *sndcard; |
e0d3bafd SD |
409 | |
410 | int users, shutdown; | |
64fbf444 | 411 | /* locks */ |
e0d3bafd SD |
412 | spinlock_t slock; |
413 | ||
84b5dbf3 MCC |
414 | int alt; /* alternate */ |
415 | int max_pkt_size; /* max packet size of isoc transaction */ | |
416 | int num_alt; /* Number of alternative settings */ | |
e0d3bafd | 417 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ |
84b5dbf3 | 418 | u16 end_point_addr; |
e0d3bafd SD |
419 | }; |
420 | ||
421 | struct cx231xx; | |
422 | ||
423 | struct cx231xx_fh { | |
424 | struct cx231xx *dev; | |
84b5dbf3 MCC |
425 | unsigned int stream_on:1; /* Locks streams */ |
426 | int radio; | |
e0d3bafd | 427 | |
84b5dbf3 | 428 | struct videobuf_queue vb_vidq; |
e0d3bafd | 429 | |
84b5dbf3 | 430 | enum v4l2_buf_type type; |
64fbf444 PB |
431 | |
432 | ||
433 | ||
434 | /*following is copyed from cx23885.h*/ | |
435 | u32 resources; | |
436 | ||
437 | /* video overlay */ | |
438 | struct v4l2_window win; | |
439 | struct v4l2_clip *clips; | |
440 | unsigned int nclips; | |
441 | ||
442 | /* video capture */ | |
443 | struct cx23417_fmt *fmt; | |
444 | unsigned int width, height; | |
445 | ||
446 | /* vbi capture */ | |
447 | struct videobuf_queue vidq; | |
448 | struct videobuf_queue vbiq; | |
449 | ||
450 | /* MPEG Encoder specifics ONLY */ | |
451 | ||
452 | atomic_t v4l_reading; | |
e0d3bafd SD |
453 | }; |
454 | ||
b9255176 | 455 | /*****************************************************************/ |
e0d3bafd | 456 | /* set/get i2c */ |
b9255176 SD |
457 | /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */ |
458 | #define I2C_SPEED_1M 0x0 | |
459 | #define I2C_SPEED_400K 0x1 | |
460 | #define I2C_SPEED_100K 0x2 | |
461 | #define I2C_SPEED_5M 0x3 | |
462 | ||
463 | /* 0-- STOP transaction */ | |
464 | #define I2C_STOP 0x0 | |
465 | /* 1-- do not transmit STOP at end of transaction */ | |
466 | #define I2C_NOSTOP 0x1 | |
467 | /* 1--alllow slave to insert clock wait states */ | |
468 | #define I2C_SYNC 0x1 | |
e0d3bafd SD |
469 | |
470 | struct cx231xx_i2c { | |
84b5dbf3 | 471 | struct cx231xx *dev; |
e0d3bafd | 472 | |
84b5dbf3 | 473 | int nr; |
e0d3bafd SD |
474 | |
475 | /* i2c i/o */ | |
84b5dbf3 MCC |
476 | struct i2c_adapter i2c_adap; |
477 | struct i2c_algo_bit_data i2c_algo; | |
478 | struct i2c_client i2c_client; | |
479 | u32 i2c_rc; | |
e0d3bafd SD |
480 | |
481 | /* different settings for each bus */ | |
84b5dbf3 MCC |
482 | u8 i2c_period; |
483 | u8 i2c_nostop; | |
484 | u8 i2c_reserve; | |
e0d3bafd SD |
485 | }; |
486 | ||
84b5dbf3 MCC |
487 | struct cx231xx_i2c_xfer_data { |
488 | u8 dev_addr; | |
489 | u8 direction; /* 1 - IN, 0 - OUT */ | |
490 | u8 saddr_len; /* sub address len */ | |
491 | u16 saddr_dat; /* sub addr data */ | |
492 | u8 buf_size; /* buffer size */ | |
493 | u8 *p_buffer; /* pointer to the buffer */ | |
e0d3bafd SD |
494 | }; |
495 | ||
6e4f574b | 496 | struct VENDOR_REQUEST_IN { |
84b5dbf3 MCC |
497 | u8 bRequest; |
498 | u16 wValue; | |
499 | u16 wIndex; | |
500 | u16 wLength; | |
501 | u8 direction; | |
502 | u8 bData; | |
503 | u8 *pBuff; | |
b9255176 | 504 | }; |
e0d3bafd | 505 | |
64fbf444 PB |
506 | struct cx231xx_tvnorm { |
507 | char *name; | |
508 | v4l2_std_id id; | |
509 | u32 cxiformat; | |
510 | u32 cxoformat; | |
511 | }; | |
512 | ||
e0d3bafd SD |
513 | struct cx231xx_ctrl { |
514 | struct v4l2_queryctrl v; | |
84b5dbf3 MCC |
515 | u32 off; |
516 | u32 reg; | |
517 | u32 mask; | |
518 | u32 shift; | |
e0d3bafd SD |
519 | }; |
520 | ||
6e4f574b | 521 | enum TRANSFER_TYPE { |
84b5dbf3 MCC |
522 | Raw_Video = 0, |
523 | Audio, | |
524 | Vbi, /* VANC */ | |
525 | Sliced_cc, /* HANC */ | |
526 | TS1_serial_mode, | |
527 | TS2, | |
528 | TS1_parallel_mode | |
b9255176 | 529 | } ; |
e0d3bafd SD |
530 | |
531 | struct cx231xx_video_mode { | |
84b5dbf3 | 532 | /* Isoc control struct */ |
e0d3bafd | 533 | struct cx231xx_dmaqueue vidq; |
64fbf444 PB |
534 | struct cx231xx_isoc_ctl isoc_ctl; |
535 | struct cx231xx_bulk_ctl bulk_ctl; | |
536 | /* locks */ | |
e0d3bafd SD |
537 | spinlock_t slock; |
538 | ||
539 | /* usb transfer */ | |
84b5dbf3 MCC |
540 | int alt; /* alternate */ |
541 | int max_pkt_size; /* max packet size of isoc transaction */ | |
542 | int num_alt; /* Number of alternative settings */ | |
e0d3bafd | 543 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ |
84b5dbf3 | 544 | u16 end_point_addr; |
e0d3bafd | 545 | }; |
64fbf444 PB |
546 | /* |
547 | struct cx23885_dmaqueue { | |
548 | struct list_head active; | |
549 | struct list_head queued; | |
550 | struct timer_list timeout; | |
551 | struct btcx_riscmem stopper; | |
552 | u32 count; | |
553 | }; | |
554 | */ | |
555 | struct cx231xx_tsport { | |
556 | struct cx231xx *dev; | |
557 | ||
558 | int nr; | |
559 | int sram_chno; | |
560 | ||
561 | struct videobuf_dvb_frontends frontends; | |
562 | ||
563 | /* dma queues */ | |
564 | ||
565 | u32 ts_packet_size; | |
566 | u32 ts_packet_count; | |
567 | ||
568 | int width; | |
569 | int height; | |
570 | ||
571 | /* locks */ | |
572 | spinlock_t slock; | |
573 | ||
574 | /* registers */ | |
575 | u32 reg_gpcnt; | |
576 | u32 reg_gpcnt_ctl; | |
577 | u32 reg_dma_ctl; | |
578 | u32 reg_lngth; | |
579 | u32 reg_hw_sop_ctrl; | |
580 | u32 reg_gen_ctrl; | |
581 | u32 reg_bd_pkt_status; | |
582 | u32 reg_sop_status; | |
583 | u32 reg_fifo_ovfl_stat; | |
584 | u32 reg_vld_misc; | |
585 | u32 reg_ts_clk_en; | |
586 | u32 reg_ts_int_msk; | |
587 | u32 reg_ts_int_stat; | |
588 | u32 reg_src_sel; | |
589 | ||
590 | /* Default register vals */ | |
591 | int pci_irqmask; | |
592 | u32 dma_ctl_val; | |
593 | u32 ts_int_msk_val; | |
594 | u32 gen_ctrl_val; | |
595 | u32 ts_clk_en_val; | |
596 | u32 src_sel_val; | |
597 | u32 vld_misc_val; | |
598 | u32 hw_sop_ctrl_val; | |
599 | ||
600 | /* Allow a single tsport to have multiple frontends */ | |
601 | u32 num_frontends; | |
602 | void *port_priv; | |
603 | }; | |
e0d3bafd | 604 | |
e0d3bafd SD |
605 | /* main device struct */ |
606 | struct cx231xx { | |
607 | /* generic device properties */ | |
84b5dbf3 MCC |
608 | char name[30]; /* name (including minor) of the device */ |
609 | int model; /* index in the device_data struct */ | |
610 | int devno; /* marks the number of this device */ | |
e0d3bafd SD |
611 | |
612 | struct cx231xx_board board; | |
613 | ||
9ab66912 | 614 | /* For I2C IR support */ |
141bb0dc | 615 | struct IR_i2c_init_data init_data; |
9ab66912 | 616 | |
84b5dbf3 MCC |
617 | unsigned int stream_on:1; /* Locks streams */ |
618 | unsigned int vbi_stream_on:1; /* Locks streams for VBI */ | |
e0d3bafd SD |
619 | unsigned int has_audio_class:1; |
620 | unsigned int has_alsa_audio:1; | |
621 | ||
84b5dbf3 | 622 | struct cx231xx_fmt *format; |
e0d3bafd | 623 | |
b1196126 SD |
624 | struct v4l2_device v4l2_dev; |
625 | struct v4l2_subdev *sd_cx25840; | |
626 | struct v4l2_subdev *sd_tuner; | |
627 | ||
61b04cb2 MCC |
628 | struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */ |
629 | atomic_t stream_started; /* stream should be running if true */ | |
630 | ||
84b5dbf3 | 631 | struct list_head devlist; |
e0d3bafd | 632 | |
84b5dbf3 MCC |
633 | int tuner_type; /* type of the tuner */ |
634 | int tuner_addr; /* tuner address */ | |
e0d3bafd | 635 | |
84b5dbf3 MCC |
636 | /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ |
637 | struct cx231xx_i2c i2c_bus[3]; | |
638 | unsigned int xc_fw_load_done:1; | |
64fbf444 | 639 | /* locks */ |
84b5dbf3 | 640 | struct mutex gpio_i2c_lock; |
64fbf444 | 641 | struct mutex i2c_lock; |
e0d3bafd SD |
642 | |
643 | /* video for linux */ | |
84b5dbf3 MCC |
644 | int users; /* user count for exclusive use */ |
645 | struct video_device *vdev; /* video for linux device struct */ | |
646 | v4l2_std_id norm; /* selected tv norm */ | |
647 | int ctl_freq; /* selected frequency */ | |
648 | unsigned int ctl_ainput; /* selected audio input */ | |
e0d3bafd SD |
649 | int mute; |
650 | int volume; | |
651 | ||
652 | /* frame properties */ | |
84b5dbf3 MCC |
653 | int width; /* current frame width */ |
654 | int height; /* current frame height */ | |
84b5dbf3 | 655 | int interlaced; /* 1=interlace fileds, 0=just top fileds */ |
e0d3bafd SD |
656 | |
657 | struct cx231xx_audio adev; | |
658 | ||
659 | /* states */ | |
660 | enum cx231xx_dev_state state; | |
661 | ||
84b5dbf3 | 662 | struct work_struct request_module_wk; |
e0d3bafd SD |
663 | |
664 | /* locks */ | |
665 | struct mutex lock; | |
84b5dbf3 | 666 | struct mutex ctrl_urb_lock; /* protects urb_buf */ |
e0d3bafd SD |
667 | struct list_head inqueue, outqueue; |
668 | wait_queue_head_t open, wait_frame, wait_stream; | |
669 | struct video_device *vbi_dev; | |
670 | struct video_device *radio_dev; | |
671 | ||
672 | unsigned char eedata[256]; | |
673 | ||
84b5dbf3 MCC |
674 | struct cx231xx_video_mode video_mode; |
675 | struct cx231xx_video_mode vbi_mode; | |
676 | struct cx231xx_video_mode sliced_cc_mode; | |
677 | struct cx231xx_video_mode ts1_mode; | |
e0d3bafd | 678 | |
64fbf444 PB |
679 | atomic_t devlist_count; |
680 | ||
84b5dbf3 MCC |
681 | struct usb_device *udev; /* the usb device */ |
682 | char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */ | |
e0d3bafd SD |
683 | |
684 | /* helper funcs that call usb_control_msg */ | |
cde4362f | 685 | int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg, |
e0d3bafd | 686 | char *buf, int len); |
cde4362f | 687 | int (*cx231xx_write_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg, |
84b5dbf3 | 688 | char *buf, int len); |
cde4362f | 689 | int (*cx231xx_send_usb_command) (struct cx231xx_i2c *i2c_bus, |
b9255176 | 690 | struct cx231xx_i2c_xfer_data *req_data); |
cde4362f MCC |
691 | int (*cx231xx_gpio_i2c_read) (struct cx231xx *dev, u8 dev_addr, |
692 | u8 *buf, u8 len); | |
693 | int (*cx231xx_gpio_i2c_write) (struct cx231xx *dev, u8 dev_addr, | |
694 | u8 *buf, u8 len); | |
84b5dbf3 | 695 | |
cde4362f MCC |
696 | int (*cx231xx_set_analog_freq) (struct cx231xx *dev, u32 freq); |
697 | int (*cx231xx_reset_analog_tuner) (struct cx231xx *dev); | |
e0d3bafd SD |
698 | |
699 | enum cx231xx_mode mode; | |
700 | ||
701 | struct cx231xx_dvb *dvb; | |
702 | ||
84b5dbf3 MCC |
703 | /* Cx231xx supported PCB config's */ |
704 | struct pcb_config current_pcb_config; | |
705 | u8 current_scenario_idx; | |
706 | u8 interface_count; | |
707 | u8 max_iad_interface_count; | |
e0d3bafd | 708 | |
84b5dbf3 MCC |
709 | /* GPIO related register direction and values */ |
710 | u32 gpio_dir; | |
711 | u32 gpio_val; | |
e0d3bafd | 712 | |
84b5dbf3 MCC |
713 | /* Power Modes */ |
714 | int power_mode; | |
e0d3bafd | 715 | |
ecc67d10 SD |
716 | /* afe parameters */ |
717 | enum AFE_MODE afe_mode; | |
718 | u32 afe_ref_count; | |
e0d3bafd | 719 | |
84b5dbf3 MCC |
720 | /* video related parameters */ |
721 | u32 video_input; | |
722 | u32 active_mode; | |
723 | u8 vbi_or_sliced_cc_mode; /* 0 - vbi ; 1 - sliced cc mode */ | |
724 | enum cx231xx_std_mode std_mode; /* 0 - Air; 1 - cable */ | |
e0d3bafd | 725 | |
64fbf444 PB |
726 | /*mode: digital=1 or analog=0*/ |
727 | u8 mode_tv; | |
728 | ||
729 | u8 USE_ISO; | |
730 | struct cx231xx_tvnorm encodernorm; | |
731 | struct cx231xx_tsport ts1, ts2; | |
732 | struct cx2341x_mpeg_params mpeg_params; | |
733 | struct video_device *v4l_device; | |
734 | atomic_t v4l_reader_count; | |
735 | u32 freq; | |
736 | unsigned int input; | |
737 | u32 cx23417_mailbox; | |
738 | u32 __iomem *lmmio; | |
739 | u8 __iomem *bmmio; | |
e0d3bafd SD |
740 | }; |
741 | ||
64fbf444 PB |
742 | extern struct list_head cx231xx_devlist; |
743 | ||
b1196126 SD |
744 | #define cx25840_call(cx231xx, o, f, args...) \ |
745 | v4l2_subdev_call(cx231xx->sd_cx25840, o, f, ##args) | |
746 | #define tuner_call(cx231xx, o, f, args...) \ | |
747 | v4l2_subdev_call(cx231xx->sd_tuner, o, f, ##args) | |
748 | #define call_all(dev, o, f, args...) \ | |
749 | v4l2_device_call_until_err(&dev->v4l2_dev, 0, o, f, ##args) | |
750 | ||
e0d3bafd SD |
751 | struct cx231xx_ops { |
752 | struct list_head next; | |
753 | char *name; | |
754 | int id; | |
84b5dbf3 MCC |
755 | int (*init) (struct cx231xx *); |
756 | int (*fini) (struct cx231xx *); | |
e0d3bafd SD |
757 | }; |
758 | ||
759 | /* call back functions in dvb module */ | |
84b5dbf3 MCC |
760 | int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq); |
761 | int cx231xx_reset_analog_tuner(struct cx231xx *dev); | |
e0d3bafd SD |
762 | |
763 | /* Provided by cx231xx-i2c.c */ | |
e0d3bafd SD |
764 | void cx231xx_do_i2c_scan(struct cx231xx *dev, struct i2c_client *c); |
765 | int cx231xx_i2c_register(struct cx231xx_i2c *bus); | |
766 | int cx231xx_i2c_unregister(struct cx231xx_i2c *bus); | |
767 | ||
768 | /* Internal block control functions */ | |
64fbf444 PB |
769 | int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, |
770 | u8 saddr_len, u32 *data, u8 data_len, int master); | |
771 | int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, | |
772 | u8 saddr_len, u32 data, u8 data_len, int master); | |
e0d3bafd | 773 | int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, |
cde4362f | 774 | u16 saddr, u8 saddr_len, u32 *data, u8 data_len); |
e0d3bafd | 775 | int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, |
84b5dbf3 MCC |
776 | u16 saddr, u8 saddr_len, u32 data, u8 data_len); |
777 | int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size, | |
778 | u16 register_address, u8 bit_start, u8 bit_end, | |
779 | u32 value); | |
e0d3bafd | 780 | int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr, |
84b5dbf3 | 781 | u16 saddr, u32 mask, u32 value); |
e0d3bafd SD |
782 | u32 cx231xx_set_field(u32 field_mask, u32 data); |
783 | ||
64fbf444 PB |
784 | /*verve r/w*/ |
785 | void initGPIO(struct cx231xx *dev); | |
786 | void uninitGPIO(struct cx231xx *dev); | |
ecc67d10 SD |
787 | /* afe related functions */ |
788 | int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count); | |
789 | int cx231xx_afe_init_channels(struct cx231xx *dev); | |
790 | int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev); | |
791 | int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux); | |
792 | int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode); | |
793 | int cx231xx_afe_update_power_control(struct cx231xx *dev, | |
6e4f574b | 794 | enum AV_MODE avmode); |
ecc67d10 | 795 | int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input); |
e0d3bafd | 796 | |
ecc67d10 SD |
797 | /* i2s block related functions */ |
798 | int cx231xx_i2s_blk_initialize(struct cx231xx *dev); | |
799 | int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev, | |
6e4f574b | 800 | enum AV_MODE avmode); |
ecc67d10 | 801 | int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input); |
e0d3bafd SD |
802 | |
803 | /* DIF related functions */ | |
804 | int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode, | |
84b5dbf3 | 805 | u32 function_mode, u32 standard); |
64fbf444 PB |
806 | void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq, |
807 | u8 spectral_invert, u32 mode); | |
808 | u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd); | |
809 | void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq, | |
810 | u8 spectral_invert, u32 mode); | |
811 | void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev); | |
812 | void reset_s5h1432_demod(struct cx231xx *dev); | |
813 | void cx231xx_dump_HH_reg(struct cx231xx *dev); | |
814 | void update_HH_register_after_set_DIF(struct cx231xx *dev); | |
815 | void cx231xx_dump_SC_reg(struct cx231xx *dev); | |
816 | ||
817 | ||
818 | ||
e0d3bafd SD |
819 | int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard); |
820 | int cx231xx_tuner_pre_channel_change(struct cx231xx *dev); | |
821 | int cx231xx_tuner_post_channel_change(struct cx231xx *dev); | |
822 | ||
823 | /* video parser functions */ | |
cde4362f MCC |
824 | u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size, |
825 | u32 *p_bytes_used); | |
826 | u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf, | |
827 | u32 *p_bytes_used); | |
e0d3bafd | 828 | int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, |
cde4362f | 829 | u8 *p_buffer, u32 bytes_to_copy); |
84b5dbf3 MCC |
830 | void cx231xx_reset_video_buffer(struct cx231xx *dev, |
831 | struct cx231xx_dmaqueue *dma_q); | |
832 | u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q); | |
833 | u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, | |
cde4362f | 834 | u8 *p_line, u32 length, int field_number); |
84b5dbf3 | 835 | u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, |
cde4362f MCC |
836 | u8 sav_eav, u8 *p_buffer, u32 buffer_size); |
837 | void cx231xx_swab(u16 *from, u16 *to, u16 len); | |
e0d3bafd SD |
838 | |
839 | /* Provided by cx231xx-core.c */ | |
840 | ||
841 | u32 cx231xx_request_buffers(struct cx231xx *dev, u32 count); | |
842 | void cx231xx_queue_unusedframes(struct cx231xx *dev); | |
843 | void cx231xx_release_buffers(struct cx231xx *dev); | |
844 | ||
845 | /* read from control pipe */ | |
846 | int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, | |
84b5dbf3 | 847 | char *buf, int len); |
e0d3bafd SD |
848 | |
849 | /* write to control pipe */ | |
850 | int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, | |
84b5dbf3 | 851 | char *buf, int len); |
e0d3bafd SD |
852 | int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode); |
853 | ||
b9255176 SD |
854 | int cx231xx_send_vendor_cmd(struct cx231xx *dev, |
855 | struct VENDOR_REQUEST_IN *ven_req); | |
e0d3bafd | 856 | int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus, |
b9255176 | 857 | struct cx231xx_i2c_xfer_data *req_data); |
e0d3bafd SD |
858 | |
859 | /* Gpio related functions */ | |
cde4362f | 860 | int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val, |
84b5dbf3 | 861 | u8 len, u8 request, u8 direction); |
cde4362f MCC |
862 | int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val); |
863 | int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val); | |
e0d3bafd | 864 | int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value); |
84b5dbf3 MCC |
865 | int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number, |
866 | int pin_value); | |
e0d3bafd SD |
867 | |
868 | int cx231xx_gpio_i2c_start(struct cx231xx *dev); | |
869 | int cx231xx_gpio_i2c_end(struct cx231xx *dev); | |
870 | int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data); | |
cde4362f | 871 | int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf); |
e0d3bafd SD |
872 | int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev); |
873 | int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev); | |
874 | int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev); | |
875 | ||
cde4362f MCC |
876 | int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len); |
877 | int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len); | |
e0d3bafd SD |
878 | |
879 | /* audio related functions */ | |
84b5dbf3 MCC |
880 | int cx231xx_set_audio_decoder_input(struct cx231xx *dev, |
881 | enum AUDIO_INPUT audio_input); | |
e0d3bafd SD |
882 | |
883 | int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type); | |
e0d3bafd SD |
884 | int cx231xx_set_video_alternate(struct cx231xx *dev); |
885 | int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt); | |
64fbf444 PB |
886 | int is_fw_load(struct cx231xx *dev); |
887 | int cx231xx_check_fw(struct cx231xx *dev); | |
e0d3bafd | 888 | int cx231xx_init_isoc(struct cx231xx *dev, int max_packets, |
84b5dbf3 | 889 | int num_bufs, int max_pkt_size, |
cde4362f MCC |
890 | int (*isoc_copy) (struct cx231xx *dev, |
891 | struct urb *urb)); | |
64fbf444 PB |
892 | int cx231xx_init_bulk(struct cx231xx *dev, int max_packets, |
893 | int num_bufs, int max_pkt_size, | |
894 | int (*bulk_copy) (struct cx231xx *dev, | |
895 | struct urb *urb)); | |
896 | void cx231xx_stop_TS1(struct cx231xx *dev); | |
897 | void cx231xx_start_TS1(struct cx231xx *dev); | |
e0d3bafd | 898 | void cx231xx_uninit_isoc(struct cx231xx *dev); |
64fbf444 | 899 | void cx231xx_uninit_bulk(struct cx231xx *dev); |
e0d3bafd | 900 | int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode); |
64fbf444 PB |
901 | int cx231xx_unmute_audio(struct cx231xx *dev); |
902 | int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size); | |
903 | void cx231xx_disable656(struct cx231xx *dev); | |
904 | void cx231xx_enable656(struct cx231xx *dev); | |
905 | int cx231xx_demod_reset(struct cx231xx *dev); | |
e0d3bafd SD |
906 | int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio); |
907 | ||
908 | /* Device list functions */ | |
909 | void cx231xx_release_resources(struct cx231xx *dev); | |
910 | void cx231xx_release_analog_resources(struct cx231xx *dev); | |
911 | int cx231xx_register_analog_devices(struct cx231xx *dev); | |
912 | void cx231xx_remove_from_devlist(struct cx231xx *dev); | |
913 | void cx231xx_add_into_devlist(struct cx231xx *dev); | |
e0d3bafd SD |
914 | void cx231xx_init_extension(struct cx231xx *dev); |
915 | void cx231xx_close_extension(struct cx231xx *dev); | |
916 | ||
917 | /* hardware init functions */ | |
918 | int cx231xx_dev_init(struct cx231xx *dev); | |
919 | void cx231xx_dev_uninit(struct cx231xx *dev); | |
920 | void cx231xx_config_i2c(struct cx231xx *dev); | |
921 | int cx231xx_config(struct cx231xx *dev); | |
922 | ||
923 | /* Stream control functions */ | |
924 | int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask); | |
925 | int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask); | |
926 | ||
927 | int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type); | |
928 | ||
929 | /* Power control functions */ | |
6e4f574b | 930 | int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode); |
e0d3bafd SD |
931 | int cx231xx_power_suspend(struct cx231xx *dev); |
932 | ||
933 | /* chip specific control functions */ | |
934 | int cx231xx_init_ctrl_pin_status(struct cx231xx *dev); | |
84b5dbf3 MCC |
935 | int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev, |
936 | u8 analog_or_digital); | |
a6f6fb9c | 937 | int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3); |
e0d3bafd SD |
938 | |
939 | /* video audio decoder related functions */ | |
940 | void video_mux(struct cx231xx *dev, int index); | |
941 | int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input); | |
942 | int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input); | |
943 | int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev); | |
944 | int cx231xx_set_audio_input(struct cx231xx *dev, u8 input); | |
e0d3bafd SD |
945 | |
946 | /* Provided by cx231xx-video.c */ | |
947 | int cx231xx_register_extension(struct cx231xx_ops *dev); | |
948 | void cx231xx_unregister_extension(struct cx231xx_ops *dev); | |
949 | void cx231xx_init_extension(struct cx231xx *dev); | |
950 | void cx231xx_close_extension(struct cx231xx *dev); | |
951 | ||
952 | /* Provided by cx231xx-cards.c */ | |
953 | extern void cx231xx_pre_card_setup(struct cx231xx *dev); | |
954 | extern void cx231xx_card_setup(struct cx231xx *dev); | |
955 | extern struct cx231xx_board cx231xx_boards[]; | |
956 | extern struct usb_device_id cx231xx_id_table[]; | |
957 | extern const unsigned int cx231xx_bcount; | |
e0d3bafd SD |
958 | int cx231xx_tuner_callback(void *ptr, int component, int command, int arg); |
959 | ||
64fbf444 PB |
960 | /* cx23885-417.c */ |
961 | extern int cx231xx_417_register(struct cx231xx *dev); | |
962 | extern void cx231xx_417_unregister(struct cx231xx *dev); | |
963 | ||
9ab66912 MCC |
964 | /* cx23885-input.c */ |
965 | ||
966 | #if defined(CONFIG_VIDEO_CX231XX_RC) | |
967 | int cx231xx_ir_init(struct cx231xx *dev); | |
968 | void cx231xx_ir_exit(struct cx231xx *dev); | |
969 | #else | |
970 | #define cx231xx_ir_init(dev) (0) | |
971 | #define cx231xx_ir_exit(dev) (0) | |
972 | #endif | |
973 | ||
974 | ||
e0d3bafd SD |
975 | /* printk macros */ |
976 | ||
977 | #define cx231xx_err(fmt, arg...) do {\ | |
978 | printk(KERN_ERR fmt , ##arg); } while (0) | |
979 | ||
980 | #define cx231xx_errdev(fmt, arg...) do {\ | |
981 | printk(KERN_ERR "%s: "fmt,\ | |
982 | dev->name , ##arg); } while (0) | |
983 | ||
984 | #define cx231xx_info(fmt, arg...) do {\ | |
985 | printk(KERN_INFO "%s: "fmt,\ | |
986 | dev->name , ##arg); } while (0) | |
987 | #define cx231xx_warn(fmt, arg...) do {\ | |
988 | printk(KERN_WARNING "%s: "fmt,\ | |
989 | dev->name , ##arg); } while (0) | |
990 | ||
e0d3bafd SD |
991 | static inline unsigned int norm_maxw(struct cx231xx *dev) |
992 | { | |
993 | if (dev->board.max_range_640_480) | |
994 | return 640; | |
995 | else | |
996 | return 720; | |
997 | } | |
998 | ||
999 | static inline unsigned int norm_maxh(struct cx231xx *dev) | |
1000 | { | |
1001 | if (dev->board.max_range_640_480) | |
1002 | return 480; | |
1003 | else | |
1004 | return (dev->norm & V4L2_STD_625_50) ? 576 : 480; | |
1005 | } | |
1006 | #endif |