]>
Commit | Line | Data |
---|---|---|
e0d3bafd SD |
1 | /* |
2 | cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices | |
3 | ||
4 | Copyright (C) 2008 <srinivasa.deevi at conexant dot com> | |
84b5dbf3 | 5 | Based on em28xx driver |
e0d3bafd SD |
6 | |
7 | This program is free software; you can redistribute it and/or modify | |
8 | it under the terms of the GNU General Public License as published by | |
9 | the Free Software Foundation; either version 2 of the License, or | |
10 | (at your option) any later version. | |
11 | ||
12 | This program is distributed in the hope that it will be useful, | |
13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | GNU General Public License for more details. | |
16 | ||
17 | You should have received a copy of the GNU General Public License | |
18 | along with this program; if not, write to the Free Software | |
19 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #ifndef _CX231XX_H | |
23 | #define _CX231XX_H | |
24 | ||
25 | #include <linux/videodev2.h> | |
b1196126 SD |
26 | #include <linux/types.h> |
27 | #include <linux/ioctl.h> | |
e0d3bafd SD |
28 | #include <linux/i2c.h> |
29 | #include <linux/i2c-algo-bit.h> | |
30 | #include <linux/mutex.h> | |
b1196126 | 31 | |
64fbf444 | 32 | #include <media/cx2341x.h> |
b1196126 SD |
33 | |
34 | #include <media/videobuf-vmalloc.h> | |
35 | #include <media/v4l2-device.h> | |
96c1f996 | 36 | #include <media/ir-core.h> |
b9255176 SD |
37 | #if defined(CONFIG_VIDEO_CX231XX_DVB) || \ |
38 | defined(CONFIG_VIDEO_CX231XX_DVB_MODULE) | |
e0d3bafd SD |
39 | #include <media/videobuf-dvb.h> |
40 | #endif | |
41 | ||
42 | #include "cx231xx-reg.h" | |
6e4f574b | 43 | #include "cx231xx-pcb-cfg.h" |
e0d3bafd SD |
44 | #include "cx231xx-conf-reg.h" |
45 | ||
e0d3bafd SD |
46 | #define DRIVER_NAME "cx231xx" |
47 | #define PWR_SLEEP_INTERVAL 5 | |
48 | ||
49 | /* I2C addresses for control block in Cx231xx */ | |
ecc67d10 SD |
50 | #define AFE_DEVICE_ADDRESS 0x60 |
51 | #define I2S_BLK_DEVICE_ADDRESS 0x98 | |
52 | #define VID_BLK_I2C_ADDRESS 0x88 | |
64fbf444 | 53 | #define VERVE_I2C_ADDRESS 0x40 |
e0d3bafd SD |
54 | #define DIF_USE_BASEBAND 0xFFFFFFFF |
55 | ||
56 | /* Boards supported by driver */ | |
57 | #define CX231XX_BOARD_UNKNOWN 0 | |
64fbf444 PB |
58 | #define CX231XX_BOARD_CNXT_CARRAERA 1 |
59 | #define CX231XX_BOARD_CNXT_SHELBY 2 | |
60 | #define CX231XX_BOARD_CNXT_RDE_253S 3 | |
61 | #define CX231XX_BOARD_CNXT_RDU_253S 4 | |
62 | #define CX231XX_BOARD_CNXT_VIDEO_GRABBER 5 | |
63 | #define CX231XX_BOARD_CNXT_RDE_250 6 | |
64 | #define CX231XX_BOARD_CNXT_RDU_250 7 | |
e0d3bafd SD |
65 | |
66 | /* Limits minimum and default number of buffers */ | |
67 | #define CX231XX_MIN_BUF 4 | |
68 | #define CX231XX_DEF_BUF 12 | |
69 | #define CX231XX_DEF_VBI_BUF 6 | |
70 | ||
71 | #define VBI_LINE_COUNT 17 | |
72 | #define VBI_LINE_LENGTH 1440 | |
73 | ||
74 | /*Limits the max URB message size */ | |
75 | #define URB_MAX_CTRL_SIZE 80 | |
76 | ||
77 | /* Params for validated field */ | |
78 | #define CX231XX_BOARD_NOT_VALIDATED 1 | |
84b5dbf3 | 79 | #define CX231XX_BOARD_VALIDATED 0 |
e0d3bafd SD |
80 | |
81 | /* maximum number of cx231xx boards */ | |
82 | #define CX231XX_MAXBOARDS 8 | |
83 | ||
84 | /* maximum number of frames that can be queued */ | |
85 | #define CX231XX_NUM_FRAMES 5 | |
86 | ||
87 | /* number of buffers for isoc transfers */ | |
88 | #define CX231XX_NUM_BUFS 8 | |
89 | ||
90 | /* number of packets for each buffer | |
91 | windows requests only 40 packets .. so we better do the same | |
92 | this is what I found out for all alternate numbers there! | |
93 | */ | |
94 | #define CX231XX_NUM_PACKETS 40 | |
95 | ||
e0d3bafd SD |
96 | /* default alternate; 0 means choose the best */ |
97 | #define CX231XX_PINOUT 0 | |
98 | ||
99 | #define CX231XX_INTERLACED_DEFAULT 1 | |
100 | ||
e0d3bafd | 101 | /* time to wait when stopping the isoc transfer */ |
b9255176 SD |
102 | #define CX231XX_URB_TIMEOUT \ |
103 | msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS) | |
e0d3bafd | 104 | |
64fbf444 PB |
105 | #define CX231xx_NORMS (\ |
106 | V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \ | |
107 | V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \ | |
108 | V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \ | |
109 | V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK) | |
110 | #define CX231xx_VERSION_CODE KERNEL_VERSION(0, 0, 2) | |
111 | ||
112 | #define SLEEP_S5H1432 30 | |
113 | #define CX23417_OSC_EN 8 | |
114 | #define CX23417_RESET 9 | |
115 | ||
116 | struct cx23417_fmt { | |
117 | char *name; | |
118 | u32 fourcc; /* v4l2 format id */ | |
119 | int depth; | |
120 | int flags; | |
121 | u32 cxformat; | |
122 | }; | |
e0d3bafd SD |
123 | enum cx231xx_mode { |
124 | CX231XX_SUSPEND, | |
125 | CX231XX_ANALOG_MODE, | |
126 | CX231XX_DIGITAL_MODE, | |
127 | }; | |
128 | ||
129 | enum cx231xx_std_mode { | |
130 | CX231XX_TV_AIR = 0, | |
131 | CX231XX_TV_CABLE | |
132 | }; | |
133 | ||
134 | enum cx231xx_stream_state { | |
135 | STREAM_OFF, | |
136 | STREAM_INTERRUPT, | |
137 | STREAM_ON, | |
138 | }; | |
139 | ||
140 | struct cx231xx; | |
141 | ||
64fbf444 | 142 | struct cx231xx_isoc_ctl { |
84b5dbf3 MCC |
143 | /* max packet size of isoc transaction */ |
144 | int max_pkt_size; | |
e0d3bafd | 145 | |
84b5dbf3 MCC |
146 | /* number of allocated urbs */ |
147 | int num_bufs; | |
e0d3bafd | 148 | |
84b5dbf3 MCC |
149 | /* urb for isoc transfers */ |
150 | struct urb **urb; | |
e0d3bafd | 151 | |
84b5dbf3 MCC |
152 | /* transfer buffers for isoc transfer */ |
153 | char **transfer_buffer; | |
e0d3bafd | 154 | |
84b5dbf3 MCC |
155 | /* Last buffer command and region */ |
156 | u8 cmd; | |
157 | int pos, size, pktsize; | |
e0d3bafd | 158 | |
84b5dbf3 MCC |
159 | /* Last field: ODD or EVEN? */ |
160 | int field; | |
e0d3bafd | 161 | |
84b5dbf3 MCC |
162 | /* Stores incomplete commands */ |
163 | u32 tmp_buf; | |
164 | int tmp_buf_len; | |
e0d3bafd | 165 | |
84b5dbf3 MCC |
166 | /* Stores already requested buffers */ |
167 | struct cx231xx_buffer *buf; | |
e0d3bafd | 168 | |
84b5dbf3 MCC |
169 | /* Stores the number of received fields */ |
170 | int nfields; | |
e0d3bafd | 171 | |
84b5dbf3 | 172 | /* isoc urb callback */ |
cde4362f | 173 | int (*isoc_copy) (struct cx231xx *dev, struct urb *urb); |
e0d3bafd SD |
174 | }; |
175 | ||
64fbf444 PB |
176 | struct cx231xx_bulk_ctl { |
177 | /* max packet size of bulk transaction */ | |
178 | int max_pkt_size; | |
179 | ||
180 | /* number of allocated urbs */ | |
181 | int num_bufs; | |
182 | ||
183 | /* urb for bulk transfers */ | |
184 | struct urb **urb; | |
185 | ||
186 | /* transfer buffers for bulk transfer */ | |
187 | char **transfer_buffer; | |
188 | ||
189 | /* Last buffer command and region */ | |
190 | u8 cmd; | |
191 | int pos, size, pktsize; | |
192 | ||
193 | /* Last field: ODD or EVEN? */ | |
194 | int field; | |
195 | ||
196 | /* Stores incomplete commands */ | |
197 | u32 tmp_buf; | |
198 | int tmp_buf_len; | |
199 | ||
200 | /* Stores already requested buffers */ | |
201 | struct cx231xx_buffer *buf; | |
202 | ||
203 | /* Stores the number of received fields */ | |
204 | int nfields; | |
205 | ||
206 | /* bulk urb callback */ | |
207 | int (*bulk_copy) (struct cx231xx *dev, struct urb *urb); | |
208 | }; | |
209 | ||
e0d3bafd | 210 | struct cx231xx_fmt { |
84b5dbf3 MCC |
211 | char *name; |
212 | u32 fourcc; /* v4l2 format id */ | |
213 | int depth; | |
214 | int reg; | |
e0d3bafd SD |
215 | }; |
216 | ||
217 | /* buffer for one video frame */ | |
218 | struct cx231xx_buffer { | |
219 | /* common v4l buffer stuff -- must be first */ | |
220 | struct videobuf_buffer vb; | |
221 | ||
222 | struct list_head frame; | |
223 | int top_field; | |
224 | int receiving; | |
225 | }; | |
226 | ||
64fbf444 PB |
227 | enum ps_package_head { |
228 | CX231XX_NEED_ADD_PS_PACKAGE_HEAD = 0, | |
229 | CX231XX_NONEED_PS_PACKAGE_HEAD | |
230 | }; | |
231 | ||
e0d3bafd | 232 | struct cx231xx_dmaqueue { |
84b5dbf3 MCC |
233 | struct list_head active; |
234 | struct list_head queued; | |
e0d3bafd | 235 | |
84b5dbf3 | 236 | wait_queue_head_t wq; |
e0d3bafd SD |
237 | |
238 | /* Counters to control buffer fill */ | |
84b5dbf3 MCC |
239 | int pos; |
240 | u8 is_partial_line; | |
241 | u8 partial_buf[8]; | |
242 | u8 last_sav; | |
243 | int current_field; | |
244 | u32 bytes_left_in_line; | |
245 | u32 lines_completed; | |
246 | u8 field1_done; | |
247 | u32 lines_per_field; | |
64fbf444 PB |
248 | |
249 | /*Mpeg2 control buffer*/ | |
250 | u8 *p_left_data; | |
251 | u32 left_data_count; | |
252 | u8 mpeg_buffer_done; | |
253 | u32 mpeg_buffer_completed; | |
254 | enum ps_package_head add_ps_package_head; | |
255 | char ps_head[10]; | |
e0d3bafd SD |
256 | }; |
257 | ||
e0d3bafd SD |
258 | /* inputs */ |
259 | ||
260 | #define MAX_CX231XX_INPUT 4 | |
261 | ||
262 | enum cx231xx_itype { | |
263 | CX231XX_VMUX_COMPOSITE1 = 1, | |
264 | CX231XX_VMUX_SVIDEO, | |
265 | CX231XX_VMUX_TELEVISION, | |
84b5dbf3 MCC |
266 | CX231XX_VMUX_CABLE, |
267 | CX231XX_RADIO, | |
268 | CX231XX_VMUX_DVB, | |
e0d3bafd SD |
269 | CX231XX_VMUX_DEBUG |
270 | }; | |
271 | ||
272 | enum cx231xx_v_input { | |
84b5dbf3 MCC |
273 | CX231XX_VIN_1_1 = 0x1, |
274 | CX231XX_VIN_2_1, | |
275 | CX231XX_VIN_3_1, | |
276 | CX231XX_VIN_4_1, | |
277 | CX231XX_VIN_1_2 = 0x01, | |
278 | CX231XX_VIN_2_2, | |
279 | CX231XX_VIN_3_2, | |
280 | CX231XX_VIN_1_3 = 0x1, | |
281 | CX231XX_VIN_2_3, | |
282 | CX231XX_VIN_3_3, | |
e0d3bafd SD |
283 | }; |
284 | ||
285 | /* cx231xx has two audio inputs: tuner and line in */ | |
286 | enum cx231xx_amux { | |
287 | /* This is the only entry for cx231xx tuner input */ | |
84b5dbf3 | 288 | CX231XX_AMUX_VIDEO, /* cx231xx tuner */ |
e0d3bafd SD |
289 | CX231XX_AMUX_LINE_IN, /* Line In */ |
290 | }; | |
291 | ||
292 | struct cx231xx_reg_seq { | |
293 | unsigned char bit; | |
84b5dbf3 | 294 | unsigned char val; |
e0d3bafd SD |
295 | int sleep; |
296 | }; | |
297 | ||
298 | struct cx231xx_input { | |
299 | enum cx231xx_itype type; | |
300 | unsigned int vmux; | |
301 | enum cx231xx_amux amux; | |
302 | struct cx231xx_reg_seq *gpio; | |
303 | }; | |
304 | ||
305 | #define INPUT(nr) (&cx231xx_boards[dev->model].input[nr]) | |
306 | ||
307 | enum cx231xx_decoder { | |
308 | CX231XX_NODECODER, | |
309 | CX231XX_AVDECODER | |
310 | }; | |
311 | ||
b9255176 | 312 | enum CX231XX_I2C_MASTER_PORT { |
84b5dbf3 MCC |
313 | I2C_0 = 0, |
314 | I2C_1 = 1, | |
315 | I2C_2 = 2, | |
316 | I2C_3 = 3 | |
b9255176 | 317 | }; |
e0d3bafd SD |
318 | |
319 | struct cx231xx_board { | |
320 | char *name; | |
321 | int vchannels; | |
322 | int tuner_type; | |
323 | int tuner_addr; | |
84b5dbf3 | 324 | v4l2_std_id norm; /* tv norm */ |
e0d3bafd | 325 | |
84b5dbf3 MCC |
326 | /* demod related */ |
327 | int demod_addr; | |
328 | u8 demod_xfer_mode; /* 0 - Serial; 1 - parallel */ | |
e0d3bafd SD |
329 | |
330 | /* GPIO Pins */ | |
331 | struct cx231xx_reg_seq *dvb_gpio; | |
332 | struct cx231xx_reg_seq *suspend_gpio; | |
333 | struct cx231xx_reg_seq *tuner_gpio; | |
84b5dbf3 MCC |
334 | u8 tuner_sif_gpio; |
335 | u8 tuner_scl_gpio; | |
336 | u8 tuner_sda_gpio; | |
e0d3bafd | 337 | |
84b5dbf3 MCC |
338 | /* PIN ctrl */ |
339 | u32 ctl_pin_status_mask; | |
340 | u8 agc_analog_digital_select_gpio; | |
341 | u32 gpio_pin_status_mask; | |
e0d3bafd | 342 | |
84b5dbf3 MCC |
343 | /* i2c masters */ |
344 | u8 tuner_i2c_master; | |
345 | u8 demod_i2c_master; | |
e0d3bafd SD |
346 | |
347 | unsigned int max_range_640_480:1; | |
348 | unsigned int has_dvb:1; | |
349 | unsigned int valid:1; | |
350 | ||
351 | unsigned char xclk, i2c_speed; | |
352 | ||
353 | enum cx231xx_decoder decoder; | |
354 | ||
84b5dbf3 MCC |
355 | struct cx231xx_input input[MAX_CX231XX_INPUT]; |
356 | struct cx231xx_input radio; | |
715a2233 | 357 | struct ir_scancode_table *ir_codes; |
e0d3bafd SD |
358 | }; |
359 | ||
360 | /* device states */ | |
361 | enum cx231xx_dev_state { | |
362 | DEV_INITIALIZED = 0x01, | |
363 | DEV_DISCONNECTED = 0x02, | |
364 | DEV_MISCONFIGURED = 0x04, | |
365 | }; | |
366 | ||
84b5dbf3 MCC |
367 | enum AFE_MODE { |
368 | AFE_MODE_LOW_IF, | |
369 | AFE_MODE_BASEBAND, | |
370 | AFE_MODE_EU_HI_IF, | |
371 | AFE_MODE_US_HI_IF, | |
372 | AFE_MODE_JAPAN_HI_IF | |
e0d3bafd SD |
373 | }; |
374 | ||
84b5dbf3 MCC |
375 | enum AUDIO_INPUT { |
376 | AUDIO_INPUT_MUTE, | |
377 | AUDIO_INPUT_LINE, | |
378 | AUDIO_INPUT_TUNER_TV, | |
379 | AUDIO_INPUT_SPDIF, | |
380 | AUDIO_INPUT_TUNER_FM | |
e0d3bafd SD |
381 | }; |
382 | ||
383 | #define CX231XX_AUDIO_BUFS 5 | |
64fbf444 PB |
384 | #define CX231XX_NUM_AUDIO_PACKETS 16 |
385 | #define CX231XX_ISO_NUM_AUDIO_PACKETS 64 | |
e0d3bafd SD |
386 | #define CX231XX_CAPTURE_STREAM_EN 1 |
387 | #define CX231XX_STOP_AUDIO 0 | |
388 | #define CX231XX_START_AUDIO 1 | |
389 | ||
e0d3bafd SD |
390 | /* cx231xx extensions */ |
391 | #define CX231XX_AUDIO 0x10 | |
392 | #define CX231XX_DVB 0x20 | |
393 | ||
394 | struct cx231xx_audio { | |
395 | char name[50]; | |
396 | char *transfer_buffer[CX231XX_AUDIO_BUFS]; | |
397 | struct urb *urb[CX231XX_AUDIO_BUFS]; | |
398 | struct usb_device *udev; | |
399 | unsigned int capture_transfer_done; | |
84b5dbf3 | 400 | struct snd_pcm_substream *capture_pcm_substream; |
e0d3bafd SD |
401 | |
402 | unsigned int hwptr_done_capture; | |
84b5dbf3 | 403 | struct snd_card *sndcard; |
e0d3bafd SD |
404 | |
405 | int users, shutdown; | |
406 | enum cx231xx_stream_state capture_stream; | |
64fbf444 | 407 | /* locks */ |
e0d3bafd SD |
408 | spinlock_t slock; |
409 | ||
84b5dbf3 MCC |
410 | int alt; /* alternate */ |
411 | int max_pkt_size; /* max packet size of isoc transaction */ | |
412 | int num_alt; /* Number of alternative settings */ | |
e0d3bafd | 413 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ |
84b5dbf3 | 414 | u16 end_point_addr; |
e0d3bafd SD |
415 | }; |
416 | ||
417 | struct cx231xx; | |
418 | ||
419 | struct cx231xx_fh { | |
420 | struct cx231xx *dev; | |
84b5dbf3 MCC |
421 | unsigned int stream_on:1; /* Locks streams */ |
422 | int radio; | |
e0d3bafd | 423 | |
84b5dbf3 | 424 | struct videobuf_queue vb_vidq; |
e0d3bafd | 425 | |
84b5dbf3 | 426 | enum v4l2_buf_type type; |
64fbf444 PB |
427 | |
428 | ||
429 | ||
430 | /*following is copyed from cx23885.h*/ | |
431 | u32 resources; | |
432 | ||
433 | /* video overlay */ | |
434 | struct v4l2_window win; | |
435 | struct v4l2_clip *clips; | |
436 | unsigned int nclips; | |
437 | ||
438 | /* video capture */ | |
439 | struct cx23417_fmt *fmt; | |
440 | unsigned int width, height; | |
441 | ||
442 | /* vbi capture */ | |
443 | struct videobuf_queue vidq; | |
444 | struct videobuf_queue vbiq; | |
445 | ||
446 | /* MPEG Encoder specifics ONLY */ | |
447 | ||
448 | atomic_t v4l_reading; | |
e0d3bafd SD |
449 | }; |
450 | ||
b9255176 | 451 | /*****************************************************************/ |
e0d3bafd | 452 | /* set/get i2c */ |
b9255176 SD |
453 | /* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */ |
454 | #define I2C_SPEED_1M 0x0 | |
455 | #define I2C_SPEED_400K 0x1 | |
456 | #define I2C_SPEED_100K 0x2 | |
457 | #define I2C_SPEED_5M 0x3 | |
458 | ||
459 | /* 0-- STOP transaction */ | |
460 | #define I2C_STOP 0x0 | |
461 | /* 1-- do not transmit STOP at end of transaction */ | |
462 | #define I2C_NOSTOP 0x1 | |
463 | /* 1--alllow slave to insert clock wait states */ | |
464 | #define I2C_SYNC 0x1 | |
e0d3bafd SD |
465 | |
466 | struct cx231xx_i2c { | |
84b5dbf3 | 467 | struct cx231xx *dev; |
e0d3bafd | 468 | |
84b5dbf3 | 469 | int nr; |
e0d3bafd SD |
470 | |
471 | /* i2c i/o */ | |
84b5dbf3 MCC |
472 | struct i2c_adapter i2c_adap; |
473 | struct i2c_algo_bit_data i2c_algo; | |
474 | struct i2c_client i2c_client; | |
475 | u32 i2c_rc; | |
e0d3bafd SD |
476 | |
477 | /* different settings for each bus */ | |
84b5dbf3 MCC |
478 | u8 i2c_period; |
479 | u8 i2c_nostop; | |
480 | u8 i2c_reserve; | |
e0d3bafd SD |
481 | }; |
482 | ||
84b5dbf3 MCC |
483 | struct cx231xx_i2c_xfer_data { |
484 | u8 dev_addr; | |
485 | u8 direction; /* 1 - IN, 0 - OUT */ | |
486 | u8 saddr_len; /* sub address len */ | |
487 | u16 saddr_dat; /* sub addr data */ | |
488 | u8 buf_size; /* buffer size */ | |
489 | u8 *p_buffer; /* pointer to the buffer */ | |
e0d3bafd SD |
490 | }; |
491 | ||
6e4f574b | 492 | struct VENDOR_REQUEST_IN { |
84b5dbf3 MCC |
493 | u8 bRequest; |
494 | u16 wValue; | |
495 | u16 wIndex; | |
496 | u16 wLength; | |
497 | u8 direction; | |
498 | u8 bData; | |
499 | u8 *pBuff; | |
b9255176 | 500 | }; |
e0d3bafd | 501 | |
64fbf444 PB |
502 | struct cx231xx_tvnorm { |
503 | char *name; | |
504 | v4l2_std_id id; | |
505 | u32 cxiformat; | |
506 | u32 cxoformat; | |
507 | }; | |
508 | ||
e0d3bafd SD |
509 | struct cx231xx_ctrl { |
510 | struct v4l2_queryctrl v; | |
84b5dbf3 MCC |
511 | u32 off; |
512 | u32 reg; | |
513 | u32 mask; | |
514 | u32 shift; | |
e0d3bafd SD |
515 | }; |
516 | ||
6e4f574b | 517 | enum TRANSFER_TYPE { |
84b5dbf3 MCC |
518 | Raw_Video = 0, |
519 | Audio, | |
520 | Vbi, /* VANC */ | |
521 | Sliced_cc, /* HANC */ | |
522 | TS1_serial_mode, | |
523 | TS2, | |
524 | TS1_parallel_mode | |
b9255176 | 525 | } ; |
e0d3bafd SD |
526 | |
527 | struct cx231xx_video_mode { | |
84b5dbf3 | 528 | /* Isoc control struct */ |
e0d3bafd | 529 | struct cx231xx_dmaqueue vidq; |
64fbf444 PB |
530 | struct cx231xx_isoc_ctl isoc_ctl; |
531 | struct cx231xx_bulk_ctl bulk_ctl; | |
532 | /* locks */ | |
e0d3bafd SD |
533 | spinlock_t slock; |
534 | ||
535 | /* usb transfer */ | |
84b5dbf3 MCC |
536 | int alt; /* alternate */ |
537 | int max_pkt_size; /* max packet size of isoc transaction */ | |
538 | int num_alt; /* Number of alternative settings */ | |
e0d3bafd | 539 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ |
84b5dbf3 | 540 | u16 end_point_addr; |
e0d3bafd | 541 | }; |
64fbf444 PB |
542 | /* |
543 | struct cx23885_dmaqueue { | |
544 | struct list_head active; | |
545 | struct list_head queued; | |
546 | struct timer_list timeout; | |
547 | struct btcx_riscmem stopper; | |
548 | u32 count; | |
549 | }; | |
550 | */ | |
551 | struct cx231xx_tsport { | |
552 | struct cx231xx *dev; | |
553 | ||
554 | int nr; | |
555 | int sram_chno; | |
556 | ||
557 | struct videobuf_dvb_frontends frontends; | |
558 | ||
559 | /* dma queues */ | |
560 | ||
561 | u32 ts_packet_size; | |
562 | u32 ts_packet_count; | |
563 | ||
564 | int width; | |
565 | int height; | |
566 | ||
567 | /* locks */ | |
568 | spinlock_t slock; | |
569 | ||
570 | /* registers */ | |
571 | u32 reg_gpcnt; | |
572 | u32 reg_gpcnt_ctl; | |
573 | u32 reg_dma_ctl; | |
574 | u32 reg_lngth; | |
575 | u32 reg_hw_sop_ctrl; | |
576 | u32 reg_gen_ctrl; | |
577 | u32 reg_bd_pkt_status; | |
578 | u32 reg_sop_status; | |
579 | u32 reg_fifo_ovfl_stat; | |
580 | u32 reg_vld_misc; | |
581 | u32 reg_ts_clk_en; | |
582 | u32 reg_ts_int_msk; | |
583 | u32 reg_ts_int_stat; | |
584 | u32 reg_src_sel; | |
585 | ||
586 | /* Default register vals */ | |
587 | int pci_irqmask; | |
588 | u32 dma_ctl_val; | |
589 | u32 ts_int_msk_val; | |
590 | u32 gen_ctrl_val; | |
591 | u32 ts_clk_en_val; | |
592 | u32 src_sel_val; | |
593 | u32 vld_misc_val; | |
594 | u32 hw_sop_ctrl_val; | |
595 | ||
596 | /* Allow a single tsport to have multiple frontends */ | |
597 | u32 num_frontends; | |
598 | void *port_priv; | |
599 | }; | |
e0d3bafd | 600 | |
e0d3bafd SD |
601 | /* main device struct */ |
602 | struct cx231xx { | |
603 | /* generic device properties */ | |
84b5dbf3 MCC |
604 | char name[30]; /* name (including minor) of the device */ |
605 | int model; /* index in the device_data struct */ | |
606 | int devno; /* marks the number of this device */ | |
e0d3bafd SD |
607 | |
608 | struct cx231xx_board board; | |
609 | ||
84b5dbf3 MCC |
610 | unsigned int stream_on:1; /* Locks streams */ |
611 | unsigned int vbi_stream_on:1; /* Locks streams for VBI */ | |
e0d3bafd SD |
612 | unsigned int has_audio_class:1; |
613 | unsigned int has_alsa_audio:1; | |
614 | ||
84b5dbf3 | 615 | struct cx231xx_fmt *format; |
e0d3bafd | 616 | |
b1196126 SD |
617 | struct v4l2_device v4l2_dev; |
618 | struct v4l2_subdev *sd_cx25840; | |
619 | struct v4l2_subdev *sd_tuner; | |
620 | ||
e0d3bafd SD |
621 | struct cx231xx_IR *ir; |
622 | ||
84b5dbf3 | 623 | struct list_head devlist; |
e0d3bafd | 624 | |
84b5dbf3 MCC |
625 | int tuner_type; /* type of the tuner */ |
626 | int tuner_addr; /* tuner address */ | |
e0d3bafd | 627 | |
84b5dbf3 MCC |
628 | /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */ |
629 | struct cx231xx_i2c i2c_bus[3]; | |
630 | unsigned int xc_fw_load_done:1; | |
64fbf444 | 631 | /* locks */ |
84b5dbf3 | 632 | struct mutex gpio_i2c_lock; |
64fbf444 | 633 | struct mutex i2c_lock; |
e0d3bafd SD |
634 | |
635 | /* video for linux */ | |
84b5dbf3 MCC |
636 | int users; /* user count for exclusive use */ |
637 | struct video_device *vdev; /* video for linux device struct */ | |
638 | v4l2_std_id norm; /* selected tv norm */ | |
639 | int ctl_freq; /* selected frequency */ | |
640 | unsigned int ctl_ainput; /* selected audio input */ | |
e0d3bafd SD |
641 | int mute; |
642 | int volume; | |
643 | ||
644 | /* frame properties */ | |
84b5dbf3 MCC |
645 | int width; /* current frame width */ |
646 | int height; /* current frame height */ | |
647 | unsigned hscale; /* horizontal scale factor (see datasheet) */ | |
648 | unsigned vscale; /* vertical scale factor (see datasheet) */ | |
649 | int interlaced; /* 1=interlace fileds, 0=just top fileds */ | |
e0d3bafd SD |
650 | |
651 | struct cx231xx_audio adev; | |
652 | ||
653 | /* states */ | |
654 | enum cx231xx_dev_state state; | |
655 | ||
84b5dbf3 | 656 | struct work_struct request_module_wk; |
e0d3bafd SD |
657 | |
658 | /* locks */ | |
659 | struct mutex lock; | |
84b5dbf3 | 660 | struct mutex ctrl_urb_lock; /* protects urb_buf */ |
e0d3bafd SD |
661 | struct list_head inqueue, outqueue; |
662 | wait_queue_head_t open, wait_frame, wait_stream; | |
663 | struct video_device *vbi_dev; | |
664 | struct video_device *radio_dev; | |
665 | ||
666 | unsigned char eedata[256]; | |
667 | ||
84b5dbf3 MCC |
668 | struct cx231xx_video_mode video_mode; |
669 | struct cx231xx_video_mode vbi_mode; | |
670 | struct cx231xx_video_mode sliced_cc_mode; | |
671 | struct cx231xx_video_mode ts1_mode; | |
e0d3bafd | 672 | |
64fbf444 PB |
673 | atomic_t devlist_count; |
674 | ||
84b5dbf3 MCC |
675 | struct usb_device *udev; /* the usb device */ |
676 | char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */ | |
e0d3bafd SD |
677 | |
678 | /* helper funcs that call usb_control_msg */ | |
cde4362f | 679 | int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg, |
e0d3bafd | 680 | char *buf, int len); |
cde4362f | 681 | int (*cx231xx_write_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg, |
84b5dbf3 | 682 | char *buf, int len); |
cde4362f | 683 | int (*cx231xx_send_usb_command) (struct cx231xx_i2c *i2c_bus, |
b9255176 | 684 | struct cx231xx_i2c_xfer_data *req_data); |
cde4362f MCC |
685 | int (*cx231xx_gpio_i2c_read) (struct cx231xx *dev, u8 dev_addr, |
686 | u8 *buf, u8 len); | |
687 | int (*cx231xx_gpio_i2c_write) (struct cx231xx *dev, u8 dev_addr, | |
688 | u8 *buf, u8 len); | |
84b5dbf3 | 689 | |
cde4362f MCC |
690 | int (*cx231xx_set_analog_freq) (struct cx231xx *dev, u32 freq); |
691 | int (*cx231xx_reset_analog_tuner) (struct cx231xx *dev); | |
e0d3bafd SD |
692 | |
693 | enum cx231xx_mode mode; | |
694 | ||
695 | struct cx231xx_dvb *dvb; | |
696 | ||
84b5dbf3 MCC |
697 | /* Cx231xx supported PCB config's */ |
698 | struct pcb_config current_pcb_config; | |
699 | u8 current_scenario_idx; | |
700 | u8 interface_count; | |
701 | u8 max_iad_interface_count; | |
e0d3bafd | 702 | |
84b5dbf3 MCC |
703 | /* GPIO related register direction and values */ |
704 | u32 gpio_dir; | |
705 | u32 gpio_val; | |
e0d3bafd | 706 | |
84b5dbf3 MCC |
707 | /* Power Modes */ |
708 | int power_mode; | |
e0d3bafd | 709 | |
ecc67d10 SD |
710 | /* afe parameters */ |
711 | enum AFE_MODE afe_mode; | |
712 | u32 afe_ref_count; | |
e0d3bafd | 713 | |
84b5dbf3 MCC |
714 | /* video related parameters */ |
715 | u32 video_input; | |
716 | u32 active_mode; | |
717 | u8 vbi_or_sliced_cc_mode; /* 0 - vbi ; 1 - sliced cc mode */ | |
718 | enum cx231xx_std_mode std_mode; /* 0 - Air; 1 - cable */ | |
e0d3bafd | 719 | |
64fbf444 PB |
720 | /*mode: digital=1 or analog=0*/ |
721 | u8 mode_tv; | |
722 | ||
723 | u8 USE_ISO; | |
724 | struct cx231xx_tvnorm encodernorm; | |
725 | struct cx231xx_tsport ts1, ts2; | |
726 | struct cx2341x_mpeg_params mpeg_params; | |
727 | struct video_device *v4l_device; | |
728 | atomic_t v4l_reader_count; | |
729 | u32 freq; | |
730 | unsigned int input; | |
731 | u32 cx23417_mailbox; | |
732 | u32 __iomem *lmmio; | |
733 | u8 __iomem *bmmio; | |
e0d3bafd SD |
734 | }; |
735 | ||
64fbf444 PB |
736 | extern struct list_head cx231xx_devlist; |
737 | ||
b1196126 SD |
738 | #define cx25840_call(cx231xx, o, f, args...) \ |
739 | v4l2_subdev_call(cx231xx->sd_cx25840, o, f, ##args) | |
740 | #define tuner_call(cx231xx, o, f, args...) \ | |
741 | v4l2_subdev_call(cx231xx->sd_tuner, o, f, ##args) | |
742 | #define call_all(dev, o, f, args...) \ | |
743 | v4l2_device_call_until_err(&dev->v4l2_dev, 0, o, f, ##args) | |
744 | ||
e0d3bafd SD |
745 | struct cx231xx_ops { |
746 | struct list_head next; | |
747 | char *name; | |
748 | int id; | |
84b5dbf3 MCC |
749 | int (*init) (struct cx231xx *); |
750 | int (*fini) (struct cx231xx *); | |
e0d3bafd SD |
751 | }; |
752 | ||
753 | /* call back functions in dvb module */ | |
84b5dbf3 MCC |
754 | int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq); |
755 | int cx231xx_reset_analog_tuner(struct cx231xx *dev); | |
e0d3bafd SD |
756 | |
757 | /* Provided by cx231xx-i2c.c */ | |
e0d3bafd SD |
758 | void cx231xx_do_i2c_scan(struct cx231xx *dev, struct i2c_client *c); |
759 | int cx231xx_i2c_register(struct cx231xx_i2c *bus); | |
760 | int cx231xx_i2c_unregister(struct cx231xx_i2c *bus); | |
761 | ||
762 | /* Internal block control functions */ | |
64fbf444 PB |
763 | int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, |
764 | u8 saddr_len, u32 *data, u8 data_len, int master); | |
765 | int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr, | |
766 | u8 saddr_len, u32 data, u8 data_len, int master); | |
e0d3bafd | 767 | int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr, |
cde4362f | 768 | u16 saddr, u8 saddr_len, u32 *data, u8 data_len); |
e0d3bafd | 769 | int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr, |
84b5dbf3 MCC |
770 | u16 saddr, u8 saddr_len, u32 data, u8 data_len); |
771 | int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size, | |
772 | u16 register_address, u8 bit_start, u8 bit_end, | |
773 | u32 value); | |
e0d3bafd | 774 | int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr, |
84b5dbf3 | 775 | u16 saddr, u32 mask, u32 value); |
e0d3bafd SD |
776 | u32 cx231xx_set_field(u32 field_mask, u32 data); |
777 | ||
64fbf444 PB |
778 | /*verve r/w*/ |
779 | void initGPIO(struct cx231xx *dev); | |
780 | void uninitGPIO(struct cx231xx *dev); | |
ecc67d10 SD |
781 | /* afe related functions */ |
782 | int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count); | |
783 | int cx231xx_afe_init_channels(struct cx231xx *dev); | |
784 | int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev); | |
785 | int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux); | |
786 | int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode); | |
787 | int cx231xx_afe_update_power_control(struct cx231xx *dev, | |
6e4f574b | 788 | enum AV_MODE avmode); |
ecc67d10 | 789 | int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input); |
e0d3bafd | 790 | |
ecc67d10 SD |
791 | /* i2s block related functions */ |
792 | int cx231xx_i2s_blk_initialize(struct cx231xx *dev); | |
793 | int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev, | |
6e4f574b | 794 | enum AV_MODE avmode); |
ecc67d10 | 795 | int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input); |
e0d3bafd SD |
796 | |
797 | /* DIF related functions */ | |
798 | int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode, | |
84b5dbf3 | 799 | u32 function_mode, u32 standard); |
64fbf444 PB |
800 | void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq, |
801 | u8 spectral_invert, u32 mode); | |
802 | u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd); | |
803 | void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq, | |
804 | u8 spectral_invert, u32 mode); | |
805 | void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev); | |
806 | void reset_s5h1432_demod(struct cx231xx *dev); | |
807 | void cx231xx_dump_HH_reg(struct cx231xx *dev); | |
808 | void update_HH_register_after_set_DIF(struct cx231xx *dev); | |
809 | void cx231xx_dump_SC_reg(struct cx231xx *dev); | |
810 | ||
811 | ||
812 | ||
e0d3bafd SD |
813 | int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard); |
814 | int cx231xx_tuner_pre_channel_change(struct cx231xx *dev); | |
815 | int cx231xx_tuner_post_channel_change(struct cx231xx *dev); | |
816 | ||
817 | /* video parser functions */ | |
cde4362f MCC |
818 | u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size, |
819 | u32 *p_bytes_used); | |
820 | u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf, | |
821 | u32 *p_bytes_used); | |
e0d3bafd | 822 | int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, |
cde4362f | 823 | u8 *p_buffer, u32 bytes_to_copy); |
84b5dbf3 MCC |
824 | void cx231xx_reset_video_buffer(struct cx231xx *dev, |
825 | struct cx231xx_dmaqueue *dma_q); | |
826 | u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q); | |
827 | u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, | |
cde4362f | 828 | u8 *p_line, u32 length, int field_number); |
84b5dbf3 | 829 | u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q, |
cde4362f MCC |
830 | u8 sav_eav, u8 *p_buffer, u32 buffer_size); |
831 | void cx231xx_swab(u16 *from, u16 *to, u16 len); | |
e0d3bafd SD |
832 | |
833 | /* Provided by cx231xx-core.c */ | |
834 | ||
835 | u32 cx231xx_request_buffers(struct cx231xx *dev, u32 count); | |
836 | void cx231xx_queue_unusedframes(struct cx231xx *dev); | |
837 | void cx231xx_release_buffers(struct cx231xx *dev); | |
838 | ||
839 | /* read from control pipe */ | |
840 | int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, | |
84b5dbf3 | 841 | char *buf, int len); |
e0d3bafd SD |
842 | |
843 | /* write to control pipe */ | |
844 | int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg, | |
84b5dbf3 | 845 | char *buf, int len); |
e0d3bafd SD |
846 | int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode); |
847 | ||
b9255176 SD |
848 | int cx231xx_send_vendor_cmd(struct cx231xx *dev, |
849 | struct VENDOR_REQUEST_IN *ven_req); | |
e0d3bafd | 850 | int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus, |
b9255176 | 851 | struct cx231xx_i2c_xfer_data *req_data); |
e0d3bafd SD |
852 | |
853 | /* Gpio related functions */ | |
cde4362f | 854 | int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val, |
84b5dbf3 | 855 | u8 len, u8 request, u8 direction); |
cde4362f MCC |
856 | int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val); |
857 | int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val); | |
e0d3bafd | 858 | int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value); |
84b5dbf3 MCC |
859 | int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number, |
860 | int pin_value); | |
e0d3bafd SD |
861 | |
862 | int cx231xx_gpio_i2c_start(struct cx231xx *dev); | |
863 | int cx231xx_gpio_i2c_end(struct cx231xx *dev); | |
864 | int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data); | |
cde4362f | 865 | int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf); |
e0d3bafd SD |
866 | int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev); |
867 | int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev); | |
868 | int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev); | |
869 | ||
cde4362f MCC |
870 | int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len); |
871 | int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len); | |
e0d3bafd SD |
872 | |
873 | /* audio related functions */ | |
84b5dbf3 MCC |
874 | int cx231xx_set_audio_decoder_input(struct cx231xx *dev, |
875 | enum AUDIO_INPUT audio_input); | |
e0d3bafd SD |
876 | |
877 | int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type); | |
878 | int cx231xx_resolution_set(struct cx231xx *dev); | |
879 | int cx231xx_set_video_alternate(struct cx231xx *dev); | |
880 | int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt); | |
64fbf444 PB |
881 | int is_fw_load(struct cx231xx *dev); |
882 | int cx231xx_check_fw(struct cx231xx *dev); | |
e0d3bafd | 883 | int cx231xx_init_isoc(struct cx231xx *dev, int max_packets, |
84b5dbf3 | 884 | int num_bufs, int max_pkt_size, |
cde4362f MCC |
885 | int (*isoc_copy) (struct cx231xx *dev, |
886 | struct urb *urb)); | |
64fbf444 PB |
887 | int cx231xx_init_bulk(struct cx231xx *dev, int max_packets, |
888 | int num_bufs, int max_pkt_size, | |
889 | int (*bulk_copy) (struct cx231xx *dev, | |
890 | struct urb *urb)); | |
891 | void cx231xx_stop_TS1(struct cx231xx *dev); | |
892 | void cx231xx_start_TS1(struct cx231xx *dev); | |
e0d3bafd | 893 | void cx231xx_uninit_isoc(struct cx231xx *dev); |
64fbf444 | 894 | void cx231xx_uninit_bulk(struct cx231xx *dev); |
e0d3bafd | 895 | int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode); |
64fbf444 PB |
896 | int cx231xx_unmute_audio(struct cx231xx *dev); |
897 | int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size); | |
898 | void cx231xx_disable656(struct cx231xx *dev); | |
899 | void cx231xx_enable656(struct cx231xx *dev); | |
900 | int cx231xx_demod_reset(struct cx231xx *dev); | |
e0d3bafd SD |
901 | int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio); |
902 | ||
903 | /* Device list functions */ | |
904 | void cx231xx_release_resources(struct cx231xx *dev); | |
905 | void cx231xx_release_analog_resources(struct cx231xx *dev); | |
906 | int cx231xx_register_analog_devices(struct cx231xx *dev); | |
907 | void cx231xx_remove_from_devlist(struct cx231xx *dev); | |
908 | void cx231xx_add_into_devlist(struct cx231xx *dev); | |
e0d3bafd SD |
909 | void cx231xx_init_extension(struct cx231xx *dev); |
910 | void cx231xx_close_extension(struct cx231xx *dev); | |
911 | ||
912 | /* hardware init functions */ | |
913 | int cx231xx_dev_init(struct cx231xx *dev); | |
914 | void cx231xx_dev_uninit(struct cx231xx *dev); | |
915 | void cx231xx_config_i2c(struct cx231xx *dev); | |
916 | int cx231xx_config(struct cx231xx *dev); | |
917 | ||
918 | /* Stream control functions */ | |
919 | int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask); | |
920 | int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask); | |
921 | ||
922 | int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type); | |
923 | ||
924 | /* Power control functions */ | |
6e4f574b | 925 | int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode); |
e0d3bafd SD |
926 | int cx231xx_power_suspend(struct cx231xx *dev); |
927 | ||
928 | /* chip specific control functions */ | |
929 | int cx231xx_init_ctrl_pin_status(struct cx231xx *dev); | |
84b5dbf3 MCC |
930 | int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev, |
931 | u8 analog_or_digital); | |
e0d3bafd SD |
932 | int cx231xx_enable_i2c_for_tuner(struct cx231xx *dev, u8 I2CIndex); |
933 | ||
934 | /* video audio decoder related functions */ | |
935 | void video_mux(struct cx231xx *dev, int index); | |
936 | int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input); | |
937 | int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input); | |
938 | int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev); | |
939 | int cx231xx_set_audio_input(struct cx231xx *dev, u8 input); | |
e0d3bafd SD |
940 | |
941 | /* Provided by cx231xx-video.c */ | |
942 | int cx231xx_register_extension(struct cx231xx_ops *dev); | |
943 | void cx231xx_unregister_extension(struct cx231xx_ops *dev); | |
944 | void cx231xx_init_extension(struct cx231xx *dev); | |
945 | void cx231xx_close_extension(struct cx231xx *dev); | |
946 | ||
947 | /* Provided by cx231xx-cards.c */ | |
948 | extern void cx231xx_pre_card_setup(struct cx231xx *dev); | |
949 | extern void cx231xx_card_setup(struct cx231xx *dev); | |
950 | extern struct cx231xx_board cx231xx_boards[]; | |
951 | extern struct usb_device_id cx231xx_id_table[]; | |
952 | extern const unsigned int cx231xx_bcount; | |
c668f32d | 953 | void cx231xx_register_i2c_ir(struct cx231xx *dev); |
e0d3bafd SD |
954 | int cx231xx_tuner_callback(void *ptr, int component, int command, int arg); |
955 | ||
956 | /* Provided by cx231xx-input.c */ | |
957 | int cx231xx_ir_init(struct cx231xx *dev); | |
958 | int cx231xx_ir_fini(struct cx231xx *dev); | |
959 | ||
64fbf444 PB |
960 | /* cx23885-417.c */ |
961 | extern int cx231xx_417_register(struct cx231xx *dev); | |
962 | extern void cx231xx_417_unregister(struct cx231xx *dev); | |
963 | ||
e0d3bafd SD |
964 | /* printk macros */ |
965 | ||
966 | #define cx231xx_err(fmt, arg...) do {\ | |
967 | printk(KERN_ERR fmt , ##arg); } while (0) | |
968 | ||
969 | #define cx231xx_errdev(fmt, arg...) do {\ | |
970 | printk(KERN_ERR "%s: "fmt,\ | |
971 | dev->name , ##arg); } while (0) | |
972 | ||
973 | #define cx231xx_info(fmt, arg...) do {\ | |
974 | printk(KERN_INFO "%s: "fmt,\ | |
975 | dev->name , ##arg); } while (0) | |
976 | #define cx231xx_warn(fmt, arg...) do {\ | |
977 | printk(KERN_WARNING "%s: "fmt,\ | |
978 | dev->name , ##arg); } while (0) | |
979 | ||
e0d3bafd SD |
980 | static inline unsigned int norm_maxw(struct cx231xx *dev) |
981 | { | |
982 | if (dev->board.max_range_640_480) | |
983 | return 640; | |
984 | else | |
985 | return 720; | |
986 | } | |
987 | ||
988 | static inline unsigned int norm_maxh(struct cx231xx *dev) | |
989 | { | |
990 | if (dev->board.max_range_640_480) | |
991 | return 480; | |
992 | else | |
993 | return (dev->norm & V4L2_STD_625_50) ? 576 : 480; | |
994 | } | |
995 | #endif |