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[mirror_ubuntu-artful-kernel.git] / drivers / media / video / cx231xx / cx231xx.h
CommitLineData
e0d3bafd
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1/*
2 cx231xx.h - driver for Conexant Cx23100/101/102 USB video capture devices
3
4 Copyright (C) 2008 <srinivasa.deevi at conexant dot com>
84b5dbf3 5 Based on em28xx driver
e0d3bafd
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6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20 */
21
22#ifndef _CX231XX_H
23#define _CX231XX_H
24
25#include <linux/videodev2.h>
b1196126
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26#include <linux/types.h>
27#include <linux/ioctl.h>
e0d3bafd 28#include <linux/i2c.h>
61b04cb2 29#include <linux/workqueue.h>
e0d3bafd 30#include <linux/mutex.h>
b1196126 31
64fbf444 32#include <media/cx2341x.h>
b1196126
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33
34#include <media/videobuf-vmalloc.h>
35#include <media/v4l2-device.h>
6bda9644 36#include <media/rc-core.h>
9ab66912 37#include <media/ir-kbd-i2c.h>
e0d3bafd 38#include <media/videobuf-dvb.h>
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39
40#include "cx231xx-reg.h"
6e4f574b 41#include "cx231xx-pcb-cfg.h"
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42#include "cx231xx-conf-reg.h"
43
e0d3bafd 44#define DRIVER_NAME "cx231xx"
44ecf1df 45#define PWR_SLEEP_INTERVAL 10
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46
47/* I2C addresses for control block in Cx231xx */
ecc67d10
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48#define AFE_DEVICE_ADDRESS 0x60
49#define I2S_BLK_DEVICE_ADDRESS 0x98
50#define VID_BLK_I2C_ADDRESS 0x88
64fbf444 51#define VERVE_I2C_ADDRESS 0x40
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52#define DIF_USE_BASEBAND 0xFFFFFFFF
53
54/* Boards supported by driver */
55#define CX231XX_BOARD_UNKNOWN 0
955e6ed8
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56#define CX231XX_BOARD_CNXT_CARRAERA 1
57#define CX231XX_BOARD_CNXT_SHELBY 2
58#define CX231XX_BOARD_CNXT_RDE_253S 3
59#define CX231XX_BOARD_CNXT_RDU_253S 4
64fbf444 60#define CX231XX_BOARD_CNXT_VIDEO_GRABBER 5
955e6ed8
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61#define CX231XX_BOARD_CNXT_RDE_250 6
62#define CX231XX_BOARD_CNXT_RDU_250 7
1a50fdde 63#define CX231XX_BOARD_HAUPPAUGE_EXETER 8
4270c3ca 64#define CX231XX_BOARD_HAUPPAUGE_USBLIVE2 9
9417bc6d 65#define CX231XX_BOARD_PV_PLAYTV_USB_HYBRID 10
4e105039 66#define CX231XX_BOARD_PV_XCAPTURE_USB 11
eeaaf817 67#define CX231XX_BOARD_KWORLD_UB430_USB_HYBRID 12
2a7b6a40 68#define CX231XX_BOARD_ICONBIT_U100 13
de8ae0d5
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69#define CX231XX_BOARD_HAUPPAUGE_USB2_FM_PAL 14
70#define CX231XX_BOARD_HAUPPAUGE_USB2_FM_NTSC 15
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71
72/* Limits minimum and default number of buffers */
73#define CX231XX_MIN_BUF 4
74#define CX231XX_DEF_BUF 12
75#define CX231XX_DEF_VBI_BUF 6
76
77#define VBI_LINE_COUNT 17
78#define VBI_LINE_LENGTH 1440
79
80/*Limits the max URB message size */
81#define URB_MAX_CTRL_SIZE 80
82
83/* Params for validated field */
84#define CX231XX_BOARD_NOT_VALIDATED 1
84b5dbf3 85#define CX231XX_BOARD_VALIDATED 0
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86
87/* maximum number of cx231xx boards */
88#define CX231XX_MAXBOARDS 8
89
90/* maximum number of frames that can be queued */
91#define CX231XX_NUM_FRAMES 5
92
93/* number of buffers for isoc transfers */
94#define CX231XX_NUM_BUFS 8
95
96/* number of packets for each buffer
97 windows requests only 40 packets .. so we better do the same
98 this is what I found out for all alternate numbers there!
99 */
100#define CX231XX_NUM_PACKETS 40
101
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102/* default alternate; 0 means choose the best */
103#define CX231XX_PINOUT 0
104
105#define CX231XX_INTERLACED_DEFAULT 1
106
e0d3bafd 107/* time to wait when stopping the isoc transfer */
b9255176
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108#define CX231XX_URB_TIMEOUT \
109 msecs_to_jiffies(CX231XX_NUM_BUFS * CX231XX_NUM_PACKETS)
e0d3bafd 110
64fbf444
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111#define CX231xx_NORMS (\
112 V4L2_STD_NTSC_M | V4L2_STD_NTSC_M_JP | V4L2_STD_NTSC_443 | \
113 V4L2_STD_PAL_BG | V4L2_STD_PAL_DK | V4L2_STD_PAL_I | \
114 V4L2_STD_PAL_M | V4L2_STD_PAL_N | V4L2_STD_PAL_Nc | \
115 V4L2_STD_PAL_60 | V4L2_STD_SECAM_L | V4L2_STD_SECAM_DK)
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116
117#define SLEEP_S5H1432 30
118#define CX23417_OSC_EN 8
119#define CX23417_RESET 9
120
121struct cx23417_fmt {
122 char *name;
123 u32 fourcc; /* v4l2 format id */
124 int depth;
125 int flags;
126 u32 cxformat;
127};
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128enum cx231xx_mode {
129 CX231XX_SUSPEND,
130 CX231XX_ANALOG_MODE,
131 CX231XX_DIGITAL_MODE,
132};
133
134enum cx231xx_std_mode {
135 CX231XX_TV_AIR = 0,
136 CX231XX_TV_CABLE
137};
138
139enum cx231xx_stream_state {
140 STREAM_OFF,
141 STREAM_INTERRUPT,
142 STREAM_ON,
143};
144
145struct cx231xx;
146
64fbf444 147struct cx231xx_isoc_ctl {
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148 /* max packet size of isoc transaction */
149 int max_pkt_size;
e0d3bafd 150
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151 /* number of allocated urbs */
152 int num_bufs;
e0d3bafd 153
84b5dbf3
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154 /* urb for isoc transfers */
155 struct urb **urb;
e0d3bafd 156
84b5dbf3
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157 /* transfer buffers for isoc transfer */
158 char **transfer_buffer;
e0d3bafd 159
84b5dbf3
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160 /* Last buffer command and region */
161 u8 cmd;
162 int pos, size, pktsize;
e0d3bafd 163
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164 /* Last field: ODD or EVEN? */
165 int field;
e0d3bafd 166
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167 /* Stores incomplete commands */
168 u32 tmp_buf;
169 int tmp_buf_len;
e0d3bafd 170
84b5dbf3
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171 /* Stores already requested buffers */
172 struct cx231xx_buffer *buf;
e0d3bafd 173
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174 /* Stores the number of received fields */
175 int nfields;
e0d3bafd 176
84b5dbf3 177 /* isoc urb callback */
cde4362f 178 int (*isoc_copy) (struct cx231xx *dev, struct urb *urb);
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179};
180
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181struct cx231xx_bulk_ctl {
182 /* max packet size of bulk transaction */
183 int max_pkt_size;
184
185 /* number of allocated urbs */
186 int num_bufs;
187
188 /* urb for bulk transfers */
189 struct urb **urb;
190
191 /* transfer buffers for bulk transfer */
192 char **transfer_buffer;
193
194 /* Last buffer command and region */
195 u8 cmd;
196 int pos, size, pktsize;
197
198 /* Last field: ODD or EVEN? */
199 int field;
200
201 /* Stores incomplete commands */
202 u32 tmp_buf;
203 int tmp_buf_len;
204
205 /* Stores already requested buffers */
206 struct cx231xx_buffer *buf;
207
208 /* Stores the number of received fields */
209 int nfields;
210
211 /* bulk urb callback */
212 int (*bulk_copy) (struct cx231xx *dev, struct urb *urb);
213};
214
e0d3bafd 215struct cx231xx_fmt {
84b5dbf3
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216 char *name;
217 u32 fourcc; /* v4l2 format id */
218 int depth;
219 int reg;
e0d3bafd
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220};
221
222/* buffer for one video frame */
223struct cx231xx_buffer {
224 /* common v4l buffer stuff -- must be first */
225 struct videobuf_buffer vb;
226
227 struct list_head frame;
228 int top_field;
229 int receiving;
230};
231
64fbf444
PB
232enum ps_package_head {
233 CX231XX_NEED_ADD_PS_PACKAGE_HEAD = 0,
234 CX231XX_NONEED_PS_PACKAGE_HEAD
235};
236
e0d3bafd 237struct cx231xx_dmaqueue {
84b5dbf3
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238 struct list_head active;
239 struct list_head queued;
e0d3bafd 240
84b5dbf3 241 wait_queue_head_t wq;
e0d3bafd
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242
243 /* Counters to control buffer fill */
84b5dbf3
MCC
244 int pos;
245 u8 is_partial_line;
246 u8 partial_buf[8];
247 u8 last_sav;
248 int current_field;
249 u32 bytes_left_in_line;
250 u32 lines_completed;
251 u8 field1_done;
252 u32 lines_per_field;
64fbf444
PB
253
254 /*Mpeg2 control buffer*/
255 u8 *p_left_data;
256 u32 left_data_count;
257 u8 mpeg_buffer_done;
258 u32 mpeg_buffer_completed;
259 enum ps_package_head add_ps_package_head;
260 char ps_head[10];
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261};
262
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263/* inputs */
264
265#define MAX_CX231XX_INPUT 4
266
267enum cx231xx_itype {
268 CX231XX_VMUX_COMPOSITE1 = 1,
269 CX231XX_VMUX_SVIDEO,
270 CX231XX_VMUX_TELEVISION,
84b5dbf3
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271 CX231XX_VMUX_CABLE,
272 CX231XX_RADIO,
273 CX231XX_VMUX_DVB,
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274 CX231XX_VMUX_DEBUG
275};
276
277enum cx231xx_v_input {
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278 CX231XX_VIN_1_1 = 0x1,
279 CX231XX_VIN_2_1,
280 CX231XX_VIN_3_1,
281 CX231XX_VIN_4_1,
282 CX231XX_VIN_1_2 = 0x01,
283 CX231XX_VIN_2_2,
284 CX231XX_VIN_3_2,
285 CX231XX_VIN_1_3 = 0x1,
286 CX231XX_VIN_2_3,
287 CX231XX_VIN_3_3,
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288};
289
290/* cx231xx has two audio inputs: tuner and line in */
291enum cx231xx_amux {
292 /* This is the only entry for cx231xx tuner input */
84b5dbf3 293 CX231XX_AMUX_VIDEO, /* cx231xx tuner */
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294 CX231XX_AMUX_LINE_IN, /* Line In */
295};
296
297struct cx231xx_reg_seq {
298 unsigned char bit;
84b5dbf3 299 unsigned char val;
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300 int sleep;
301};
302
303struct cx231xx_input {
304 enum cx231xx_itype type;
305 unsigned int vmux;
306 enum cx231xx_amux amux;
307 struct cx231xx_reg_seq *gpio;
308};
309
310#define INPUT(nr) (&cx231xx_boards[dev->model].input[nr])
311
312enum cx231xx_decoder {
313 CX231XX_NODECODER,
314 CX231XX_AVDECODER
315};
316
b9255176 317enum CX231XX_I2C_MASTER_PORT {
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MCC
318 I2C_0 = 0,
319 I2C_1 = 1,
320 I2C_2 = 2,
321 I2C_3 = 3
b9255176 322};
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323
324struct cx231xx_board {
325 char *name;
326 int vchannels;
327 int tuner_type;
328 int tuner_addr;
84b5dbf3 329 v4l2_std_id norm; /* tv norm */
e0d3bafd 330
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MCC
331 /* demod related */
332 int demod_addr;
333 u8 demod_xfer_mode; /* 0 - Serial; 1 - parallel */
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334
335 /* GPIO Pins */
336 struct cx231xx_reg_seq *dvb_gpio;
337 struct cx231xx_reg_seq *suspend_gpio;
338 struct cx231xx_reg_seq *tuner_gpio;
78bb6df6
MCC
339 /* Negative means don't use it */
340 s8 tuner_sif_gpio;
341 s8 tuner_scl_gpio;
342 s8 tuner_sda_gpio;
e0d3bafd 343
84b5dbf3
MCC
344 /* PIN ctrl */
345 u32 ctl_pin_status_mask;
346 u8 agc_analog_digital_select_gpio;
347 u32 gpio_pin_status_mask;
e0d3bafd 348
84b5dbf3
MCC
349 /* i2c masters */
350 u8 tuner_i2c_master;
351 u8 demod_i2c_master;
9ab66912
MCC
352 u8 ir_i2c_master;
353
354 /* for devices with I2C chips for IR */
29e3ec19 355 char *rc_map_name;
e0d3bafd
SD
356
357 unsigned int max_range_640_480:1;
358 unsigned int has_dvb:1;
2f861387 359 unsigned int has_417:1;
e0d3bafd 360 unsigned int valid:1;
2f861387
MCC
361 unsigned int no_alt_vanc:1;
362 unsigned int external_av:1;
38f5ddc1 363 unsigned int dont_use_port_3:1;
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364
365 unsigned char xclk, i2c_speed;
366
367 enum cx231xx_decoder decoder;
88806218 368 int output_mode;
e0d3bafd 369
84b5dbf3
MCC
370 struct cx231xx_input input[MAX_CX231XX_INPUT];
371 struct cx231xx_input radio;
b088ba65 372 struct rc_map *ir_codes;
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SD
373};
374
375/* device states */
376enum cx231xx_dev_state {
377 DEV_INITIALIZED = 0x01,
378 DEV_DISCONNECTED = 0x02,
e0d3bafd
SD
379};
380
84b5dbf3
MCC
381enum AFE_MODE {
382 AFE_MODE_LOW_IF,
383 AFE_MODE_BASEBAND,
384 AFE_MODE_EU_HI_IF,
385 AFE_MODE_US_HI_IF,
386 AFE_MODE_JAPAN_HI_IF
e0d3bafd
SD
387};
388
84b5dbf3
MCC
389enum AUDIO_INPUT {
390 AUDIO_INPUT_MUTE,
391 AUDIO_INPUT_LINE,
392 AUDIO_INPUT_TUNER_TV,
393 AUDIO_INPUT_SPDIF,
394 AUDIO_INPUT_TUNER_FM
e0d3bafd
SD
395};
396
397#define CX231XX_AUDIO_BUFS 5
64fbf444
PB
398#define CX231XX_NUM_AUDIO_PACKETS 16
399#define CX231XX_ISO_NUM_AUDIO_PACKETS 64
e0d3bafd 400
e0d3bafd
SD
401/* cx231xx extensions */
402#define CX231XX_AUDIO 0x10
403#define CX231XX_DVB 0x20
404
405struct cx231xx_audio {
406 char name[50];
407 char *transfer_buffer[CX231XX_AUDIO_BUFS];
408 struct urb *urb[CX231XX_AUDIO_BUFS];
409 struct usb_device *udev;
410 unsigned int capture_transfer_done;
84b5dbf3 411 struct snd_pcm_substream *capture_pcm_substream;
e0d3bafd
SD
412
413 unsigned int hwptr_done_capture;
84b5dbf3 414 struct snd_card *sndcard;
e0d3bafd
SD
415
416 int users, shutdown;
64fbf444 417 /* locks */
e0d3bafd
SD
418 spinlock_t slock;
419
84b5dbf3
MCC
420 int alt; /* alternate */
421 int max_pkt_size; /* max packet size of isoc transaction */
422 int num_alt; /* Number of alternative settings */
e0d3bafd 423 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
84b5dbf3 424 u16 end_point_addr;
e0d3bafd
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425};
426
427struct cx231xx;
428
429struct cx231xx_fh {
430 struct cx231xx *dev;
84b5dbf3
MCC
431 unsigned int stream_on:1; /* Locks streams */
432 int radio;
e0d3bafd 433
84b5dbf3 434 struct videobuf_queue vb_vidq;
e0d3bafd 435
84b5dbf3 436 enum v4l2_buf_type type;
64fbf444
PB
437
438
439
440/*following is copyed from cx23885.h*/
441 u32 resources;
442
443 /* video overlay */
444 struct v4l2_window win;
445 struct v4l2_clip *clips;
446 unsigned int nclips;
447
448 /* video capture */
449 struct cx23417_fmt *fmt;
450 unsigned int width, height;
451
452 /* vbi capture */
453 struct videobuf_queue vidq;
454 struct videobuf_queue vbiq;
455
456 /* MPEG Encoder specifics ONLY */
457
458 atomic_t v4l_reading;
e0d3bafd
SD
459};
460
b9255176 461/*****************************************************************/
e0d3bafd 462/* set/get i2c */
b9255176
SD
463/* 00--1Mb/s, 01-400kb/s, 10--100kb/s, 11--5Mb/s */
464#define I2C_SPEED_1M 0x0
465#define I2C_SPEED_400K 0x1
466#define I2C_SPEED_100K 0x2
467#define I2C_SPEED_5M 0x3
468
469/* 0-- STOP transaction */
470#define I2C_STOP 0x0
471/* 1-- do not transmit STOP at end of transaction */
472#define I2C_NOSTOP 0x1
b251e618 473/* 1--allow slave to insert clock wait states */
b9255176 474#define I2C_SYNC 0x1
e0d3bafd
SD
475
476struct cx231xx_i2c {
84b5dbf3 477 struct cx231xx *dev;
e0d3bafd 478
84b5dbf3 479 int nr;
e0d3bafd
SD
480
481 /* i2c i/o */
84b5dbf3 482 struct i2c_adapter i2c_adap;
84b5dbf3
MCC
483 struct i2c_client i2c_client;
484 u32 i2c_rc;
e0d3bafd
SD
485
486 /* different settings for each bus */
84b5dbf3
MCC
487 u8 i2c_period;
488 u8 i2c_nostop;
489 u8 i2c_reserve;
e0d3bafd
SD
490};
491
84b5dbf3
MCC
492struct cx231xx_i2c_xfer_data {
493 u8 dev_addr;
494 u8 direction; /* 1 - IN, 0 - OUT */
495 u8 saddr_len; /* sub address len */
496 u16 saddr_dat; /* sub addr data */
497 u8 buf_size; /* buffer size */
498 u8 *p_buffer; /* pointer to the buffer */
e0d3bafd
SD
499};
500
6e4f574b 501struct VENDOR_REQUEST_IN {
84b5dbf3
MCC
502 u8 bRequest;
503 u16 wValue;
504 u16 wIndex;
505 u16 wLength;
506 u8 direction;
507 u8 bData;
508 u8 *pBuff;
b9255176 509};
e0d3bafd 510
64fbf444
PB
511struct cx231xx_tvnorm {
512 char *name;
513 v4l2_std_id id;
514 u32 cxiformat;
515 u32 cxoformat;
516};
517
e0d3bafd
SD
518struct cx231xx_ctrl {
519 struct v4l2_queryctrl v;
84b5dbf3
MCC
520 u32 off;
521 u32 reg;
522 u32 mask;
523 u32 shift;
e0d3bafd
SD
524};
525
6e4f574b 526enum TRANSFER_TYPE {
84b5dbf3
MCC
527 Raw_Video = 0,
528 Audio,
529 Vbi, /* VANC */
530 Sliced_cc, /* HANC */
531 TS1_serial_mode,
532 TS2,
533 TS1_parallel_mode
b9255176 534} ;
e0d3bafd
SD
535
536struct cx231xx_video_mode {
84b5dbf3 537 /* Isoc control struct */
e0d3bafd 538 struct cx231xx_dmaqueue vidq;
64fbf444
PB
539 struct cx231xx_isoc_ctl isoc_ctl;
540 struct cx231xx_bulk_ctl bulk_ctl;
541 /* locks */
e0d3bafd
SD
542 spinlock_t slock;
543
544 /* usb transfer */
84b5dbf3
MCC
545 int alt; /* alternate */
546 int max_pkt_size; /* max packet size of isoc transaction */
547 int num_alt; /* Number of alternative settings */
e0d3bafd 548 unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */
84b5dbf3 549 u16 end_point_addr;
e0d3bafd 550};
64fbf444
PB
551/*
552struct cx23885_dmaqueue {
553 struct list_head active;
554 struct list_head queued;
555 struct timer_list timeout;
556 struct btcx_riscmem stopper;
557 u32 count;
558};
559*/
560struct cx231xx_tsport {
561 struct cx231xx *dev;
562
563 int nr;
564 int sram_chno;
565
566 struct videobuf_dvb_frontends frontends;
567
568 /* dma queues */
569
570 u32 ts_packet_size;
571 u32 ts_packet_count;
572
573 int width;
574 int height;
575
576 /* locks */
577 spinlock_t slock;
578
579 /* registers */
580 u32 reg_gpcnt;
581 u32 reg_gpcnt_ctl;
582 u32 reg_dma_ctl;
583 u32 reg_lngth;
584 u32 reg_hw_sop_ctrl;
585 u32 reg_gen_ctrl;
586 u32 reg_bd_pkt_status;
587 u32 reg_sop_status;
588 u32 reg_fifo_ovfl_stat;
589 u32 reg_vld_misc;
590 u32 reg_ts_clk_en;
591 u32 reg_ts_int_msk;
592 u32 reg_ts_int_stat;
593 u32 reg_src_sel;
594
595 /* Default register vals */
596 int pci_irqmask;
597 u32 dma_ctl_val;
598 u32 ts_int_msk_val;
599 u32 gen_ctrl_val;
600 u32 ts_clk_en_val;
601 u32 src_sel_val;
602 u32 vld_misc_val;
603 u32 hw_sop_ctrl_val;
604
605 /* Allow a single tsport to have multiple frontends */
606 u32 num_frontends;
607 void *port_priv;
608};
e0d3bafd 609
e0d3bafd
SD
610/* main device struct */
611struct cx231xx {
612 /* generic device properties */
84b5dbf3
MCC
613 char name[30]; /* name (including minor) of the device */
614 int model; /* index in the device_data struct */
615 int devno; /* marks the number of this device */
e0d3bafd
SD
616
617 struct cx231xx_board board;
618
9ab66912 619 /* For I2C IR support */
141bb0dc 620 struct IR_i2c_init_data init_data;
7528cd27 621 struct i2c_client *ir_i2c_client;
9ab66912 622
84b5dbf3
MCC
623 unsigned int stream_on:1; /* Locks streams */
624 unsigned int vbi_stream_on:1; /* Locks streams for VBI */
e0d3bafd
SD
625 unsigned int has_audio_class:1;
626 unsigned int has_alsa_audio:1;
627
84b5dbf3 628 struct cx231xx_fmt *format;
e0d3bafd 629
b1196126
SD
630 struct v4l2_device v4l2_dev;
631 struct v4l2_subdev *sd_cx25840;
632 struct v4l2_subdev *sd_tuner;
633
61b04cb2
MCC
634 struct work_struct wq_trigger; /* Trigger to start/stop audio for alsa module */
635 atomic_t stream_started; /* stream should be running if true */
636
84b5dbf3 637 struct list_head devlist;
e0d3bafd 638
84b5dbf3
MCC
639 int tuner_type; /* type of the tuner */
640 int tuner_addr; /* tuner address */
e0d3bafd 641
84b5dbf3
MCC
642 /* I2C adapters: Master 1 & 2 (External) & Master 3 (Internal only) */
643 struct cx231xx_i2c i2c_bus[3];
644 unsigned int xc_fw_load_done:1;
64fbf444 645 /* locks */
84b5dbf3 646 struct mutex gpio_i2c_lock;
64fbf444 647 struct mutex i2c_lock;
e0d3bafd
SD
648
649 /* video for linux */
84b5dbf3
MCC
650 int users; /* user count for exclusive use */
651 struct video_device *vdev; /* video for linux device struct */
652 v4l2_std_id norm; /* selected tv norm */
653 int ctl_freq; /* selected frequency */
654 unsigned int ctl_ainput; /* selected audio input */
e0d3bafd
SD
655 int mute;
656 int volume;
657
658 /* frame properties */
84b5dbf3
MCC
659 int width; /* current frame width */
660 int height; /* current frame height */
84b5dbf3 661 int interlaced; /* 1=interlace fileds, 0=just top fileds */
e0d3bafd
SD
662
663 struct cx231xx_audio adev;
664
665 /* states */
666 enum cx231xx_dev_state state;
667
84b5dbf3 668 struct work_struct request_module_wk;
e0d3bafd
SD
669
670 /* locks */
671 struct mutex lock;
84b5dbf3 672 struct mutex ctrl_urb_lock; /* protects urb_buf */
e0d3bafd
SD
673 struct list_head inqueue, outqueue;
674 wait_queue_head_t open, wait_frame, wait_stream;
675 struct video_device *vbi_dev;
676 struct video_device *radio_dev;
677
678 unsigned char eedata[256];
679
84b5dbf3
MCC
680 struct cx231xx_video_mode video_mode;
681 struct cx231xx_video_mode vbi_mode;
682 struct cx231xx_video_mode sliced_cc_mode;
683 struct cx231xx_video_mode ts1_mode;
e0d3bafd 684
64fbf444
PB
685 atomic_t devlist_count;
686
84b5dbf3
MCC
687 struct usb_device *udev; /* the usb device */
688 char urb_buf[URB_MAX_CTRL_SIZE]; /* urb control msg buffer */
e0d3bafd
SD
689
690 /* helper funcs that call usb_control_msg */
cde4362f 691 int (*cx231xx_read_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
e0d3bafd 692 char *buf, int len);
cde4362f 693 int (*cx231xx_write_ctrl_reg) (struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 694 char *buf, int len);
cde4362f 695 int (*cx231xx_send_usb_command) (struct cx231xx_i2c *i2c_bus,
b9255176 696 struct cx231xx_i2c_xfer_data *req_data);
cde4362f
MCC
697 int (*cx231xx_gpio_i2c_read) (struct cx231xx *dev, u8 dev_addr,
698 u8 *buf, u8 len);
699 int (*cx231xx_gpio_i2c_write) (struct cx231xx *dev, u8 dev_addr,
700 u8 *buf, u8 len);
84b5dbf3 701
cde4362f
MCC
702 int (*cx231xx_set_analog_freq) (struct cx231xx *dev, u32 freq);
703 int (*cx231xx_reset_analog_tuner) (struct cx231xx *dev);
e0d3bafd
SD
704
705 enum cx231xx_mode mode;
706
707 struct cx231xx_dvb *dvb;
708
84b5dbf3
MCC
709 /* Cx231xx supported PCB config's */
710 struct pcb_config current_pcb_config;
711 u8 current_scenario_idx;
712 u8 interface_count;
713 u8 max_iad_interface_count;
e0d3bafd 714
84b5dbf3
MCC
715 /* GPIO related register direction and values */
716 u32 gpio_dir;
717 u32 gpio_val;
e0d3bafd 718
84b5dbf3
MCC
719 /* Power Modes */
720 int power_mode;
e0d3bafd 721
ecc67d10
SD
722 /* afe parameters */
723 enum AFE_MODE afe_mode;
724 u32 afe_ref_count;
e0d3bafd 725
84b5dbf3
MCC
726 /* video related parameters */
727 u32 video_input;
728 u32 active_mode;
729 u8 vbi_or_sliced_cc_mode; /* 0 - vbi ; 1 - sliced cc mode */
730 enum cx231xx_std_mode std_mode; /* 0 - Air; 1 - cable */
e0d3bafd 731
64fbf444
PB
732 /*mode: digital=1 or analog=0*/
733 u8 mode_tv;
734
735 u8 USE_ISO;
736 struct cx231xx_tvnorm encodernorm;
737 struct cx231xx_tsport ts1, ts2;
738 struct cx2341x_mpeg_params mpeg_params;
739 struct video_device *v4l_device;
740 atomic_t v4l_reader_count;
741 u32 freq;
742 unsigned int input;
743 u32 cx23417_mailbox;
744 u32 __iomem *lmmio;
745 u8 __iomem *bmmio;
e0d3bafd
SD
746};
747
64fbf444
PB
748extern struct list_head cx231xx_devlist;
749
b1196126
SD
750#define cx25840_call(cx231xx, o, f, args...) \
751 v4l2_subdev_call(cx231xx->sd_cx25840, o, f, ##args)
752#define tuner_call(cx231xx, o, f, args...) \
753 v4l2_subdev_call(cx231xx->sd_tuner, o, f, ##args)
754#define call_all(dev, o, f, args...) \
755 v4l2_device_call_until_err(&dev->v4l2_dev, 0, o, f, ##args)
756
e0d3bafd
SD
757struct cx231xx_ops {
758 struct list_head next;
759 char *name;
760 int id;
84b5dbf3
MCC
761 int (*init) (struct cx231xx *);
762 int (*fini) (struct cx231xx *);
e0d3bafd
SD
763};
764
765/* call back functions in dvb module */
84b5dbf3
MCC
766int cx231xx_set_analog_freq(struct cx231xx *dev, u32 freq);
767int cx231xx_reset_analog_tuner(struct cx231xx *dev);
e0d3bafd
SD
768
769/* Provided by cx231xx-i2c.c */
e0d3bafd
SD
770void cx231xx_do_i2c_scan(struct cx231xx *dev, struct i2c_client *c);
771int cx231xx_i2c_register(struct cx231xx_i2c *bus);
772int cx231xx_i2c_unregister(struct cx231xx_i2c *bus);
773
774/* Internal block control functions */
64fbf444
PB
775int cx231xx_read_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
776 u8 saddr_len, u32 *data, u8 data_len, int master);
777int cx231xx_write_i2c_master(struct cx231xx *dev, u8 dev_addr, u16 saddr,
778 u8 saddr_len, u32 data, u8 data_len, int master);
e0d3bafd 779int cx231xx_read_i2c_data(struct cx231xx *dev, u8 dev_addr,
cde4362f 780 u16 saddr, u8 saddr_len, u32 *data, u8 data_len);
e0d3bafd 781int cx231xx_write_i2c_data(struct cx231xx *dev, u8 dev_addr,
84b5dbf3
MCC
782 u16 saddr, u8 saddr_len, u32 data, u8 data_len);
783int cx231xx_reg_mask_write(struct cx231xx *dev, u8 dev_addr, u8 size,
784 u16 register_address, u8 bit_start, u8 bit_end,
785 u32 value);
e0d3bafd 786int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr,
84b5dbf3 787 u16 saddr, u32 mask, u32 value);
e0d3bafd
SD
788u32 cx231xx_set_field(u32 field_mask, u32 data);
789
64fbf444
PB
790/*verve r/w*/
791void initGPIO(struct cx231xx *dev);
792void uninitGPIO(struct cx231xx *dev);
ecc67d10
SD
793/* afe related functions */
794int cx231xx_afe_init_super_block(struct cx231xx *dev, u32 ref_count);
795int cx231xx_afe_init_channels(struct cx231xx *dev);
796int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx *dev);
797int cx231xx_afe_set_input_mux(struct cx231xx *dev, u32 input_mux);
798int cx231xx_afe_set_mode(struct cx231xx *dev, enum AFE_MODE mode);
799int cx231xx_afe_update_power_control(struct cx231xx *dev,
6e4f574b 800 enum AV_MODE avmode);
ecc67d10 801int cx231xx_afe_adjust_ref_count(struct cx231xx *dev, u32 video_input);
e0d3bafd 802
ecc67d10
SD
803/* i2s block related functions */
804int cx231xx_i2s_blk_initialize(struct cx231xx *dev);
805int cx231xx_i2s_blk_update_power_control(struct cx231xx *dev,
6e4f574b 806 enum AV_MODE avmode);
ecc67d10 807int cx231xx_i2s_blk_set_audio_input(struct cx231xx *dev, u8 audio_input);
e0d3bafd
SD
808
809/* DIF related functions */
810int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx *dev, u32 mode,
84b5dbf3 811 u32 function_mode, u32 standard);
64fbf444
PB
812void cx231xx_set_Colibri_For_LowIF(struct cx231xx *dev, u32 if_freq,
813 u8 spectral_invert, u32 mode);
814u32 cx231xx_Get_Colibri_CarrierOffset(u32 mode, u32 standerd);
815void cx231xx_set_DIF_bandpass(struct cx231xx *dev, u32 if_freq,
816 u8 spectral_invert, u32 mode);
817void cx231xx_Setup_AFE_for_LowIF(struct cx231xx *dev);
818void reset_s5h1432_demod(struct cx231xx *dev);
819void cx231xx_dump_HH_reg(struct cx231xx *dev);
820void update_HH_register_after_set_DIF(struct cx231xx *dev);
821void cx231xx_dump_SC_reg(struct cx231xx *dev);
822
823
824
e0d3bafd
SD
825int cx231xx_dif_set_standard(struct cx231xx *dev, u32 standard);
826int cx231xx_tuner_pre_channel_change(struct cx231xx *dev);
827int cx231xx_tuner_post_channel_change(struct cx231xx *dev);
828
829/* video parser functions */
cde4362f
MCC
830u8 cx231xx_find_next_SAV_EAV(u8 *p_buffer, u32 buffer_size,
831 u32 *p_bytes_used);
832u8 cx231xx_find_boundary_SAV_EAV(u8 *p_buffer, u8 *partial_buf,
833 u32 *p_bytes_used);
e0d3bafd 834int cx231xx_do_copy(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f 835 u8 *p_buffer, u32 bytes_to_copy);
84b5dbf3
MCC
836void cx231xx_reset_video_buffer(struct cx231xx *dev,
837 struct cx231xx_dmaqueue *dma_q);
838u8 cx231xx_is_buffer_done(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q);
839u32 cx231xx_copy_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f 840 u8 *p_line, u32 length, int field_number);
84b5dbf3 841u32 cx231xx_get_video_line(struct cx231xx *dev, struct cx231xx_dmaqueue *dma_q,
cde4362f
MCC
842 u8 sav_eav, u8 *p_buffer, u32 buffer_size);
843void cx231xx_swab(u16 *from, u16 *to, u16 len);
e0d3bafd
SD
844
845/* Provided by cx231xx-core.c */
846
847u32 cx231xx_request_buffers(struct cx231xx *dev, u32 count);
848void cx231xx_queue_unusedframes(struct cx231xx *dev);
849void cx231xx_release_buffers(struct cx231xx *dev);
850
851/* read from control pipe */
852int cx231xx_read_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 853 char *buf, int len);
e0d3bafd
SD
854
855/* write to control pipe */
856int cx231xx_write_ctrl_reg(struct cx231xx *dev, u8 req, u16 reg,
84b5dbf3 857 char *buf, int len);
e0d3bafd
SD
858int cx231xx_mode_register(struct cx231xx *dev, u16 address, u32 mode);
859
b9255176
SD
860int cx231xx_send_vendor_cmd(struct cx231xx *dev,
861 struct VENDOR_REQUEST_IN *ven_req);
e0d3bafd 862int cx231xx_send_usb_command(struct cx231xx_i2c *i2c_bus,
b9255176 863 struct cx231xx_i2c_xfer_data *req_data);
e0d3bafd
SD
864
865/* Gpio related functions */
cde4362f 866int cx231xx_send_gpio_cmd(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val,
84b5dbf3 867 u8 len, u8 request, u8 direction);
cde4362f
MCC
868int cx231xx_set_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val);
869int cx231xx_get_gpio_bit(struct cx231xx *dev, u32 gpio_bit, u8 *gpio_val);
e0d3bafd 870int cx231xx_set_gpio_value(struct cx231xx *dev, int pin_number, int pin_value);
84b5dbf3
MCC
871int cx231xx_set_gpio_direction(struct cx231xx *dev, int pin_number,
872 int pin_value);
e0d3bafd
SD
873
874int cx231xx_gpio_i2c_start(struct cx231xx *dev);
875int cx231xx_gpio_i2c_end(struct cx231xx *dev);
876int cx231xx_gpio_i2c_write_byte(struct cx231xx *dev, u8 data);
cde4362f 877int cx231xx_gpio_i2c_read_byte(struct cx231xx *dev, u8 *buf);
e0d3bafd
SD
878int cx231xx_gpio_i2c_read_ack(struct cx231xx *dev);
879int cx231xx_gpio_i2c_write_ack(struct cx231xx *dev);
880int cx231xx_gpio_i2c_write_nak(struct cx231xx *dev);
881
cde4362f
MCC
882int cx231xx_gpio_i2c_read(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
883int cx231xx_gpio_i2c_write(struct cx231xx *dev, u8 dev_addr, u8 *buf, u8 len);
e0d3bafd
SD
884
885/* audio related functions */
84b5dbf3
MCC
886int cx231xx_set_audio_decoder_input(struct cx231xx *dev,
887 enum AUDIO_INPUT audio_input);
e0d3bafd
SD
888
889int cx231xx_capture_start(struct cx231xx *dev, int start, u8 media_type);
e0d3bafd
SD
890int cx231xx_set_video_alternate(struct cx231xx *dev);
891int cx231xx_set_alt_setting(struct cx231xx *dev, u8 index, u8 alt);
64fbf444
PB
892int is_fw_load(struct cx231xx *dev);
893int cx231xx_check_fw(struct cx231xx *dev);
e0d3bafd 894int cx231xx_init_isoc(struct cx231xx *dev, int max_packets,
84b5dbf3 895 int num_bufs, int max_pkt_size,
cde4362f
MCC
896 int (*isoc_copy) (struct cx231xx *dev,
897 struct urb *urb));
64fbf444
PB
898int cx231xx_init_bulk(struct cx231xx *dev, int max_packets,
899 int num_bufs, int max_pkt_size,
900 int (*bulk_copy) (struct cx231xx *dev,
901 struct urb *urb));
902void cx231xx_stop_TS1(struct cx231xx *dev);
903void cx231xx_start_TS1(struct cx231xx *dev);
e0d3bafd 904void cx231xx_uninit_isoc(struct cx231xx *dev);
64fbf444 905void cx231xx_uninit_bulk(struct cx231xx *dev);
e0d3bafd 906int cx231xx_set_mode(struct cx231xx *dev, enum cx231xx_mode set_mode);
64fbf444
PB
907int cx231xx_unmute_audio(struct cx231xx *dev);
908int cx231xx_ep5_bulkout(struct cx231xx *dev, u8 *firmware, u16 size);
909void cx231xx_disable656(struct cx231xx *dev);
910void cx231xx_enable656(struct cx231xx *dev);
911int cx231xx_demod_reset(struct cx231xx *dev);
e0d3bafd
SD
912int cx231xx_gpio_set(struct cx231xx *dev, struct cx231xx_reg_seq *gpio);
913
914/* Device list functions */
915void cx231xx_release_resources(struct cx231xx *dev);
916void cx231xx_release_analog_resources(struct cx231xx *dev);
917int cx231xx_register_analog_devices(struct cx231xx *dev);
918void cx231xx_remove_from_devlist(struct cx231xx *dev);
919void cx231xx_add_into_devlist(struct cx231xx *dev);
e0d3bafd
SD
920void cx231xx_init_extension(struct cx231xx *dev);
921void cx231xx_close_extension(struct cx231xx *dev);
922
923/* hardware init functions */
924int cx231xx_dev_init(struct cx231xx *dev);
925void cx231xx_dev_uninit(struct cx231xx *dev);
926void cx231xx_config_i2c(struct cx231xx *dev);
927int cx231xx_config(struct cx231xx *dev);
928
929/* Stream control functions */
930int cx231xx_start_stream(struct cx231xx *dev, u32 ep_mask);
931int cx231xx_stop_stream(struct cx231xx *dev, u32 ep_mask);
932
933int cx231xx_initialize_stream_xfer(struct cx231xx *dev, u32 media_type);
934
935/* Power control functions */
6e4f574b 936int cx231xx_set_power_mode(struct cx231xx *dev, enum AV_MODE mode);
e0d3bafd
SD
937int cx231xx_power_suspend(struct cx231xx *dev);
938
939/* chip specific control functions */
940int cx231xx_init_ctrl_pin_status(struct cx231xx *dev);
84b5dbf3
MCC
941int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx *dev,
942 u8 analog_or_digital);
a6f6fb9c 943int cx231xx_enable_i2c_port_3(struct cx231xx *dev, bool is_port_3);
e0d3bafd
SD
944
945/* video audio decoder related functions */
946void video_mux(struct cx231xx *dev, int index);
947int cx231xx_set_video_input_mux(struct cx231xx *dev, u8 input);
948int cx231xx_set_decoder_video_input(struct cx231xx *dev, u8 pin_type, u8 input);
949int cx231xx_do_mode_ctrl_overrides(struct cx231xx *dev);
950int cx231xx_set_audio_input(struct cx231xx *dev, u8 input);
e0d3bafd
SD
951
952/* Provided by cx231xx-video.c */
953int cx231xx_register_extension(struct cx231xx_ops *dev);
954void cx231xx_unregister_extension(struct cx231xx_ops *dev);
955void cx231xx_init_extension(struct cx231xx *dev);
956void cx231xx_close_extension(struct cx231xx *dev);
957
958/* Provided by cx231xx-cards.c */
959extern void cx231xx_pre_card_setup(struct cx231xx *dev);
960extern void cx231xx_card_setup(struct cx231xx *dev);
961extern struct cx231xx_board cx231xx_boards[];
962extern struct usb_device_id cx231xx_id_table[];
963extern const unsigned int cx231xx_bcount;
e0d3bafd
SD
964int cx231xx_tuner_callback(void *ptr, int component, int command, int arg);
965
64fbf444
PB
966/* cx23885-417.c */
967extern int cx231xx_417_register(struct cx231xx *dev);
968extern void cx231xx_417_unregister(struct cx231xx *dev);
969
9ab66912
MCC
970/* cx23885-input.c */
971
972#if defined(CONFIG_VIDEO_CX231XX_RC)
973int cx231xx_ir_init(struct cx231xx *dev);
974void cx231xx_ir_exit(struct cx231xx *dev);
975#else
976#define cx231xx_ir_init(dev) (0)
977#define cx231xx_ir_exit(dev) (0)
978#endif
979
980
e0d3bafd
SD
981/* printk macros */
982
983#define cx231xx_err(fmt, arg...) do {\
984 printk(KERN_ERR fmt , ##arg); } while (0)
985
986#define cx231xx_errdev(fmt, arg...) do {\
987 printk(KERN_ERR "%s: "fmt,\
988 dev->name , ##arg); } while (0)
989
990#define cx231xx_info(fmt, arg...) do {\
991 printk(KERN_INFO "%s: "fmt,\
992 dev->name , ##arg); } while (0)
993#define cx231xx_warn(fmt, arg...) do {\
994 printk(KERN_WARNING "%s: "fmt,\
995 dev->name , ##arg); } while (0)
996
e0d3bafd
SD
997static inline unsigned int norm_maxw(struct cx231xx *dev)
998{
999 if (dev->board.max_range_640_480)
1000 return 640;
1001 else
1002 return 720;
1003}
1004
1005static inline unsigned int norm_maxh(struct cx231xx *dev)
1006{
1007 if (dev->board.max_range_640_480)
1008 return 480;
1009 else
1010 return (dev->norm & V4L2_STD_625_50) ? 576 : 480;
1011}
1012#endif