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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * device driver for Conexant 2388x based TV cards | |
4 | * MPEG Transport Stream (DVB) routines | |
5 | * | |
fc40b261 | 6 | * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au> |
1da177e4 LT |
7 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | */ | |
23 | ||
24 | #include <linux/module.h> | |
25 | #include <linux/init.h> | |
26 | #include <linux/device.h> | |
27 | #include <linux/fs.h> | |
28 | #include <linux/kthread.h> | |
29 | #include <linux/file.h> | |
30 | #include <linux/suspend.h> | |
31 | ||
1da177e4 LT |
32 | #include "cx88.h" |
33 | #include "dvb-pll.h" | |
5e453dc7 | 34 | #include <media/v4l2-common.h> |
41ef7c1e | 35 | |
1f10c7af AQ |
36 | #include "mt352.h" |
37 | #include "mt352_priv.h" | |
ecf854df | 38 | #include "cx88-vp3054-i2c.h" |
1f10c7af AQ |
39 | #include "zl10353.h" |
40 | #include "cx22702.h" | |
41 | #include "or51132.h" | |
42 | #include "lgdt330x.h" | |
60464da8 ST |
43 | #include "s5h1409.h" |
44 | #include "xc5000.h" | |
1f10c7af AQ |
45 | #include "nxt200x.h" |
46 | #include "cx24123.h" | |
cd20ca9f | 47 | #include "isl6421.h" |
0df31f83 | 48 | #include "tuner-simple.h" |
827855d3 | 49 | #include "tda9887.h" |
d893d5dc | 50 | #include "s5h1411.h" |
e4aab64c IL |
51 | #include "stv0299.h" |
52 | #include "z0194a.h" | |
53 | #include "stv0288.h" | |
54 | #include "stb6000.h" | |
5bd1b663 | 55 | #include "cx24116.h" |
1da177e4 LT |
56 | |
57 | MODULE_DESCRIPTION("driver for cx2388x based DVB cards"); | |
58 | MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>"); | |
59 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); | |
60 | MODULE_LICENSE("GPL"); | |
61 | ||
ff699e6b | 62 | static unsigned int debug; |
1da177e4 LT |
63 | module_param(debug, int, 0644); |
64 | MODULE_PARM_DESC(debug,"enable debug messages [dvb]"); | |
65 | ||
78e92006 JG |
66 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
67 | ||
1da177e4 | 68 | #define dprintk(level,fmt, arg...) if (debug >= level) \ |
6c5be74c | 69 | printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg) |
1da177e4 LT |
70 | |
71 | /* ------------------------------------------------------------------ */ | |
72 | ||
73 | static int dvb_buf_setup(struct videobuf_queue *q, | |
74 | unsigned int *count, unsigned int *size) | |
75 | { | |
76 | struct cx8802_dev *dev = q->priv_data; | |
77 | ||
78 | dev->ts_packet_size = 188 * 4; | |
79 | dev->ts_packet_count = 32; | |
80 | ||
81 | *size = dev->ts_packet_size * dev->ts_packet_count; | |
82 | *count = 32; | |
83 | return 0; | |
84 | } | |
85 | ||
4a390558 MK |
86 | static int dvb_buf_prepare(struct videobuf_queue *q, |
87 | struct videobuf_buffer *vb, enum v4l2_field field) | |
1da177e4 LT |
88 | { |
89 | struct cx8802_dev *dev = q->priv_data; | |
c7b0ac05 | 90 | return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field); |
1da177e4 LT |
91 | } |
92 | ||
93 | static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
94 | { | |
95 | struct cx8802_dev *dev = q->priv_data; | |
96 | cx8802_buf_queue(dev, (struct cx88_buffer*)vb); | |
97 | } | |
98 | ||
4a390558 MK |
99 | static void dvb_buf_release(struct videobuf_queue *q, |
100 | struct videobuf_buffer *vb) | |
1da177e4 | 101 | { |
c7b0ac05 | 102 | cx88_free_buffer(q, (struct cx88_buffer*)vb); |
1da177e4 LT |
103 | } |
104 | ||
408b664a | 105 | static struct videobuf_queue_ops dvb_qops = { |
1da177e4 LT |
106 | .buf_setup = dvb_buf_setup, |
107 | .buf_prepare = dvb_buf_prepare, | |
108 | .buf_queue = dvb_buf_queue, | |
109 | .buf_release = dvb_buf_release, | |
110 | }; | |
111 | ||
112 | /* ------------------------------------------------------------------ */ | |
22f3f17d MK |
113 | |
114 | static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire) | |
115 | { | |
116 | struct cx8802_dev *dev= fe->dvb->priv; | |
117 | struct cx8802_driver *drv = NULL; | |
118 | int ret = 0; | |
363c35fc ST |
119 | int fe_id; |
120 | ||
121 | fe_id = videobuf_dvb_find_frontend(&dev->frontends, fe); | |
122 | if (!fe_id) { | |
2af03eea | 123 | printk(KERN_ERR "%s() No frontend found\n", __func__); |
363c35fc ST |
124 | return -EINVAL; |
125 | } | |
126 | ||
22f3f17d MK |
127 | drv = cx8802_get_driver(dev, CX88_MPEG_DVB); |
128 | if (drv) { | |
363c35fc ST |
129 | if (acquire){ |
130 | dev->frontends.active_fe_id = fe_id; | |
22f3f17d | 131 | ret = drv->request_acquire(drv); |
363c35fc | 132 | } else { |
22f3f17d | 133 | ret = drv->request_release(drv); |
363c35fc ST |
134 | dev->frontends.active_fe_id = 0; |
135 | } | |
22f3f17d MK |
136 | } |
137 | ||
138 | return ret; | |
139 | } | |
140 | ||
e32fadc4 MCC |
141 | static void cx88_dvb_gate_ctrl(struct cx88_core *core, int open) |
142 | { | |
143 | struct videobuf_dvb_frontends *f; | |
144 | struct videobuf_dvb_frontend *fe; | |
145 | ||
146 | if (!core->dvbdev) | |
147 | return; | |
148 | ||
149 | f = &core->dvbdev->frontends; | |
150 | ||
151 | if (!f) | |
152 | return; | |
153 | ||
154 | if (f->gate <= 1) /* undefined or fe0 */ | |
155 | fe = videobuf_dvb_get_frontend(f, 1); | |
156 | else | |
157 | fe = videobuf_dvb_get_frontend(f, f->gate); | |
158 | ||
159 | if (fe && fe->dvb.frontend && fe->dvb.frontend->ops.i2c_gate_ctrl) | |
160 | fe->dvb.frontend->ops.i2c_gate_ctrl(fe->dvb.frontend, open); | |
161 | } | |
162 | ||
22f3f17d MK |
163 | /* ------------------------------------------------------------------ */ |
164 | ||
3d7d027a | 165 | static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe) |
1da177e4 LT |
166 | { |
167 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 }; | |
168 | static u8 reset [] = { RESET, 0x80 }; | |
169 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
170 | static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 }; | |
171 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 }; | |
172 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 }; | |
173 | ||
174 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
175 | udelay(200); | |
176 | mt352_write(fe, reset, sizeof(reset)); | |
177 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
178 | ||
179 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
180 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
181 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
182 | return 0; | |
183 | } | |
184 | ||
43eabb4e CP |
185 | static int dvico_dual_demod_init(struct dvb_frontend *fe) |
186 | { | |
187 | static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 }; | |
188 | static u8 reset [] = { RESET, 0x80 }; | |
189 | static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 }; | |
190 | static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 }; | |
191 | static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 }; | |
192 | static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 }; | |
193 | ||
194 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
195 | udelay(200); | |
196 | mt352_write(fe, reset, sizeof(reset)); | |
197 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
198 | ||
199 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
200 | mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg)); | |
201 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
202 | ||
203 | return 0; | |
204 | } | |
205 | ||
1da177e4 LT |
206 | static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe) |
207 | { | |
208 | static u8 clock_config [] = { 0x89, 0x38, 0x39 }; | |
209 | static u8 reset [] = { 0x50, 0x80 }; | |
210 | static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 }; | |
211 | static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF, | |
f2421ca3 | 212 | 0x00, 0xFF, 0x00, 0x40, 0x40 }; |
1da177e4 LT |
213 | static u8 dntv_extra[] = { 0xB5, 0x7A }; |
214 | static u8 capt_range_cfg[] = { 0x75, 0x32 }; | |
215 | ||
216 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
217 | udelay(2000); | |
218 | mt352_write(fe, reset, sizeof(reset)); | |
219 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
220 | ||
221 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
222 | udelay(2000); | |
223 | mt352_write(fe, dntv_extra, sizeof(dntv_extra)); | |
224 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
225 | ||
226 | return 0; | |
227 | } | |
228 | ||
1da177e4 | 229 | static struct mt352_config dvico_fusionhdtv = { |
f7b54b10 | 230 | .demod_address = 0x0f, |
3d7d027a | 231 | .demod_init = dvico_fusionhdtv_demod_init, |
1da177e4 LT |
232 | }; |
233 | ||
234 | static struct mt352_config dntv_live_dvbt_config = { | |
235 | .demod_address = 0x0f, | |
236 | .demod_init = dntv_live_dvbt_demod_init, | |
1da177e4 | 237 | }; |
fc40b261 | 238 | |
43eabb4e | 239 | static struct mt352_config dvico_fusionhdtv_dual = { |
f7b54b10 | 240 | .demod_address = 0x0f, |
43eabb4e | 241 | .demod_init = dvico_dual_demod_init, |
43eabb4e CP |
242 | }; |
243 | ||
70101a27 SW |
244 | static struct zl10353_config cx88_terratec_cinergy_ht_pci_mkii_config = { |
245 | .demod_address = (0x1e >> 1), | |
246 | .no_tuner = 1, | |
247 | .if2 = 45600, | |
248 | }; | |
249 | ||
ecf854df | 250 | #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE)) |
3d7d027a CP |
251 | static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe) |
252 | { | |
253 | static u8 clock_config [] = { 0x89, 0x38, 0x38 }; | |
254 | static u8 reset [] = { 0x50, 0x80 }; | |
255 | static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 }; | |
256 | static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF, | |
257 | 0x00, 0xFF, 0x00, 0x40, 0x40 }; | |
258 | static u8 dntv_extra[] = { 0xB5, 0x7A }; | |
259 | static u8 capt_range_cfg[] = { 0x75, 0x32 }; | |
260 | ||
261 | mt352_write(fe, clock_config, sizeof(clock_config)); | |
262 | udelay(2000); | |
263 | mt352_write(fe, reset, sizeof(reset)); | |
264 | mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg)); | |
265 | ||
266 | mt352_write(fe, agc_cfg, sizeof(agc_cfg)); | |
267 | udelay(2000); | |
268 | mt352_write(fe, dntv_extra, sizeof(dntv_extra)); | |
269 | mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg)); | |
270 | ||
271 | return 0; | |
272 | } | |
273 | ||
fc40b261 CP |
274 | static struct mt352_config dntv_live_dvbt_pro_config = { |
275 | .demod_address = 0x0f, | |
276 | .no_tuner = 1, | |
3d7d027a | 277 | .demod_init = dntv_live_dvbt_pro_demod_init, |
fc40b261 CP |
278 | }; |
279 | #endif | |
1da177e4 | 280 | |
780dfef3 | 281 | static struct zl10353_config dvico_fusionhdtv_hybrid = { |
f7b54b10 | 282 | .demod_address = 0x0f, |
f54376e2 | 283 | .no_tuner = 1, |
780dfef3 CP |
284 | }; |
285 | ||
b3fb91d2 CP |
286 | static struct zl10353_config dvico_fusionhdtv_xc3028 = { |
287 | .demod_address = 0x0f, | |
288 | .if2 = 45600, | |
289 | .no_tuner = 1, | |
290 | }; | |
291 | ||
292 | static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = { | |
293 | .demod_address = 0x0f, | |
294 | .if2 = 4560, | |
295 | .no_tuner = 1, | |
296 | .demod_init = dvico_fusionhdtv_demod_init, | |
297 | }; | |
298 | ||
780dfef3 | 299 | static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = { |
f7b54b10 | 300 | .demod_address = 0x0f, |
780dfef3 | 301 | }; |
780dfef3 | 302 | |
1da177e4 LT |
303 | static struct cx22702_config connexant_refboard_config = { |
304 | .demod_address = 0x43, | |
38d84c3b | 305 | .output_mode = CX22702_SERIAL_OUTPUT, |
1da177e4 LT |
306 | }; |
307 | ||
ed355260 | 308 | static struct cx22702_config hauppauge_hvr_config = { |
aa481a65 ST |
309 | .demod_address = 0x63, |
310 | .output_mode = CX22702_SERIAL_OUTPUT, | |
311 | }; | |
1da177e4 | 312 | |
4a390558 | 313 | static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured) |
1da177e4 LT |
314 | { |
315 | struct cx8802_dev *dev= fe->dvb->priv; | |
316 | dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00; | |
317 | return 0; | |
318 | } | |
319 | ||
408b664a | 320 | static struct or51132_config pchdtv_hd3000 = { |
f7b54b10 MK |
321 | .demod_address = 0x15, |
322 | .set_ts_params = or51132_set_ts_param, | |
1da177e4 | 323 | }; |
1da177e4 | 324 | |
6ddcc919 | 325 | static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index) |
0ccef6db MK |
326 | { |
327 | struct cx8802_dev *dev= fe->dvb->priv; | |
328 | struct cx88_core *core = dev->core; | |
329 | ||
32d83efc | 330 | dprintk(1, "%s: index = %d\n", __func__, index); |
0ccef6db MK |
331 | if (index == 0) |
332 | cx_clear(MO_GP0_IO, 8); | |
333 | else | |
334 | cx_set(MO_GP0_IO, 8); | |
335 | return 0; | |
336 | } | |
337 | ||
6ddcc919 | 338 | static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured) |
f1798495 MK |
339 | { |
340 | struct cx8802_dev *dev= fe->dvb->priv; | |
341 | if (is_punctured) | |
342 | dev->ts_gen_cntrl |= 0x04; | |
343 | else | |
344 | dev->ts_gen_cntrl &= ~0x04; | |
345 | return 0; | |
346 | } | |
347 | ||
6ddcc919 | 348 | static struct lgdt330x_config fusionhdtv_3_gold = { |
f7b54b10 MK |
349 | .demod_address = 0x0e, |
350 | .demod_chip = LGDT3302, | |
351 | .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */ | |
352 | .set_ts_params = lgdt330x_set_ts_param, | |
0d723c09 | 353 | }; |
e52e98a7 MCC |
354 | |
355 | static struct lgdt330x_config fusionhdtv_5_gold = { | |
f7b54b10 MK |
356 | .demod_address = 0x0e, |
357 | .demod_chip = LGDT3303, | |
358 | .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */ | |
359 | .set_ts_params = lgdt330x_set_ts_param, | |
e52e98a7 | 360 | }; |
da215d22 RS |
361 | |
362 | static struct lgdt330x_config pchdtv_hd5500 = { | |
f7b54b10 MK |
363 | .demod_address = 0x59, |
364 | .demod_chip = LGDT3303, | |
365 | .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */ | |
366 | .set_ts_params = lgdt330x_set_ts_param, | |
da215d22 | 367 | }; |
f1798495 | 368 | |
4a390558 | 369 | static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured) |
fde6d31e KL |
370 | { |
371 | struct cx8802_dev *dev= fe->dvb->priv; | |
372 | dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00; | |
373 | return 0; | |
374 | } | |
375 | ||
376 | static struct nxt200x_config ati_hdtvwonder = { | |
f7b54b10 | 377 | .demod_address = 0x0a, |
f7b54b10 | 378 | .set_ts_params = nxt200x_set_ts_param, |
fde6d31e | 379 | }; |
fde6d31e | 380 | |
0fa14aa6 ST |
381 | static int cx24123_set_ts_param(struct dvb_frontend* fe, |
382 | int is_punctured) | |
383 | { | |
384 | struct cx8802_dev *dev= fe->dvb->priv; | |
f7b54b10 | 385 | dev->ts_gen_cntrl = 0x02; |
0fa14aa6 ST |
386 | return 0; |
387 | } | |
388 | ||
f7b54b10 MK |
389 | static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe, |
390 | fe_sec_voltage_t voltage) | |
0e0351e3 VC |
391 | { |
392 | struct cx8802_dev *dev= fe->dvb->priv; | |
393 | struct cx88_core *core = dev->core; | |
394 | ||
4a390558 | 395 | if (voltage == SEC_VOLTAGE_OFF) |
f7b54b10 | 396 | cx_write(MO_GP0_IO, 0x000006fb); |
4a390558 | 397 | else |
cd20ca9f | 398 | cx_write(MO_GP0_IO, 0x000006f9); |
cd20ca9f AQ |
399 | |
400 | if (core->prev_set_voltage) | |
401 | return core->prev_set_voltage(fe, voltage); | |
402 | return 0; | |
0e0351e3 VC |
403 | } |
404 | ||
f7b54b10 MK |
405 | static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe, |
406 | fe_sec_voltage_t voltage) | |
c02a34f4 SA |
407 | { |
408 | struct cx8802_dev *dev= fe->dvb->priv; | |
409 | struct cx88_core *core = dev->core; | |
410 | ||
411 | if (voltage == SEC_VOLTAGE_OFF) { | |
412 | dprintk(1,"LNB Voltage OFF\n"); | |
413 | cx_write(MO_GP0_IO, 0x0000efff); | |
414 | } | |
415 | ||
416 | if (core->prev_set_voltage) | |
417 | return core->prev_set_voltage(fe, voltage); | |
418 | return 0; | |
419 | } | |
420 | ||
af832623 IL |
421 | static int tevii_dvbs_set_voltage(struct dvb_frontend *fe, |
422 | fe_sec_voltage_t voltage) | |
423 | { | |
424 | struct cx8802_dev *dev= fe->dvb->priv; | |
425 | struct cx88_core *core = dev->core; | |
426 | ||
427 | switch (voltage) { | |
428 | case SEC_VOLTAGE_13: | |
429 | printk("LNB Voltage SEC_VOLTAGE_13\n"); | |
430 | cx_write(MO_GP0_IO, 0x00006040); | |
431 | break; | |
432 | case SEC_VOLTAGE_18: | |
433 | printk("LNB Voltage SEC_VOLTAGE_18\n"); | |
434 | cx_write(MO_GP0_IO, 0x00006060); | |
435 | break; | |
436 | case SEC_VOLTAGE_OFF: | |
2c9bcea1 | 437 | printk("LNB Voltage SEC_VOLTAGE_off\n"); |
af832623 IL |
438 | break; |
439 | } | |
440 | ||
441 | if (core->prev_set_voltage) | |
442 | return core->prev_set_voltage(fe, voltage); | |
443 | return 0; | |
444 | } | |
445 | ||
c02a34f4 | 446 | static struct cx24123_config geniatech_dvbs_config = { |
f7b54b10 MK |
447 | .demod_address = 0x55, |
448 | .set_ts_params = cx24123_set_ts_param, | |
c02a34f4 SA |
449 | }; |
450 | ||
0fa14aa6 | 451 | static struct cx24123_config hauppauge_novas_config = { |
f7b54b10 MK |
452 | .demod_address = 0x55, |
453 | .set_ts_params = cx24123_set_ts_param, | |
0e0351e3 VC |
454 | }; |
455 | ||
456 | static struct cx24123_config kworld_dvbs_100_config = { | |
f7b54b10 MK |
457 | .demod_address = 0x15, |
458 | .set_ts_params = cx24123_set_ts_param, | |
ef76856d | 459 | .lnb_polarity = 1, |
0fa14aa6 | 460 | }; |
0fa14aa6 | 461 | |
60464da8 ST |
462 | static struct s5h1409_config pinnacle_pctv_hd_800i_config = { |
463 | .demod_address = 0x32 >> 1, | |
464 | .output_mode = S5H1409_PARALLEL_OUTPUT, | |
465 | .gpio = S5H1409_GPIO_ON, | |
466 | .qam_if = 44000, | |
467 | .inversion = S5H1409_INVERSION_OFF, | |
468 | .status_mode = S5H1409_DEMODLOCKING, | |
4917019d | 469 | .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK, |
60464da8 ST |
470 | }; |
471 | ||
5c00fac0 ST |
472 | static struct s5h1409_config dvico_hdtv5_pci_nano_config = { |
473 | .demod_address = 0x32 >> 1, | |
474 | .output_mode = S5H1409_SERIAL_OUTPUT, | |
475 | .gpio = S5H1409_GPIO_OFF, | |
476 | .inversion = S5H1409_INVERSION_OFF, | |
477 | .status_mode = S5H1409_DEMODLOCKING, | |
478 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
479 | }; | |
480 | ||
99e09eac MCC |
481 | static struct s5h1409_config kworld_atsc_120_config = { |
482 | .demod_address = 0x32 >> 1, | |
99e09eac MCC |
483 | .output_mode = S5H1409_SERIAL_OUTPUT, |
484 | .gpio = S5H1409_GPIO_OFF, | |
485 | .inversion = S5H1409_INVERSION_OFF, | |
486 | .status_mode = S5H1409_DEMODLOCKING, | |
487 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
488 | }; | |
489 | ||
60464da8 ST |
490 | static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = { |
491 | .i2c_address = 0x64, | |
492 | .if_khz = 5380, | |
60464da8 ST |
493 | }; |
494 | ||
3f6014fc SV |
495 | static struct zl10353_config cx88_pinnacle_hybrid_pctv = { |
496 | .demod_address = (0x1e >> 1), | |
497 | .no_tuner = 1, | |
498 | .if2 = 45600, | |
499 | }; | |
500 | ||
9507901e MCC |
501 | static struct zl10353_config cx88_geniatech_x8000_mt = { |
502 | .demod_address = (0x1e >> 1), | |
503 | .no_tuner = 1, | |
11db9069 | 504 | .disable_i2c_gate_ctrl = 1, |
9507901e MCC |
505 | }; |
506 | ||
d893d5dc ST |
507 | static struct s5h1411_config dvico_fusionhdtv7_config = { |
508 | .output_mode = S5H1411_SERIAL_OUTPUT, | |
509 | .gpio = S5H1411_GPIO_ON, | |
510 | .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK, | |
511 | .qam_if = S5H1411_IF_44000, | |
512 | .vsb_if = S5H1411_IF_44000, | |
513 | .inversion = S5H1411_INVERSION_OFF, | |
514 | .status_mode = S5H1411_DEMODLOCKING | |
515 | }; | |
516 | ||
517 | static struct xc5000_config dvico_fusionhdtv7_tuner_config = { | |
518 | .i2c_address = 0xc2 >> 1, | |
519 | .if_khz = 5380, | |
d893d5dc ST |
520 | }; |
521 | ||
23fb348d MCC |
522 | static int attach_xc3028(u8 addr, struct cx8802_dev *dev) |
523 | { | |
524 | struct dvb_frontend *fe; | |
363c35fc | 525 | struct videobuf_dvb_frontend *fe0 = NULL; |
99e09eac | 526 | struct xc2028_ctrl ctl; |
23fb348d MCC |
527 | struct xc2028_config cfg = { |
528 | .i2c_adap = &dev->core->i2c_adap, | |
529 | .i2c_addr = addr, | |
99e09eac | 530 | .ctrl = &ctl, |
23fb348d MCC |
531 | }; |
532 | ||
92abe9ee | 533 | /* Get the first frontend */ |
363c35fc ST |
534 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); |
535 | if (!fe0) | |
536 | return -EINVAL; | |
537 | ||
538 | if (!fe0->dvb.frontend) { | |
ddd5441d MCC |
539 | printk(KERN_ERR "%s/2: dvb frontend not attached. " |
540 | "Can't attach xc3028\n", | |
541 | dev->core->name); | |
542 | return -EINVAL; | |
543 | } | |
544 | ||
99e09eac MCC |
545 | /* |
546 | * Some xc3028 devices may be hidden by an I2C gate. This is known | |
547 | * to happen with some s5h1409-based devices. | |
548 | * Now that I2C gate is open, sets up xc3028 configuration | |
549 | */ | |
550 | cx88_setup_xc3028(dev->core, &ctl); | |
551 | ||
363c35fc | 552 | fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg); |
23fb348d MCC |
553 | if (!fe) { |
554 | printk(KERN_ERR "%s/2: xc3028 attach failed\n", | |
555 | dev->core->name); | |
363c35fc ST |
556 | dvb_frontend_detach(fe0->dvb.frontend); |
557 | dvb_unregister_frontend(fe0->dvb.frontend); | |
558 | fe0->dvb.frontend = NULL; | |
23fb348d MCC |
559 | return -EINVAL; |
560 | } | |
561 | ||
562 | printk(KERN_INFO "%s/2: xc3028 attached\n", | |
563 | dev->core->name); | |
564 | ||
565 | return 0; | |
566 | } | |
9507901e | 567 | |
5bd1b663 ST |
568 | static int cx24116_set_ts_param(struct dvb_frontend *fe, |
569 | int is_punctured) | |
570 | { | |
571 | struct cx8802_dev *dev = fe->dvb->priv; | |
572 | dev->ts_gen_cntrl = 0x2; | |
573 | ||
574 | return 0; | |
575 | } | |
576 | ||
577 | static int cx24116_reset_device(struct dvb_frontend *fe) | |
578 | { | |
579 | struct cx8802_dev *dev = fe->dvb->priv; | |
580 | struct cx88_core *core = dev->core; | |
581 | ||
582 | /* Reset the part */ | |
363c35fc | 583 | /* Put the cx24116 into reset */ |
5bd1b663 ST |
584 | cx_write(MO_SRST_IO, 0); |
585 | msleep(10); | |
363c35fc | 586 | /* Take the cx24116 out of reset */ |
5bd1b663 ST |
587 | cx_write(MO_SRST_IO, 1); |
588 | msleep(10); | |
589 | ||
590 | return 0; | |
591 | } | |
592 | ||
593 | static struct cx24116_config hauppauge_hvr4000_config = { | |
594 | .demod_address = 0x05, | |
595 | .set_ts_params = cx24116_set_ts_param, | |
596 | .reset_device = cx24116_reset_device, | |
597 | }; | |
598 | ||
af832623 IL |
599 | static struct cx24116_config tevii_s460_config = { |
600 | .demod_address = 0x55, | |
601 | .set_ts_params = cx24116_set_ts_param, | |
602 | .reset_device = cx24116_reset_device, | |
603 | }; | |
604 | ||
e4aab64c IL |
605 | static struct stv0299_config tevii_tuner_sharp_config = { |
606 | .demod_address = 0x68, | |
d4305c68 | 607 | .inittab = sharp_z0194a_inittab, |
e4aab64c IL |
608 | .mclk = 88000000UL, |
609 | .invert = 1, | |
610 | .skip_reinit = 0, | |
611 | .lock_output = 1, | |
612 | .volt13_op0_op1 = STV0299_VOLT13_OP1, | |
613 | .min_delay_ms = 100, | |
d4305c68 | 614 | .set_symbol_rate = sharp_z0194a_set_symbol_rate, |
e4aab64c IL |
615 | .set_ts_params = cx24116_set_ts_param, |
616 | }; | |
617 | ||
618 | static struct stv0288_config tevii_tuner_earda_config = { | |
619 | .demod_address = 0x68, | |
620 | .min_delay_ms = 100, | |
621 | .set_ts_params = cx24116_set_ts_param, | |
622 | }; | |
623 | ||
6e0e12f1 | 624 | static int cx8802_alloc_frontends(struct cx8802_dev *dev) |
1da177e4 | 625 | { |
0590d91c | 626 | struct cx88_core *core = dev->core; |
6e0e12f1 | 627 | struct videobuf_dvb_frontend *fe = NULL; |
e32fadc4 | 628 | int i; |
0590d91c | 629 | |
e32fadc4 MCC |
630 | mutex_init(&dev->frontends.lock); |
631 | INIT_LIST_HEAD(&dev->frontends.felist); | |
632 | ||
6e0e12f1 AW |
633 | if (!core->board.num_frontends) |
634 | return -ENODEV; | |
635 | ||
e32fadc4 MCC |
636 | printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__, |
637 | core->board.num_frontends); | |
638 | for (i = 1; i <= core->board.num_frontends; i++) { | |
6e0e12f1 AW |
639 | fe = videobuf_dvb_alloc_frontend(&dev->frontends, i); |
640 | if (!fe) { | |
e32fadc4 MCC |
641 | printk(KERN_ERR "%s() failed to alloc\n", __func__); |
642 | videobuf_dvb_dealloc_frontends(&dev->frontends); | |
6e0e12f1 | 643 | return -ENOMEM; |
e32fadc4 MCC |
644 | } |
645 | } | |
6e0e12f1 AW |
646 | return 0; |
647 | } | |
648 | ||
649 | static int dvb_register(struct cx8802_dev *dev) | |
650 | { | |
651 | struct cx88_core *core = dev->core; | |
652 | struct videobuf_dvb_frontend *fe0, *fe1 = NULL; | |
653 | int mfe_shared = 0; /* bus not shared by default */ | |
654 | ||
655 | if (0 != core->i2c_rc) { | |
656 | printk(KERN_ERR "%s/2: no i2c-bus available, cannot attach dvb drivers\n", core->name); | |
657 | goto frontend_detach; | |
658 | } | |
e32fadc4 | 659 | |
363c35fc ST |
660 | /* Get the first frontend */ |
661 | fe0 = videobuf_dvb_get_frontend(&dev->frontends, 1); | |
662 | if (!fe0) | |
60a5a927 | 663 | goto frontend_detach; |
1da177e4 | 664 | |
8e739090 DB |
665 | /* multi-frontend gate control is undefined or defaults to fe0 */ |
666 | dev->frontends.gate = 0; | |
667 | ||
e32fadc4 MCC |
668 | /* Sets the gate control callback to be used by i2c command calls */ |
669 | core->gate_ctrl = cx88_dvb_gate_ctrl; | |
670 | ||
8e739090 | 671 | /* init frontend(s) */ |
0590d91c | 672 | switch (core->boardnr) { |
1da177e4 | 673 | case CX88_BOARD_HAUPPAUGE_DVB_T1: |
363c35fc | 674 | fe0->dvb.frontend = dvb_attach(cx22702_attach, |
ed355260 | 675 | &connexant_refboard_config, |
0590d91c | 676 | &core->i2c_adap); |
363c35fc ST |
677 | if (fe0->dvb.frontend != NULL) { |
678 | if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, | |
0590d91c MCC |
679 | 0x61, &core->i2c_adap, |
680 | DVB_PLL_THOMSON_DTT759X)) | |
681 | goto frontend_detach; | |
f54376e2 | 682 | } |
1da177e4 | 683 | break; |
e057ee11 | 684 | case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1: |
1da177e4 | 685 | case CX88_BOARD_CONEXANT_DVB_T1: |
f39624fd | 686 | case CX88_BOARD_KWORLD_DVB_T_CX22702: |
2b5200a7 | 687 | case CX88_BOARD_WINFAST_DTV1000: |
363c35fc | 688 | fe0->dvb.frontend = dvb_attach(cx22702_attach, |
f7b54b10 | 689 | &connexant_refboard_config, |
0590d91c | 690 | &core->i2c_adap); |
363c35fc ST |
691 | if (fe0->dvb.frontend != NULL) { |
692 | if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, | |
0590d91c MCC |
693 | 0x60, &core->i2c_adap, |
694 | DVB_PLL_THOMSON_DTT7579)) | |
695 | goto frontend_detach; | |
f54376e2 | 696 | } |
1da177e4 | 697 | break; |
4bd6e9d9 | 698 | case CX88_BOARD_WINFAST_DTV2000H: |
611900c1 ST |
699 | case CX88_BOARD_HAUPPAUGE_HVR1100: |
700 | case CX88_BOARD_HAUPPAUGE_HVR1100LP: | |
a5a2ecfc | 701 | case CX88_BOARD_HAUPPAUGE_HVR1300: |
363c35fc | 702 | fe0->dvb.frontend = dvb_attach(cx22702_attach, |
ed355260 | 703 | &hauppauge_hvr_config, |
0590d91c | 704 | &core->i2c_adap); |
363c35fc ST |
705 | if (fe0->dvb.frontend != NULL) { |
706 | if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
0590d91c MCC |
707 | &core->i2c_adap, 0x61, |
708 | TUNER_PHILIPS_FMD1216ME_MK3)) | |
709 | goto frontend_detach; | |
f54376e2 | 710 | } |
611900c1 | 711 | break; |
363c35fc | 712 | case CX88_BOARD_HAUPPAUGE_HVR3000: |
60a5a927 DB |
713 | /* MFE frontend 1 */ |
714 | mfe_shared = 1; | |
715 | dev->frontends.gate = 2; | |
363c35fc ST |
716 | /* DVB-S init */ |
717 | fe0->dvb.frontend = dvb_attach(cx24123_attach, | |
60a5a927 DB |
718 | &hauppauge_novas_config, |
719 | &dev->core->i2c_adap); | |
363c35fc | 720 | if (fe0->dvb.frontend) { |
60a5a927 DB |
721 | if (!dvb_attach(isl6421_attach, |
722 | fe0->dvb.frontend, | |
723 | &dev->core->i2c_adap, | |
724 | 0x08, ISL6421_DCL, 0x00)) | |
725 | goto frontend_detach; | |
363c35fc | 726 | } |
60a5a927 | 727 | /* MFE frontend 2 */ |
363c35fc | 728 | fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2); |
60a5a927 DB |
729 | if (!fe1) |
730 | goto frontend_detach; | |
731 | /* DVB-T init */ | |
732 | fe1->dvb.frontend = dvb_attach(cx22702_attach, | |
733 | &hauppauge_hvr_config, | |
734 | &dev->core->i2c_adap); | |
735 | if (fe1->dvb.frontend) { | |
736 | fe1->dvb.frontend->id = 1; | |
737 | if (!dvb_attach(simple_tuner_attach, | |
738 | fe1->dvb.frontend, | |
739 | &dev->core->i2c_adap, | |
740 | 0x61, TUNER_PHILIPS_FMD1216ME_MK3)) | |
741 | goto frontend_detach; | |
363c35fc ST |
742 | } |
743 | break; | |
780dfef3 | 744 | case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS: |
363c35fc | 745 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
f7b54b10 | 746 | &dvico_fusionhdtv, |
0590d91c | 747 | &core->i2c_adap); |
363c35fc ST |
748 | if (fe0->dvb.frontend != NULL) { |
749 | if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, | |
0590d91c MCC |
750 | 0x60, NULL, DVB_PLL_THOMSON_DTT7579)) |
751 | goto frontend_detach; | |
780dfef3 | 752 | break; |
f54376e2 | 753 | } |
780dfef3 | 754 | /* ZL10353 replaces MT352 on later cards */ |
363c35fc | 755 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
f7b54b10 | 756 | &dvico_fusionhdtv_plus_v1_1, |
0590d91c | 757 | &core->i2c_adap); |
363c35fc ST |
758 | if (fe0->dvb.frontend != NULL) { |
759 | if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, | |
0590d91c MCC |
760 | 0x60, NULL, DVB_PLL_THOMSON_DTT7579)) |
761 | goto frontend_detach; | |
f54376e2 | 762 | } |
c2af3cd6 MK |
763 | break; |
764 | case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL: | |
c2af3cd6 MK |
765 | /* The tin box says DEE1601, but it seems to be DTT7579 |
766 | * compatible, with a slightly different MT352 AGC gain. */ | |
363c35fc | 767 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
f7b54b10 | 768 | &dvico_fusionhdtv_dual, |
0590d91c | 769 | &core->i2c_adap); |
363c35fc ST |
770 | if (fe0->dvb.frontend != NULL) { |
771 | if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, | |
0590d91c MCC |
772 | 0x61, NULL, DVB_PLL_THOMSON_DTT7579)) |
773 | goto frontend_detach; | |
c2af3cd6 MK |
774 | break; |
775 | } | |
c2af3cd6 | 776 | /* ZL10353 replaces MT352 on later cards */ |
363c35fc | 777 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
f7b54b10 | 778 | &dvico_fusionhdtv_plus_v1_1, |
0590d91c | 779 | &core->i2c_adap); |
363c35fc ST |
780 | if (fe0->dvb.frontend != NULL) { |
781 | if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, | |
0590d91c MCC |
782 | 0x61, NULL, DVB_PLL_THOMSON_DTT7579)) |
783 | goto frontend_detach; | |
c2af3cd6 | 784 | } |
1da177e4 | 785 | break; |
780dfef3 | 786 | case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1: |
363c35fc | 787 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
f7b54b10 | 788 | &dvico_fusionhdtv, |
0590d91c | 789 | &core->i2c_adap); |
363c35fc ST |
790 | if (fe0->dvb.frontend != NULL) { |
791 | if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, | |
0590d91c MCC |
792 | 0x61, NULL, DVB_PLL_LG_Z201)) |
793 | goto frontend_detach; | |
f54376e2 | 794 | } |
1da177e4 LT |
795 | break; |
796 | case CX88_BOARD_KWORLD_DVB_T: | |
797 | case CX88_BOARD_DNTV_LIVE_DVB_T: | |
a82decf6 | 798 | case CX88_BOARD_ADSTECH_DVB_T_PCI: |
363c35fc | 799 | fe0->dvb.frontend = dvb_attach(mt352_attach, |
f7b54b10 | 800 | &dntv_live_dvbt_config, |
0590d91c | 801 | &core->i2c_adap); |
363c35fc ST |
802 | if (fe0->dvb.frontend != NULL) { |
803 | if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, | |
0590d91c MCC |
804 | 0x61, NULL, DVB_PLL_UNKNOWN_1)) |
805 | goto frontend_detach; | |
f54376e2 | 806 | } |
1da177e4 | 807 | break; |
fc40b261 | 808 | case CX88_BOARD_DNTV_LIVE_DVB_T_PRO: |
ecf854df | 809 | #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE)) |
f0ad9097 | 810 | /* MT352 is on a secondary I2C bus made from some GPIO lines */ |
363c35fc | 811 | fe0->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config, |
f0ad9097 | 812 | &dev->vp3054->adap); |
363c35fc ST |
813 | if (fe0->dvb.frontend != NULL) { |
814 | if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
0590d91c MCC |
815 | &core->i2c_adap, 0x61, |
816 | TUNER_PHILIPS_FMD1216ME_MK3)) | |
817 | goto frontend_detach; | |
f54376e2 | 818 | } |
fc40b261 | 819 | #else |
0590d91c MCC |
820 | printk(KERN_ERR "%s/2: built without vp3054 support\n", |
821 | core->name); | |
fc40b261 CP |
822 | #endif |
823 | break; | |
780dfef3 | 824 | case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID: |
363c35fc | 825 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
f7b54b10 | 826 | &dvico_fusionhdtv_hybrid, |
0590d91c | 827 | &core->i2c_adap); |
363c35fc ST |
828 | if (fe0->dvb.frontend != NULL) { |
829 | if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
0590d91c MCC |
830 | &core->i2c_adap, 0x61, |
831 | TUNER_THOMSON_FE6600)) | |
832 | goto frontend_detach; | |
f54376e2 | 833 | } |
780dfef3 | 834 | break; |
b3fb91d2 | 835 | case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO: |
363c35fc | 836 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
b3fb91d2 | 837 | &dvico_fusionhdtv_xc3028, |
0590d91c | 838 | &core->i2c_adap); |
363c35fc ST |
839 | if (fe0->dvb.frontend == NULL) |
840 | fe0->dvb.frontend = dvb_attach(mt352_attach, | |
b3fb91d2 | 841 | &dvico_fusionhdtv_mt352_xc3028, |
0590d91c | 842 | &core->i2c_adap); |
8765561f CP |
843 | /* |
844 | * On this board, the demod provides the I2C bus pullup. | |
845 | * We must not permit gate_ctrl to be performed, or | |
846 | * the xc3028 cannot communicate on the bus. | |
847 | */ | |
363c35fc ST |
848 | if (fe0->dvb.frontend) |
849 | fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; | |
23fb348d | 850 | if (attach_xc3028(0x61, dev) < 0) |
becd4305 | 851 | goto frontend_detach; |
b3fb91d2 | 852 | break; |
1da177e4 | 853 | case CX88_BOARD_PCHDTV_HD3000: |
363c35fc | 854 | fe0->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000, |
0590d91c | 855 | &core->i2c_adap); |
363c35fc ST |
856 | if (fe0->dvb.frontend != NULL) { |
857 | if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
0590d91c MCC |
858 | &core->i2c_adap, 0x61, |
859 | TUNER_THOMSON_DTT761X)) | |
860 | goto frontend_detach; | |
f54376e2 | 861 | } |
1da177e4 | 862 | break; |
f1798495 MK |
863 | case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q: |
864 | dev->ts_gen_cntrl = 0x08; | |
f1798495 | 865 | |
0590d91c | 866 | /* Do a hardware reset of chip before using it. */ |
f1798495 MK |
867 | cx_clear(MO_GP0_IO, 1); |
868 | mdelay(100); | |
0ccef6db | 869 | cx_set(MO_GP0_IO, 1); |
f1798495 | 870 | mdelay(200); |
0ccef6db MK |
871 | |
872 | /* Select RF connector callback */ | |
6ddcc919 | 873 | fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set; |
363c35fc | 874 | fe0->dvb.frontend = dvb_attach(lgdt330x_attach, |
f7b54b10 | 875 | &fusionhdtv_3_gold, |
0590d91c | 876 | &core->i2c_adap); |
363c35fc ST |
877 | if (fe0->dvb.frontend != NULL) { |
878 | if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
0590d91c MCC |
879 | &core->i2c_adap, 0x61, |
880 | TUNER_MICROTUNE_4042FI5)) | |
881 | goto frontend_detach; | |
f1798495 MK |
882 | } |
883 | break; | |
0d723c09 MK |
884 | case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T: |
885 | dev->ts_gen_cntrl = 0x08; | |
0d723c09 | 886 | |
0590d91c | 887 | /* Do a hardware reset of chip before using it. */ |
0d723c09 MK |
888 | cx_clear(MO_GP0_IO, 1); |
889 | mdelay(100); | |
d975872c | 890 | cx_set(MO_GP0_IO, 9); |
0d723c09 | 891 | mdelay(200); |
363c35fc | 892 | fe0->dvb.frontend = dvb_attach(lgdt330x_attach, |
f7b54b10 | 893 | &fusionhdtv_3_gold, |
0590d91c | 894 | &core->i2c_adap); |
363c35fc ST |
895 | if (fe0->dvb.frontend != NULL) { |
896 | if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
0590d91c MCC |
897 | &core->i2c_adap, 0x61, |
898 | TUNER_THOMSON_DTT761X)) | |
899 | goto frontend_detach; | |
0d723c09 MK |
900 | } |
901 | break; | |
e52e98a7 MCC |
902 | case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD: |
903 | dev->ts_gen_cntrl = 0x08; | |
e52e98a7 | 904 | |
0590d91c | 905 | /* Do a hardware reset of chip before using it. */ |
e52e98a7 MCC |
906 | cx_clear(MO_GP0_IO, 1); |
907 | mdelay(100); | |
908 | cx_set(MO_GP0_IO, 1); | |
909 | mdelay(200); | |
363c35fc | 910 | fe0->dvb.frontend = dvb_attach(lgdt330x_attach, |
f7b54b10 | 911 | &fusionhdtv_5_gold, |
0590d91c | 912 | &core->i2c_adap); |
363c35fc ST |
913 | if (fe0->dvb.frontend != NULL) { |
914 | if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
0590d91c MCC |
915 | &core->i2c_adap, 0x61, |
916 | TUNER_LG_TDVS_H06XF)) | |
917 | goto frontend_detach; | |
363c35fc | 918 | if (!dvb_attach(tda9887_attach, fe0->dvb.frontend, |
0590d91c MCC |
919 | &core->i2c_adap, 0x43)) |
920 | goto frontend_detach; | |
e52e98a7 MCC |
921 | } |
922 | break; | |
da215d22 RS |
923 | case CX88_BOARD_PCHDTV_HD5500: |
924 | dev->ts_gen_cntrl = 0x08; | |
da215d22 | 925 | |
0590d91c | 926 | /* Do a hardware reset of chip before using it. */ |
da215d22 RS |
927 | cx_clear(MO_GP0_IO, 1); |
928 | mdelay(100); | |
929 | cx_set(MO_GP0_IO, 1); | |
930 | mdelay(200); | |
363c35fc | 931 | fe0->dvb.frontend = dvb_attach(lgdt330x_attach, |
f7b54b10 | 932 | &pchdtv_hd5500, |
0590d91c | 933 | &core->i2c_adap); |
363c35fc ST |
934 | if (fe0->dvb.frontend != NULL) { |
935 | if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
0590d91c MCC |
936 | &core->i2c_adap, 0x61, |
937 | TUNER_LG_TDVS_H06XF)) | |
938 | goto frontend_detach; | |
363c35fc | 939 | if (!dvb_attach(tda9887_attach, fe0->dvb.frontend, |
0590d91c MCC |
940 | &core->i2c_adap, 0x43)) |
941 | goto frontend_detach; | |
da215d22 RS |
942 | } |
943 | break; | |
fde6d31e | 944 | case CX88_BOARD_ATI_HDTVWONDER: |
363c35fc | 945 | fe0->dvb.frontend = dvb_attach(nxt200x_attach, |
f7b54b10 | 946 | &ati_hdtvwonder, |
0590d91c | 947 | &core->i2c_adap); |
363c35fc ST |
948 | if (fe0->dvb.frontend != NULL) { |
949 | if (!dvb_attach(simple_tuner_attach, fe0->dvb.frontend, | |
0590d91c MCC |
950 | &core->i2c_adap, 0x61, |
951 | TUNER_PHILIPS_TUV1236D)) | |
952 | goto frontend_detach; | |
f54376e2 | 953 | } |
0fa14aa6 | 954 | break; |
0fa14aa6 ST |
955 | case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1: |
956 | case CX88_BOARD_HAUPPAUGE_NOVASE2_S1: | |
363c35fc | 957 | fe0->dvb.frontend = dvb_attach(cx24123_attach, |
f7b54b10 | 958 | &hauppauge_novas_config, |
0590d91c | 959 | &core->i2c_adap); |
363c35fc ST |
960 | if (fe0->dvb.frontend) { |
961 | if (!dvb_attach(isl6421_attach, fe0->dvb.frontend, | |
83fe92e7 | 962 | &core->i2c_adap, 0x08, ISL6421_DCL, 0x00)) |
0590d91c | 963 | goto frontend_detach; |
cd20ca9f | 964 | } |
0e0351e3 VC |
965 | break; |
966 | case CX88_BOARD_KWORLD_DVBS_100: | |
363c35fc | 967 | fe0->dvb.frontend = dvb_attach(cx24123_attach, |
f7b54b10 | 968 | &kworld_dvbs_100_config, |
0590d91c | 969 | &core->i2c_adap); |
363c35fc ST |
970 | if (fe0->dvb.frontend) { |
971 | core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage; | |
972 | fe0->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage; | |
cd20ca9f | 973 | } |
fde6d31e | 974 | break; |
c02a34f4 | 975 | case CX88_BOARD_GENIATECH_DVBS: |
363c35fc | 976 | fe0->dvb.frontend = dvb_attach(cx24123_attach, |
f7b54b10 | 977 | &geniatech_dvbs_config, |
0590d91c | 978 | &core->i2c_adap); |
363c35fc ST |
979 | if (fe0->dvb.frontend) { |
980 | core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage; | |
981 | fe0->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage; | |
c02a34f4 SA |
982 | } |
983 | break; | |
60464da8 | 984 | case CX88_BOARD_PINNACLE_PCTV_HD_800i: |
363c35fc | 985 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
60464da8 | 986 | &pinnacle_pctv_hd_800i_config, |
0590d91c | 987 | &core->i2c_adap); |
363c35fc ST |
988 | if (fe0->dvb.frontend != NULL) { |
989 | if (!dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
0590d91c | 990 | &core->i2c_adap, |
30650961 | 991 | &pinnacle_pctv_hd_800i_tuner_config)) |
0590d91c | 992 | goto frontend_detach; |
60464da8 ST |
993 | } |
994 | break; | |
5c00fac0 | 995 | case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO: |
363c35fc | 996 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
5c00fac0 | 997 | &dvico_hdtv5_pci_nano_config, |
0590d91c | 998 | &core->i2c_adap); |
363c35fc | 999 | if (fe0->dvb.frontend != NULL) { |
5c00fac0 ST |
1000 | struct dvb_frontend *fe; |
1001 | struct xc2028_config cfg = { | |
0590d91c | 1002 | .i2c_adap = &core->i2c_adap, |
5c00fac0 | 1003 | .i2c_addr = 0x61, |
5c00fac0 ST |
1004 | }; |
1005 | static struct xc2028_ctrl ctl = { | |
ef80bfeb | 1006 | .fname = XC2028_DEFAULT_FIRMWARE, |
5c00fac0 | 1007 | .max_len = 64, |
33e53161 | 1008 | .scode_table = XC3028_FE_OREN538, |
5c00fac0 ST |
1009 | }; |
1010 | ||
1011 | fe = dvb_attach(xc2028_attach, | |
363c35fc | 1012 | fe0->dvb.frontend, &cfg); |
5c00fac0 ST |
1013 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) |
1014 | fe->ops.tuner_ops.set_config(fe, &ctl); | |
1015 | } | |
1016 | break; | |
9507901e | 1017 | case CX88_BOARD_PINNACLE_HYBRID_PCTV: |
3047a176 | 1018 | case CX88_BOARD_WINFAST_DTV1800H: |
363c35fc | 1019 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
3f6014fc | 1020 | &cx88_pinnacle_hybrid_pctv, |
0590d91c | 1021 | &core->i2c_adap); |
363c35fc ST |
1022 | if (fe0->dvb.frontend) { |
1023 | fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; | |
3f6014fc SV |
1024 | if (attach_xc3028(0x61, dev) < 0) |
1025 | goto frontend_detach; | |
1026 | } | |
9507901e MCC |
1027 | break; |
1028 | case CX88_BOARD_GENIATECH_X8000_MT: | |
99e09eac | 1029 | dev->ts_gen_cntrl = 0x00; |
9507901e | 1030 | |
363c35fc | 1031 | fe0->dvb.frontend = dvb_attach(zl10353_attach, |
9507901e | 1032 | &cx88_geniatech_x8000_mt, |
0590d91c | 1033 | &core->i2c_adap); |
23fb348d | 1034 | if (attach_xc3028(0x61, dev) < 0) |
0590d91c | 1035 | goto frontend_detach; |
9507901e | 1036 | break; |
99e09eac | 1037 | case CX88_BOARD_KWORLD_ATSC_120: |
363c35fc | 1038 | fe0->dvb.frontend = dvb_attach(s5h1409_attach, |
99e09eac | 1039 | &kworld_atsc_120_config, |
0590d91c | 1040 | &core->i2c_adap); |
99e09eac | 1041 | if (attach_xc3028(0x61, dev) < 0) |
0590d91c | 1042 | goto frontend_detach; |
99e09eac | 1043 | break; |
d893d5dc | 1044 | case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: |
363c35fc | 1045 | fe0->dvb.frontend = dvb_attach(s5h1411_attach, |
d893d5dc | 1046 | &dvico_fusionhdtv7_config, |
0590d91c | 1047 | &core->i2c_adap); |
363c35fc ST |
1048 | if (fe0->dvb.frontend != NULL) { |
1049 | if (!dvb_attach(xc5000_attach, fe0->dvb.frontend, | |
0590d91c | 1050 | &core->i2c_adap, |
30650961 | 1051 | &dvico_fusionhdtv7_tuner_config)) |
0590d91c | 1052 | goto frontend_detach; |
d893d5dc ST |
1053 | } |
1054 | break; | |
5bd1b663 | 1055 | case CX88_BOARD_HAUPPAUGE_HVR4000: |
60a5a927 DB |
1056 | /* MFE frontend 1 */ |
1057 | mfe_shared = 1; | |
1058 | dev->frontends.gate = 2; | |
363c35fc ST |
1059 | /* DVB-S/S2 Init */ |
1060 | fe0->dvb.frontend = dvb_attach(cx24116_attach, | |
60a5a927 DB |
1061 | &hauppauge_hvr4000_config, |
1062 | &dev->core->i2c_adap); | |
363c35fc | 1063 | if (fe0->dvb.frontend) { |
60a5a927 DB |
1064 | if (!dvb_attach(isl6421_attach, |
1065 | fe0->dvb.frontend, | |
1066 | &dev->core->i2c_adap, | |
1067 | 0x08, ISL6421_DCL, 0x00)) | |
1068 | goto frontend_detach; | |
363c35fc | 1069 | } |
60a5a927 | 1070 | /* MFE frontend 2 */ |
363c35fc | 1071 | fe1 = videobuf_dvb_get_frontend(&dev->frontends, 2); |
60a5a927 DB |
1072 | if (!fe1) |
1073 | goto frontend_detach; | |
1074 | /* DVB-T Init */ | |
1075 | fe1->dvb.frontend = dvb_attach(cx22702_attach, | |
1076 | &hauppauge_hvr_config, | |
1077 | &dev->core->i2c_adap); | |
1078 | if (fe1->dvb.frontend) { | |
1079 | fe1->dvb.frontend->id = 1; | |
1080 | if (!dvb_attach(simple_tuner_attach, | |
1081 | fe1->dvb.frontend, | |
1082 | &dev->core->i2c_adap, | |
1083 | 0x61, TUNER_PHILIPS_FMD1216ME_MK3)) | |
1084 | goto frontend_detach; | |
363c35fc ST |
1085 | } |
1086 | break; | |
5bd1b663 | 1087 | case CX88_BOARD_HAUPPAUGE_HVR4000LITE: |
363c35fc | 1088 | fe0->dvb.frontend = dvb_attach(cx24116_attach, |
60a5a927 DB |
1089 | &hauppauge_hvr4000_config, |
1090 | &dev->core->i2c_adap); | |
363c35fc | 1091 | if (fe0->dvb.frontend) { |
60a5a927 DB |
1092 | if (!dvb_attach(isl6421_attach, |
1093 | fe0->dvb.frontend, | |
1094 | &dev->core->i2c_adap, | |
1095 | 0x08, ISL6421_DCL, 0x00)) | |
1096 | goto frontend_detach; | |
5bd1b663 ST |
1097 | } |
1098 | break; | |
cd3cde12 | 1099 | case CX88_BOARD_PROF_6200: |
4b29631d | 1100 | case CX88_BOARD_TBS_8910: |
e4aab64c | 1101 | case CX88_BOARD_TEVII_S420: |
363c35fc | 1102 | fe0->dvb.frontend = dvb_attach(stv0299_attach, |
e4aab64c IL |
1103 | &tevii_tuner_sharp_config, |
1104 | &core->i2c_adap); | |
363c35fc ST |
1105 | if (fe0->dvb.frontend != NULL) { |
1106 | if (!dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60, | |
e4aab64c IL |
1107 | &core->i2c_adap, DVB_PLL_OPERA1)) |
1108 | goto frontend_detach; | |
363c35fc ST |
1109 | core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage; |
1110 | fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage; | |
e4aab64c IL |
1111 | |
1112 | } else { | |
363c35fc | 1113 | fe0->dvb.frontend = dvb_attach(stv0288_attach, |
e4aab64c IL |
1114 | &tevii_tuner_earda_config, |
1115 | &core->i2c_adap); | |
363c35fc ST |
1116 | if (fe0->dvb.frontend != NULL) { |
1117 | if (!dvb_attach(stb6000_attach, fe0->dvb.frontend, 0x61, | |
e4aab64c IL |
1118 | &core->i2c_adap)) |
1119 | goto frontend_detach; | |
363c35fc ST |
1120 | core->prev_set_voltage = fe0->dvb.frontend->ops.set_voltage; |
1121 | fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage; | |
e4aab64c IL |
1122 | } |
1123 | } | |
1124 | break; | |
af832623 | 1125 | case CX88_BOARD_TEVII_S460: |
363c35fc | 1126 | fe0->dvb.frontend = dvb_attach(cx24116_attach, |
af832623 IL |
1127 | &tevii_s460_config, |
1128 | &core->i2c_adap); | |
93f26c14 | 1129 | if (fe0->dvb.frontend != NULL) |
363c35fc | 1130 | fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage; |
4cd7fb87 OR |
1131 | break; |
1132 | case CX88_BOARD_OMICOM_SS4_PCI: | |
ee73042c | 1133 | case CX88_BOARD_TBS_8920: |
57f51dbc | 1134 | case CX88_BOARD_PROF_7300: |
4b29631d | 1135 | case CX88_BOARD_SATTRADE_ST4200: |
363c35fc | 1136 | fe0->dvb.frontend = dvb_attach(cx24116_attach, |
ee73042c OR |
1137 | &hauppauge_hvr4000_config, |
1138 | &core->i2c_adap); | |
93f26c14 | 1139 | if (fe0->dvb.frontend != NULL) |
363c35fc | 1140 | fe0->dvb.frontend->ops.set_voltage = tevii_dvbs_set_voltage; |
af832623 | 1141 | break; |
70101a27 SW |
1142 | case CX88_BOARD_TERRATEC_CINERGY_HT_PCI_MKII: |
1143 | fe0->dvb.frontend = dvb_attach(zl10353_attach, | |
1144 | &cx88_terratec_cinergy_ht_pci_mkii_config, | |
1145 | &core->i2c_adap); | |
1146 | if (fe0->dvb.frontend) { | |
1147 | fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL; | |
1148 | if (attach_xc3028(0x61, dev) < 0) | |
1149 | goto frontend_detach; | |
1150 | } | |
1151 | break; | |
1da177e4 | 1152 | default: |
5772f813 | 1153 | printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n", |
0590d91c | 1154 | core->name); |
1da177e4 LT |
1155 | break; |
1156 | } | |
363c35fc | 1157 | |
2c9bcea1 | 1158 | if ( (NULL == fe0->dvb.frontend) || (fe1 && NULL == fe1->dvb.frontend) ) { |
9507901e MCC |
1159 | printk(KERN_ERR |
1160 | "%s/2: frontend initialization failed\n", | |
0590d91c | 1161 | core->name); |
60a5a927 | 1162 | goto frontend_detach; |
9507901e | 1163 | } |
d7cba043 | 1164 | /* define general-purpose callback pointer */ |
363c35fc | 1165 | fe0->dvb.frontend->callback = cx88_tuner_callback; |
9507901e | 1166 | |
6c5be74c | 1167 | /* Ensure all frontends negotiate bus access */ |
363c35fc ST |
1168 | fe0->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl; |
1169 | if (fe1) | |
1170 | fe1->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl; | |
1da177e4 | 1171 | |
93352f5c | 1172 | /* Put the analog decoder in standby to keep it quiet */ |
7c9fc9d5 | 1173 | call_all(core, tuner, s_standby); |
93352f5c | 1174 | |
1da177e4 | 1175 | /* register everything */ |
363c35fc | 1176 | return videobuf_dvb_register_bus(&dev->frontends, THIS_MODULE, dev, |
59b1842d | 1177 | &dev->pci->dev, adapter_nr, mfe_shared); |
0590d91c MCC |
1178 | |
1179 | frontend_detach: | |
e32fadc4 | 1180 | core->gate_ctrl = NULL; |
becd4305 | 1181 | videobuf_dvb_dealloc_frontends(&dev->frontends); |
0590d91c | 1182 | return -EINVAL; |
1da177e4 LT |
1183 | } |
1184 | ||
1185 | /* ----------------------------------------------------------- */ | |
1186 | ||
6c5be74c ST |
1187 | /* CX8802 MPEG -> mini driver - We have been given the hardware */ |
1188 | static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv) | |
1da177e4 | 1189 | { |
6c5be74c ST |
1190 | struct cx88_core *core = drv->core; |
1191 | int err = 0; | |
32d83efc | 1192 | dprintk( 1, "%s\n", __func__); |
6c5be74c | 1193 | |
6a59d64c | 1194 | switch (core->boardnr) { |
6c5be74c ST |
1195 | case CX88_BOARD_HAUPPAUGE_HVR1300: |
1196 | /* We arrive here with either the cx23416 or the cx22702 | |
1197 | * on the bus. Take the bus from the cx23416 and enable the | |
1198 | * cx22702 demod | |
1199 | */ | |
79392737 DB |
1200 | /* Toggle reset on cx22702 leaving i2c active */ |
1201 | cx_set(MO_GP0_IO, 0x00000080); | |
1202 | udelay(1000); | |
1203 | cx_clear(MO_GP0_IO, 0x00000080); | |
1204 | udelay(50); | |
1205 | cx_set(MO_GP0_IO, 0x00000080); | |
1206 | udelay(1000); | |
1207 | /* enable the cx22702 pins */ | |
6c5be74c ST |
1208 | cx_clear(MO_GP0_IO, 0x00000004); |
1209 | udelay(1000); | |
1210 | break; | |
363c35fc | 1211 | |
92abe9ee | 1212 | case CX88_BOARD_HAUPPAUGE_HVR3000: |
363c35fc | 1213 | case CX88_BOARD_HAUPPAUGE_HVR4000: |
79392737 DB |
1214 | /* Toggle reset on cx22702 leaving i2c active */ |
1215 | cx_set(MO_GP0_IO, 0x00000080); | |
1216 | udelay(1000); | |
1217 | cx_clear(MO_GP0_IO, 0x00000080); | |
1218 | udelay(50); | |
1219 | cx_set(MO_GP0_IO, 0x00000080); | |
1220 | udelay(1000); | |
1221 | switch (core->dvbdev->frontends.active_fe_id) { | |
1222 | case 1: /* DVB-S/S2 Enabled */ | |
1223 | /* tri-state the cx22702 pins */ | |
1224 | cx_set(MO_GP0_IO, 0x00000004); | |
1225 | /* Take the cx24116/cx24123 out of reset */ | |
1226 | cx_write(MO_SRST_IO, 1); | |
363c35fc | 1227 | core->dvbdev->ts_gen_cntrl = 0x02; /* Parallel IO */ |
79392737 DB |
1228 | break; |
1229 | case 2: /* DVB-T Enabled */ | |
363c35fc ST |
1230 | /* Put the cx24116/cx24123 into reset */ |
1231 | cx_write(MO_SRST_IO, 0); | |
79392737 | 1232 | /* enable the cx22702 pins */ |
363c35fc ST |
1233 | cx_clear(MO_GP0_IO, 0x00000004); |
1234 | core->dvbdev->ts_gen_cntrl = 0x0c; /* Serial IO */ | |
79392737 | 1235 | break; |
363c35fc | 1236 | } |
79392737 | 1237 | udelay(1000); |
363c35fc ST |
1238 | break; |
1239 | ||
6c5be74c ST |
1240 | default: |
1241 | err = -ENODEV; | |
1242 | } | |
1243 | return err; | |
1244 | } | |
1245 | ||
1246 | /* CX8802 MPEG -> mini driver - We no longer have the hardware */ | |
1247 | static int cx8802_dvb_advise_release(struct cx8802_driver *drv) | |
1248 | { | |
1249 | struct cx88_core *core = drv->core; | |
1250 | int err = 0; | |
32d83efc | 1251 | dprintk( 1, "%s\n", __func__); |
6c5be74c | 1252 | |
6a59d64c | 1253 | switch (core->boardnr) { |
6c5be74c ST |
1254 | case CX88_BOARD_HAUPPAUGE_HVR1300: |
1255 | /* Do Nothing, leave the cx22702 on the bus. */ | |
1256 | break; | |
363c35fc ST |
1257 | case CX88_BOARD_HAUPPAUGE_HVR3000: |
1258 | case CX88_BOARD_HAUPPAUGE_HVR4000: | |
1259 | break; | |
6c5be74c ST |
1260 | default: |
1261 | err = -ENODEV; | |
1262 | } | |
1263 | return err; | |
1264 | } | |
1265 | ||
1266 | static int cx8802_dvb_probe(struct cx8802_driver *drv) | |
1267 | { | |
1268 | struct cx88_core *core = drv->core; | |
1269 | struct cx8802_dev *dev = drv->core->dvbdev; | |
cbd82441 | 1270 | int err; |
6e0e12f1 AW |
1271 | struct videobuf_dvb_frontend *fe; |
1272 | int i; | |
1da177e4 | 1273 | |
32d83efc | 1274 | dprintk( 1, "%s\n", __func__); |
6c5be74c | 1275 | dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n", |
6a59d64c | 1276 | core->boardnr, |
6c5be74c ST |
1277 | core->name, |
1278 | core->pci_bus, | |
1279 | core->pci_slot); | |
1da177e4 LT |
1280 | |
1281 | err = -ENODEV; | |
6a59d64c | 1282 | if (!(core->board.mpeg & CX88_MPEG_DVB)) |
1da177e4 LT |
1283 | goto fail_core; |
1284 | ||
ecf854df | 1285 | /* If vp3054 isn't enabled, a stub will just return 0 */ |
fc40b261 CP |
1286 | err = vp3054_i2c_probe(dev); |
1287 | if (0 != err) | |
6e0e12f1 | 1288 | goto fail_core; |
fc40b261 | 1289 | |
1da177e4 | 1290 | /* dvb stuff */ |
5772f813 | 1291 | printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name); |
363c35fc ST |
1292 | dev->ts_gen_cntrl = 0x0c; |
1293 | ||
6e0e12f1 AW |
1294 | err = cx8802_alloc_frontends(dev); |
1295 | if (err) | |
1296 | goto fail_core; | |
1297 | ||
cbd82441 | 1298 | err = -ENODEV; |
6e0e12f1 AW |
1299 | for (i = 1; i <= core->board.num_frontends; i++) { |
1300 | fe = videobuf_dvb_get_frontend(&core->dvbdev->frontends, i); | |
1301 | if (fe == NULL) { | |
1302 | printk(KERN_ERR "%s() failed to get frontend(%d)\n", | |
cbd82441 | 1303 | __func__, i); |
6e0e12f1 AW |
1304 | goto fail_probe; |
1305 | } | |
1306 | videobuf_queue_sg_init(&fe->dvb.dvbq, &dvb_qops, | |
cbd82441 DB |
1307 | &dev->pci->dev, &dev->slock, |
1308 | V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
1309 | V4L2_FIELD_TOP, | |
1310 | sizeof(struct cx88_buffer), | |
1311 | dev); | |
6e0e12f1 AW |
1312 | /* init struct videobuf_dvb */ |
1313 | fe->dvb.name = dev->core->name; | |
363c35fc | 1314 | } |
6e0e12f1 | 1315 | |
1da177e4 | 1316 | err = dvb_register(dev); |
cbd82441 DB |
1317 | if (err) |
1318 | /* frontends/adapter de-allocated in dvb_register */ | |
5772f813 TP |
1319 | printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n", |
1320 | core->name, err); | |
cbd82441 DB |
1321 | return err; |
1322 | fail_probe: | |
1323 | videobuf_dvb_dealloc_frontends(&core->dvbdev->frontends); | |
92abe9ee | 1324 | fail_core: |
1da177e4 LT |
1325 | return err; |
1326 | } | |
1327 | ||
6c5be74c | 1328 | static int cx8802_dvb_remove(struct cx8802_driver *drv) |
1da177e4 | 1329 | { |
0fcd488d | 1330 | struct cx88_core *core = drv->core; |
6c5be74c | 1331 | struct cx8802_dev *dev = drv->core->dvbdev; |
611900c1 | 1332 | |
0fcd488d DB |
1333 | dprintk( 1, "%s\n", __func__); |
1334 | ||
363c35fc | 1335 | videobuf_dvb_unregister_bus(&dev->frontends); |
1da177e4 | 1336 | |
fc40b261 | 1337 | vp3054_i2c_remove(dev); |
fc40b261 | 1338 | |
e32fadc4 MCC |
1339 | core->gate_ctrl = NULL; |
1340 | ||
6c5be74c | 1341 | return 0; |
1da177e4 LT |
1342 | } |
1343 | ||
6c5be74c ST |
1344 | static struct cx8802_driver cx8802_dvb_driver = { |
1345 | .type_id = CX88_MPEG_DVB, | |
1346 | .hw_access = CX8802_DRVCTL_SHARED, | |
1347 | .probe = cx8802_dvb_probe, | |
1348 | .remove = cx8802_dvb_remove, | |
1349 | .advise_acquire = cx8802_dvb_advise_acquire, | |
1350 | .advise_release = cx8802_dvb_advise_release, | |
1da177e4 LT |
1351 | }; |
1352 | ||
1353 | static int dvb_init(void) | |
1354 | { | |
5772f813 | 1355 | printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n", |
1da177e4 LT |
1356 | (CX88_VERSION_CODE >> 16) & 0xff, |
1357 | (CX88_VERSION_CODE >> 8) & 0xff, | |
1358 | CX88_VERSION_CODE & 0xff); | |
1359 | #ifdef SNAPSHOT | |
1360 | printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n", | |
1361 | SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100); | |
1362 | #endif | |
6c5be74c | 1363 | return cx8802_register_driver(&cx8802_dvb_driver); |
1da177e4 LT |
1364 | } |
1365 | ||
1366 | static void dvb_fini(void) | |
1367 | { | |
6c5be74c | 1368 | cx8802_unregister_driver(&cx8802_dvb_driver); |
1da177e4 LT |
1369 | } |
1370 | ||
1371 | module_init(dvb_init); | |
1372 | module_exit(dvb_fini); | |
1373 | ||
1374 | /* | |
1375 | * Local variables: | |
1376 | * c-basic-offset: 8 | |
1377 | * compile-command: "make DVB=1" | |
1378 | * End: | |
1379 | */ |