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V4L/DVB (8986): cx24116: Adding DVB-S2 demodulator support
[mirror_ubuntu-hirsute-kernel.git] / drivers / media / video / cx88 / cx88-input.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 *
3 * Device driver for GPIO attached remote control interfaces
4 * on Conexant 2388x based TV/DVB cards.
5 *
6 * Copyright (c) 2003 Pavel Machek
7 * Copyright (c) 2004 Gerd Knorr
fc40b261 8 * Copyright (c) 2004, 2005 Chris Pascoe
1da177e4
LT
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
19 *
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 */
24
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/input.h>
28#include <linux/pci.h>
29#include <linux/module.h>
1da177e4 30
1da177e4 31#include "cx88.h"
d21838dd 32#include <media/ir-common.h>
1da177e4
LT
33
34/* ---------------------------------------------------------------------- */
35
1da177e4 36struct cx88_IR {
41ef7c1e 37 struct cx88_core *core;
b7df3910 38 struct input_dev *input;
41ef7c1e
MCC
39 struct ir_input_state ir;
40 char name[32];
41 char phys[32];
1da177e4
LT
42
43 /* sample from gpio pin 16 */
fc40b261 44 u32 sampling;
41ef7c1e
MCC
45 u32 samples[16];
46 int scount;
47 unsigned long release;
1da177e4
LT
48
49 /* poll external decoder */
41ef7c1e
MCC
50 int polling;
51 struct work_struct work;
52 struct timer_list timer;
53 u32 gpio_addr;
54 u32 last_gpio;
55 u32 mask_keycode;
56 u32 mask_keydown;
57 u32 mask_keyup;
1da177e4
LT
58};
59
ff699e6b 60static int ir_debug;
41ef7c1e 61module_param(ir_debug, int, 0644); /* debug level [IR] */
1da177e4
LT
62MODULE_PARM_DESC(ir_debug, "enable debug messages [IR]");
63
64#define ir_dprintk(fmt, arg...) if (ir_debug) \
e52e98a7 65 printk(KERN_DEBUG "%s IR: " fmt , ir->core->name , ##arg)
1da177e4
LT
66
67/* ---------------------------------------------------------------------- */
68
69static void cx88_ir_handle_key(struct cx88_IR *ir)
70{
71 struct cx88_core *core = ir->core;
680543c5 72 u32 gpio, data, auxgpio;
1da177e4
LT
73
74 /* read gpio value */
75 gpio = cx_read(ir->gpio_addr);
6a59d64c 76 switch (core->boardnr) {
829ea964 77 case CX88_BOARD_NPGTECH_REALTV_TOP10FM:
680543c5
RC
78 /* This board apparently uses a combination of 2 GPIO
79 to represent the keys. Additionally, the second GPIO
80 can be used for parity.
81
82 Example:
83
84 for key "5"
85 gpio = 0x758, auxgpio = 0xe5 or 0xf5
86 for key "Power"
87 gpio = 0x758, auxgpio = 0xed or 0xfd
88 */
89
90 auxgpio = cx_read(MO_GP1_IO);
91 /* Take out the parity part */
a62c61d3 92 gpio=(gpio & 0x7fd) + (auxgpio & 0xef);
829ea964
MK
93 break;
94 case CX88_BOARD_WINFAST_DTV1000:
e7d11ecb
EP
95 gpio = (gpio & 0x6ff) | ((cx_read(MO_GP1_IO) << 8) & 0x900);
96 auxgpio = gpio;
829ea964
MK
97 break;
98 default:
680543c5 99 auxgpio = gpio;
829ea964 100 }
1da177e4 101 if (ir->polling) {
680543c5 102 if (ir->last_gpio == auxgpio)
1da177e4 103 return;
680543c5 104 ir->last_gpio = auxgpio;
1da177e4
LT
105 }
106
107 /* extract data */
108 data = ir_extract_bits(gpio, ir->mask_keycode);
109 ir_dprintk("irq gpio=0x%x code=%d | %s%s%s\n",
41ef7c1e
MCC
110 gpio, data,
111 ir->polling ? "poll" : "irq",
112 (gpio & ir->mask_keydown) ? " down" : "",
113 (gpio & ir->mask_keyup) ? " up" : "");
1da177e4 114
6a59d64c 115 if (ir->core->boardnr == CX88_BOARD_NORWOOD_MICRO) {
d1009bd7
PN
116 u32 gpio_key = cx_read(MO_GP0_IO);
117
118 data = (data << 4) | ((gpio_key & 0xf0) >> 4);
119
120 ir_input_keydown(ir->input, &ir->ir, data, data);
121 ir_input_nokey(ir->input, &ir->ir);
122
123 } else if (ir->mask_keydown) {
1da177e4
LT
124 /* bit set on keydown */
125 if (gpio & ir->mask_keydown) {
b7df3910 126 ir_input_keydown(ir->input, &ir->ir, data, data);
1da177e4 127 } else {
b7df3910 128 ir_input_nokey(ir->input, &ir->ir);
1da177e4
LT
129 }
130
131 } else if (ir->mask_keyup) {
132 /* bit cleared on keydown */
133 if (0 == (gpio & ir->mask_keyup)) {
b7df3910 134 ir_input_keydown(ir->input, &ir->ir, data, data);
1da177e4 135 } else {
b7df3910 136 ir_input_nokey(ir->input, &ir->ir);
1da177e4
LT
137 }
138
139 } else {
140 /* can't distinguish keydown/up :-/ */
b7df3910
DT
141 ir_input_keydown(ir->input, &ir->ir, data, data);
142 ir_input_nokey(ir->input, &ir->ir);
1da177e4
LT
143 }
144}
145
146static void ir_timer(unsigned long data)
147{
41ef7c1e 148 struct cx88_IR *ir = (struct cx88_IR *)data;
1da177e4
LT
149
150 schedule_work(&ir->work);
151}
152
c4028958 153static void cx88_ir_work(struct work_struct *work)
1da177e4 154{
c4028958 155 struct cx88_IR *ir = container_of(work, struct cx88_IR, work);
1da177e4
LT
156
157 cx88_ir_handle_key(ir);
749823a0 158 mod_timer(&ir->timer, jiffies + msecs_to_jiffies(ir->polling));
1da177e4
LT
159}
160
13595a51 161void cx88_ir_start(struct cx88_core *core, struct cx88_IR *ir)
b07b4783
DT
162{
163 if (ir->polling) {
749823a0 164 setup_timer(&ir->timer, ir_timer, (unsigned long)ir);
67952e8c 165 INIT_WORK(&ir->work, cx88_ir_work);
b07b4783
DT
166 schedule_work(&ir->work);
167 }
168 if (ir->sampling) {
8ddac9ee 169 core->pci_irqmask |= PCI_INT_IR_SMPINT;
b07b4783
DT
170 cx_write(MO_DDS_IO, 0xa80a80); /* 4 kHz sample rate */
171 cx_write(MO_DDSCFG_IO, 0x5); /* enable */
172 }
173}
174
13595a51 175void cx88_ir_stop(struct cx88_core *core, struct cx88_IR *ir)
b07b4783
DT
176{
177 if (ir->sampling) {
178 cx_write(MO_DDSCFG_IO, 0x0);
8ddac9ee 179 core->pci_irqmask &= ~PCI_INT_IR_SMPINT;
b07b4783
DT
180 }
181
182 if (ir->polling) {
183 del_timer_sync(&ir->timer);
184 flush_scheduled_work();
185 }
186}
187
1da177e4
LT
188/* ---------------------------------------------------------------------- */
189
190int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci)
191{
192 struct cx88_IR *ir;
b7df3910 193 struct input_dev *input_dev;
1da177e4
LT
194 IR_KEYTAB_TYPE *ir_codes = NULL;
195 int ir_type = IR_TYPE_OTHER;
b07b4783 196 int err = -ENOMEM;
1da177e4 197
b7df3910
DT
198 ir = kzalloc(sizeof(*ir), GFP_KERNEL);
199 input_dev = input_allocate_device();
b07b4783
DT
200 if (!ir || !input_dev)
201 goto err_out_free;
b7df3910
DT
202
203 ir->input = input_dev;
1da177e4
LT
204
205 /* detect & configure */
6a59d64c 206 switch (core->boardnr) {
1da177e4 207 case CX88_BOARD_DNTV_LIVE_DVB_T:
b45009b0 208 case CX88_BOARD_KWORLD_DVB_T:
28ecc449 209 case CX88_BOARD_KWORLD_DVB_T_CX22702:
41ef7c1e
MCC
210 ir_codes = ir_codes_dntv_live_dvb_t;
211 ir->gpio_addr = MO_GP1_IO;
1da177e4 212 ir->mask_keycode = 0x1f;
41ef7c1e
MCC
213 ir->mask_keyup = 0x60;
214 ir->polling = 50; /* ms */
1da177e4 215 break;
e52e98a7
MCC
216 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
217 ir_codes = ir_codes_cinergy_1400;
218 ir_type = IR_TYPE_PD;
fc40b261 219 ir->sampling = 0xeb04; /* address */
e52e98a7 220 break;
1da177e4
LT
221 case CX88_BOARD_HAUPPAUGE:
222 case CX88_BOARD_HAUPPAUGE_DVB_T1:
fb56cb65
ST
223 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
224 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
611900c1 225 case CX88_BOARD_HAUPPAUGE_HVR1100:
76dc82ab 226 case CX88_BOARD_HAUPPAUGE_HVR3000:
41ef7c1e
MCC
227 ir_codes = ir_codes_hauppauge_new;
228 ir_type = IR_TYPE_RC5;
229 ir->sampling = 1;
1da177e4 230 break;
2de873e6 231 case CX88_BOARD_WINFAST_DTV2000H:
41ef7c1e
MCC
232 ir_codes = ir_codes_winfast;
233 ir->gpio_addr = MO_GP0_IO;
1da177e4 234 ir->mask_keycode = 0x8f8;
41ef7c1e 235 ir->mask_keyup = 0x100;
2de873e6 236 ir->polling = 50; /* ms */
1da177e4 237 break;
ff97d93d 238 case CX88_BOARD_WINFAST2000XP_EXPERT:
e7d11ecb 239 case CX88_BOARD_WINFAST_DTV1000:
ff97d93d
HP
240 ir_codes = ir_codes_winfast;
241 ir->gpio_addr = MO_GP0_IO;
242 ir->mask_keycode = 0x8f8;
243 ir->mask_keyup = 0x100;
244 ir->polling = 1; /* ms */
245 break;
1da177e4 246 case CX88_BOARD_IODATA_GVBCTV7E:
41ef7c1e
MCC
247 ir_codes = ir_codes_iodata_bctv7e;
248 ir->gpio_addr = MO_GP0_IO;
1da177e4
LT
249 ir->mask_keycode = 0xfd;
250 ir->mask_keydown = 0x02;
41ef7c1e 251 ir->polling = 5; /* ms */
1da177e4 252 break;
ff97d93d 253 case CX88_BOARD_PROLINK_PLAYTVPVR:
239df2e2 254 case CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO:
41ef7c1e
MCC
255 ir_codes = ir_codes_pixelview;
256 ir->gpio_addr = MO_GP1_IO;
239df2e2 257 ir->mask_keycode = 0x1f;
41ef7c1e
MCC
258 ir->mask_keyup = 0x80;
259 ir->polling = 1; /* ms */
239df2e2 260 break;
7f0dd179
MCC
261 case CX88_BOARD_PROLINK_PV_8000GT:
262 ir_codes = ir_codes_pixelview_new;
263 ir->gpio_addr = MO_GP1_IO;
264 ir->mask_keycode = 0x3f;
265 ir->mask_keyup = 0x80;
266 ir->polling = 1; /* ms */
267 break;
b639f9d2
NS
268 case CX88_BOARD_KWORLD_LTV883:
269 ir_codes = ir_codes_pixelview;
270 ir->gpio_addr = MO_GP1_IO;
271 ir->mask_keycode = 0x1f;
272 ir->mask_keyup = 0x60;
273 ir->polling = 1; /* ms */
274 break;
a82decf6 275 case CX88_BOARD_ADSTECH_DVB_T_PCI:
41ef7c1e
MCC
276 ir_codes = ir_codes_adstech_dvb_t_pci;
277 ir->gpio_addr = MO_GP1_IO;
a82decf6 278 ir->mask_keycode = 0xbf;
41ef7c1e
MCC
279 ir->mask_keyup = 0x40;
280 ir->polling = 50; /* ms */
281 break;
282 case CX88_BOARD_MSI_TVANYWHERE_MASTER:
283 ir_codes = ir_codes_msi_tvanywhere;
284 ir->gpio_addr = MO_GP1_IO;
285 ir->mask_keycode = 0x1f;
286 ir->mask_keyup = 0x40;
287 ir->polling = 1; /* ms */
a82decf6 288 break;
899ad11b 289 case CX88_BOARD_AVERTV_303:
565f4949 290 case CX88_BOARD_AVERTV_STUDIO_303:
899ad11b
GG
291 ir_codes = ir_codes_avertv_303;
292 ir->gpio_addr = MO_GP2_IO;
293 ir->mask_keycode = 0xfb;
294 ir->mask_keydown = 0x02;
295 ir->polling = 50; /* ms */
296 break;
fc40b261
CP
297 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
298 ir_codes = ir_codes_dntv_live_dvbt_pro;
299 ir_type = IR_TYPE_PD;
300 ir->sampling = 0xff00; /* address */
301 break;
d1009bd7
PN
302 case CX88_BOARD_NORWOOD_MICRO:
303 ir_codes = ir_codes_norwood;
304 ir->gpio_addr = MO_GP1_IO;
305 ir->mask_keycode = 0x0e;
306 ir->mask_keyup = 0x80;
307 ir->polling = 50; /* ms */
308 break;
be4f4519 309 case CX88_BOARD_NPGTECH_REALTV_TOP10FM:
680543c5
RC
310 ir_codes = ir_codes_npgtech;
311 ir->gpio_addr = MO_GP0_IO;
312 ir->mask_keycode = 0xfa;
313 ir->polling = 50; /* ms */
314 break;
9121106a
ST
315 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
316 ir_codes = ir_codes_pinnacle_pctv_hd;
317 ir_type = IR_TYPE_RC5;
318 ir->sampling = 1;
319 break;
ba928034
DF
320 case CX88_BOARD_POWERCOLOR_REAL_ANGEL:
321 ir_codes = ir_codes_powercolor_real_angel;
322 ir->gpio_addr = MO_GP2_IO;
323 ir->mask_keycode = 0x7e;
324 ir->polling = 100; /* ms */
325 break;
1da177e4 326 }
b45009b0 327
1da177e4 328 if (NULL == ir_codes) {
b07b4783
DT
329 err = -ENODEV;
330 goto err_out_free;
1da177e4
LT
331 }
332
333 /* init input device */
6a59d64c 334 snprintf(ir->name, sizeof(ir->name), "cx88 IR (%s)", core->board.name);
41ef7c1e 335 snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0", pci_name(pci));
1da177e4 336
b7df3910
DT
337 ir_input_init(input_dev, &ir->ir, ir_type, ir_codes);
338 input_dev->name = ir->name;
339 input_dev->phys = ir->phys;
340 input_dev->id.bustype = BUS_PCI;
341 input_dev->id.version = 1;
1da177e4 342 if (pci->subsystem_vendor) {
b7df3910
DT
343 input_dev->id.vendor = pci->subsystem_vendor;
344 input_dev->id.product = pci->subsystem_device;
1da177e4 345 } else {
b7df3910
DT
346 input_dev->id.vendor = pci->vendor;
347 input_dev->id.product = pci->device;
1da177e4 348 }
2c8a3a33 349 input_dev->dev.parent = &pci->dev;
1da177e4
LT
350 /* record handles to ourself */
351 ir->core = core;
352 core->ir = ir;
353
b07b4783 354 cx88_ir_start(core, ir);
1da177e4
LT
355
356 /* all done */
b07b4783
DT
357 err = input_register_device(ir->input);
358 if (err)
359 goto err_out_stop;
1da177e4
LT
360
361 return 0;
b07b4783
DT
362
363 err_out_stop:
364 cx88_ir_stop(core, ir);
365 core->ir = NULL;
366 err_out_free:
367 input_free_device(input_dev);
368 kfree(ir);
369 return err;
1da177e4
LT
370}
371
372int cx88_ir_fini(struct cx88_core *core)
373{
374 struct cx88_IR *ir = core->ir;
375
376 /* skip detach on non attached boards */
377 if (NULL == ir)
378 return 0;
379
b07b4783 380 cx88_ir_stop(core, ir);
b7df3910 381 input_unregister_device(ir->input);
1da177e4
LT
382 kfree(ir);
383
384 /* done */
385 core->ir = NULL;
386 return 0;
387}
388
389/* ---------------------------------------------------------------------- */
390
391void cx88_ir_irq(struct cx88_core *core)
392{
393 struct cx88_IR *ir = core->ir;
e52e98a7 394 u32 samples, ircode;
1da177e4
LT
395 int i;
396
397 if (NULL == ir)
398 return;
399 if (!ir->sampling)
400 return;
401
402 samples = cx_read(MO_SAMPLE_IO);
41ef7c1e 403 if (0 != samples && 0xffffffff != samples) {
1da177e4
LT
404 /* record sample data */
405 if (ir->scount < ARRAY_SIZE(ir->samples))
406 ir->samples[ir->scount++] = samples;
407 return;
408 }
409 if (!ir->scount) {
410 /* nothing to sample */
41ef7c1e 411 if (ir->ir.keypressed && time_after(jiffies, ir->release))
b7df3910 412 ir_input_nokey(ir->input, &ir->ir);
1da177e4
LT
413 return;
414 }
415
416 /* have a complete sample */
417 if (ir->scount < ARRAY_SIZE(ir->samples))
418 ir->samples[ir->scount++] = samples;
419 for (i = 0; i < ir->scount; i++)
420 ir->samples[i] = ~ir->samples[i];
421 if (ir_debug)
41ef7c1e 422 ir_dump_samples(ir->samples, ir->scount);
1da177e4
LT
423
424 /* decode it */
6a59d64c 425 switch (core->boardnr) {
e52e98a7 426 case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
fc40b261 427 case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
e52e98a7
MCC
428 ircode = ir_decode_pulsedistance(ir->samples, ir->scount, 1, 4);
429
430 if (ircode == 0xffffffff) { /* decoding error */
431 ir_dprintk("pulse distance decoding error\n");
432 break;
433 }
434
435 ir_dprintk("pulse distance decoded: %x\n", ircode);
436
437 if (ircode == 0) { /* key still pressed */
438 ir_dprintk("pulse distance decoded repeat code\n");
439 ir->release = jiffies + msecs_to_jiffies(120);
440 break;
441 }
442
fc40b261 443 if ((ircode & 0xffff) != (ir->sampling & 0xffff)) { /* wrong address */
e52e98a7 444 ir_dprintk("pulse distance decoded wrong address\n");
4ac97914 445 break;
e52e98a7
MCC
446 }
447
448 if (((~ircode >> 24) & 0xff) != ((ircode >> 16) & 0xff)) { /* wrong checksum */
449 ir_dprintk("pulse distance decoded wrong check sum\n");
450 break;
451 }
452
453 ir_dprintk("Key Code: %x\n", (ircode >> 16) & 0x7f);
454
b7df3910 455 ir_input_keydown(ir->input, &ir->ir, (ircode >> 16) & 0x7f, (ircode >> 16) & 0xff);
e52e98a7
MCC
456 ir->release = jiffies + msecs_to_jiffies(120);
457 break;
1da177e4
LT
458 case CX88_BOARD_HAUPPAUGE:
459 case CX88_BOARD_HAUPPAUGE_DVB_T1:
fb56cb65
ST
460 case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
461 case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
30367bfd 462 case CX88_BOARD_HAUPPAUGE_HVR1100:
76dc82ab 463 case CX88_BOARD_HAUPPAUGE_HVR3000:
4917019d 464 case CX88_BOARD_PINNACLE_PCTV_HD_800i:
e52e98a7
MCC
465 ircode = ir_decode_biphase(ir->samples, ir->scount, 5, 7);
466 ir_dprintk("biphase decoded: %x\n", ircode);
467 if ((ircode & 0xfffff000) != 0x3000)
1da177e4 468 break;
b7df3910 469 ir_input_keydown(ir->input, &ir->ir, ircode & 0x3f, ircode);
1da177e4
LT
470 ir->release = jiffies + msecs_to_jiffies(120);
471 break;
472 }
473
474 ir->scount = 0;
475 return;
476}
477
478/* ---------------------------------------------------------------------- */
479
480MODULE_AUTHOR("Gerd Knorr, Pavel Machek, Chris Pascoe");
481MODULE_DESCRIPTION("input driver for cx88 GPIO-based IR remote controls");
482MODULE_LICENSE("GPL");
1da177e4
LT
483/*
484 * Local variables:
485 * c-basic-offset: 8
486 * End:
487 */