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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * Device driver for GPIO attached remote control interfaces | |
4 | * on Conexant 2388x based TV/DVB cards. | |
5 | * | |
6 | * Copyright (c) 2003 Pavel Machek | |
7 | * Copyright (c) 2004 Gerd Knorr | |
fc40b261 | 8 | * Copyright (c) 2004, 2005 Chris Pascoe |
1da177e4 LT |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
23 | */ | |
24 | ||
25 | #include <linux/init.h> | |
26 | #include <linux/delay.h> | |
27 | #include <linux/input.h> | |
28 | #include <linux/pci.h> | |
29 | #include <linux/module.h> | |
30 | #include <linux/moduleparam.h> | |
31 | ||
1da177e4 | 32 | #include "cx88.h" |
d21838dd | 33 | #include <media/ir-common.h> |
1da177e4 LT |
34 | |
35 | /* ---------------------------------------------------------------------- */ | |
36 | ||
1da177e4 | 37 | struct cx88_IR { |
41ef7c1e | 38 | struct cx88_core *core; |
b7df3910 | 39 | struct input_dev *input; |
41ef7c1e MCC |
40 | struct ir_input_state ir; |
41 | char name[32]; | |
42 | char phys[32]; | |
1da177e4 LT |
43 | |
44 | /* sample from gpio pin 16 */ | |
fc40b261 | 45 | u32 sampling; |
41ef7c1e MCC |
46 | u32 samples[16]; |
47 | int scount; | |
48 | unsigned long release; | |
1da177e4 LT |
49 | |
50 | /* poll external decoder */ | |
41ef7c1e MCC |
51 | int polling; |
52 | struct work_struct work; | |
53 | struct timer_list timer; | |
54 | u32 gpio_addr; | |
55 | u32 last_gpio; | |
56 | u32 mask_keycode; | |
57 | u32 mask_keydown; | |
58 | u32 mask_keyup; | |
1da177e4 LT |
59 | }; |
60 | ||
61 | static int ir_debug = 0; | |
41ef7c1e | 62 | module_param(ir_debug, int, 0644); /* debug level [IR] */ |
1da177e4 LT |
63 | MODULE_PARM_DESC(ir_debug, "enable debug messages [IR]"); |
64 | ||
65 | #define ir_dprintk(fmt, arg...) if (ir_debug) \ | |
e52e98a7 | 66 | printk(KERN_DEBUG "%s IR: " fmt , ir->core->name , ##arg) |
1da177e4 LT |
67 | |
68 | /* ---------------------------------------------------------------------- */ | |
69 | ||
70 | static void cx88_ir_handle_key(struct cx88_IR *ir) | |
71 | { | |
72 | struct cx88_core *core = ir->core; | |
680543c5 | 73 | u32 gpio, data, auxgpio; |
1da177e4 LT |
74 | |
75 | /* read gpio value */ | |
76 | gpio = cx_read(ir->gpio_addr); | |
be4f4519 | 77 | if (core->board == CX88_BOARD_NPGTECH_REALTV_TOP10FM) { |
680543c5 RC |
78 | /* This board apparently uses a combination of 2 GPIO |
79 | to represent the keys. Additionally, the second GPIO | |
80 | can be used for parity. | |
81 | ||
82 | Example: | |
83 | ||
84 | for key "5" | |
85 | gpio = 0x758, auxgpio = 0xe5 or 0xf5 | |
86 | for key "Power" | |
87 | gpio = 0x758, auxgpio = 0xed or 0xfd | |
88 | */ | |
89 | ||
90 | auxgpio = cx_read(MO_GP1_IO); | |
91 | /* Take out the parity part */ | |
a62c61d3 | 92 | gpio=(gpio & 0x7fd) + (auxgpio & 0xef); |
680543c5 RC |
93 | } else |
94 | auxgpio = gpio; | |
95 | ||
1da177e4 | 96 | if (ir->polling) { |
680543c5 | 97 | if (ir->last_gpio == auxgpio) |
1da177e4 | 98 | return; |
680543c5 | 99 | ir->last_gpio = auxgpio; |
1da177e4 LT |
100 | } |
101 | ||
102 | /* extract data */ | |
103 | data = ir_extract_bits(gpio, ir->mask_keycode); | |
104 | ir_dprintk("irq gpio=0x%x code=%d | %s%s%s\n", | |
41ef7c1e MCC |
105 | gpio, data, |
106 | ir->polling ? "poll" : "irq", | |
107 | (gpio & ir->mask_keydown) ? " down" : "", | |
108 | (gpio & ir->mask_keyup) ? " up" : ""); | |
1da177e4 | 109 | |
d1009bd7 PN |
110 | if (ir->core->board == CX88_BOARD_NORWOOD_MICRO) { |
111 | u32 gpio_key = cx_read(MO_GP0_IO); | |
112 | ||
113 | data = (data << 4) | ((gpio_key & 0xf0) >> 4); | |
114 | ||
115 | ir_input_keydown(ir->input, &ir->ir, data, data); | |
116 | ir_input_nokey(ir->input, &ir->ir); | |
117 | ||
118 | } else if (ir->mask_keydown) { | |
1da177e4 LT |
119 | /* bit set on keydown */ |
120 | if (gpio & ir->mask_keydown) { | |
b7df3910 | 121 | ir_input_keydown(ir->input, &ir->ir, data, data); |
1da177e4 | 122 | } else { |
b7df3910 | 123 | ir_input_nokey(ir->input, &ir->ir); |
1da177e4 LT |
124 | } |
125 | ||
126 | } else if (ir->mask_keyup) { | |
127 | /* bit cleared on keydown */ | |
128 | if (0 == (gpio & ir->mask_keyup)) { | |
b7df3910 | 129 | ir_input_keydown(ir->input, &ir->ir, data, data); |
1da177e4 | 130 | } else { |
b7df3910 | 131 | ir_input_nokey(ir->input, &ir->ir); |
1da177e4 LT |
132 | } |
133 | ||
134 | } else { | |
135 | /* can't distinguish keydown/up :-/ */ | |
b7df3910 DT |
136 | ir_input_keydown(ir->input, &ir->ir, data, data); |
137 | ir_input_nokey(ir->input, &ir->ir); | |
1da177e4 LT |
138 | } |
139 | } | |
140 | ||
141 | static void ir_timer(unsigned long data) | |
142 | { | |
41ef7c1e | 143 | struct cx88_IR *ir = (struct cx88_IR *)data; |
1da177e4 LT |
144 | |
145 | schedule_work(&ir->work); | |
146 | } | |
147 | ||
c4028958 | 148 | static void cx88_ir_work(struct work_struct *work) |
1da177e4 | 149 | { |
c4028958 | 150 | struct cx88_IR *ir = container_of(work, struct cx88_IR, work); |
1da177e4 LT |
151 | unsigned long timeout; |
152 | ||
153 | cx88_ir_handle_key(ir); | |
154 | timeout = jiffies + (ir->polling * HZ / 1000); | |
155 | mod_timer(&ir->timer, timeout); | |
156 | } | |
157 | ||
158 | /* ---------------------------------------------------------------------- */ | |
159 | ||
160 | int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci) | |
161 | { | |
162 | struct cx88_IR *ir; | |
b7df3910 | 163 | struct input_dev *input_dev; |
1da177e4 LT |
164 | IR_KEYTAB_TYPE *ir_codes = NULL; |
165 | int ir_type = IR_TYPE_OTHER; | |
166 | ||
b7df3910 DT |
167 | ir = kzalloc(sizeof(*ir), GFP_KERNEL); |
168 | input_dev = input_allocate_device(); | |
169 | if (!ir || !input_dev) { | |
170 | kfree(ir); | |
171 | input_free_device(input_dev); | |
1da177e4 | 172 | return -ENOMEM; |
b7df3910 DT |
173 | } |
174 | ||
175 | ir->input = input_dev; | |
1da177e4 LT |
176 | |
177 | /* detect & configure */ | |
178 | switch (core->board) { | |
179 | case CX88_BOARD_DNTV_LIVE_DVB_T: | |
b45009b0 | 180 | case CX88_BOARD_KWORLD_DVB_T: |
28ecc449 | 181 | case CX88_BOARD_KWORLD_DVB_T_CX22702: |
41ef7c1e MCC |
182 | ir_codes = ir_codes_dntv_live_dvb_t; |
183 | ir->gpio_addr = MO_GP1_IO; | |
1da177e4 | 184 | ir->mask_keycode = 0x1f; |
41ef7c1e MCC |
185 | ir->mask_keyup = 0x60; |
186 | ir->polling = 50; /* ms */ | |
1da177e4 | 187 | break; |
e52e98a7 MCC |
188 | case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1: |
189 | ir_codes = ir_codes_cinergy_1400; | |
190 | ir_type = IR_TYPE_PD; | |
fc40b261 | 191 | ir->sampling = 0xeb04; /* address */ |
e52e98a7 | 192 | break; |
1da177e4 LT |
193 | case CX88_BOARD_HAUPPAUGE: |
194 | case CX88_BOARD_HAUPPAUGE_DVB_T1: | |
fb56cb65 ST |
195 | case CX88_BOARD_HAUPPAUGE_NOVASE2_S1: |
196 | case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1: | |
611900c1 | 197 | case CX88_BOARD_HAUPPAUGE_HVR1100: |
aa481a65 | 198 | case CX88_BOARD_HAUPPAUGE_HVR1300: |
76dc82ab | 199 | case CX88_BOARD_HAUPPAUGE_HVR3000: |
41ef7c1e MCC |
200 | ir_codes = ir_codes_hauppauge_new; |
201 | ir_type = IR_TYPE_RC5; | |
202 | ir->sampling = 1; | |
1da177e4 | 203 | break; |
2de873e6 | 204 | case CX88_BOARD_WINFAST_DTV2000H: |
41ef7c1e MCC |
205 | ir_codes = ir_codes_winfast; |
206 | ir->gpio_addr = MO_GP0_IO; | |
1da177e4 | 207 | ir->mask_keycode = 0x8f8; |
41ef7c1e | 208 | ir->mask_keyup = 0x100; |
2de873e6 | 209 | ir->polling = 50; /* ms */ |
1da177e4 | 210 | break; |
ff97d93d HP |
211 | case CX88_BOARD_WINFAST2000XP_EXPERT: |
212 | ir_codes = ir_codes_winfast; | |
213 | ir->gpio_addr = MO_GP0_IO; | |
214 | ir->mask_keycode = 0x8f8; | |
215 | ir->mask_keyup = 0x100; | |
216 | ir->polling = 1; /* ms */ | |
217 | break; | |
1da177e4 | 218 | case CX88_BOARD_IODATA_GVBCTV7E: |
41ef7c1e MCC |
219 | ir_codes = ir_codes_iodata_bctv7e; |
220 | ir->gpio_addr = MO_GP0_IO; | |
1da177e4 LT |
221 | ir->mask_keycode = 0xfd; |
222 | ir->mask_keydown = 0x02; | |
41ef7c1e | 223 | ir->polling = 5; /* ms */ |
1da177e4 | 224 | break; |
ff97d93d | 225 | case CX88_BOARD_PROLINK_PLAYTVPVR: |
239df2e2 | 226 | case CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO: |
41ef7c1e MCC |
227 | ir_codes = ir_codes_pixelview; |
228 | ir->gpio_addr = MO_GP1_IO; | |
239df2e2 | 229 | ir->mask_keycode = 0x1f; |
41ef7c1e MCC |
230 | ir->mask_keyup = 0x80; |
231 | ir->polling = 1; /* ms */ | |
239df2e2 | 232 | break; |
b639f9d2 NS |
233 | case CX88_BOARD_KWORLD_LTV883: |
234 | ir_codes = ir_codes_pixelview; | |
235 | ir->gpio_addr = MO_GP1_IO; | |
236 | ir->mask_keycode = 0x1f; | |
237 | ir->mask_keyup = 0x60; | |
238 | ir->polling = 1; /* ms */ | |
239 | break; | |
a82decf6 | 240 | case CX88_BOARD_ADSTECH_DVB_T_PCI: |
41ef7c1e MCC |
241 | ir_codes = ir_codes_adstech_dvb_t_pci; |
242 | ir->gpio_addr = MO_GP1_IO; | |
a82decf6 | 243 | ir->mask_keycode = 0xbf; |
41ef7c1e MCC |
244 | ir->mask_keyup = 0x40; |
245 | ir->polling = 50; /* ms */ | |
246 | break; | |
247 | case CX88_BOARD_MSI_TVANYWHERE_MASTER: | |
248 | ir_codes = ir_codes_msi_tvanywhere; | |
249 | ir->gpio_addr = MO_GP1_IO; | |
250 | ir->mask_keycode = 0x1f; | |
251 | ir->mask_keyup = 0x40; | |
252 | ir->polling = 1; /* ms */ | |
a82decf6 | 253 | break; |
899ad11b | 254 | case CX88_BOARD_AVERTV_303: |
565f4949 | 255 | case CX88_BOARD_AVERTV_STUDIO_303: |
899ad11b GG |
256 | ir_codes = ir_codes_avertv_303; |
257 | ir->gpio_addr = MO_GP2_IO; | |
258 | ir->mask_keycode = 0xfb; | |
259 | ir->mask_keydown = 0x02; | |
260 | ir->polling = 50; /* ms */ | |
261 | break; | |
fc40b261 CP |
262 | case CX88_BOARD_DNTV_LIVE_DVB_T_PRO: |
263 | ir_codes = ir_codes_dntv_live_dvbt_pro; | |
264 | ir_type = IR_TYPE_PD; | |
265 | ir->sampling = 0xff00; /* address */ | |
266 | break; | |
d1009bd7 PN |
267 | case CX88_BOARD_NORWOOD_MICRO: |
268 | ir_codes = ir_codes_norwood; | |
269 | ir->gpio_addr = MO_GP1_IO; | |
270 | ir->mask_keycode = 0x0e; | |
271 | ir->mask_keyup = 0x80; | |
272 | ir->polling = 50; /* ms */ | |
273 | break; | |
be4f4519 | 274 | case CX88_BOARD_NPGTECH_REALTV_TOP10FM: |
680543c5 RC |
275 | ir_codes = ir_codes_npgtech; |
276 | ir->gpio_addr = MO_GP0_IO; | |
277 | ir->mask_keycode = 0xfa; | |
278 | ir->polling = 50; /* ms */ | |
279 | break; | |
1da177e4 | 280 | } |
b45009b0 | 281 | |
1da177e4 LT |
282 | if (NULL == ir_codes) { |
283 | kfree(ir); | |
b7df3910 | 284 | input_free_device(input_dev); |
1da177e4 LT |
285 | return -ENODEV; |
286 | } | |
287 | ||
288 | /* init input device */ | |
289 | snprintf(ir->name, sizeof(ir->name), "cx88 IR (%s)", | |
290 | cx88_boards[core->board].name); | |
41ef7c1e | 291 | snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0", pci_name(pci)); |
1da177e4 | 292 | |
b7df3910 DT |
293 | ir_input_init(input_dev, &ir->ir, ir_type, ir_codes); |
294 | input_dev->name = ir->name; | |
295 | input_dev->phys = ir->phys; | |
296 | input_dev->id.bustype = BUS_PCI; | |
297 | input_dev->id.version = 1; | |
1da177e4 | 298 | if (pci->subsystem_vendor) { |
b7df3910 DT |
299 | input_dev->id.vendor = pci->subsystem_vendor; |
300 | input_dev->id.product = pci->subsystem_device; | |
1da177e4 | 301 | } else { |
b7df3910 DT |
302 | input_dev->id.vendor = pci->vendor; |
303 | input_dev->id.product = pci->device; | |
1da177e4 | 304 | } |
b7df3910 | 305 | input_dev->cdev.dev = &pci->dev; |
1da177e4 LT |
306 | /* record handles to ourself */ |
307 | ir->core = core; | |
308 | core->ir = ir; | |
309 | ||
310 | if (ir->polling) { | |
c4028958 | 311 | INIT_WORK(&ir->work, cx88_ir_work); |
1da177e4 LT |
312 | init_timer(&ir->timer); |
313 | ir->timer.function = ir_timer; | |
41ef7c1e | 314 | ir->timer.data = (unsigned long)ir; |
1da177e4 LT |
315 | schedule_work(&ir->work); |
316 | } | |
317 | if (ir->sampling) { | |
41ef7c1e MCC |
318 | core->pci_irqmask |= (1 << 18); /* IR_SMP_INT */ |
319 | cx_write(MO_DDS_IO, 0xa80a80); /* 4 kHz sample rate */ | |
320 | cx_write(MO_DDSCFG_IO, 0x5); /* enable */ | |
1da177e4 LT |
321 | } |
322 | ||
323 | /* all done */ | |
b7df3910 | 324 | input_register_device(ir->input); |
1da177e4 LT |
325 | |
326 | return 0; | |
327 | } | |
328 | ||
329 | int cx88_ir_fini(struct cx88_core *core) | |
330 | { | |
331 | struct cx88_IR *ir = core->ir; | |
332 | ||
333 | /* skip detach on non attached boards */ | |
334 | if (NULL == ir) | |
335 | return 0; | |
336 | ||
fc40b261 CP |
337 | if (ir->sampling) { |
338 | cx_write(MO_DDSCFG_IO, 0x0); | |
339 | core->pci_irqmask &= ~(1 << 18); | |
340 | } | |
1da177e4 LT |
341 | if (ir->polling) { |
342 | del_timer(&ir->timer); | |
343 | flush_scheduled_work(); | |
344 | } | |
345 | ||
b7df3910 | 346 | input_unregister_device(ir->input); |
1da177e4 LT |
347 | kfree(ir); |
348 | ||
349 | /* done */ | |
350 | core->ir = NULL; | |
351 | return 0; | |
352 | } | |
353 | ||
354 | /* ---------------------------------------------------------------------- */ | |
355 | ||
356 | void cx88_ir_irq(struct cx88_core *core) | |
357 | { | |
358 | struct cx88_IR *ir = core->ir; | |
e52e98a7 | 359 | u32 samples, ircode; |
1da177e4 LT |
360 | int i; |
361 | ||
362 | if (NULL == ir) | |
363 | return; | |
364 | if (!ir->sampling) | |
365 | return; | |
366 | ||
367 | samples = cx_read(MO_SAMPLE_IO); | |
41ef7c1e | 368 | if (0 != samples && 0xffffffff != samples) { |
1da177e4 LT |
369 | /* record sample data */ |
370 | if (ir->scount < ARRAY_SIZE(ir->samples)) | |
371 | ir->samples[ir->scount++] = samples; | |
372 | return; | |
373 | } | |
374 | if (!ir->scount) { | |
375 | /* nothing to sample */ | |
41ef7c1e | 376 | if (ir->ir.keypressed && time_after(jiffies, ir->release)) |
b7df3910 | 377 | ir_input_nokey(ir->input, &ir->ir); |
1da177e4 LT |
378 | return; |
379 | } | |
380 | ||
381 | /* have a complete sample */ | |
382 | if (ir->scount < ARRAY_SIZE(ir->samples)) | |
383 | ir->samples[ir->scount++] = samples; | |
384 | for (i = 0; i < ir->scount; i++) | |
385 | ir->samples[i] = ~ir->samples[i]; | |
386 | if (ir_debug) | |
41ef7c1e | 387 | ir_dump_samples(ir->samples, ir->scount); |
1da177e4 LT |
388 | |
389 | /* decode it */ | |
390 | switch (core->board) { | |
e52e98a7 | 391 | case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1: |
fc40b261 | 392 | case CX88_BOARD_DNTV_LIVE_DVB_T_PRO: |
e52e98a7 MCC |
393 | ircode = ir_decode_pulsedistance(ir->samples, ir->scount, 1, 4); |
394 | ||
395 | if (ircode == 0xffffffff) { /* decoding error */ | |
396 | ir_dprintk("pulse distance decoding error\n"); | |
397 | break; | |
398 | } | |
399 | ||
400 | ir_dprintk("pulse distance decoded: %x\n", ircode); | |
401 | ||
402 | if (ircode == 0) { /* key still pressed */ | |
403 | ir_dprintk("pulse distance decoded repeat code\n"); | |
404 | ir->release = jiffies + msecs_to_jiffies(120); | |
405 | break; | |
406 | } | |
407 | ||
fc40b261 | 408 | if ((ircode & 0xffff) != (ir->sampling & 0xffff)) { /* wrong address */ |
e52e98a7 | 409 | ir_dprintk("pulse distance decoded wrong address\n"); |
4ac97914 | 410 | break; |
e52e98a7 MCC |
411 | } |
412 | ||
413 | if (((~ircode >> 24) & 0xff) != ((ircode >> 16) & 0xff)) { /* wrong checksum */ | |
414 | ir_dprintk("pulse distance decoded wrong check sum\n"); | |
415 | break; | |
416 | } | |
417 | ||
418 | ir_dprintk("Key Code: %x\n", (ircode >> 16) & 0x7f); | |
419 | ||
b7df3910 | 420 | ir_input_keydown(ir->input, &ir->ir, (ircode >> 16) & 0x7f, (ircode >> 16) & 0xff); |
e52e98a7 MCC |
421 | ir->release = jiffies + msecs_to_jiffies(120); |
422 | break; | |
1da177e4 LT |
423 | case CX88_BOARD_HAUPPAUGE: |
424 | case CX88_BOARD_HAUPPAUGE_DVB_T1: | |
fb56cb65 ST |
425 | case CX88_BOARD_HAUPPAUGE_NOVASE2_S1: |
426 | case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1: | |
30367bfd | 427 | case CX88_BOARD_HAUPPAUGE_HVR1100: |
aa481a65 | 428 | case CX88_BOARD_HAUPPAUGE_HVR1300: |
76dc82ab | 429 | case CX88_BOARD_HAUPPAUGE_HVR3000: |
e52e98a7 MCC |
430 | ircode = ir_decode_biphase(ir->samples, ir->scount, 5, 7); |
431 | ir_dprintk("biphase decoded: %x\n", ircode); | |
432 | if ((ircode & 0xfffff000) != 0x3000) | |
1da177e4 | 433 | break; |
b7df3910 | 434 | ir_input_keydown(ir->input, &ir->ir, ircode & 0x3f, ircode); |
1da177e4 LT |
435 | ir->release = jiffies + msecs_to_jiffies(120); |
436 | break; | |
437 | } | |
438 | ||
439 | ir->scount = 0; | |
440 | return; | |
441 | } | |
442 | ||
443 | /* ---------------------------------------------------------------------- */ | |
444 | ||
445 | MODULE_AUTHOR("Gerd Knorr, Pavel Machek, Chris Pascoe"); | |
446 | MODULE_DESCRIPTION("input driver for cx88 GPIO-based IR remote controls"); | |
447 | MODULE_LICENSE("GPL"); | |
1da177e4 LT |
448 | /* |
449 | * Local variables: | |
450 | * c-basic-offset: 8 | |
451 | * End: | |
452 | */ |