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1da177e4 | 1 | /* |
1da177e4 LT |
2 | |
3 | cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver | |
4 | ||
5 | (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version] | |
6 | (c) 2002 Yurij Sysoev <yurij@naturesoft.net> | |
7 | (c) 2003 Gerd Knorr <kraxel@bytesex.org> | |
8 | ||
9 | ----------------------------------------------------------------------- | |
10 | ||
11 | Lot of voodoo here. Even the data sheet doesn't help to | |
12 | understand what is going on here, the documentation for the audio | |
13 | part of the cx2388x chip is *very* bad. | |
14 | ||
15 | Some of this comes from party done linux driver sources I got from | |
16 | [undocumented]. | |
17 | ||
18 | Some comes from the dscaler sources, one of the dscaler driver guy works | |
19 | for Conexant ... | |
20 | ||
21 | ----------------------------------------------------------------------- | |
22 | ||
23 | This program is free software; you can redistribute it and/or modify | |
24 | it under the terms of the GNU General Public License as published by | |
25 | the Free Software Foundation; either version 2 of the License, or | |
26 | (at your option) any later version. | |
27 | ||
28 | This program is distributed in the hope that it will be useful, | |
29 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
30 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
31 | GNU General Public License for more details. | |
32 | ||
33 | You should have received a copy of the GNU General Public License | |
34 | along with this program; if not, write to the Free Software | |
35 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
36 | */ | |
37 | ||
38 | #include <linux/module.h> | |
39 | #include <linux/moduleparam.h> | |
40 | #include <linux/errno.h> | |
41 | #include <linux/kernel.h> | |
42 | #include <linux/slab.h> | |
43 | #include <linux/mm.h> | |
44 | #include <linux/poll.h> | |
45 | #include <linux/pci.h> | |
46 | #include <linux/signal.h> | |
47 | #include <linux/ioport.h> | |
48 | #include <linux/sched.h> | |
49 | #include <linux/types.h> | |
50 | #include <linux/interrupt.h> | |
51 | #include <linux/vmalloc.h> | |
52 | #include <linux/init.h> | |
53 | #include <linux/smp_lock.h> | |
54 | #include <linux/delay.h> | |
55 | #include <linux/kthread.h> | |
56 | ||
57 | #include "cx88.h" | |
58 | ||
59 | static unsigned int audio_debug = 0; | |
7b3c6d65 NS |
60 | module_param(audio_debug, int, 0644); |
61 | MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]"); | |
1da177e4 LT |
62 | |
63 | #define dprintk(fmt, arg...) if (audio_debug) \ | |
64 | printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg) | |
65 | ||
66 | /* ----------------------------------------------------------- */ | |
67 | ||
7b3c6d65 NS |
68 | static char *aud_ctl_names[64] = { |
69 | [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO", | |
70 | [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO", | |
71 | [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP", | |
72 | [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO", | |
73 | [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP", | |
74 | [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1", | |
75 | [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2", | |
76 | [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO", | |
77 | [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2", | |
78 | [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO", | |
79 | [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1", | |
80 | [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2", | |
81 | [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO", | |
82 | [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2", | |
83 | [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO", | |
84 | [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1", | |
85 | [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2", | |
86 | [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO", | |
87 | [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2", | |
88 | [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO", | |
89 | [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO", | |
90 | [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO", | |
91 | [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO", | |
1da177e4 LT |
92 | }; |
93 | ||
94 | struct rlist { | |
95 | u32 reg; | |
96 | u32 val; | |
97 | }; | |
98 | ||
7b3c6d65 | 99 | static void set_audio_registers(struct cx88_core *core, const struct rlist *l) |
1da177e4 LT |
100 | { |
101 | int i; | |
102 | ||
103 | for (i = 0; l[i].reg; i++) { | |
104 | switch (l[i].reg) { | |
105 | case AUD_PDF_DDS_CNST_BYTE2: | |
106 | case AUD_PDF_DDS_CNST_BYTE1: | |
107 | case AUD_PDF_DDS_CNST_BYTE0: | |
108 | case AUD_QAM_MODE: | |
109 | case AUD_PHACC_FREQ_8MSB: | |
110 | case AUD_PHACC_FREQ_8LSB: | |
111 | cx_writeb(l[i].reg, l[i].val); | |
112 | break; | |
113 | default: | |
114 | cx_write(l[i].reg, l[i].val); | |
115 | break; | |
116 | } | |
117 | } | |
118 | } | |
119 | ||
7b3c6d65 | 120 | static void set_audio_start(struct cx88_core *core, u32 mode) |
1da177e4 | 121 | { |
53a7338a | 122 | /* mute */ |
7b3c6d65 | 123 | cx_write(AUD_VOL_CTL, (1 << 6)); |
1da177e4 | 124 | |
53a7338a | 125 | /* start programming */ |
7b3c6d65 NS |
126 | cx_write(AUD_INIT, mode); |
127 | cx_write(AUD_INIT_LD, 0x0001); | |
128 | cx_write(AUD_SOFT_RESET, 0x0001); | |
1da177e4 LT |
129 | } |
130 | ||
e52e98a7 | 131 | static void set_audio_finish(struct cx88_core *core, u32 ctl) |
1da177e4 LT |
132 | { |
133 | u32 volume; | |
134 | ||
b7f355d2 | 135 | #ifndef USING_CX88_ALSA |
6f502b8a MCC |
136 | /* restart dma; This avoids buzz in NICAM and is good in others */ |
137 | cx88_stop_audio_dma(core); | |
b7f355d2 | 138 | #endif |
53a7338a | 139 | cx_write(AUD_RATE_THRES_DMD, 0x000000C0); |
b7f355d2 | 140 | #ifndef USING_CX88_ALSA |
6f502b8a | 141 | cx88_start_audio_dma(core); |
b7f355d2 | 142 | #endif |
53a7338a | 143 | |
1da177e4 | 144 | if (cx88_boards[core->board].blackbird) { |
53a7338a | 145 | /* sets sound input from external adc */ |
0345c387 ST |
146 | if (core->board == CX88_BOARD_HAUPPAUGE_ROSLYN) |
147 | cx_clear(AUD_CTL, EN_I2SIN_ENABLE); | |
148 | else | |
149 | cx_set(AUD_CTL, EN_I2SIN_ENABLE); | |
150 | ||
b45009b0 MCC |
151 | cx_write(AUD_I2SINPUTCNTL, 4); |
152 | cx_write(AUD_BAUDRATE, 1); | |
53a7338a | 153 | /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */ |
b45009b0 | 154 | cx_set(AUD_CTL, EN_I2SOUT_ENABLE); |
1da177e4 | 155 | cx_write(AUD_I2SOUTPUTCNTL, 1); |
b45009b0 | 156 | cx_write(AUD_I2SCNTL, 0); |
53a7338a | 157 | /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */ |
e52e98a7 | 158 | } else { |
7b3c6d65 NS |
159 | ctl |= EN_DAC_ENABLE; |
160 | cx_write(AUD_CTL, ctl); | |
1da177e4 LT |
161 | } |
162 | ||
e52e98a7 | 163 | /* finish programming */ |
1da177e4 LT |
164 | cx_write(AUD_SOFT_RESET, 0x0000); |
165 | ||
e52e98a7 | 166 | /* unmute */ |
1da177e4 LT |
167 | volume = cx_sread(SHADOW_AUD_VOL_CTL); |
168 | cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume); | |
169 | } | |
170 | ||
171 | /* ----------------------------------------------------------- */ | |
172 | ||
7b3c6d65 NS |
173 | static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap, |
174 | u32 mode) | |
1da177e4 LT |
175 | { |
176 | static const struct rlist btsc[] = { | |
7b3c6d65 NS |
177 | {AUD_AFE_12DB_EN, 0x00000001}, |
178 | {AUD_OUT1_SEL, 0x00000013}, | |
179 | {AUD_OUT1_SHIFT, 0x00000000}, | |
180 | {AUD_POLY0_DDS_CONSTANT, 0x0012010c}, | |
181 | {AUD_DMD_RA_DDS, 0x00c3e7aa}, | |
182 | {AUD_DBX_IN_GAIN, 0x00004734}, | |
183 | {AUD_DBX_WBE_GAIN, 0x00004640}, | |
184 | {AUD_DBX_SE_GAIN, 0x00008d31}, | |
185 | {AUD_DCOC_0_SRC, 0x0000001a}, | |
186 | {AUD_IIR1_4_SEL, 0x00000021}, | |
187 | {AUD_DCOC_PASS_IN, 0x00000003}, | |
188 | {AUD_DCOC_0_SHIFT_IN0, 0x0000000a}, | |
189 | {AUD_DCOC_0_SHIFT_IN1, 0x00000008}, | |
190 | {AUD_DCOC_1_SHIFT_IN0, 0x0000000a}, | |
191 | {AUD_DCOC_1_SHIFT_IN1, 0x00000008}, | |
192 | {AUD_DN0_FREQ, 0x0000283b}, | |
193 | {AUD_DN2_SRC_SEL, 0x00000008}, | |
194 | {AUD_DN2_FREQ, 0x00003000}, | |
195 | {AUD_DN2_AFC, 0x00000002}, | |
196 | {AUD_DN2_SHFT, 0x00000000}, | |
197 | {AUD_IIR2_2_SEL, 0x00000020}, | |
198 | {AUD_IIR2_2_SHIFT, 0x00000000}, | |
199 | {AUD_IIR2_3_SEL, 0x0000001f}, | |
200 | {AUD_IIR2_3_SHIFT, 0x00000000}, | |
201 | {AUD_CRDC1_SRC_SEL, 0x000003ce}, | |
202 | {AUD_CRDC1_SHIFT, 0x00000000}, | |
203 | {AUD_CORDIC_SHIFT_1, 0x00000007}, | |
204 | {AUD_DCOC_1_SRC, 0x0000001b}, | |
205 | {AUD_DCOC1_SHIFT, 0x00000000}, | |
206 | {AUD_RDSI_SEL, 0x00000008}, | |
207 | {AUD_RDSQ_SEL, 0x00000008}, | |
208 | {AUD_RDSI_SHIFT, 0x00000000}, | |
209 | {AUD_RDSQ_SHIFT, 0x00000000}, | |
210 | {AUD_POLYPH80SCALEFAC, 0x00000003}, | |
e52e98a7 | 211 | { /* end of list */ }, |
1da177e4 LT |
212 | }; |
213 | static const struct rlist btsc_sap[] = { | |
7b3c6d65 NS |
214 | {AUD_AFE_12DB_EN, 0x00000001}, |
215 | {AUD_DBX_IN_GAIN, 0x00007200}, | |
216 | {AUD_DBX_WBE_GAIN, 0x00006200}, | |
217 | {AUD_DBX_SE_GAIN, 0x00006200}, | |
218 | {AUD_IIR1_1_SEL, 0x00000000}, | |
219 | {AUD_IIR1_3_SEL, 0x00000001}, | |
220 | {AUD_DN1_SRC_SEL, 0x00000007}, | |
221 | {AUD_IIR1_4_SHIFT, 0x00000006}, | |
222 | {AUD_IIR2_1_SHIFT, 0x00000000}, | |
223 | {AUD_IIR2_2_SHIFT, 0x00000000}, | |
224 | {AUD_IIR3_0_SHIFT, 0x00000000}, | |
225 | {AUD_IIR3_1_SHIFT, 0x00000000}, | |
226 | {AUD_IIR3_0_SEL, 0x0000000d}, | |
227 | {AUD_IIR3_1_SEL, 0x0000000e}, | |
228 | {AUD_DEEMPH1_SRC_SEL, 0x00000014}, | |
229 | {AUD_DEEMPH1_SHIFT, 0x00000000}, | |
230 | {AUD_DEEMPH1_G0, 0x00004000}, | |
231 | {AUD_DEEMPH1_A0, 0x00000000}, | |
232 | {AUD_DEEMPH1_B0, 0x00000000}, | |
233 | {AUD_DEEMPH1_A1, 0x00000000}, | |
234 | {AUD_DEEMPH1_B1, 0x00000000}, | |
235 | {AUD_OUT0_SEL, 0x0000003f}, | |
236 | {AUD_OUT1_SEL, 0x0000003f}, | |
237 | {AUD_DN1_AFC, 0x00000002}, | |
238 | {AUD_DCOC_0_SHIFT_IN0, 0x0000000a}, | |
239 | {AUD_DCOC_0_SHIFT_IN1, 0x00000008}, | |
240 | {AUD_DCOC_1_SHIFT_IN0, 0x0000000a}, | |
241 | {AUD_DCOC_1_SHIFT_IN1, 0x00000008}, | |
242 | {AUD_IIR1_0_SEL, 0x0000001d}, | |
243 | {AUD_IIR1_2_SEL, 0x0000001e}, | |
244 | {AUD_IIR2_1_SEL, 0x00000002}, | |
245 | {AUD_IIR2_2_SEL, 0x00000004}, | |
246 | {AUD_IIR3_2_SEL, 0x0000000f}, | |
247 | {AUD_DCOC2_SHIFT, 0x00000001}, | |
248 | {AUD_IIR3_2_SHIFT, 0x00000001}, | |
249 | {AUD_DEEMPH0_SRC_SEL, 0x00000014}, | |
250 | {AUD_CORDIC_SHIFT_1, 0x00000006}, | |
251 | {AUD_POLY0_DDS_CONSTANT, 0x000e4db2}, | |
252 | {AUD_DMD_RA_DDS, 0x00f696e6}, | |
253 | {AUD_IIR2_3_SEL, 0x00000025}, | |
254 | {AUD_IIR1_4_SEL, 0x00000021}, | |
255 | {AUD_DN1_FREQ, 0x0000c965}, | |
256 | {AUD_DCOC_PASS_IN, 0x00000003}, | |
257 | {AUD_DCOC_0_SRC, 0x0000001a}, | |
258 | {AUD_DCOC_1_SRC, 0x0000001b}, | |
259 | {AUD_DCOC1_SHIFT, 0x00000000}, | |
260 | {AUD_RDSI_SEL, 0x00000009}, | |
261 | {AUD_RDSQ_SEL, 0x00000009}, | |
262 | {AUD_RDSI_SHIFT, 0x00000000}, | |
263 | {AUD_RDSQ_SHIFT, 0x00000000}, | |
264 | {AUD_POLYPH80SCALEFAC, 0x00000003}, | |
e52e98a7 | 265 | { /* end of list */ }, |
1da177e4 LT |
266 | }; |
267 | ||
e52e98a7 MCC |
268 | mode |= EN_FMRADIO_EN_RDS; |
269 | ||
1da177e4 | 270 | if (sap) { |
7b3c6d65 NS |
271 | dprintk("%s SAP (status: unknown)\n", __FUNCTION__); |
272 | set_audio_start(core, SEL_SAP); | |
1da177e4 | 273 | set_audio_registers(core, btsc_sap); |
e52e98a7 | 274 | set_audio_finish(core, mode); |
1da177e4 | 275 | } else { |
7b3c6d65 NS |
276 | dprintk("%s (status: known-good)\n", __FUNCTION__); |
277 | set_audio_start(core, SEL_BTSC); | |
1da177e4 | 278 | set_audio_registers(core, btsc); |
e52e98a7 | 279 | set_audio_finish(core, mode); |
1da177e4 | 280 | } |
1da177e4 LT |
281 | } |
282 | ||
b1706b91 | 283 | static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode) |
1da177e4 | 284 | { |
e52e98a7 | 285 | static const struct rlist nicam_l[] = { |
7b3c6d65 NS |
286 | {AUD_AFE_12DB_EN, 0x00000001}, |
287 | {AUD_RATE_ADJ1, 0x00000060}, | |
288 | {AUD_RATE_ADJ2, 0x000000F9}, | |
289 | {AUD_RATE_ADJ3, 0x000001CC}, | |
290 | {AUD_RATE_ADJ4, 0x000002B3}, | |
291 | {AUD_RATE_ADJ5, 0x00000726}, | |
292 | {AUD_DEEMPHDENOM1_R, 0x0000F3D0}, | |
293 | {AUD_DEEMPHDENOM2_R, 0x00000000}, | |
294 | {AUD_ERRLOGPERIOD_R, 0x00000064}, | |
295 | {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF}, | |
296 | {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F}, | |
297 | {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F}, | |
298 | {AUD_POLYPH80SCALEFAC, 0x00000003}, | |
299 | {AUD_DMD_RA_DDS, 0x00C00000}, | |
300 | {AUD_PLL_INT, 0x0000001E}, | |
301 | {AUD_PLL_DDS, 0x00000000}, | |
302 | {AUD_PLL_FRAC, 0x0000E542}, | |
303 | {AUD_START_TIMER, 0x00000000}, | |
304 | {AUD_DEEMPHNUMER1_R, 0x000353DE}, | |
305 | {AUD_DEEMPHNUMER2_R, 0x000001B1}, | |
306 | {AUD_PDF_DDS_CNST_BYTE2, 0x06}, | |
307 | {AUD_PDF_DDS_CNST_BYTE1, 0x82}, | |
308 | {AUD_PDF_DDS_CNST_BYTE0, 0x12}, | |
309 | {AUD_QAM_MODE, 0x05}, | |
310 | {AUD_PHACC_FREQ_8MSB, 0x34}, | |
311 | {AUD_PHACC_FREQ_8LSB, 0x4C}, | |
312 | {AUD_DEEMPHGAIN_R, 0x00006680}, | |
313 | {AUD_RATE_THRES_DMD, 0x000000C0}, | |
314 | { /* end of list */ }, | |
315 | }; | |
1da177e4 | 316 | |
b1706b91 | 317 | static const struct rlist nicam_bgdki_common[] = { |
7b3c6d65 NS |
318 | {AUD_AFE_12DB_EN, 0x00000001}, |
319 | {AUD_RATE_ADJ1, 0x00000010}, | |
320 | {AUD_RATE_ADJ2, 0x00000040}, | |
321 | {AUD_RATE_ADJ3, 0x00000100}, | |
322 | {AUD_RATE_ADJ4, 0x00000400}, | |
323 | {AUD_RATE_ADJ5, 0x00001000}, | |
7b3c6d65 NS |
324 | {AUD_ERRLOGPERIOD_R, 0x00000fff}, |
325 | {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff}, | |
326 | {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff}, | |
327 | {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f}, | |
328 | {AUD_POLYPH80SCALEFAC, 0x00000003}, | |
329 | {AUD_DEEMPHGAIN_R, 0x000023c2}, | |
330 | {AUD_DEEMPHNUMER1_R, 0x0002a7bc}, | |
331 | {AUD_DEEMPHNUMER2_R, 0x0003023e}, | |
332 | {AUD_DEEMPHDENOM1_R, 0x0000f3d0}, | |
333 | {AUD_DEEMPHDENOM2_R, 0x00000000}, | |
d0fcdd78 | 334 | {AUD_PDF_DDS_CNST_BYTE2, 0x06}, |
7b3c6d65 | 335 | {AUD_PDF_DDS_CNST_BYTE1, 0x82}, |
7b3c6d65 NS |
336 | {AUD_QAM_MODE, 0x05}, |
337 | { /* end of list */ }, | |
b1706b91 TS |
338 | }; |
339 | ||
340 | static const struct rlist nicam_i[] = { | |
7b3c6d65 NS |
341 | {AUD_PDF_DDS_CNST_BYTE0, 0x12}, |
342 | {AUD_PHACC_FREQ_8MSB, 0x3a}, | |
343 | {AUD_PHACC_FREQ_8LSB, 0x93}, | |
344 | { /* end of list */ }, | |
e52e98a7 MCC |
345 | }; |
346 | ||
b1706b91 | 347 | static const struct rlist nicam_default[] = { |
7b3c6d65 NS |
348 | {AUD_PDF_DDS_CNST_BYTE0, 0x16}, |
349 | {AUD_PHACC_FREQ_8MSB, 0x34}, | |
350 | {AUD_PHACC_FREQ_8LSB, 0x4c}, | |
351 | { /* end of list */ }, | |
b1706b91 | 352 | }; |
e52e98a7 | 353 | |
7f7e846c | 354 | set_audio_start(core,SEL_NICAM); |
b1706b91 TS |
355 | switch (core->tvaudio) { |
356 | case WW_L: | |
7b3c6d65 | 357 | dprintk("%s SECAM-L NICAM (status: devel)\n", __FUNCTION__); |
b1706b91 TS |
358 | set_audio_registers(core, nicam_l); |
359 | break; | |
360 | case WW_I: | |
53a7338a | 361 | dprintk("%s PAL-I NICAM (status: known-good)\n", __FUNCTION__); |
b1706b91 TS |
362 | set_audio_registers(core, nicam_bgdki_common); |
363 | set_audio_registers(core, nicam_i); | |
364 | break; | |
365 | default: | |
53a7338a | 366 | dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __FUNCTION__); |
b1706b91 TS |
367 | set_audio_registers(core, nicam_bgdki_common); |
368 | set_audio_registers(core, nicam_default); | |
369 | break; | |
370 | }; | |
371 | ||
372 | mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS; | |
373 | set_audio_finish(core, mode); | |
1da177e4 LT |
374 | } |
375 | ||
e52e98a7 | 376 | static void set_audio_standard_A2(struct cx88_core *core, u32 mode) |
1da177e4 | 377 | { |
b1706b91 | 378 | static const struct rlist a2_bgdk_common[] = { |
7b3c6d65 NS |
379 | {AUD_ERRLOGPERIOD_R, 0x00000064}, |
380 | {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff}, | |
381 | {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f}, | |
382 | {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f}, | |
383 | {AUD_PDF_DDS_CNST_BYTE2, 0x06}, | |
384 | {AUD_PDF_DDS_CNST_BYTE1, 0x82}, | |
385 | {AUD_PDF_DDS_CNST_BYTE0, 0x12}, | |
386 | {AUD_QAM_MODE, 0x05}, | |
387 | {AUD_PHACC_FREQ_8MSB, 0x34}, | |
388 | {AUD_PHACC_FREQ_8LSB, 0x4c}, | |
389 | {AUD_RATE_ADJ1, 0x00000100}, | |
390 | {AUD_RATE_ADJ2, 0x00000200}, | |
391 | {AUD_RATE_ADJ3, 0x00000300}, | |
392 | {AUD_RATE_ADJ4, 0x00000400}, | |
393 | {AUD_RATE_ADJ5, 0x00000500}, | |
394 | {AUD_THR_FR, 0x00000000}, | |
395 | {AAGC_HYST, 0x0000001a}, | |
396 | {AUD_PILOT_BQD_1_K0, 0x0000755b}, | |
397 | {AUD_PILOT_BQD_1_K1, 0x00551340}, | |
398 | {AUD_PILOT_BQD_1_K2, 0x006d30be}, | |
399 | {AUD_PILOT_BQD_1_K3, 0xffd394af}, | |
400 | {AUD_PILOT_BQD_1_K4, 0x00400000}, | |
401 | {AUD_PILOT_BQD_2_K0, 0x00040000}, | |
402 | {AUD_PILOT_BQD_2_K1, 0x002a4841}, | |
403 | {AUD_PILOT_BQD_2_K2, 0x00400000}, | |
404 | {AUD_PILOT_BQD_2_K3, 0x00000000}, | |
405 | {AUD_PILOT_BQD_2_K4, 0x00000000}, | |
406 | {AUD_MODE_CHG_TIMER, 0x00000040}, | |
407 | {AUD_AFE_12DB_EN, 0x00000001}, | |
408 | {AUD_CORDIC_SHIFT_0, 0x00000007}, | |
409 | {AUD_CORDIC_SHIFT_1, 0x00000007}, | |
410 | {AUD_DEEMPH0_G0, 0x00000380}, | |
411 | {AUD_DEEMPH1_G0, 0x00000380}, | |
412 | {AUD_DCOC_0_SRC, 0x0000001a}, | |
413 | {AUD_DCOC0_SHIFT, 0x00000000}, | |
414 | {AUD_DCOC_0_SHIFT_IN0, 0x0000000a}, | |
415 | {AUD_DCOC_0_SHIFT_IN1, 0x00000008}, | |
416 | {AUD_DCOC_PASS_IN, 0x00000003}, | |
417 | {AUD_IIR3_0_SEL, 0x00000021}, | |
418 | {AUD_DN2_AFC, 0x00000002}, | |
419 | {AUD_DCOC_1_SRC, 0x0000001b}, | |
420 | {AUD_DCOC1_SHIFT, 0x00000000}, | |
421 | {AUD_DCOC_1_SHIFT_IN0, 0x0000000a}, | |
422 | {AUD_DCOC_1_SHIFT_IN1, 0x00000008}, | |
423 | {AUD_IIR3_1_SEL, 0x00000023}, | |
424 | {AUD_RDSI_SEL, 0x00000017}, | |
425 | {AUD_RDSI_SHIFT, 0x00000000}, | |
426 | {AUD_RDSQ_SEL, 0x00000017}, | |
427 | {AUD_RDSQ_SHIFT, 0x00000000}, | |
428 | {AUD_PLL_INT, 0x0000001e}, | |
429 | {AUD_PLL_DDS, 0x00000000}, | |
430 | {AUD_PLL_FRAC, 0x0000e542}, | |
431 | {AUD_POLYPH80SCALEFAC, 0x00000001}, | |
432 | {AUD_START_TIMER, 0x00000000}, | |
433 | { /* end of list */ }, | |
e52e98a7 | 434 | }; |
1da177e4 | 435 | |
e52e98a7 | 436 | static const struct rlist a2_bg[] = { |
7b3c6d65 NS |
437 | {AUD_DMD_RA_DDS, 0x002a4f2f}, |
438 | {AUD_C1_UP_THR, 0x00007000}, | |
439 | {AUD_C1_LO_THR, 0x00005400}, | |
440 | {AUD_C2_UP_THR, 0x00005400}, | |
441 | {AUD_C2_LO_THR, 0x00003000}, | |
442 | { /* end of list */ }, | |
1da177e4 LT |
443 | }; |
444 | ||
e52e98a7 | 445 | static const struct rlist a2_dk[] = { |
7b3c6d65 NS |
446 | {AUD_DMD_RA_DDS, 0x002a4f2f}, |
447 | {AUD_C1_UP_THR, 0x00007000}, | |
448 | {AUD_C1_LO_THR, 0x00005400}, | |
449 | {AUD_C2_UP_THR, 0x00005400}, | |
450 | {AUD_C2_LO_THR, 0x00003000}, | |
451 | {AUD_DN0_FREQ, 0x00003a1c}, | |
452 | {AUD_DN2_FREQ, 0x0000d2e0}, | |
453 | { /* end of list */ }, | |
1da177e4 | 454 | }; |
b1706b91 TS |
455 | |
456 | static const struct rlist a1_i[] = { | |
7b3c6d65 NS |
457 | {AUD_ERRLOGPERIOD_R, 0x00000064}, |
458 | {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff}, | |
459 | {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f}, | |
460 | {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f}, | |
461 | {AUD_PDF_DDS_CNST_BYTE2, 0x06}, | |
462 | {AUD_PDF_DDS_CNST_BYTE1, 0x82}, | |
463 | {AUD_PDF_DDS_CNST_BYTE0, 0x12}, | |
464 | {AUD_QAM_MODE, 0x05}, | |
465 | {AUD_PHACC_FREQ_8MSB, 0x3a}, | |
466 | {AUD_PHACC_FREQ_8LSB, 0x93}, | |
467 | {AUD_DMD_RA_DDS, 0x002a4f2f}, | |
468 | {AUD_PLL_INT, 0x0000001e}, | |
469 | {AUD_PLL_DDS, 0x00000004}, | |
470 | {AUD_PLL_FRAC, 0x0000e542}, | |
471 | {AUD_RATE_ADJ1, 0x00000100}, | |
472 | {AUD_RATE_ADJ2, 0x00000200}, | |
473 | {AUD_RATE_ADJ3, 0x00000300}, | |
474 | {AUD_RATE_ADJ4, 0x00000400}, | |
475 | {AUD_RATE_ADJ5, 0x00000500}, | |
476 | {AUD_THR_FR, 0x00000000}, | |
477 | {AUD_PILOT_BQD_1_K0, 0x0000755b}, | |
478 | {AUD_PILOT_BQD_1_K1, 0x00551340}, | |
479 | {AUD_PILOT_BQD_1_K2, 0x006d30be}, | |
480 | {AUD_PILOT_BQD_1_K3, 0xffd394af}, | |
481 | {AUD_PILOT_BQD_1_K4, 0x00400000}, | |
482 | {AUD_PILOT_BQD_2_K0, 0x00040000}, | |
483 | {AUD_PILOT_BQD_2_K1, 0x002a4841}, | |
484 | {AUD_PILOT_BQD_2_K2, 0x00400000}, | |
485 | {AUD_PILOT_BQD_2_K3, 0x00000000}, | |
486 | {AUD_PILOT_BQD_2_K4, 0x00000000}, | |
487 | {AUD_MODE_CHG_TIMER, 0x00000060}, | |
488 | {AUD_AFE_12DB_EN, 0x00000001}, | |
489 | {AAGC_HYST, 0x0000000a}, | |
490 | {AUD_CORDIC_SHIFT_0, 0x00000007}, | |
491 | {AUD_CORDIC_SHIFT_1, 0x00000007}, | |
492 | {AUD_C1_UP_THR, 0x00007000}, | |
493 | {AUD_C1_LO_THR, 0x00005400}, | |
494 | {AUD_C2_UP_THR, 0x00005400}, | |
495 | {AUD_C2_LO_THR, 0x00003000}, | |
496 | {AUD_DCOC_0_SRC, 0x0000001a}, | |
497 | {AUD_DCOC0_SHIFT, 0x00000000}, | |
498 | {AUD_DCOC_0_SHIFT_IN0, 0x0000000a}, | |
499 | {AUD_DCOC_0_SHIFT_IN1, 0x00000008}, | |
500 | {AUD_DCOC_PASS_IN, 0x00000003}, | |
501 | {AUD_IIR3_0_SEL, 0x00000021}, | |
502 | {AUD_DN2_AFC, 0x00000002}, | |
503 | {AUD_DCOC_1_SRC, 0x0000001b}, | |
504 | {AUD_DCOC1_SHIFT, 0x00000000}, | |
505 | {AUD_DCOC_1_SHIFT_IN0, 0x0000000a}, | |
506 | {AUD_DCOC_1_SHIFT_IN1, 0x00000008}, | |
507 | {AUD_IIR3_1_SEL, 0x00000023}, | |
508 | {AUD_DN0_FREQ, 0x000035a3}, | |
509 | {AUD_DN2_FREQ, 0x000029c7}, | |
510 | {AUD_CRDC0_SRC_SEL, 0x00000511}, | |
511 | {AUD_IIR1_0_SEL, 0x00000001}, | |
512 | {AUD_IIR1_1_SEL, 0x00000000}, | |
513 | {AUD_IIR3_2_SEL, 0x00000003}, | |
514 | {AUD_IIR3_2_SHIFT, 0x00000000}, | |
515 | {AUD_IIR3_0_SEL, 0x00000002}, | |
516 | {AUD_IIR2_0_SEL, 0x00000021}, | |
517 | {AUD_IIR2_0_SHIFT, 0x00000002}, | |
518 | {AUD_DEEMPH0_SRC_SEL, 0x0000000b}, | |
519 | {AUD_DEEMPH1_SRC_SEL, 0x0000000b}, | |
520 | {AUD_POLYPH80SCALEFAC, 0x00000001}, | |
521 | {AUD_START_TIMER, 0x00000000}, | |
522 | { /* end of list */ }, | |
b1706b91 TS |
523 | }; |
524 | ||
525 | static const struct rlist am_l[] = { | |
7b3c6d65 NS |
526 | {AUD_ERRLOGPERIOD_R, 0x00000064}, |
527 | {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF}, | |
528 | {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F}, | |
529 | {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F}, | |
530 | {AUD_PDF_DDS_CNST_BYTE2, 0x48}, | |
531 | {AUD_PDF_DDS_CNST_BYTE1, 0x3D}, | |
532 | {AUD_QAM_MODE, 0x00}, | |
533 | {AUD_PDF_DDS_CNST_BYTE0, 0xf5}, | |
534 | {AUD_PHACC_FREQ_8MSB, 0x3a}, | |
535 | {AUD_PHACC_FREQ_8LSB, 0x4a}, | |
536 | {AUD_DEEMPHGAIN_R, 0x00006680}, | |
537 | {AUD_DEEMPHNUMER1_R, 0x000353DE}, | |
538 | {AUD_DEEMPHNUMER2_R, 0x000001B1}, | |
539 | {AUD_DEEMPHDENOM1_R, 0x0000F3D0}, | |
540 | {AUD_DEEMPHDENOM2_R, 0x00000000}, | |
541 | {AUD_FM_MODE_ENABLE, 0x00000007}, | |
542 | {AUD_POLYPH80SCALEFAC, 0x00000003}, | |
543 | {AUD_AFE_12DB_EN, 0x00000001}, | |
544 | {AAGC_GAIN, 0x00000000}, | |
545 | {AAGC_HYST, 0x00000018}, | |
546 | {AAGC_DEF, 0x00000020}, | |
547 | {AUD_DN0_FREQ, 0x00000000}, | |
548 | {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2}, | |
549 | {AUD_DCOC_0_SRC, 0x00000021}, | |
550 | {AUD_IIR1_0_SEL, 0x00000000}, | |
551 | {AUD_IIR1_0_SHIFT, 0x00000007}, | |
552 | {AUD_IIR1_1_SEL, 0x00000002}, | |
553 | {AUD_IIR1_1_SHIFT, 0x00000000}, | |
554 | {AUD_DCOC_1_SRC, 0x00000003}, | |
555 | {AUD_DCOC1_SHIFT, 0x00000000}, | |
556 | {AUD_DCOC_PASS_IN, 0x00000000}, | |
557 | {AUD_IIR1_2_SEL, 0x00000023}, | |
558 | {AUD_IIR1_2_SHIFT, 0x00000000}, | |
559 | {AUD_IIR1_3_SEL, 0x00000004}, | |
560 | {AUD_IIR1_3_SHIFT, 0x00000007}, | |
561 | {AUD_IIR1_4_SEL, 0x00000005}, | |
562 | {AUD_IIR1_4_SHIFT, 0x00000007}, | |
563 | {AUD_IIR3_0_SEL, 0x00000007}, | |
564 | {AUD_IIR3_0_SHIFT, 0x00000000}, | |
565 | {AUD_DEEMPH0_SRC_SEL, 0x00000011}, | |
566 | {AUD_DEEMPH0_SHIFT, 0x00000000}, | |
567 | {AUD_DEEMPH0_G0, 0x00007000}, | |
568 | {AUD_DEEMPH0_A0, 0x00000000}, | |
569 | {AUD_DEEMPH0_B0, 0x00000000}, | |
570 | {AUD_DEEMPH0_A1, 0x00000000}, | |
571 | {AUD_DEEMPH0_B1, 0x00000000}, | |
572 | {AUD_DEEMPH1_SRC_SEL, 0x00000011}, | |
573 | {AUD_DEEMPH1_SHIFT, 0x00000000}, | |
574 | {AUD_DEEMPH1_G0, 0x00007000}, | |
575 | {AUD_DEEMPH1_A0, 0x00000000}, | |
576 | {AUD_DEEMPH1_B0, 0x00000000}, | |
577 | {AUD_DEEMPH1_A1, 0x00000000}, | |
578 | {AUD_DEEMPH1_B1, 0x00000000}, | |
579 | {AUD_OUT0_SEL, 0x0000003F}, | |
580 | {AUD_OUT1_SEL, 0x0000003F}, | |
581 | {AUD_DMD_RA_DDS, 0x00F5C285}, | |
582 | {AUD_PLL_INT, 0x0000001E}, | |
583 | {AUD_PLL_DDS, 0x00000000}, | |
584 | {AUD_PLL_FRAC, 0x0000E542}, | |
585 | {AUD_RATE_ADJ1, 0x00000100}, | |
586 | {AUD_RATE_ADJ2, 0x00000200}, | |
587 | {AUD_RATE_ADJ3, 0x00000300}, | |
588 | {AUD_RATE_ADJ4, 0x00000400}, | |
589 | {AUD_RATE_ADJ5, 0x00000500}, | |
590 | {AUD_RATE_THRES_DMD, 0x000000C0}, | |
591 | { /* end of list */ }, | |
1da177e4 | 592 | }; |
e52e98a7 MCC |
593 | |
594 | static const struct rlist a2_deemph50[] = { | |
7b3c6d65 NS |
595 | {AUD_DEEMPH0_G0, 0x00000380}, |
596 | {AUD_DEEMPH1_G0, 0x00000380}, | |
597 | {AUD_DEEMPHGAIN_R, 0x000011e1}, | |
598 | {AUD_DEEMPHNUMER1_R, 0x0002a7bc}, | |
599 | {AUD_DEEMPHNUMER2_R, 0x0003023c}, | |
600 | { /* end of list */ }, | |
e52e98a7 MCC |
601 | }; |
602 | ||
e52e98a7 | 603 | set_audio_start(core, SEL_A2); |
1da177e4 | 604 | switch (core->tvaudio) { |
b1706b91 | 605 | case WW_BG: |
7b3c6d65 | 606 | dprintk("%s PAL-BG A1/2 (status: known-good)\n", __FUNCTION__); |
b1706b91 TS |
607 | set_audio_registers(core, a2_bgdk_common); |
608 | set_audio_registers(core, a2_bg); | |
609 | set_audio_registers(core, a2_deemph50); | |
1da177e4 | 610 | break; |
b1706b91 | 611 | case WW_DK: |
7b3c6d65 | 612 | dprintk("%s PAL-DK A1/2 (status: known-good)\n", __FUNCTION__); |
b1706b91 TS |
613 | set_audio_registers(core, a2_bgdk_common); |
614 | set_audio_registers(core, a2_dk); | |
615 | set_audio_registers(core, a2_deemph50); | |
1da177e4 | 616 | break; |
b1706b91 | 617 | case WW_I: |
7b3c6d65 | 618 | dprintk("%s PAL-I A1 (status: known-good)\n", __FUNCTION__); |
b1706b91 TS |
619 | set_audio_registers(core, a1_i); |
620 | set_audio_registers(core, a2_deemph50); | |
621 | break; | |
622 | case WW_L: | |
7b3c6d65 | 623 | dprintk("%s AM-L (status: devel)\n", __FUNCTION__); |
b1706b91 TS |
624 | set_audio_registers(core, am_l); |
625 | break; | |
626 | default: | |
7b3c6d65 | 627 | dprintk("%s Warning: wrong value\n", __FUNCTION__); |
b1706b91 | 628 | return; |
1da177e4 LT |
629 | break; |
630 | }; | |
e52e98a7 MCC |
631 | |
632 | mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF; | |
633 | set_audio_finish(core, mode); | |
1da177e4 LT |
634 | } |
635 | ||
636 | static void set_audio_standard_EIAJ(struct cx88_core *core) | |
637 | { | |
638 | static const struct rlist eiaj[] = { | |
639 | /* TODO: eiaj register settings are not there yet ... */ | |
640 | ||
641 | { /* end of list */ }, | |
642 | }; | |
7b3c6d65 | 643 | dprintk("%s (status: unknown)\n", __FUNCTION__); |
1da177e4 | 644 | |
e52e98a7 | 645 | set_audio_start(core, SEL_EIAJ); |
1da177e4 | 646 | set_audio_registers(core, eiaj); |
e52e98a7 | 647 | set_audio_finish(core, EN_EIAJ_AUTO_STEREO); |
1da177e4 LT |
648 | } |
649 | ||
7b3c6d65 NS |
650 | static void set_audio_standard_FM(struct cx88_core *core, |
651 | enum cx88_deemph_type deemph) | |
1da177e4 | 652 | { |
b45009b0 | 653 | static const struct rlist fm_deemph_50[] = { |
7b3c6d65 NS |
654 | {AUD_DEEMPH0_G0, 0x0C45}, |
655 | {AUD_DEEMPH0_A0, 0x6262}, | |
656 | {AUD_DEEMPH0_B0, 0x1C29}, | |
657 | {AUD_DEEMPH0_A1, 0x3FC66}, | |
658 | {AUD_DEEMPH0_B1, 0x399A}, | |
659 | ||
660 | {AUD_DEEMPH1_G0, 0x0D80}, | |
661 | {AUD_DEEMPH1_A0, 0x6262}, | |
662 | {AUD_DEEMPH1_B0, 0x1C29}, | |
663 | {AUD_DEEMPH1_A1, 0x3FC66}, | |
664 | {AUD_DEEMPH1_B1, 0x399A}, | |
665 | ||
666 | {AUD_POLYPH80SCALEFAC, 0x0003}, | |
b45009b0 MCC |
667 | { /* end of list */ }, |
668 | }; | |
669 | static const struct rlist fm_deemph_75[] = { | |
7b3c6d65 NS |
670 | {AUD_DEEMPH0_G0, 0x091B}, |
671 | {AUD_DEEMPH0_A0, 0x6B68}, | |
672 | {AUD_DEEMPH0_B0, 0x11EC}, | |
673 | {AUD_DEEMPH0_A1, 0x3FC66}, | |
674 | {AUD_DEEMPH0_B1, 0x399A}, | |
675 | ||
676 | {AUD_DEEMPH1_G0, 0x0AA0}, | |
677 | {AUD_DEEMPH1_A0, 0x6B68}, | |
678 | {AUD_DEEMPH1_B0, 0x11EC}, | |
679 | {AUD_DEEMPH1_A1, 0x3FC66}, | |
680 | {AUD_DEEMPH1_B1, 0x399A}, | |
681 | ||
682 | {AUD_POLYPH80SCALEFAC, 0x0003}, | |
b45009b0 MCC |
683 | { /* end of list */ }, |
684 | }; | |
1da177e4 | 685 | |
b45009b0 MCC |
686 | /* It is enough to leave default values? */ |
687 | static const struct rlist fm_no_deemph[] = { | |
1da177e4 | 688 | |
7b3c6d65 | 689 | {AUD_POLYPH80SCALEFAC, 0x0003}, |
b45009b0 MCC |
690 | { /* end of list */ }, |
691 | }; | |
1da177e4 | 692 | |
7b3c6d65 | 693 | dprintk("%s (status: unknown)\n", __FUNCTION__); |
e52e98a7 | 694 | set_audio_start(core, SEL_FMRADIO); |
1da177e4 | 695 | |
7b3c6d65 NS |
696 | switch (deemph) { |
697 | case FM_NO_DEEMPH: | |
698 | set_audio_registers(core, fm_no_deemph); | |
699 | break; | |
1da177e4 | 700 | |
7b3c6d65 NS |
701 | case FM_DEEMPH_50: |
702 | set_audio_registers(core, fm_deemph_50); | |
703 | break; | |
1da177e4 | 704 | |
7b3c6d65 NS |
705 | case FM_DEEMPH_75: |
706 | set_audio_registers(core, fm_deemph_75); | |
707 | break; | |
b45009b0 | 708 | } |
1da177e4 | 709 | |
e52e98a7 | 710 | set_audio_finish(core, EN_FMRADIO_AUTO_STEREO); |
1da177e4 LT |
711 | } |
712 | ||
713 | /* ----------------------------------------------------------- */ | |
714 | ||
b1706b91 TS |
715 | int cx88_detect_nicam(struct cx88_core *core) |
716 | { | |
7b3c6d65 | 717 | int i, j = 0; |
b1706b91 TS |
718 | |
719 | dprintk("start nicam autodetect.\n"); | |
720 | ||
7b3c6d65 NS |
721 | for (i = 0; i < 6; i++) { |
722 | /* if bit1=1 then nicam is detected */ | |
723 | j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1); | |
b1706b91 | 724 | |
53a7338a | 725 | if (j == 1) { |
b1706b91 TS |
726 | dprintk("nicam is detected.\n"); |
727 | return 1; | |
728 | } | |
729 | ||
730 | /* wait a little bit for next reading status */ | |
7b3c6d65 | 731 | msleep(10); |
b1706b91 TS |
732 | } |
733 | ||
734 | dprintk("nicam is not detected.\n"); | |
735 | return 0; | |
736 | } | |
737 | ||
1da177e4 LT |
738 | void cx88_set_tvaudio(struct cx88_core *core) |
739 | { | |
740 | switch (core->tvaudio) { | |
741 | case WW_BTSC: | |
e52e98a7 | 742 | set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO); |
1da177e4 | 743 | break; |
b1706b91 TS |
744 | case WW_BG: |
745 | case WW_DK: | |
746 | case WW_I: | |
747 | case WW_L: | |
748 | /* prepare all dsp registers */ | |
749 | set_audio_standard_A2(core, EN_A2_FORCE_MONO1); | |
750 | ||
751 | /* set nicam mode - otherwise | |
752 | AUD_NICAM_STATUS2 contains wrong values */ | |
7f7e846c | 753 | set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO); |
7b3c6d65 | 754 | if (0 == cx88_detect_nicam(core)) { |
b1706b91 TS |
755 | /* fall back to fm / am mono */ |
756 | set_audio_standard_A2(core, EN_A2_FORCE_MONO1); | |
757 | core->use_nicam = 0; | |
7b3c6d65 | 758 | } else { |
b1706b91 | 759 | core->use_nicam = 1; |
7b3c6d65 | 760 | } |
1da177e4 LT |
761 | break; |
762 | case WW_EIAJ: | |
763 | set_audio_standard_EIAJ(core); | |
764 | break; | |
765 | case WW_FM: | |
7b3c6d65 | 766 | set_audio_standard_FM(core, FM_NO_DEEMPH); |
1da177e4 | 767 | break; |
1da177e4 LT |
768 | case WW_NONE: |
769 | default: | |
770 | printk("%s/0: unknown tv audio mode [%d]\n", | |
7b3c6d65 | 771 | core->name, core->tvaudio); |
1da177e4 LT |
772 | break; |
773 | } | |
774 | return; | |
775 | } | |
776 | ||
777 | void cx88_newstation(struct cx88_core *core) | |
778 | { | |
779 | core->audiomode_manual = UNSET; | |
1da177e4 LT |
780 | } |
781 | ||
782 | void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t) | |
783 | { | |
7b3c6d65 NS |
784 | static char *m[] = { "stereo", "dual mono", "mono", "sap" }; |
785 | static char *p[] = { "no pilot", "pilot c1", "pilot c2", "?" }; | |
786 | u32 reg, mode, pilot; | |
1da177e4 | 787 | |
7b3c6d65 NS |
788 | reg = cx_read(AUD_STATUS); |
789 | mode = reg & 0x03; | |
1da177e4 LT |
790 | pilot = (reg >> 2) & 0x03; |
791 | ||
792 | if (core->astat != reg) | |
793 | dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n", | |
794 | reg, m[mode], p[pilot], | |
795 | aud_ctl_names[cx_read(AUD_CTL) & 63]); | |
796 | core->astat = reg; | |
797 | ||
e52e98a7 MCC |
798 | /* TODO |
799 | Reading from AUD_STATUS is not enough | |
800 | for auto-detecting sap/dual-fm/nicam. | |
801 | Add some code here later. | |
802 | */ | |
803 | ||
804 | # if 0 | |
1da177e4 | 805 | t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP | |
7b3c6d65 | 806 | V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2; |
1da177e4 | 807 | t->rxsubchans = V4L2_TUNER_SUB_MONO; |
7b3c6d65 | 808 | t->audmode = V4L2_TUNER_MODE_MONO; |
1da177e4 LT |
809 | |
810 | switch (core->tvaudio) { | |
811 | case WW_BTSC: | |
7b3c6d65 | 812 | t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP; |
1da177e4 | 813 | t->rxsubchans = V4L2_TUNER_SUB_STEREO; |
e52e98a7 | 814 | if (1 == pilot) { |
1da177e4 LT |
815 | /* SAP */ |
816 | t->rxsubchans |= V4L2_TUNER_SUB_SAP; | |
817 | } | |
818 | break; | |
819 | case WW_A2_BG: | |
820 | case WW_A2_DK: | |
821 | case WW_A2_M: | |
e52e98a7 | 822 | if (1 == pilot) { |
1da177e4 | 823 | /* stereo */ |
7b3c6d65 NS |
824 | t->rxsubchans = |
825 | V4L2_TUNER_SUB_MONO | V4L2_TUNER_SUB_STEREO; | |
1da177e4 LT |
826 | if (0 == mode) |
827 | t->audmode = V4L2_TUNER_MODE_STEREO; | |
828 | } | |
e52e98a7 | 829 | if (2 == pilot) { |
1da177e4 | 830 | /* dual language -- FIXME */ |
7b3c6d65 NS |
831 | t->rxsubchans = |
832 | V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2; | |
1da177e4 LT |
833 | t->audmode = V4L2_TUNER_MODE_LANG1; |
834 | } | |
835 | break; | |
836 | case WW_NICAM_BGDKL: | |
837 | if (0 == mode) { | |
838 | t->audmode = V4L2_TUNER_MODE_STEREO; | |
839 | t->rxsubchans |= V4L2_TUNER_SUB_STEREO; | |
840 | } | |
841 | break; | |
e52e98a7 MCC |
842 | case WW_SYSTEM_L_AM: |
843 | if (0x0 == mode && !(cx_read(AUD_INIT) & 0x04)) { | |
844 | t->audmode = V4L2_TUNER_MODE_STEREO; | |
1da177e4 LT |
845 | t->rxsubchans |= V4L2_TUNER_SUB_STEREO; |
846 | } | |
7b3c6d65 | 847 | break; |
1da177e4 LT |
848 | default: |
849 | /* nothing */ | |
850 | break; | |
851 | } | |
e52e98a7 | 852 | # endif |
1da177e4 LT |
853 | return; |
854 | } | |
855 | ||
856 | void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual) | |
857 | { | |
7b3c6d65 | 858 | u32 ctl = UNSET; |
1da177e4 LT |
859 | u32 mask = UNSET; |
860 | ||
861 | if (manual) { | |
862 | core->audiomode_manual = mode; | |
863 | } else { | |
864 | if (UNSET != core->audiomode_manual) | |
865 | return; | |
866 | } | |
867 | core->audiomode_current = mode; | |
868 | ||
869 | switch (core->tvaudio) { | |
870 | case WW_BTSC: | |
871 | switch (mode) { | |
872 | case V4L2_TUNER_MODE_MONO: | |
e52e98a7 | 873 | set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO); |
1da177e4 | 874 | break; |
e52e98a7 MCC |
875 | case V4L2_TUNER_MODE_LANG1: |
876 | set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO); | |
877 | break; | |
878 | case V4L2_TUNER_MODE_LANG2: | |
879 | set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP); | |
1da177e4 LT |
880 | break; |
881 | case V4L2_TUNER_MODE_STEREO: | |
e52e98a7 | 882 | set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO); |
1da177e4 LT |
883 | break; |
884 | } | |
885 | break; | |
b1706b91 TS |
886 | case WW_BG: |
887 | case WW_DK: | |
888 | case WW_I: | |
889 | case WW_L: | |
7b3c6d65 | 890 | if (1 == core->use_nicam) { |
b1706b91 TS |
891 | switch (mode) { |
892 | case V4L2_TUNER_MODE_MONO: | |
893 | case V4L2_TUNER_MODE_LANG1: | |
7b3c6d65 NS |
894 | set_audio_standard_NICAM(core, |
895 | EN_NICAM_FORCE_MONO1); | |
b1706b91 TS |
896 | break; |
897 | case V4L2_TUNER_MODE_LANG2: | |
7b3c6d65 NS |
898 | set_audio_standard_NICAM(core, |
899 | EN_NICAM_FORCE_MONO2); | |
b1706b91 TS |
900 | break; |
901 | case V4L2_TUNER_MODE_STEREO: | |
7b3c6d65 NS |
902 | set_audio_standard_NICAM(core, |
903 | EN_NICAM_FORCE_STEREO); | |
b1706b91 TS |
904 | break; |
905 | } | |
906 | } else { | |
7b3c6d65 | 907 | if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) { |
b1706b91 TS |
908 | /* fall back to fm / am mono */ |
909 | set_audio_standard_A2(core, EN_A2_FORCE_MONO1); | |
910 | } else { | |
911 | /* TODO: Add A2 autodection */ | |
912 | switch (mode) { | |
913 | case V4L2_TUNER_MODE_MONO: | |
914 | case V4L2_TUNER_MODE_LANG1: | |
7b3c6d65 NS |
915 | set_audio_standard_A2(core, |
916 | EN_A2_FORCE_MONO1); | |
b1706b91 TS |
917 | break; |
918 | case V4L2_TUNER_MODE_LANG2: | |
7b3c6d65 NS |
919 | set_audio_standard_A2(core, |
920 | EN_A2_FORCE_MONO2); | |
b1706b91 TS |
921 | break; |
922 | case V4L2_TUNER_MODE_STEREO: | |
7b3c6d65 NS |
923 | set_audio_standard_A2(core, |
924 | EN_A2_FORCE_STEREO); | |
b1706b91 TS |
925 | break; |
926 | } | |
927 | } | |
1da177e4 LT |
928 | } |
929 | break; | |
930 | case WW_FM: | |
931 | switch (mode) { | |
932 | case V4L2_TUNER_MODE_MONO: | |
7b3c6d65 | 933 | ctl = EN_FMRADIO_FORCE_MONO; |
1da177e4 LT |
934 | mask = 0x3f; |
935 | break; | |
936 | case V4L2_TUNER_MODE_STEREO: | |
7b3c6d65 | 937 | ctl = EN_FMRADIO_AUTO_STEREO; |
1da177e4 LT |
938 | mask = 0x3f; |
939 | break; | |
940 | } | |
941 | break; | |
942 | } | |
943 | ||
944 | if (UNSET != ctl) { | |
945 | dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x " | |
946 | "[status=0x%x,ctl=0x%x,vol=0x%x]\n", | |
947 | mask, ctl, cx_read(AUD_STATUS), | |
948 | cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL)); | |
949 | cx_andor(AUD_CTL, mask, ctl); | |
950 | } | |
951 | return; | |
952 | } | |
953 | ||
954 | int cx88_audio_thread(void *data) | |
955 | { | |
956 | struct cx88_core *core = data; | |
957 | struct v4l2_tuner t; | |
958 | u32 mode = 0; | |
959 | ||
960 | dprintk("cx88: tvaudio thread started\n"); | |
961 | for (;;) { | |
962 | msleep_interruptible(1000); | |
963 | if (kthread_should_stop()) | |
964 | break; | |
965 | ||
966 | /* just monitor the audio status for now ... */ | |
7b3c6d65 NS |
967 | memset(&t, 0, sizeof(t)); |
968 | cx88_get_stereo(core, &t); | |
1da177e4 LT |
969 | |
970 | if (UNSET != core->audiomode_manual) | |
971 | /* manually set, don't do anything. */ | |
972 | continue; | |
973 | ||
974 | /* monitor signal */ | |
975 | if (t.rxsubchans & V4L2_TUNER_SUB_STEREO) | |
976 | mode = V4L2_TUNER_MODE_STEREO; | |
977 | else | |
978 | mode = V4L2_TUNER_MODE_MONO; | |
979 | if (mode == core->audiomode_current) | |
980 | continue; | |
981 | ||
982 | /* automatically switch to best available mode */ | |
983 | cx88_set_stereo(core, mode, 0); | |
984 | } | |
985 | ||
986 | dprintk("cx88: tvaudio thread exiting\n"); | |
987 | return 0; | |
988 | } | |
989 | ||
990 | /* ----------------------------------------------------------- */ | |
991 | ||
992 | EXPORT_SYMBOL(cx88_set_tvaudio); | |
993 | EXPORT_SYMBOL(cx88_newstation); | |
994 | EXPORT_SYMBOL(cx88_set_stereo); | |
995 | EXPORT_SYMBOL(cx88_get_stereo); | |
996 | EXPORT_SYMBOL(cx88_audio_thread); | |
997 | ||
998 | /* | |
999 | * Local variables: | |
1000 | * c-basic-offset: 8 | |
1001 | * End: | |
b45009b0 | 1002 | * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off |
1da177e4 | 1003 | */ |