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dma-mapping: replace all DMA_32BIT_MASK macro with DMA_BIT_MASK(32)
[mirror_ubuntu-artful-kernel.git] / drivers / media / video / cx88 / cx88-video.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * device driver for Conexant 2388x based TV cards
4 * video4linux video interface
5 *
6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8d87cb9f
MCC		 8 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
9 * - Multituner support
10 * - video_ioctl2 conversion
11 * - PAL/M fixes
12 *
1da177e4
LT		 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/init.h>
29#include <linux/list.h>
30#include <linux/module.h>
1da177e4
LT		 31#include <linux/kmod.h>
32#include <linux/kernel.h>
33#include <linux/slab.h>
34#include <linux/interrupt.h>
c24228da 35#include <linux/dma-mapping.h>
1da177e4
LT		 36#include <linux/delay.h>
37#include <linux/kthread.h>
38#include <asm/div64.h>
39
40#include "cx88.h"
5e453dc7 41#include <media/v4l2-common.h>
35ea11ff 42#include <media/v4l2-ioctl.h>
1da177e4
LT		 43
44MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
45MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
46MODULE_LICENSE("GPL");
47
48/* ------------------------------------------------------------------ */
49
50static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
51static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
52static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
53
54module_param_array(video_nr, int, NULL, 0444);
55module_param_array(vbi_nr, int, NULL, 0444);
56module_param_array(radio_nr, int, NULL, 0444);
57
58MODULE_PARM_DESC(video_nr,"video device numbers");
59MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
60MODULE_PARM_DESC(radio_nr,"radio device numbers");
61
ff699e6b 62static unsigned int video_debug;
1da177e4
LT		 63module_param(video_debug,int,0644);
64MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
65
ff699e6b 66static unsigned int irq_debug;
1da177e4
LT		 67module_param(irq_debug,int,0644);
68MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
69
70static unsigned int vid_limit = 16;
71module_param(vid_limit,int,0644);
72MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
73
74#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 75 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4
LT		 76
77/* ------------------------------------------------------------------ */
78
79static LIST_HEAD(cx8800_devlist);
80
81/* ------------------------------------------------------------------- */
82/* static data */
83
1da177e4
LT		 84static struct cx8800_fmt formats[] = {
85 {
86 .name = "8 bpp, gray",
87 .fourcc = V4L2_PIX_FMT_GREY,
88 .cxformat = ColorFormatY8,
89 .depth = 8,
90 .flags = FORMAT_FLAGS_PACKED,
91 },{
92 .name = "15 bpp RGB, le",
93 .fourcc = V4L2_PIX_FMT_RGB555,
94 .cxformat = ColorFormatRGB15,
95 .depth = 16,
96 .flags = FORMAT_FLAGS_PACKED,
97 },{
98 .name = "15 bpp RGB, be",
99 .fourcc = V4L2_PIX_FMT_RGB555X,
100 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
101 .depth = 16,
102 .flags = FORMAT_FLAGS_PACKED,
103 },{
104 .name = "16 bpp RGB, le",
105 .fourcc = V4L2_PIX_FMT_RGB565,
106 .cxformat = ColorFormatRGB16,
107 .depth = 16,
108 .flags = FORMAT_FLAGS_PACKED,
109 },{
110 .name = "16 bpp RGB, be",
111 .fourcc = V4L2_PIX_FMT_RGB565X,
112 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
113 .depth = 16,
114 .flags = FORMAT_FLAGS_PACKED,
115 },{
116 .name = "24 bpp RGB, le",
117 .fourcc = V4L2_PIX_FMT_BGR24,
118 .cxformat = ColorFormatRGB24,
119 .depth = 24,
120 .flags = FORMAT_FLAGS_PACKED,
121 },{
122 .name = "32 bpp RGB, le",
123 .fourcc = V4L2_PIX_FMT_BGR32,
124 .cxformat = ColorFormatRGB32,
125 .depth = 32,
126 .flags = FORMAT_FLAGS_PACKED,
127 },{
128 .name = "32 bpp RGB, be",
129 .fourcc = V4L2_PIX_FMT_RGB32,
130 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
131 .depth = 32,
132 .flags = FORMAT_FLAGS_PACKED,
133 },{
134 .name = "4:2:2, packed, YUYV",
135 .fourcc = V4L2_PIX_FMT_YUYV,
136 .cxformat = ColorFormatYUY2,
137 .depth = 16,
138 .flags = FORMAT_FLAGS_PACKED,
139 },{
140 .name = "4:2:2, packed, UYVY",
141 .fourcc = V4L2_PIX_FMT_UYVY,
142 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
143 .depth = 16,
144 .flags = FORMAT_FLAGS_PACKED,
145 },
146};
147
148static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
149{
150 unsigned int i;
151
152 for (i = 0; i < ARRAY_SIZE(formats); i++)
153 if (formats[i].fourcc == fourcc)
154 return formats+i;
155 return NULL;
156}
157
158/* ------------------------------------------------------------------- */
159
160static const struct v4l2_queryctrl no_ctl = {
161 .name = "42",
162 .flags = V4L2_CTRL_FLAG_DISABLED,
163};
164
165static struct cx88_ctrl cx8800_ctls[] = {
166 /* --- video --- */
167 {
168 .v = {
169 .id = V4L2_CID_BRIGHTNESS,
170 .name = "Brightness",
171 .minimum = 0x00,
172 .maximum = 0xff,
173 .step = 1,
9f9c907f 174 .default_value = 0x7f,
1da177e4
LT		 175 .type = V4L2_CTRL_TYPE_INTEGER,
176 },
177 .off = 128,
178 .reg = MO_CONTR_BRIGHT,
179 .mask = 0x00ff,
180 .shift = 0,
181 },{
182 .v = {
183 .id = V4L2_CID_CONTRAST,
184 .name = "Contrast",
185 .minimum = 0,
186 .maximum = 0xff,
187 .step = 1,
70f00044 188 .default_value = 0x3f,
1da177e4
LT		 189 .type = V4L2_CTRL_TYPE_INTEGER,
190 },
41ef7c1e 191 .off = 0,
1da177e4
LT		 192 .reg = MO_CONTR_BRIGHT,
193 .mask = 0xff00,
194 .shift = 8,
195 },{
196 .v = {
197 .id = V4L2_CID_HUE,
198 .name = "Hue",
199 .minimum = 0,
200 .maximum = 0xff,
201 .step = 1,
9f9c907f 202 .default_value = 0x7f,
1da177e4
LT		 203 .type = V4L2_CTRL_TYPE_INTEGER,
204 },
9ac4c158 205 .off = 128,
1da177e4
LT		 206 .reg = MO_HUE,
207 .mask = 0x00ff,
208 .shift = 0,
209 },{
210 /* strictly, this only describes only U saturation.
211 * V saturation is handled specially through code.
212 */
213 .v = {
214 .id = V4L2_CID_SATURATION,
215 .name = "Saturation",
216 .minimum = 0,
217 .maximum = 0xff,
218 .step = 1,
70f00044 219 .default_value = 0x7f,
1da177e4
LT		 220 .type = V4L2_CTRL_TYPE_INTEGER,
221 },
222 .off = 0,
223 .reg = MO_UV_SATURATION,
224 .mask = 0x00ff,
225 .shift = 0,
226 },{
6d04203c
FD		 227 .v = {
228 .id = V4L2_CID_CHROMA_AGC,
229 .name = "Chroma AGC",
230 .minimum = 0,
231 .maximum = 1,
87a17389 232 .default_value = 0x1,
6d04203c
FD		 233 .type = V4L2_CTRL_TYPE_BOOLEAN,
234 },
235 .reg = MO_INPUT_FORMAT,
236 .mask = 1 << 10,
237 .shift = 10,
1b879c43
FD		 238 }, {
239 .v = {
240 .id = V4L2_CID_COLOR_KILLER,
241 .name = "Color killer",
242 .minimum = 0,
243 .maximum = 1,
0b5afdd2 244 .default_value = 0x1,
1b879c43
FD		 245 .type = V4L2_CTRL_TYPE_BOOLEAN,
246 },
247 .reg = MO_INPUT_FORMAT,
248 .mask = 1 << 9,
249 .shift = 9,
6d04203c 250 }, {
1da177e4
LT		 251 /* --- audio --- */
252 .v = {
253 .id = V4L2_CID_AUDIO_MUTE,
254 .name = "Mute",
255 .minimum = 0,
256 .maximum = 1,
70f00044 257 .default_value = 1,
1da177e4
LT		 258 .type = V4L2_CTRL_TYPE_BOOLEAN,
259 },
260 .reg = AUD_VOL_CTL,
261 .sreg = SHADOW_AUD_VOL_CTL,
262 .mask = (1 << 6),
263 .shift = 6,
264 },{
265 .v = {
266 .id = V4L2_CID_AUDIO_VOLUME,
267 .name = "Volume",
268 .minimum = 0,
269 .maximum = 0x3f,
270 .step = 1,
9f9c907f 271 .default_value = 0x3f,
1da177e4
LT		 272 .type = V4L2_CTRL_TYPE_INTEGER,
273 },
274 .reg = AUD_VOL_CTL,
275 .sreg = SHADOW_AUD_VOL_CTL,
276 .mask = 0x3f,
277 .shift = 0,
278 },{
279 .v = {
280 .id = V4L2_CID_AUDIO_BALANCE,
281 .name = "Balance",
282 .minimum = 0,
283 .maximum = 0x7f,
284 .step = 1,
285 .default_value = 0x40,
286 .type = V4L2_CTRL_TYPE_INTEGER,
287 },
288 .reg = AUD_BAL_CTL,
289 .sreg = SHADOW_AUD_BAL_CTL,
290 .mask = 0x7f,
291 .shift = 0,
292 }
293};
408b664a 294static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls);
1da177e4 295
2ba58894 296/* Must be sorted from low to high control ID! */
38a2713a
MK		 297const u32 cx88_user_ctrls[] = {
298 V4L2_CID_USER_CLASS,
299 V4L2_CID_BRIGHTNESS,
300 V4L2_CID_CONTRAST,
301 V4L2_CID_SATURATION,
302 V4L2_CID_HUE,
303 V4L2_CID_AUDIO_VOLUME,
304 V4L2_CID_AUDIO_BALANCE,
305 V4L2_CID_AUDIO_MUTE,
6d04203c 306 V4L2_CID_CHROMA_AGC,
1b879c43 307 V4L2_CID_COLOR_KILLER,
38a2713a
MK		 308 0
309};
310EXPORT_SYMBOL(cx88_user_ctrls);
311
312static const u32 *ctrl_classes[] = {
313 cx88_user_ctrls,
314 NULL
315};
316
6d04203c 317int cx8800_ctrl_query(struct cx88_core *core, struct v4l2_queryctrl *qctrl)
38a2713a
MK		 318{
319 int i;
320
321 if (qctrl->id < V4L2_CID_BASE ||
322 qctrl->id >= V4L2_CID_LASTP1)
323 return -EINVAL;
324 for (i = 0; i < CX8800_CTLS; i++)
325 if (cx8800_ctls[i].v.id == qctrl->id)
326 break;
327 if (i == CX8800_CTLS) {
328 *qctrl = no_ctl;
329 return 0;
330 }
331 *qctrl = cx8800_ctls[i].v;
6d04203c
FD		 332 /* Report chroma AGC as inactive when SECAM is selected */
333 if (cx8800_ctls[i].v.id == V4L2_CID_CHROMA_AGC &&
334 core->tvnorm & V4L2_STD_SECAM)
335 qctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
336
38a2713a
MK		 337 return 0;
338}
339EXPORT_SYMBOL(cx8800_ctrl_query);
340
1da177e4
LT		 341/* ------------------------------------------------------------------- */
342/* resource management */
343
344static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
345{
e52e98a7 346 struct cx88_core *core = dev->core;
1da177e4
LT		 347 if (fh->resources & bit)
348 /* have it already allocated */
349 return 1;
350
351 /* is it free? */
3593cab5 352 mutex_lock(&core->lock);
1da177e4
LT		 353 if (dev->resources & bit) {
354 /* no, someone else uses it */
3593cab5 355 mutex_unlock(&core->lock);
1da177e4
LT		 356 return 0;
357 }
358 /* it's free, grab it */
359 fh->resources |= bit;
360 dev->resources |= bit;
361 dprintk(1,"res: get %d\n",bit);
3593cab5 362 mutex_unlock(&core->lock);
1da177e4
LT		 363 return 1;
364}
365
366static
367int res_check(struct cx8800_fh *fh, unsigned int bit)
368{
369 return (fh->resources & bit);
370}
371
372static
373int res_locked(struct cx8800_dev *dev, unsigned int bit)
374{
375 return (dev->resources & bit);
376}
377
378static
379void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
380{
e52e98a7 381 struct cx88_core *core = dev->core;
ae24601b 382 BUG_ON((fh->resources & bits) != bits);
1da177e4 383
3593cab5 384 mutex_lock(&core->lock);
1da177e4
LT		 385 fh->resources &= ~bits;
386 dev->resources &= ~bits;
387 dprintk(1,"res: put %d\n",bits);
3593cab5 388 mutex_unlock(&core->lock);
1da177e4
LT		 389}
390
391/* ------------------------------------------------------------------ */
392
e90311a1 393int cx88_video_mux(struct cx88_core *core, unsigned int input)
1da177e4 394{
e52e98a7 395 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 396
397 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
6a59d64c
TP		 398 input, INPUT(input).vmux,
399 INPUT(input).gpio0,INPUT(input).gpio1,
400 INPUT(input).gpio2,INPUT(input).gpio3);
e52e98a7 401 core->input = input;
6a59d64c
TP		 402 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
403 cx_write(MO_GP3_IO, INPUT(input).gpio3);
404 cx_write(MO_GP0_IO, INPUT(input).gpio0);
405 cx_write(MO_GP1_IO, INPUT(input).gpio1);
406 cx_write(MO_GP2_IO, INPUT(input).gpio2);
1da177e4 407
6a59d64c 408 switch (INPUT(input).type) {
1da177e4
LT		 409 case CX88_VMUX_SVIDEO:
410 cx_set(MO_AFECFG_IO, 0x00000001);
411 cx_set(MO_INPUT_FORMAT, 0x00010010);
412 cx_set(MO_FILTER_EVEN, 0x00002020);
413 cx_set(MO_FILTER_ODD, 0x00002020);
414 break;
415 default:
416 cx_clear(MO_AFECFG_IO, 0x00000001);
417 cx_clear(MO_INPUT_FORMAT, 0x00010010);
418 cx_clear(MO_FILTER_EVEN, 0x00002020);
419 cx_clear(MO_FILTER_ODD, 0x00002020);
420 break;
421 }
f24546a9 422
66e6fbdf
RC		 423 /* if there are audioroutes defined, we have an external
424 ADC to deal with audio */
66e6fbdf 425 if (INPUT(input).audioroute) {
66e6fbdf
RC		 426 /* The wm8775 module has the "2" route hardwired into
427 the initialization. Some boards may use different
428 routes for different inputs. HVR-1300 surely does */
429 if (core->board.audio_chip &&
38f9d308 430 core->board.audio_chip == V4L2_IDENT_WM8775) {
5325b427
HV		 431 call_all(core, audio, s_routing,
432 INPUT(input).audioroute, 0, 0);
66e6fbdf 433 }
430189da
DB		 434 /* cx2388's C-ADC is connected to the tuner only.
435 When used with S-Video, that ADC is busy dealing with
436 chroma, so an external must be used for baseband audio */
437 if (INPUT(input).type != CX88_VMUX_TELEVISION ) {
438 /* "I2S ADC mode" */
439 core->tvaudio = WW_I2SADC;
440 cx88_set_tvaudio(core);
441 } else {
442 /* Normal mode */
443 cx_write(AUD_I2SCNTL, 0x0);
444 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
445 }
f24546a9 446 }
66e6fbdf 447
1da177e4
LT		 448 return 0;
449}
e90311a1 450EXPORT_SYMBOL(cx88_video_mux);
1da177e4
LT		 451
452/* ------------------------------------------------------------------ */
453
454static int start_video_dma(struct cx8800_dev *dev,
455 struct cx88_dmaqueue *q,
456 struct cx88_buffer *buf)
457{
458 struct cx88_core *core = dev->core;
459
460 /* setup fifo + format */
e52e98a7 461 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 462 buf->bpl, buf->risc.dma);
e52e98a7 463 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 464 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
465
466 /* reset counter */
467 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
468 q->count = 1;
469
470 /* enable irqs */
8ddac9ee 471 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
e52e98a7
MCC		 472
473 /* Enables corresponding bits at PCI_INT_STAT:
474 bits 0 to 4: video, audio, transport stream, VIP, Host
475 bit 7: timer
476 bits 8 and 9: DMA complete for: SRC, DST
477 bits 10 and 11: BERR signal asserted for RISC: RD, WR
478 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
479 */
1da177e4
LT		 480 cx_set(MO_VID_INTMSK, 0x0f0011);
481
482 /* enable capture */
483 cx_set(VID_CAPTURE_CONTROL,0x06);
484
485 /* start dma */
486 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 487 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 488
489 return 0;
490}
491
17bc98a4 492#ifdef CONFIG_PM
1da177e4
LT		 493static int stop_video_dma(struct cx8800_dev *dev)
494{
495 struct cx88_core *core = dev->core;
496
497 /* stop dma */
498 cx_clear(MO_VID_DMACNTRL, 0x11);
499
500 /* disable capture */
501 cx_clear(VID_CAPTURE_CONTROL,0x06);
502
503 /* disable irqs */
8ddac9ee 504 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
1da177e4
LT		 505 cx_clear(MO_VID_INTMSK, 0x0f0011);
506 return 0;
507}
17bc98a4 508#endif
1da177e4
LT		 509
510static int restart_video_queue(struct cx8800_dev *dev,
511 struct cx88_dmaqueue *q)
512{
e52e98a7 513 struct cx88_core *core = dev->core;
1da177e4 514 struct cx88_buffer *buf, *prev;
1da177e4
LT		 515
516 if (!list_empty(&q->active)) {
4ac97914 517 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 518 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
519 buf, buf->vb.i);
520 start_video_dma(dev, q, buf);
8bb629e2
TP		 521 list_for_each_entry(buf, &q->active, vb.queue)
522 buf->count = q->count++;
1da177e4
LT		 523 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
524 return 0;
525 }
526
527 prev = NULL;
528 for (;;) {
529 if (list_empty(&q->queued))
530 return 0;
4ac97914 531 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4 532 if (NULL == prev) {
179e0917 533 list_move_tail(&buf->vb.queue, &q->active);
1da177e4 534 start_video_dma(dev, q, buf);
0fc0686e 535 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 536 buf->count = q->count++;
537 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
538 dprintk(2,"[%p/%d] restart_queue - first active\n",
539 buf,buf->vb.i);
540
541 } else if (prev->vb.width == buf->vb.width &&
542 prev->vb.height == buf->vb.height &&
543 prev->fmt == buf->fmt) {
179e0917 544 list_move_tail(&buf->vb.queue, &q->active);
0fc0686e 545 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 546 buf->count = q->count++;
547 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
548 dprintk(2,"[%p/%d] restart_queue - move to active\n",
549 buf,buf->vb.i);
550 } else {
551 return 0;
552 }
553 prev = buf;
554 }
555}
556
557/* ------------------------------------------------------------------ */
558
559static int
560buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
561{
562 struct cx8800_fh *fh = q->priv_data;
563
564 *size = fh->fmt->depth*fh->width*fh->height >> 3;
565 if (0 == *count)
566 *count = 32;
567 while (*size * *count > vid_limit * 1024 * 1024)
568 (*count)--;
569 return 0;
570}
571
572static int
573buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
574 enum v4l2_field field)
575{
576 struct cx8800_fh *fh = q->priv_data;
577 struct cx8800_dev *dev = fh->dev;
e52e98a7 578 struct cx88_core *core = dev->core;
1da177e4 579 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
c1accaa2 580 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
1da177e4
LT		 581 int rc, init_buffer = 0;
582
583 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 584 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
585 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 586 return -EINVAL;
587 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
588 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
589 return -EINVAL;
590
591 if (buf->fmt != fh->fmt ||
592 buf->vb.width != fh->width ||
593 buf->vb.height != fh->height ||
594 buf->vb.field != field) {
595 buf->fmt = fh->fmt;
596 buf->vb.width = fh->width;
597 buf->vb.height = fh->height;
598 buf->vb.field = field;
599 init_buffer = 1;
600 }
601
0fc0686e 602 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
1da177e4 603 init_buffer = 1;
c7b0ac05 604 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
1da177e4
LT		 605 goto fail;
606 }
607
608 if (init_buffer) {
609 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
610 switch (buf->vb.field) {
611 case V4L2_FIELD_TOP:
612 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 613 dma->sglist, 0, UNSET,
1da177e4
LT		 614 buf->bpl, 0, buf->vb.height);
615 break;
616 case V4L2_FIELD_BOTTOM:
617 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 618 dma->sglist, UNSET, 0,
1da177e4
LT		 619 buf->bpl, 0, buf->vb.height);
620 break;
621 case V4L2_FIELD_INTERLACED:
622 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 623 dma->sglist, 0, buf->bpl,
1da177e4
LT		 624 buf->bpl, buf->bpl,
625 buf->vb.height >> 1);
626 break;
627 case V4L2_FIELD_SEQ_TB:
628 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 629 dma->sglist,
1da177e4
LT		 630 0, buf->bpl * (buf->vb.height >> 1),
631 buf->bpl, 0,
632 buf->vb.height >> 1);
633 break;
634 case V4L2_FIELD_SEQ_BT:
635 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 636 dma->sglist,
1da177e4
LT		 637 buf->bpl * (buf->vb.height >> 1), 0,
638 buf->bpl, 0,
639 buf->vb.height >> 1);
640 break;
641 default:
642 BUG();
643 }
644 }
645 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
646 buf, buf->vb.i,
647 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
648 (unsigned long)buf->risc.dma);
649
0fc0686e 650 buf->vb.state = VIDEOBUF_PREPARED;
1da177e4
LT		 651 return 0;
652
653 fail:
c7b0ac05 654 cx88_free_buffer(q,buf);
1da177e4
LT		 655 return rc;
656}
657
658static void
659buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
660{
661 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
662 struct cx88_buffer *prev;
663 struct cx8800_fh *fh = vq->priv_data;
664 struct cx8800_dev *dev = fh->dev;
e52e98a7 665 struct cx88_core *core = dev->core;
1da177e4
LT		 666 struct cx88_dmaqueue *q = &dev->vidq;
667
668 /* add jump to stopper */
669 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
670 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
671
672 if (!list_empty(&q->queued)) {
673 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 674 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 675 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
676 buf, buf->vb.i);
677
678 } else if (list_empty(&q->active)) {
679 list_add_tail(&buf->vb.queue,&q->active);
680 start_video_dma(dev, q, buf);
0fc0686e 681 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 682 buf->count = q->count++;
683 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
684 dprintk(2,"[%p/%d] buffer_queue - first active\n",
685 buf, buf->vb.i);
686
687 } else {
688 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
689 if (prev->vb.width == buf->vb.width &&
690 prev->vb.height == buf->vb.height &&
691 prev->fmt == buf->fmt) {
692 list_add_tail(&buf->vb.queue,&q->active);
0fc0686e 693 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 694 buf->count = q->count++;
695 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
696 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
697 buf, buf->vb.i);
698
699 } else {
700 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 701 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 702 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
703 buf, buf->vb.i);
704 }
705 }
706}
707
708static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
709{
710 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
1da177e4 711
c7b0ac05 712 cx88_free_buffer(q,buf);
1da177e4
LT		 713}
714
408b664a 715static struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 716 .buf_setup = buffer_setup,
717 .buf_prepare = buffer_prepare,
718 .buf_queue = buffer_queue,
719 .buf_release = buffer_release,
720};
721
722/* ------------------------------------------------------------------ */
723
1da177e4
LT		 724
725/* ------------------------------------------------------------------ */
726
727static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
728{
729 switch (fh->type) {
730 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
731 return &fh->vidq;
732 case V4L2_BUF_TYPE_VBI_CAPTURE:
733 return &fh->vbiq;
734 default:
735 BUG();
736 return NULL;
737 }
738}
739
740static int get_ressource(struct cx8800_fh *fh)
741{
742 switch (fh->type) {
743 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
744 return RESOURCE_VIDEO;
745 case V4L2_BUF_TYPE_VBI_CAPTURE:
746 return RESOURCE_VBI;
747 default:
748 BUG();
749 return 0;
750 }
751}
752
bec43661 753static int video_open(struct file *file)
1da177e4 754{
bec43661 755 int minor = video_devdata(file)->minor;
1da177e4 756 struct cx8800_dev *h,*dev = NULL;
e52e98a7 757 struct cx88_core *core;
1da177e4 758 struct cx8800_fh *fh;
1da177e4
LT		 759 enum v4l2_buf_type type = 0;
760 int radio = 0;
761
d56dc612 762 lock_kernel();
8bb629e2 763 list_for_each_entry(h, &cx8800_devlist, devlist) {
1da177e4
LT		 764 if (h->video_dev->minor == minor) {
765 dev = h;
766 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
767 }
768 if (h->vbi_dev->minor == minor) {
769 dev = h;
770 type = V4L2_BUF_TYPE_VBI_CAPTURE;
771 }
772 if (h->radio_dev &&
773 h->radio_dev->minor == minor) {
774 radio = 1;
775 dev = h;
776 }
777 }
d56dc612
HV		 778 if (NULL == dev) {
779 unlock_kernel();
1da177e4 780 return -ENODEV;
d56dc612 781 }
1da177e4 782
e52e98a7
MCC		 783 core = dev->core;
784
1da177e4
LT		 785 dprintk(1,"open minor=%d radio=%d type=%s\n",
786 minor,radio,v4l2_type_names[type]);
787
788 /* allocate + initialize per filehandle data */
7408187d 789 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
d56dc612
HV		 790 if (NULL == fh) {
791 unlock_kernel();
1da177e4 792 return -ENOMEM;
d56dc612 793 }
1da177e4
LT		 794 file->private_data = fh;
795 fh->dev = dev;
796 fh->radio = radio;
797 fh->type = type;
798 fh->width = 320;
799 fh->height = 240;
800 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
801
0705135e
GL		 802 videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
803 &dev->pci->dev, &dev->slock,
1da177e4
LT		 804 V4L2_BUF_TYPE_VIDEO_CAPTURE,
805 V4L2_FIELD_INTERLACED,
806 sizeof(struct cx88_buffer),
807 fh);
0705135e
GL		 808 videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
809 &dev->pci->dev, &dev->slock,
1da177e4
LT		 810 V4L2_BUF_TYPE_VBI_CAPTURE,
811 V4L2_FIELD_SEQ_TB,
812 sizeof(struct cx88_buffer),
813 fh);
814
815 if (fh->radio) {
1da177e4 816 dprintk(1,"video_open: setting radio device\n");
6a59d64c
TP		 817 cx_write(MO_GP3_IO, core->board.radio.gpio3);
818 cx_write(MO_GP0_IO, core->board.radio.gpio0);
819 cx_write(MO_GP1_IO, core->board.radio.gpio1);
820 cx_write(MO_GP2_IO, core->board.radio.gpio2);
430189da
DB		 821 if (core->board.radio.audioroute) {
822 if(core->board.audio_chip &&
823 core->board.audio_chip == V4L2_IDENT_WM8775) {
5325b427
HV		 824 call_all(core, audio, s_routing,
825 core->board.radio.audioroute, 0, 0);
430189da
DB		 826 }
827 /* "I2S ADC mode" */
828 core->tvaudio = WW_I2SADC;
829 cx88_set_tvaudio(core);
830 } else {
831 /* FM Mode */
832 core->tvaudio = WW_FM;
833 cx88_set_tvaudio(core);
834 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
835 }
b8341e1d 836 call_all(core, tuner, s_radio);
1da177e4 837 }
d56dc612 838 unlock_kernel();
1da177e4 839
3e010845
DB		 840 atomic_inc(&core->users);
841
4ac97914 842 return 0;
1da177e4
LT		 843}
844
845static ssize_t
f9e7a020 846video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 847{
848 struct cx8800_fh *fh = file->private_data;
849
850 switch (fh->type) {
851 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
852 if (res_locked(fh->dev,RESOURCE_VIDEO))
853 return -EBUSY;
854 return videobuf_read_one(&fh->vidq, data, count, ppos,
855 file->f_flags & O_NONBLOCK);
856 case V4L2_BUF_TYPE_VBI_CAPTURE:
857 if (!res_get(fh->dev,fh,RESOURCE_VBI))
858 return -EBUSY;
859 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
860 file->f_flags & O_NONBLOCK);
861 default:
862 BUG();
863 return 0;
864 }
865}
866
867static unsigned int
868video_poll(struct file *file, struct poll_table_struct *wait)
869{
870 struct cx8800_fh *fh = file->private_data;
871 struct cx88_buffer *buf;
872
873 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
874 if (!res_get(fh->dev,fh,RESOURCE_VBI))
875 return POLLERR;
876 return videobuf_poll_stream(file, &fh->vbiq, wait);
877 }
878
879 if (res_check(fh,RESOURCE_VIDEO)) {
880 /* streaming capture */
881 if (list_empty(&fh->vidq.stream))
882 return POLLERR;
883 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
884 } else {
885 /* read() capture */
886 buf = (struct cx88_buffer*)fh->vidq.read_buf;
887 if (NULL == buf)
888 return POLLERR;
889 }
890 poll_wait(file, &buf->vb.done, wait);
0fc0686e
BP		 891 if (buf->vb.state == VIDEOBUF_DONE ||
892 buf->vb.state == VIDEOBUF_ERROR)
1da177e4
LT		 893 return POLLIN|POLLRDNORM;
894 return 0;
895}
896
bec43661 897static int video_release(struct file *file)
1da177e4
LT		 898{
899 struct cx8800_fh *fh = file->private_data;
900 struct cx8800_dev *dev = fh->dev;
901
902 /* turn off overlay */
903 if (res_check(fh, RESOURCE_OVERLAY)) {
904 /* FIXME */
905 res_free(dev,fh,RESOURCE_OVERLAY);
906 }
907
908 /* stop video capture */
909 if (res_check(fh, RESOURCE_VIDEO)) {
910 videobuf_queue_cancel(&fh->vidq);
911 res_free(dev,fh,RESOURCE_VIDEO);
912 }
913 if (fh->vidq.read_buf) {
914 buffer_release(&fh->vidq,fh->vidq.read_buf);
915 kfree(fh->vidq.read_buf);
916 }
917
918 /* stop vbi capture */
919 if (res_check(fh, RESOURCE_VBI)) {
053fcb60 920 videobuf_stop(&fh->vbiq);
1da177e4
LT		 921 res_free(dev,fh,RESOURCE_VBI);
922 }
923
924 videobuf_mmap_free(&fh->vidq);
925 videobuf_mmap_free(&fh->vbiq);
926 file->private_data = NULL;
927 kfree(fh);
e52e98a7 928
3e010845 929 if(atomic_dec_and_test(&dev->core->users))
7c9fc9d5 930 call_all(dev->core, tuner, s_standby);
e52e98a7 931
1da177e4
LT		 932 return 0;
933}
934
935static int
936video_mmap(struct file *file, struct vm_area_struct * vma)
937{
938 struct cx8800_fh *fh = file->private_data;
939
940 return videobuf_mmap_mapper(get_queue(fh), vma);
941}
942
943/* ------------------------------------------------------------------ */
8d87cb9f 944/* VIDEO CTRL IOCTLS */
1da177e4 945
54da49f5 946int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 947{
8d87cb9f 948 struct cx88_ctrl *c = NULL;
1da177e4
LT		 949 u32 value;
950 int i;
951
952 for (i = 0; i < CX8800_CTLS; i++)
953 if (cx8800_ctls[i].v.id == ctl->id)
954 c = &cx8800_ctls[i];
8d87cb9f 955 if (unlikely(NULL == c))
1da177e4
LT		 956 return -EINVAL;
957
958 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
959 switch (ctl->id) {
960 case V4L2_CID_AUDIO_BALANCE:
9f9c907f
MR		 961 ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
962 : (0x7f - (value & 0x7f));
1da177e4
LT		 963 break;
964 case V4L2_CID_AUDIO_VOLUME:
965 ctl->value = 0x3f - (value & 0x3f);
966 break;
967 default:
968 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
969 break;
970 }
6457af5f
IP		 971 dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
972 ctl->id, c->v.name, ctl->value, c->reg,
973 value,c->mask, c->sreg ? " [shadowed]" : "");
1da177e4
LT		 974 return 0;
975}
54da49f5 976EXPORT_SYMBOL(cx88_get_control);
1da177e4 977
54da49f5 978int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 979{
1da177e4 980 struct cx88_ctrl *c = NULL;
70f00044 981 u32 value,mask;
1da177e4 982 int i;
8d87cb9f 983
70f00044
MCC		 984 for (i = 0; i < CX8800_CTLS; i++) {
985 if (cx8800_ctls[i].v.id == ctl->id) {
1da177e4 986 c = &cx8800_ctls[i];
70f00044
MCC		 987 }
988 }
8d87cb9f 989 if (unlikely(NULL == c))
1da177e4
LT		 990 return -EINVAL;
991
992 if (ctl->value < c->v.minimum)
e52e98a7 993 ctl->value = c->v.minimum;
1da177e4 994 if (ctl->value > c->v.maximum)
e52e98a7 995 ctl->value = c->v.maximum;
70f00044 996 mask=c->mask;
1da177e4
LT		 997 switch (ctl->id) {
998 case V4L2_CID_AUDIO_BALANCE:
9f9c907f 999 value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
1da177e4
LT		 1000 break;
1001 case V4L2_CID_AUDIO_VOLUME:
1002 value = 0x3f - (ctl->value & 0x3f);
1003 break;
1004 case V4L2_CID_SATURATION:
1005 /* special v_sat handling */
70f00044
MCC		 1006
1007 value = ((ctl->value - c->off) << c->shift) & c->mask;
1008
63ab1bdc 1009 if (core->tvnorm & V4L2_STD_SECAM) {
70f00044
MCC		 1010 /* For SECAM, both U and V sat should be equal */
1011 value=value<<8|value;
1012 } else {
1013 /* Keeps U Saturation proportional to V Sat */
1014 value=(value*0x5a)/0x7f<<8|value;
1015 }
1016 mask=0xffff;
1017 break;
6d04203c
FD		 1018 case V4L2_CID_CHROMA_AGC:
1019 /* Do not allow chroma AGC to be enabled for SECAM */
1020 value = ((ctl->value - c->off) << c->shift) & c->mask;
1021 if (core->tvnorm & V4L2_STD_SECAM && value)
1022 return -EINVAL;
1023 break;
1da177e4
LT		 1024 default:
1025 value = ((ctl->value - c->off) << c->shift) & c->mask;
1026 break;
1027 }
6457af5f
IP		 1028 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
1029 ctl->id, c->v.name, ctl->value, c->reg, value,
1030 mask, c->sreg ? " [shadowed]" : "");
1da177e4 1031 if (c->sreg) {
70f00044 1032 cx_sandor(c->sreg, c->reg, mask, value);
1da177e4 1033 } else {
70f00044 1034 cx_andor(c->reg, mask, value);
1da177e4
LT		 1035 }
1036 return 0;
1037}
54da49f5 1038EXPORT_SYMBOL(cx88_set_control);
1da177e4 1039
e52e98a7 1040static void init_controls(struct cx88_core *core)
1da177e4 1041{
70f00044
MCC		 1042 struct v4l2_control ctrl;
1043 int i;
1da177e4 1044
70f00044
MCC		 1045 for (i = 0; i < CX8800_CTLS; i++) {
1046 ctrl.id=cx8800_ctls[i].v.id;
9f9c907f 1047 ctrl.value=cx8800_ctls[i].v.default_value;
8d87cb9f 1048
54da49f5 1049 cx88_set_control(core, &ctrl);
70f00044 1050 }
1da177e4
LT		 1051}
1052
1053/* ------------------------------------------------------------------ */
8d87cb9f 1054/* VIDEO IOCTLS */
1da177e4 1055
78b526a4 1056static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1057 struct v4l2_format *f)
1da177e4 1058{
8d87cb9f
MCC		 1059 struct cx8800_fh *fh = priv;
1060
1061 f->fmt.pix.width = fh->width;
1062 f->fmt.pix.height = fh->height;
1063 f->fmt.pix.field = fh->vidq.field;
1064 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1065 f->fmt.pix.bytesperline =
1066 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1067 f->fmt.pix.sizeimage =
1068 f->fmt.pix.height * f->fmt.pix.bytesperline;
1069 return 0;
1da177e4
LT		 1070}
1071
78b526a4 1072static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1073 struct v4l2_format *f)
1da177e4 1074{
8d87cb9f
MCC		 1075 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1076 struct cx8800_fmt *fmt;
1077 enum v4l2_field field;
1078 unsigned int maxw, maxh;
e52e98a7 1079
8d87cb9f
MCC		 1080 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1081 if (NULL == fmt)
1082 return -EINVAL;
1da177e4 1083
8d87cb9f
MCC		 1084 field = f->fmt.pix.field;
1085 maxw = norm_maxw(core->tvnorm);
1086 maxh = norm_maxh(core->tvnorm);
1da177e4 1087
8d87cb9f
MCC		 1088 if (V4L2_FIELD_ANY == field) {
1089 field = (f->fmt.pix.height > maxh/2)
1090 ? V4L2_FIELD_INTERLACED
1091 : V4L2_FIELD_BOTTOM;
1da177e4 1092 }
8d87cb9f
MCC		 1093
1094 switch (field) {
1095 case V4L2_FIELD_TOP:
1096 case V4L2_FIELD_BOTTOM:
1097 maxh = maxh / 2;
1098 break;
1099 case V4L2_FIELD_INTERLACED:
1100 break;
1da177e4
LT		 1101 default:
1102 return -EINVAL;
1103 }
8d87cb9f
MCC		 1104
1105 f->fmt.pix.field = field;
1106 if (f->fmt.pix.height < 32)
1107 f->fmt.pix.height = 32;
1108 if (f->fmt.pix.height > maxh)
1109 f->fmt.pix.height = maxh;
1110 if (f->fmt.pix.width < 48)
1111 f->fmt.pix.width = 48;
1112 if (f->fmt.pix.width > maxw)
1113 f->fmt.pix.width = maxw;
1114 f->fmt.pix.width &= ~0x03;
1115 f->fmt.pix.bytesperline =
1116 (f->fmt.pix.width * fmt->depth) >> 3;
1117 f->fmt.pix.sizeimage =
1118 f->fmt.pix.height * f->fmt.pix.bytesperline;
1119
1120 return 0;
1da177e4
LT		 1121}
1122
78b526a4 1123static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1124 struct v4l2_format *f)
1da177e4 1125{
8d87cb9f 1126 struct cx8800_fh *fh = priv;
78b526a4 1127 int err = vidioc_try_fmt_vid_cap (file,priv,f);
8d87cb9f
MCC		 1128
1129 if (0 != err)
1130 return err;
1131 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1132 fh->width = f->fmt.pix.width;
1133 fh->height = f->fmt.pix.height;
1134 fh->vidq.field = f->fmt.pix.field;
1135 return 0;
1da177e4
LT		 1136}
1137
8d87cb9f
MCC		 1138static int vidioc_querycap (struct file *file, void *priv,
1139 struct v4l2_capability *cap)
1da177e4 1140{
8d87cb9f 1141 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4 1142 struct cx88_core *core = dev->core;
1da177e4 1143
8d87cb9f 1144 strcpy(cap->driver, "cx8800");
6a59d64c 1145 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1146 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1147 cap->version = CX88_VERSION_CODE;
1148 cap->capabilities =
1149 V4L2_CAP_VIDEO_CAPTURE |
1150 V4L2_CAP_READWRITE |
1151 V4L2_CAP_STREAMING |
1152 V4L2_CAP_VBI_CAPTURE;
6a59d64c 1153 if (UNSET != core->board.tuner_type)
8d87cb9f
MCC		 1154 cap->capabilities |= V4L2_CAP_TUNER;
1155 return 0;
1156}
e52e98a7 1157
78b526a4 1158static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
8d87cb9f
MCC		 1159 struct v4l2_fmtdesc *f)
1160{
1161 if (unlikely(f->index >= ARRAY_SIZE(formats)))
1162 return -EINVAL;
1163
1164 strlcpy(f->description,formats[f->index].name,sizeof(f->description));
1165 f->pixelformat = formats[f->index].fourcc;
1166
1167 return 0;
1168}
1da177e4 1169
0dfa9abd 1170#ifdef CONFIG_VIDEO_V4L1_COMPAT
8d87cb9f
MCC		 1171static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf)
1172{
c1accaa2 1173 struct cx8800_fh *fh = priv;
8d87cb9f 1174
c1accaa2 1175 return videobuf_cgmbuf (get_queue(fh), mbuf, 8);
8d87cb9f 1176}
79436633 1177#endif
e52e98a7 1178
8d87cb9f
MCC		 1179static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
1180{
1181 struct cx8800_fh *fh = priv;
1182 return (videobuf_reqbufs(get_queue(fh), p));
1183}
e52e98a7 1184
8d87cb9f
MCC		 1185static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
1186{
1187 struct cx8800_fh *fh = priv;
1188 return (videobuf_querybuf(get_queue(fh), p));
1189}
e52e98a7 1190
8d87cb9f
MCC		 1191static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1192{
1193 struct cx8800_fh *fh = priv;
1194 return (videobuf_qbuf(get_queue(fh), p));
1195}
e52e98a7 1196
8d87cb9f
MCC		 1197static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1198{
1199 struct cx8800_fh *fh = priv;
1200 return (videobuf_dqbuf(get_queue(fh), p,
1201 file->f_flags & O_NONBLOCK));
1202}
e52e98a7 1203
8d87cb9f
MCC		 1204static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
1205{
1206 struct cx8800_fh *fh = priv;
1207 struct cx8800_dev *dev = fh->dev;
1208
b058e3f3
RD		 1209 /* We should remember that this driver also supports teletext, */
1210 /* so we have to test if the v4l2_buf_type is VBI capture data. */
1211 if (unlikely((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1212 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE)))
8d87cb9f 1213 return -EINVAL;
b058e3f3 1214
8d87cb9f
MCC		 1215 if (unlikely(i != fh->type))
1216 return -EINVAL;
1217
1218 if (unlikely(!res_get(dev,fh,get_ressource(fh))))
1219 return -EBUSY;
1220 return videobuf_streamon(get_queue(fh));
1221}
1222
1223static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
1224{
1225 struct cx8800_fh *fh = priv;
1226 struct cx8800_dev *dev = fh->dev;
1227 int err, res;
1228
b058e3f3
RD		 1229 if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1230 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
8d87cb9f 1231 return -EINVAL;
b058e3f3 1232
8d87cb9f
MCC		 1233 if (i != fh->type)
1234 return -EINVAL;
1235
1236 res = get_ressource(fh);
1237 err = videobuf_streamoff(get_queue(fh));
1238 if (err < 0)
1239 return err;
1240 res_free(dev,fh,res);
e52e98a7
MCC		 1241 return 0;
1242}
1243
63ab1bdc 1244static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
e52e98a7 1245{
8d87cb9f 1246 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
e52e98a7 1247
8d87cb9f 1248 mutex_lock(&core->lock);
63ab1bdc 1249 cx88_set_tvnorm(core,*tvnorms);
8d87cb9f 1250 mutex_unlock(&core->lock);
63ab1bdc 1251
8d87cb9f
MCC		 1252 return 0;
1253}
1da177e4 1254
8d87cb9f 1255/* only one input in this sample driver */
54da49f5 1256int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
8d87cb9f 1257{
8d87cb9f
MCC		 1258 static const char *iname[] = {
1259 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1260 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1261 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1262 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1263 [ CX88_VMUX_SVIDEO ] = "S-Video",
1264 [ CX88_VMUX_TELEVISION ] = "Television",
1265 [ CX88_VMUX_CABLE ] = "Cable TV",
1266 [ CX88_VMUX_DVB ] = "DVB",
1267 [ CX88_VMUX_DEBUG ] = "for debug only",
1268 };
f3334bcb 1269 unsigned int n = i->index;
1da177e4 1270
8d87cb9f
MCC		 1271 if (n >= 4)
1272 return -EINVAL;
6a59d64c 1273 if (0 == INPUT(n).type)
8d87cb9f 1274 return -EINVAL;
8d87cb9f 1275 i->type = V4L2_INPUT_TYPE_CAMERA;
6a59d64c
TP		 1276 strcpy(i->name,iname[INPUT(n).type]);
1277 if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
1278 (CX88_VMUX_CABLE == INPUT(n).type))
8d87cb9f 1279 i->type = V4L2_INPUT_TYPE_TUNER;
63ab1bdc 1280 i->std = CX88_NORMS;
8d87cb9f
MCC		 1281 return 0;
1282}
54da49f5
MCC		 1283EXPORT_SYMBOL(cx88_enum_input);
1284
1285static int vidioc_enum_input (struct file *file, void *priv,
1286 struct v4l2_input *i)
1287{
1288 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1289 return cx88_enum_input (core,i);
1290}
1da177e4 1291
8d87cb9f
MCC		 1292static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
1293{
1294 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1295
8d87cb9f
MCC		 1296 *i = core->input;
1297 return 0;
1298}
1da177e4 1299
8d87cb9f
MCC		 1300static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
1301{
1302 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1303
8d87cb9f
MCC		 1304 if (i >= 4)
1305 return -EINVAL;
1da177e4 1306
8d87cb9f
MCC		 1307 mutex_lock(&core->lock);
1308 cx88_newstation(core);
e90311a1 1309 cx88_video_mux(core,i);
8d87cb9f
MCC		 1310 mutex_unlock(&core->lock);
1311 return 0;
1312}
1da177e4 1313
1da177e4 1314
1da177e4 1315
8d87cb9f
MCC		 1316static int vidioc_queryctrl (struct file *file, void *priv,
1317 struct v4l2_queryctrl *qctrl)
1318{
6d04203c
FD		 1319 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1320
8d87cb9f
MCC		 1321 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
1322 if (unlikely(qctrl->id == 0))
1323 return -EINVAL;
6d04203c 1324 return cx8800_ctrl_query(core, qctrl);
8d87cb9f 1325}
1da177e4 1326
54da49f5 1327static int vidioc_g_ctrl (struct file *file, void *priv,
8d87cb9f
MCC		 1328 struct v4l2_control *ctl)
1329{
1330 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
54da49f5
MCC		 1331 return
1332 cx88_get_control(core,ctl);
1333}
1da177e4 1334
54da49f5
MCC		 1335static int vidioc_s_ctrl (struct file *file, void *priv,
1336 struct v4l2_control *ctl)
1337{
1338 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
8d87cb9f 1339 return
54da49f5 1340 cx88_set_control(core,ctl);
8d87cb9f
MCC		 1341}
1342
1343static int vidioc_g_tuner (struct file *file, void *priv,
1344 struct v4l2_tuner *t)
1345{
1346 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1347 u32 reg;
1da177e4 1348
6a59d64c 1349 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f 1350 return -EINVAL;
243d8c0f
MCC		 1351 if (0 != t->index)
1352 return -EINVAL;
a82decf6 1353
8d87cb9f
MCC		 1354 strcpy(t->name, "Television");
1355 t->type = V4L2_TUNER_ANALOG_TV;
1356 t->capability = V4L2_TUNER_CAP_NORM;
1357 t->rangehigh = 0xffffffffUL;
a82decf6 1358
8d87cb9f
MCC		 1359 cx88_get_stereo(core ,t);
1360 reg = cx_read(MO_DEVICE_STATUS);
1361 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1362 return 0;
1363}
41ef7c1e 1364
8d87cb9f
MCC		 1365static int vidioc_s_tuner (struct file *file, void *priv,
1366 struct v4l2_tuner *t)
1367{
1368 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
41ef7c1e 1369
6a59d64c 1370 if (UNSET == core->board.tuner_type)
8d87cb9f
MCC		 1371 return -EINVAL;
1372 if (0 != t->index)
1373 return -EINVAL;
c5287ba1 1374
8d87cb9f
MCC		 1375 cx88_set_stereo(core, t->audmode, 1);
1376 return 0;
1377}
902fc997 1378
8d87cb9f
MCC		 1379static int vidioc_g_frequency (struct file *file, void *priv,
1380 struct v4l2_frequency *f)
1381{
1382 struct cx8800_fh *fh = priv;
1383 struct cx88_core *core = fh->dev->core;
902fc997 1384
6a59d64c 1385 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1386 return -EINVAL;
1387
1388 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1389 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1390 f->frequency = core->freq;
1391
b8341e1d 1392 call_all(core, tuner, g_frequency, f);
1da177e4 1393
1da177e4
LT		 1394 return 0;
1395}
1396
54da49f5 1397int cx88_set_freq (struct cx88_core *core,
8d87cb9f 1398 struct v4l2_frequency *f)
1da177e4 1399{
6a59d64c 1400 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1401 return -EINVAL;
1402 if (unlikely(f->tuner != 0))
1403 return -EINVAL;
54da49f5 1404
8d87cb9f
MCC		 1405 mutex_lock(&core->lock);
1406 core->freq = f->frequency;
1407 cx88_newstation(core);
b8341e1d 1408 call_all(core, tuner, s_frequency, f);
c7b0ac05 1409
8d87cb9f
MCC		 1410 /* When changing channels it is required to reset TVAUDIO */
1411 msleep (10);
1412 cx88_set_tvaudio(core);
c7b0ac05 1413
8d87cb9f 1414 mutex_unlock(&core->lock);
54da49f5 1415
8d87cb9f 1416 return 0;
1da177e4 1417}
54da49f5
MCC		 1418EXPORT_SYMBOL(cx88_set_freq);
1419
1420static int vidioc_s_frequency (struct file *file, void *priv,
1421 struct v4l2_frequency *f)
1422{
1423 struct cx8800_fh *fh = priv;
1424 struct cx88_core *core = fh->dev->core;
1425
1426 if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
1427 return -EINVAL;
1428 if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
1429 return -EINVAL;
1430
1431 return
1432 cx88_set_freq (core,f);
1433}
1da177e4 1434
dbbff48f
TP		 1435#ifdef CONFIG_VIDEO_ADV_DEBUG
1436static int vidioc_g_register (struct file *file, void *fh,
aecde8b5 1437 struct v4l2_dbg_register *reg)
dbbff48f
TP		 1438{
1439 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1440
aecde8b5 1441 if (!v4l2_chip_match_host(&reg->match))
dbbff48f
TP		 1442 return -EINVAL;
1443 /* cx2388x has a 24-bit register space */
aecde8b5
HV		 1444 reg->val = cx_read(reg->reg & 0xffffff);
1445 reg->size = 4;
dbbff48f
TP		 1446 return 0;
1447}
1448
1449static int vidioc_s_register (struct file *file, void *fh,
aecde8b5 1450 struct v4l2_dbg_register *reg)
dbbff48f
TP		 1451{
1452 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1453
aecde8b5 1454 if (!v4l2_chip_match_host(&reg->match))
dbbff48f 1455 return -EINVAL;
aecde8b5 1456 cx_write(reg->reg & 0xffffff, reg->val);
dbbff48f
TP		 1457 return 0;
1458}
1459#endif
8d87cb9f
MCC		 1460
1461/* ----------------------------------------------------------- */
1462/* RADIO ESPECIFIC IOCTLS */
1da177e4
LT		 1463/* ----------------------------------------------------------- */
1464
8d87cb9f
MCC		 1465static int radio_querycap (struct file *file, void *priv,
1466 struct v4l2_capability *cap)
1da177e4 1467{
8d87cb9f 1468 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4
LT		 1469 struct cx88_core *core = dev->core;
1470
8d87cb9f 1471 strcpy(cap->driver, "cx8800");
6a59d64c 1472 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1473 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1474 cap->version = CX88_VERSION_CODE;
1475 cap->capabilities = V4L2_CAP_TUNER;
1476 return 0;
1477}
1da177e4 1478
8d87cb9f
MCC		 1479static int radio_g_tuner (struct file *file, void *priv,
1480 struct v4l2_tuner *t)
1481{
1482 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1483
8d87cb9f
MCC		 1484 if (unlikely(t->index > 0))
1485 return -EINVAL;
1da177e4 1486
8d87cb9f
MCC		 1487 strcpy(t->name, "Radio");
1488 t->type = V4L2_TUNER_RADIO;
1da177e4 1489
b8341e1d 1490 call_all(core, tuner, g_tuner, t);
8d87cb9f
MCC		 1491 return 0;
1492}
1da177e4 1493
8d87cb9f
MCC		 1494static int radio_enum_input (struct file *file, void *priv,
1495 struct v4l2_input *i)
1496{
1497 if (i->index != 0)
1498 return -EINVAL;
1499 strcpy(i->name,"Radio");
1500 i->type = V4L2_INPUT_TYPE_TUNER;
a82decf6 1501
8d87cb9f
MCC		 1502 return 0;
1503}
a82decf6 1504
8d87cb9f
MCC		 1505static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a)
1506{
1507 if (unlikely(a->index))
1508 return -EINVAL;
a82decf6 1509
8d87cb9f
MCC		 1510 strcpy(a->name,"Radio");
1511 return 0;
1512}
a82decf6 1513
8d87cb9f 1514/* FIXME: Should add a standard for radio */
a82decf6 1515
8d87cb9f
MCC		 1516static int radio_s_tuner (struct file *file, void *priv,
1517 struct v4l2_tuner *t)
1518{
1519 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
a82decf6 1520
8d87cb9f
MCC		 1521 if (0 != t->index)
1522 return -EINVAL;
1da177e4 1523
b8341e1d 1524 call_all(core, tuner, s_tuner, t);
1da177e4 1525
8d87cb9f
MCC		 1526 return 0;
1527}
1da177e4 1528
8d87cb9f
MCC		 1529static int radio_s_audio (struct file *file, void *fh,
1530 struct v4l2_audio *a)
1531{
1532 return 0;
1533}
1da177e4 1534
8d87cb9f
MCC		 1535static int radio_s_input (struct file *file, void *fh, unsigned int i)
1536{
1da177e4 1537 return 0;
8d87cb9f 1538}
1da177e4 1539
8d87cb9f
MCC		 1540static int radio_queryctrl (struct file *file, void *priv,
1541 struct v4l2_queryctrl *c)
1da177e4 1542{
8d87cb9f
MCC		 1543 int i;
1544
1545 if (c->id < V4L2_CID_BASE ||
1546 c->id >= V4L2_CID_LASTP1)
1547 return -EINVAL;
1548 if (c->id == V4L2_CID_AUDIO_MUTE) {
1549 for (i = 0; i < CX8800_CTLS; i++)
1550 if (cx8800_ctls[i].v.id == c->id)
1551 break;
1552 *c = cx8800_ctls[i].v;
1553 } else
1554 *c = no_ctl;
1555 return 0;
1556}
1da177e4
LT		 1557
1558/* ----------------------------------------------------------- */
1559
1560static void cx8800_vid_timeout(unsigned long data)
1561{
1562 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1563 struct cx88_core *core = dev->core;
1564 struct cx88_dmaqueue *q = &dev->vidq;
1565 struct cx88_buffer *buf;
1566 unsigned long flags;
1567
e52e98a7 1568 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1569
1570 cx_clear(MO_VID_DMACNTRL, 0x11);
1571 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1572
1573 spin_lock_irqsave(&dev->slock,flags);
1574 while (!list_empty(&q->active)) {
1575 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1576 list_del(&buf->vb.queue);
0fc0686e 1577 buf->vb.state = VIDEOBUF_ERROR;
1da177e4
LT		 1578 wake_up(&buf->vb.done);
1579 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1580 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1581 }
1582 restart_video_queue(dev,q);
1583 spin_unlock_irqrestore(&dev->slock,flags);
1584}
1585
41ef7c1e
MCC		 1586static char *cx88_vid_irqs[32] = {
1587 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1588 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1589 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1590 "y_sync", "u_sync", "v_sync", "vbi_sync",
1591 "opc_err", "par_err", "rip_err", "pci_abort",
1592};
1593
1da177e4
LT		 1594static void cx8800_vid_irq(struct cx8800_dev *dev)
1595{
1596 struct cx88_core *core = dev->core;
1597 u32 status, mask, count;
1598
1599 status = cx_read(MO_VID_INTSTAT);
1600 mask = cx_read(MO_VID_INTMSK);
1601 if (0 == (status & mask))
1602 return;
1603 cx_write(MO_VID_INTSTAT, status);
1604 if (irq_debug || (status & mask & ~0xff))
1605 cx88_print_irqbits(core->name, "irq vid",
66623a04
MCC		 1606 cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1607 status, mask);
1da177e4
LT		 1608
1609 /* risc op code error */
1610 if (status & (1 << 16)) {
1611 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1612 cx_clear(MO_VID_DMACNTRL, 0x11);
1613 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1614 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1615 }
1616
1617 /* risc1 y */
1618 if (status & 0x01) {
1619 spin_lock(&dev->slock);
1620 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1621 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1622 spin_unlock(&dev->slock);
1623 }
1624
1625 /* risc1 vbi */
1626 if (status & 0x08) {
1627 spin_lock(&dev->slock);
1628 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1629 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1630 spin_unlock(&dev->slock);
1631 }
1632
1633 /* risc2 y */
1634 if (status & 0x10) {
1635 dprintk(2,"stopper video\n");
1636 spin_lock(&dev->slock);
1637 restart_video_queue(dev,&dev->vidq);
1638 spin_unlock(&dev->slock);
1639 }
1640
1641 /* risc2 vbi */
1642 if (status & 0x80) {
1643 dprintk(2,"stopper vbi\n");
1644 spin_lock(&dev->slock);
1645 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1646 spin_unlock(&dev->slock);
1647 }
1648}
1649
7d12e780 1650static irqreturn_t cx8800_irq(int irq, void *dev_id)
1da177e4
LT		 1651{
1652 struct cx8800_dev *dev = dev_id;
1653 struct cx88_core *core = dev->core;
1654 u32 status;
1655 int loop, handled = 0;
1656
1657 for (loop = 0; loop < 10; loop++) {
8ddac9ee
TP		 1658 status = cx_read(MO_PCI_INTSTAT) &
1659 (core->pci_irqmask | PCI_INT_VIDINT);
1da177e4
LT		 1660 if (0 == status)
1661 goto out;
1662 cx_write(MO_PCI_INTSTAT, status);
1663 handled = 1;
1664
1665 if (status & core->pci_irqmask)
1666 cx88_core_irq(core,status);
8ddac9ee 1667 if (status & PCI_INT_VIDINT)
1da177e4
LT		 1668 cx8800_vid_irq(dev);
1669 };
1670 if (10 == loop) {
1671 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1672 core->name);
1673 cx_write(MO_PCI_INTMSK,0);
1674 }
1675
1676 out:
1677 return IRQ_RETVAL(handled);
1678}
1679
1680/* ----------------------------------------------------------- */
1681/* exported stuff */
1682
bec43661 1683static const struct v4l2_file_operations video_fops =
1da177e4
LT		 1684{
1685 .owner = THIS_MODULE,
1686 .open = video_open,
1687 .release = video_release,
1688 .read = video_read,
1689 .poll = video_poll,
1690 .mmap = video_mmap,
8d87cb9f 1691 .ioctl = video_ioctl2,
1da177e4
LT		 1692};
1693
a399810c 1694static const struct v4l2_ioctl_ops video_ioctl_ops = {
8d87cb9f 1695 .vidioc_querycap = vidioc_querycap,
78b526a4
HV		 1696 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1697 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1698 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1699 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1700 .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
1701 .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
1702 .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
8d87cb9f
MCC		 1703 .vidioc_reqbufs = vidioc_reqbufs,
1704 .vidioc_querybuf = vidioc_querybuf,
1705 .vidioc_qbuf = vidioc_qbuf,
1706 .vidioc_dqbuf = vidioc_dqbuf,
1707 .vidioc_s_std = vidioc_s_std,
1708 .vidioc_enum_input = vidioc_enum_input,
1709 .vidioc_g_input = vidioc_g_input,
1710 .vidioc_s_input = vidioc_s_input,
1711 .vidioc_queryctrl = vidioc_queryctrl,
1712 .vidioc_g_ctrl = vidioc_g_ctrl,
1713 .vidioc_s_ctrl = vidioc_s_ctrl,
1714 .vidioc_streamon = vidioc_streamon,
1715 .vidioc_streamoff = vidioc_streamoff,
1716#ifdef CONFIG_VIDEO_V4L1_COMPAT
1717 .vidiocgmbuf = vidiocgmbuf,
1718#endif
1719 .vidioc_g_tuner = vidioc_g_tuner,
1720 .vidioc_s_tuner = vidioc_s_tuner,
1721 .vidioc_g_frequency = vidioc_g_frequency,
1722 .vidioc_s_frequency = vidioc_s_frequency,
dbbff48f
TP		 1723#ifdef CONFIG_VIDEO_ADV_DEBUG
1724 .vidioc_g_register = vidioc_g_register,
1725 .vidioc_s_register = vidioc_s_register,
1726#endif
a399810c
HV		 1727};
1728
1729static struct video_device cx8800_vbi_template;
1730
1731static struct video_device cx8800_video_template = {
1732 .name = "cx8800-video",
a399810c
HV		 1733 .fops = &video_fops,
1734 .minor = -1,
1735 .ioctl_ops = &video_ioctl_ops,
63ab1bdc 1736 .tvnorms = CX88_NORMS,
dbbff48f 1737 .current_norm = V4L2_STD_NTSC_M,
1da177e4
LT		 1738};
1739
bec43661 1740static const struct v4l2_file_operations radio_fops =
1da177e4
LT		 1741{
1742 .owner = THIS_MODULE,
1743 .open = video_open,
1744 .release = video_release,
8d87cb9f 1745 .ioctl = video_ioctl2,
1da177e4
LT		 1746};
1747
a399810c 1748static const struct v4l2_ioctl_ops radio_ioctl_ops = {
8d87cb9f
MCC		 1749 .vidioc_querycap = radio_querycap,
1750 .vidioc_g_tuner = radio_g_tuner,
1751 .vidioc_enum_input = radio_enum_input,
1752 .vidioc_g_audio = radio_g_audio,
1753 .vidioc_s_tuner = radio_s_tuner,
1754 .vidioc_s_audio = radio_s_audio,
1755 .vidioc_s_input = radio_s_input,
1756 .vidioc_queryctrl = radio_queryctrl,
1757 .vidioc_g_ctrl = vidioc_g_ctrl,
1758 .vidioc_s_ctrl = vidioc_s_ctrl,
1759 .vidioc_g_frequency = vidioc_g_frequency,
1760 .vidioc_s_frequency = vidioc_s_frequency,
a75d2048
TP		 1761#ifdef CONFIG_VIDEO_ADV_DEBUG
1762 .vidioc_g_register = vidioc_g_register,
1763 .vidioc_s_register = vidioc_s_register,
1764#endif
1da177e4
LT		 1765};
1766
a399810c
HV		 1767static struct video_device cx8800_radio_template = {
1768 .name = "cx8800-radio",
a399810c
HV		 1769 .fops = &radio_fops,
1770 .minor = -1,
1771 .ioctl_ops = &radio_ioctl_ops,
1772};
1773
1da177e4
LT		 1774/* ----------------------------------------------------------- */
1775
1776static void cx8800_unregister_video(struct cx8800_dev *dev)
1777{
1778 if (dev->radio_dev) {
1779 if (-1 != dev->radio_dev->minor)
1780 video_unregister_device(dev->radio_dev);
1781 else
1782 video_device_release(dev->radio_dev);
1783 dev->radio_dev = NULL;
1784 }
1785 if (dev->vbi_dev) {
1786 if (-1 != dev->vbi_dev->minor)
1787 video_unregister_device(dev->vbi_dev);
1788 else
1789 video_device_release(dev->vbi_dev);
1790 dev->vbi_dev = NULL;
1791 }
1792 if (dev->video_dev) {
1793 if (-1 != dev->video_dev->minor)
1794 video_unregister_device(dev->video_dev);
1795 else
1796 video_device_release(dev->video_dev);
1797 dev->video_dev = NULL;
1798 }
1799}
1800
1801static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1802 const struct pci_device_id *pci_id)
1803{
1804 struct cx8800_dev *dev;
1805 struct cx88_core *core;
8d87cb9f 1806
1da177e4
LT		 1807 int err;
1808
7408187d 1809 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1da177e4
LT		 1810 if (NULL == dev)
1811 return -ENOMEM;
1da177e4
LT		 1812
1813 /* pci init */
1814 dev->pci = pci_dev;
1815 if (pci_enable_device(pci_dev)) {
1816 err = -EIO;
1817 goto fail_free;
1818 }
1819 core = cx88_core_get(dev->pci);
1820 if (NULL == core) {
1821 err = -EINVAL;
1822 goto fail_free;
1823 }
1824 dev->core = core;
1825
1826 /* print pci info */
1827 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
4ac97914
MCC		 1828 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1829 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
228aef63 1830 "latency: %d, mmio: 0x%llx\n", core->name,
1da177e4 1831 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
228aef63 1832 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1da177e4
LT		 1833
1834 pci_set_master(pci_dev);
284901a9 1835 if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) {
1da177e4
LT		 1836 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1837 err = -EIO;
1838 goto fail_core;
1839 }
1840
8d87cb9f
MCC		 1841 /* Initialize VBI template */
1842 memcpy( &cx8800_vbi_template, &cx8800_video_template,
1843 sizeof(cx8800_vbi_template) );
1844 strcpy(cx8800_vbi_template.name,"cx8800-vbi");
8d87cb9f 1845
1da177e4 1846 /* initialize driver struct */
1da177e4 1847 spin_lock_init(&dev->slock);
63ab1bdc 1848 core->tvnorm = cx8800_video_template.current_norm;
1da177e4
LT		 1849
1850 /* init video dma queues */
1851 INIT_LIST_HEAD(&dev->vidq.active);
1852 INIT_LIST_HEAD(&dev->vidq.queued);
1853 dev->vidq.timeout.function = cx8800_vid_timeout;
1854 dev->vidq.timeout.data = (unsigned long)dev;
1855 init_timer(&dev->vidq.timeout);
1856 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1857 MO_VID_DMACNTRL,0x11,0x00);
1858
1859 /* init vbi dma queues */
1860 INIT_LIST_HEAD(&dev->vbiq.active);
1861 INIT_LIST_HEAD(&dev->vbiq.queued);
1862 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1863 dev->vbiq.timeout.data = (unsigned long)dev;
1864 init_timer(&dev->vbiq.timeout);
1865 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1866 MO_VID_DMACNTRL,0x88,0x00);
1867
1868 /* get irq */
1869 err = request_irq(pci_dev->irq, cx8800_irq,
8076fe32 1870 IRQF_SHARED | IRQF_DISABLED, core->name, dev);
1da177e4 1871 if (err < 0) {
5772f813 1872 printk(KERN_ERR "%s/0: can't get IRQ %d\n",
1da177e4
LT		 1873 core->name,pci_dev->irq);
1874 goto fail_core;
1875 }
1876 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1877
1878 /* load and configure helper modules */
e52e98a7 1879
38f9d308 1880 if (core->board.audio_chip == V4L2_IDENT_WM8775)
e6574f2f 1881 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
b8341e1d
HV		 1882 "wm8775", "wm8775", 0x36 >> 1);
1883
1884 if (core->board.audio_chip == V4L2_IDENT_TVAUDIO) {
1885 /* This probes for a tda9874 as is used on some
1886 Pixelview Ultra boards. */
1792f68b
HV		 1887 v4l2_i2c_new_probed_subdev_addr(&core->v4l2_dev,
1888 &core->i2c_adap,
1889 "tvaudio", "tvaudio", 0xb0 >> 1);
b8341e1d 1890 }
3057906d 1891
6fcecce7
MK		 1892 switch (core->boardnr) {
1893 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
b8341e1d
HV		 1894 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
1895 static struct i2c_board_info rtc_info = {
1896 I2C_BOARD_INFO("isl1208", 0x6f)
1897 };
1898
6fcecce7 1899 request_module("rtc-isl1208");
b8341e1d
HV		 1900 core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
1901 }
8efd2e28
MK		 1902 /* break intentionally omitted */
1903 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1904 request_module("ir-kbd-i2c");
6fcecce7
MK		 1905 }
1906
1da177e4
LT		 1907 /* register v4l devices */
1908 dev->video_dev = cx88_vdev_init(core,dev->pci,
1909 &cx8800_video_template,"video");
1910 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1911 video_nr[core->nr]);
1912 if (err < 0) {
5772f813 1913 printk(KERN_ERR "%s/0: can't register video device\n",
1da177e4
LT		 1914 core->name);
1915 goto fail_unreg;
1916 }
1917 printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n",
c6330fb8 1918 core->name, dev->video_dev->num);
1da177e4
LT		 1919
1920 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
1921 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1922 vbi_nr[core->nr]);
1923 if (err < 0) {
5772f813 1924 printk(KERN_ERR "%s/0: can't register vbi device\n",
1da177e4
LT		 1925 core->name);
1926 goto fail_unreg;
1927 }
1928 printk(KERN_INFO "%s/0: registered device vbi%d\n",
c6330fb8 1929 core->name, dev->vbi_dev->num);
1da177e4 1930
6a59d64c 1931 if (core->board.radio.type == CX88_RADIO) {
1da177e4
LT		 1932 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1933 &cx8800_radio_template,"radio");
1934 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1935 radio_nr[core->nr]);
1936 if (err < 0) {
5772f813 1937 printk(KERN_ERR "%s/0: can't register radio device\n",
1da177e4
LT		 1938 core->name);
1939 goto fail_unreg;
1940 }
1941 printk(KERN_INFO "%s/0: registered device radio%d\n",
c6330fb8 1942 core->name, dev->radio_dev->num);
1da177e4
LT		 1943 }
1944
1945 /* everything worked */
1946 list_add_tail(&dev->devlist,&cx8800_devlist);
1947 pci_set_drvdata(pci_dev,dev);
1948
1949 /* initial device configuration */
3593cab5 1950 mutex_lock(&core->lock);
63ab1bdc 1951 cx88_set_tvnorm(core,core->tvnorm);
70f00044 1952 init_controls(core);
e90311a1 1953 cx88_video_mux(core,0);
3593cab5 1954 mutex_unlock(&core->lock);
1da177e4
LT		 1955
1956 /* start tvaudio thread */
6a59d64c 1957 if (core->board.tuner_type != TUNER_ABSENT) {
1da177e4 1958 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
32b78de7
CG		 1959 if (IS_ERR(core->kthread)) {
1960 err = PTR_ERR(core->kthread);
5772f813
TP		 1961 printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
1962 core->name, err);
32b78de7
CG		 1963 }
1964 }
1da177e4
LT		 1965 return 0;
1966
1967fail_unreg:
1968 cx8800_unregister_video(dev);
1969 free_irq(pci_dev->irq, dev);
1970fail_core:
1971 cx88_core_put(core,dev->pci);
1972fail_free:
1973 kfree(dev);
1974 return err;
1975}
1976
1977static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
1978{
4ac97914 1979 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 1980 struct cx88_core *core = dev->core;
1da177e4
LT		 1981
1982 /* stop thread */
e52e98a7
MCC		 1983 if (core->kthread) {
1984 kthread_stop(core->kthread);
1985 core->kthread = NULL;
1da177e4
LT		 1986 }
1987
b12203d2
MB		 1988 if (core->ir)
1989 cx88_ir_stop(core, core->ir);
1990
e52e98a7 1991 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 1992 pci_disable_device(pci_dev);
1993
1994 /* unregister stuff */
1995
1996 free_irq(pci_dev->irq, dev);
1997 cx8800_unregister_video(dev);
1998 pci_set_drvdata(pci_dev, NULL);
1999
2000 /* free memory */
2001 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
2002 list_del(&dev->devlist);
e52e98a7 2003 cx88_core_put(core,dev->pci);
1da177e4
LT		 2004 kfree(dev);
2005}
2006
17bc98a4 2007#ifdef CONFIG_PM
1da177e4
LT		 2008static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
2009{
b45009b0 2010 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 2011 struct cx88_core *core = dev->core;
2012
2013 /* stop video+vbi capture */
2014 spin_lock(&dev->slock);
2015 if (!list_empty(&dev->vidq.active)) {
5772f813 2016 printk("%s/0: suspend video\n", core->name);
1da177e4
LT		 2017 stop_video_dma(dev);
2018 del_timer(&dev->vidq.timeout);
2019 }
2020 if (!list_empty(&dev->vbiq.active)) {
5772f813 2021 printk("%s/0: suspend vbi\n", core->name);
1da177e4
LT		 2022 cx8800_stop_vbi_dma(dev);
2023 del_timer(&dev->vbiq.timeout);
2024 }
2025 spin_unlock(&dev->slock);
2026
13595a51
MCC		 2027 if (core->ir)
2028 cx88_ir_stop(core, core->ir);
1da177e4 2029 /* FIXME -- shutdown device */
e52e98a7 2030 cx88_shutdown(core);
1da177e4
LT		 2031
2032 pci_save_state(pci_dev);
2033 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
2034 pci_disable_device(pci_dev);
2035 dev->state.disabled = 1;
2036 }
2037 return 0;
2038}
2039
2040static int cx8800_resume(struct pci_dev *pci_dev)
2041{
b45009b0 2042 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 2043 struct cx88_core *core = dev->core;
08adb9e2 2044 int err;
1da177e4
LT		 2045
2046 if (dev->state.disabled) {
08adb9e2
MCC		 2047 err=pci_enable_device(pci_dev);
2048 if (err) {
5772f813
TP		 2049 printk(KERN_ERR "%s/0: can't enable device\n",
2050 core->name);
08adb9e2
MCC		 2051 return err;
2052 }
2053
1da177e4
LT		 2054 dev->state.disabled = 0;
2055 }
08adb9e2
MCC		 2056 err= pci_set_power_state(pci_dev, PCI_D0);
2057 if (err) {
5772f813 2058 printk(KERN_ERR "%s/0: can't set power state\n", core->name);
08adb9e2
MCC		 2059 pci_disable_device(pci_dev);
2060 dev->state.disabled = 1;
2061
2062 return err;
2063 }
1da177e4
LT		 2064 pci_restore_state(pci_dev);
2065
1da177e4 2066 /* FIXME: re-initialize hardware */
e52e98a7 2067 cx88_reset(core);
13595a51
MCC		 2068 if (core->ir)
2069 cx88_ir_start(core, core->ir);
2070
2071 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1da177e4
LT		 2072
2073 /* restart video+vbi capture */
2074 spin_lock(&dev->slock);
2075 if (!list_empty(&dev->vidq.active)) {
5772f813 2076 printk("%s/0: resume video\n", core->name);
1da177e4
LT		 2077 restart_video_queue(dev,&dev->vidq);
2078 }
2079 if (!list_empty(&dev->vbiq.active)) {
5772f813 2080 printk("%s/0: resume vbi\n", core->name);
1da177e4
LT		 2081 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2082 }
2083 spin_unlock(&dev->slock);
2084
2085 return 0;
2086}
17bc98a4 2087#endif
1da177e4
LT		 2088
2089/* ----------------------------------------------------------- */
2090
408b664a 2091static struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 2092 {
2093 .vendor = 0x14f1,
2094 .device = 0x8800,
b45009b0
MCC		 2095 .subvendor = PCI_ANY_ID,
2096 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2097 },{
2098 /* --- end of list --- */
2099 }
2100};
2101MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2102
2103static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2104 .name = "cx8800",
2105 .id_table = cx8800_pci_tbl,
2106 .probe = cx8800_initdev,
2107 .remove = __devexit_p(cx8800_finidev),
17bc98a4 2108#ifdef CONFIG_PM
1da177e4
LT		 2109 .suspend = cx8800_suspend,
2110 .resume = cx8800_resume,
17bc98a4 2111#endif
1da177e4
LT		 2112};
2113
2114static int cx8800_init(void)
2115{
5772f813 2116 printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n",
1da177e4
LT		 2117 (CX88_VERSION_CODE >> 16) & 0xff,
2118 (CX88_VERSION_CODE >> 8) & 0xff,
2119 CX88_VERSION_CODE & 0xff);
2120#ifdef SNAPSHOT
2121 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2122 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2123#endif
2124 return pci_register_driver(&cx8800_pci_driver);
2125}
2126
2127static void cx8800_fini(void)
2128{
2129 pci_unregister_driver(&cx8800_pci_driver);
2130}
2131
2132module_init(cx8800_init);
2133module_exit(cx8800_fini);
2134
2135/* ----------------------------------------------------------- */
2136/*
2137 * Local variables:
2138 * c-basic-offset: 8
2139 * End:
b45009b0 2140 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2141 */
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