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[media] cx231xx: Add support for PV Xcapture USB
[mirror_ubuntu-hirsute-kernel.git] / drivers / media / video / cx88 / cx88-video.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * device driver for Conexant 2388x based TV cards
4 * video4linux video interface
5 *
6 * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
7 *
8d87cb9f
MCC		 8 * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org>
9 * - Multituner support
10 * - video_ioctl2 conversion
11 * - PAL/M fixes
12 *
1da177e4
LT		 13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 */
27
28#include <linux/init.h>
29#include <linux/list.h>
30#include <linux/module.h>
1da177e4
LT		 31#include <linux/kmod.h>
32#include <linux/kernel.h>
33#include <linux/slab.h>
34#include <linux/interrupt.h>
c24228da 35#include <linux/dma-mapping.h>
1da177e4
LT		 36#include <linux/delay.h>
37#include <linux/kthread.h>
38#include <asm/div64.h>
39
40#include "cx88.h"
5e453dc7 41#include <media/v4l2-common.h>
35ea11ff 42#include <media/v4l2-ioctl.h>
1da177e4
LT		 43
44MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards");
45MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
46MODULE_LICENSE("GPL");
47
48/* ------------------------------------------------------------------ */
49
50static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
51static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
52static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET };
53
54module_param_array(video_nr, int, NULL, 0444);
55module_param_array(vbi_nr, int, NULL, 0444);
56module_param_array(radio_nr, int, NULL, 0444);
57
58MODULE_PARM_DESC(video_nr,"video device numbers");
59MODULE_PARM_DESC(vbi_nr,"vbi device numbers");
60MODULE_PARM_DESC(radio_nr,"radio device numbers");
61
ff699e6b 62static unsigned int video_debug;
1da177e4
LT		 63module_param(video_debug,int,0644);
64MODULE_PARM_DESC(video_debug,"enable debug messages [video]");
65
ff699e6b 66static unsigned int irq_debug;
1da177e4
LT		 67module_param(irq_debug,int,0644);
68MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]");
69
70static unsigned int vid_limit = 16;
71module_param(vid_limit,int,0644);
72MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes");
73
74#define dprintk(level,fmt, arg...) if (video_debug >= level) \
e52e98a7 75 printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
1da177e4 76
1da177e4
LT		 77/* ------------------------------------------------------------------- */
78/* static data */
79
2e4e98e7 80static const struct cx8800_fmt formats[] = {
1da177e4
LT		 81 {
82 .name = "8 bpp, gray",
83 .fourcc = V4L2_PIX_FMT_GREY,
84 .cxformat = ColorFormatY8,
85 .depth = 8,
86 .flags = FORMAT_FLAGS_PACKED,
87 },{
88 .name = "15 bpp RGB, le",
89 .fourcc = V4L2_PIX_FMT_RGB555,
90 .cxformat = ColorFormatRGB15,
91 .depth = 16,
92 .flags = FORMAT_FLAGS_PACKED,
93 },{
94 .name = "15 bpp RGB, be",
95 .fourcc = V4L2_PIX_FMT_RGB555X,
96 .cxformat = ColorFormatRGB15 | ColorFormatBSWAP,
97 .depth = 16,
98 .flags = FORMAT_FLAGS_PACKED,
99 },{
100 .name = "16 bpp RGB, le",
101 .fourcc = V4L2_PIX_FMT_RGB565,
102 .cxformat = ColorFormatRGB16,
103 .depth = 16,
104 .flags = FORMAT_FLAGS_PACKED,
105 },{
106 .name = "16 bpp RGB, be",
107 .fourcc = V4L2_PIX_FMT_RGB565X,
108 .cxformat = ColorFormatRGB16 | ColorFormatBSWAP,
109 .depth = 16,
110 .flags = FORMAT_FLAGS_PACKED,
111 },{
112 .name = "24 bpp RGB, le",
113 .fourcc = V4L2_PIX_FMT_BGR24,
114 .cxformat = ColorFormatRGB24,
115 .depth = 24,
116 .flags = FORMAT_FLAGS_PACKED,
117 },{
118 .name = "32 bpp RGB, le",
119 .fourcc = V4L2_PIX_FMT_BGR32,
120 .cxformat = ColorFormatRGB32,
121 .depth = 32,
122 .flags = FORMAT_FLAGS_PACKED,
123 },{
124 .name = "32 bpp RGB, be",
125 .fourcc = V4L2_PIX_FMT_RGB32,
126 .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP,
127 .depth = 32,
128 .flags = FORMAT_FLAGS_PACKED,
129 },{
130 .name = "4:2:2, packed, YUYV",
131 .fourcc = V4L2_PIX_FMT_YUYV,
132 .cxformat = ColorFormatYUY2,
133 .depth = 16,
134 .flags = FORMAT_FLAGS_PACKED,
135 },{
136 .name = "4:2:2, packed, UYVY",
137 .fourcc = V4L2_PIX_FMT_UYVY,
138 .cxformat = ColorFormatYUY2 | ColorFormatBSWAP,
139 .depth = 16,
140 .flags = FORMAT_FLAGS_PACKED,
141 },
142};
143
2e4e98e7 144static const struct cx8800_fmt* format_by_fourcc(unsigned int fourcc)
1da177e4
LT		 145{
146 unsigned int i;
147
148 for (i = 0; i < ARRAY_SIZE(formats); i++)
149 if (formats[i].fourcc == fourcc)
150 return formats+i;
151 return NULL;
152}
153
154/* ------------------------------------------------------------------- */
155
156static const struct v4l2_queryctrl no_ctl = {
157 .name = "42",
158 .flags = V4L2_CTRL_FLAG_DISABLED,
159};
160
2e4e98e7 161static const struct cx88_ctrl cx8800_ctls[] = {
1da177e4
LT		 162 /* --- video --- */
163 {
164 .v = {
165 .id = V4L2_CID_BRIGHTNESS,
166 .name = "Brightness",
167 .minimum = 0x00,
168 .maximum = 0xff,
169 .step = 1,
9f9c907f 170 .default_value = 0x7f,
1da177e4
LT		 171 .type = V4L2_CTRL_TYPE_INTEGER,
172 },
173 .off = 128,
174 .reg = MO_CONTR_BRIGHT,
175 .mask = 0x00ff,
176 .shift = 0,
177 },{
178 .v = {
179 .id = V4L2_CID_CONTRAST,
180 .name = "Contrast",
181 .minimum = 0,
182 .maximum = 0xff,
183 .step = 1,
70f00044 184 .default_value = 0x3f,
1da177e4
LT		 185 .type = V4L2_CTRL_TYPE_INTEGER,
186 },
41ef7c1e 187 .off = 0,
1da177e4
LT		 188 .reg = MO_CONTR_BRIGHT,
189 .mask = 0xff00,
190 .shift = 8,
191 },{
192 .v = {
193 .id = V4L2_CID_HUE,
194 .name = "Hue",
195 .minimum = 0,
196 .maximum = 0xff,
197 .step = 1,
9f9c907f 198 .default_value = 0x7f,
1da177e4
LT		 199 .type = V4L2_CTRL_TYPE_INTEGER,
200 },
9ac4c158 201 .off = 128,
1da177e4
LT		 202 .reg = MO_HUE,
203 .mask = 0x00ff,
204 .shift = 0,
205 },{
206 /* strictly, this only describes only U saturation.
207 * V saturation is handled specially through code.
208 */
209 .v = {
210 .id = V4L2_CID_SATURATION,
211 .name = "Saturation",
212 .minimum = 0,
213 .maximum = 0xff,
214 .step = 1,
70f00044 215 .default_value = 0x7f,
1da177e4
LT		 216 .type = V4L2_CTRL_TYPE_INTEGER,
217 },
218 .off = 0,
219 .reg = MO_UV_SATURATION,
220 .mask = 0x00ff,
221 .shift = 0,
222 },{
6d04203c
FD		 223 .v = {
224 .id = V4L2_CID_CHROMA_AGC,
225 .name = "Chroma AGC",
226 .minimum = 0,
227 .maximum = 1,
87a17389 228 .default_value = 0x1,
6d04203c
FD		 229 .type = V4L2_CTRL_TYPE_BOOLEAN,
230 },
231 .reg = MO_INPUT_FORMAT,
232 .mask = 1 << 10,
233 .shift = 10,
1b879c43
FD		 234 }, {
235 .v = {
236 .id = V4L2_CID_COLOR_KILLER,
237 .name = "Color killer",
238 .minimum = 0,
239 .maximum = 1,
0b5afdd2 240 .default_value = 0x1,
1b879c43
FD		 241 .type = V4L2_CTRL_TYPE_BOOLEAN,
242 },
243 .reg = MO_INPUT_FORMAT,
244 .mask = 1 << 9,
245 .shift = 9,
6d04203c 246 }, {
1da177e4
LT		 247 /* --- audio --- */
248 .v = {
249 .id = V4L2_CID_AUDIO_MUTE,
250 .name = "Mute",
251 .minimum = 0,
252 .maximum = 1,
70f00044 253 .default_value = 1,
1da177e4
LT		 254 .type = V4L2_CTRL_TYPE_BOOLEAN,
255 },
256 .reg = AUD_VOL_CTL,
257 .sreg = SHADOW_AUD_VOL_CTL,
258 .mask = (1 << 6),
259 .shift = 6,
260 },{
261 .v = {
262 .id = V4L2_CID_AUDIO_VOLUME,
263 .name = "Volume",
264 .minimum = 0,
265 .maximum = 0x3f,
266 .step = 1,
9f9c907f 267 .default_value = 0x3f,
1da177e4
LT		 268 .type = V4L2_CTRL_TYPE_INTEGER,
269 },
270 .reg = AUD_VOL_CTL,
271 .sreg = SHADOW_AUD_VOL_CTL,
272 .mask = 0x3f,
273 .shift = 0,
274 },{
275 .v = {
276 .id = V4L2_CID_AUDIO_BALANCE,
277 .name = "Balance",
278 .minimum = 0,
279 .maximum = 0x7f,
280 .step = 1,
281 .default_value = 0x40,
282 .type = V4L2_CTRL_TYPE_INTEGER,
283 },
284 .reg = AUD_BAL_CTL,
285 .sreg = SHADOW_AUD_BAL_CTL,
286 .mask = 0x7f,
287 .shift = 0,
288 }
289};
2e4e98e7 290enum { CX8800_CTLS = ARRAY_SIZE(cx8800_ctls) };
1da177e4 291
2ba58894 292/* Must be sorted from low to high control ID! */
38a2713a
MK		 293const u32 cx88_user_ctrls[] = {
294 V4L2_CID_USER_CLASS,
295 V4L2_CID_BRIGHTNESS,
296 V4L2_CID_CONTRAST,
297 V4L2_CID_SATURATION,
298 V4L2_CID_HUE,
299 V4L2_CID_AUDIO_VOLUME,
300 V4L2_CID_AUDIO_BALANCE,
301 V4L2_CID_AUDIO_MUTE,
6d04203c 302 V4L2_CID_CHROMA_AGC,
1b879c43 303 V4L2_CID_COLOR_KILLER,
38a2713a
MK		 304 0
305};
306EXPORT_SYMBOL(cx88_user_ctrls);
307
2e4e98e7 308static const u32 * const ctrl_classes[] = {
38a2713a
MK		 309 cx88_user_ctrls,
310 NULL
311};
312
6d04203c 313int cx8800_ctrl_query(struct cx88_core *core, struct v4l2_queryctrl *qctrl)
38a2713a
MK		 314{
315 int i;
316
317 if (qctrl->id < V4L2_CID_BASE ||
318 qctrl->id >= V4L2_CID_LASTP1)
319 return -EINVAL;
320 for (i = 0; i < CX8800_CTLS; i++)
321 if (cx8800_ctls[i].v.id == qctrl->id)
322 break;
323 if (i == CX8800_CTLS) {
324 *qctrl = no_ctl;
325 return 0;
326 }
327 *qctrl = cx8800_ctls[i].v;
6d04203c
FD		 328 /* Report chroma AGC as inactive when SECAM is selected */
329 if (cx8800_ctls[i].v.id == V4L2_CID_CHROMA_AGC &&
330 core->tvnorm & V4L2_STD_SECAM)
331 qctrl->flags |= V4L2_CTRL_FLAG_INACTIVE;
332
38a2713a
MK		 333 return 0;
334}
335EXPORT_SYMBOL(cx8800_ctrl_query);
336
1da177e4
LT		 337/* ------------------------------------------------------------------- */
338/* resource management */
339
340static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit)
341{
e52e98a7 342 struct cx88_core *core = dev->core;
1da177e4
LT		 343 if (fh->resources & bit)
344 /* have it already allocated */
345 return 1;
346
347 /* is it free? */
3593cab5 348 mutex_lock(&core->lock);
1da177e4
LT		 349 if (dev->resources & bit) {
350 /* no, someone else uses it */
3593cab5 351 mutex_unlock(&core->lock);
1da177e4
LT		 352 return 0;
353 }
354 /* it's free, grab it */
355 fh->resources |= bit;
356 dev->resources |= bit;
357 dprintk(1,"res: get %d\n",bit);
3593cab5 358 mutex_unlock(&core->lock);
1da177e4
LT		 359 return 1;
360}
361
362static
363int res_check(struct cx8800_fh *fh, unsigned int bit)
364{
365 return (fh->resources & bit);
366}
367
368static
369int res_locked(struct cx8800_dev *dev, unsigned int bit)
370{
371 return (dev->resources & bit);
372}
373
374static
375void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits)
376{
e52e98a7 377 struct cx88_core *core = dev->core;
ae24601b 378 BUG_ON((fh->resources & bits) != bits);
1da177e4 379
3593cab5 380 mutex_lock(&core->lock);
1da177e4
LT		 381 fh->resources &= ~bits;
382 dev->resources &= ~bits;
383 dprintk(1,"res: put %d\n",bits);
3593cab5 384 mutex_unlock(&core->lock);
1da177e4
LT		 385}
386
387/* ------------------------------------------------------------------ */
388
e90311a1 389int cx88_video_mux(struct cx88_core *core, unsigned int input)
1da177e4 390{
e52e98a7 391 /* struct cx88_core *core = dev->core; */
1da177e4
LT		 392
393 dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n",
6a59d64c
TP		 394 input, INPUT(input).vmux,
395 INPUT(input).gpio0,INPUT(input).gpio1,
396 INPUT(input).gpio2,INPUT(input).gpio3);
e52e98a7 397 core->input = input;
6a59d64c
TP		 398 cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14);
399 cx_write(MO_GP3_IO, INPUT(input).gpio3);
400 cx_write(MO_GP0_IO, INPUT(input).gpio0);
401 cx_write(MO_GP1_IO, INPUT(input).gpio1);
402 cx_write(MO_GP2_IO, INPUT(input).gpio2);
1da177e4 403
6a59d64c 404 switch (INPUT(input).type) {
1da177e4
LT		 405 case CX88_VMUX_SVIDEO:
406 cx_set(MO_AFECFG_IO, 0x00000001);
407 cx_set(MO_INPUT_FORMAT, 0x00010010);
408 cx_set(MO_FILTER_EVEN, 0x00002020);
409 cx_set(MO_FILTER_ODD, 0x00002020);
410 break;
411 default:
412 cx_clear(MO_AFECFG_IO, 0x00000001);
413 cx_clear(MO_INPUT_FORMAT, 0x00010010);
414 cx_clear(MO_FILTER_EVEN, 0x00002020);
415 cx_clear(MO_FILTER_ODD, 0x00002020);
416 break;
417 }
f24546a9 418
66e6fbdf
RC		 419 /* if there are audioroutes defined, we have an external
420 ADC to deal with audio */
66e6fbdf 421 if (INPUT(input).audioroute) {
66e6fbdf
RC		 422 /* The wm8775 module has the "2" route hardwired into
423 the initialization. Some boards may use different
424 routes for different inputs. HVR-1300 surely does */
425 if (core->board.audio_chip &&
38f9d308 426 core->board.audio_chip == V4L2_IDENT_WM8775) {
5325b427 427 call_all(core, audio, s_routing,
6e1f4df7 428 INPUT(input).audioroute, 0, 0);
66e6fbdf 429 }
430189da
DB		 430 /* cx2388's C-ADC is connected to the tuner only.
431 When used with S-Video, that ADC is busy dealing with
432 chroma, so an external must be used for baseband audio */
6e1f4df7 433 if (INPUT(input).type != CX88_VMUX_TELEVISION &&
434 INPUT(input).type != CX88_VMUX_CABLE) {
430189da
DB		 435 /* "I2S ADC mode" */
436 core->tvaudio = WW_I2SADC;
437 cx88_set_tvaudio(core);
438 } else {
439 /* Normal mode */
440 cx_write(AUD_I2SCNTL, 0x0);
441 cx_clear(AUD_CTL, EN_I2SIN_ENABLE);
442 }
f24546a9 443 }
66e6fbdf 444
1da177e4
LT		 445 return 0;
446}
e90311a1 447EXPORT_SYMBOL(cx88_video_mux);
1da177e4
LT		 448
449/* ------------------------------------------------------------------ */
450
451static int start_video_dma(struct cx8800_dev *dev,
452 struct cx88_dmaqueue *q,
453 struct cx88_buffer *buf)
454{
455 struct cx88_core *core = dev->core;
456
457 /* setup fifo + format */
e52e98a7 458 cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21],
1da177e4 459 buf->bpl, buf->risc.dma);
e52e98a7 460 cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field);
1da177e4
LT		 461 cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma);
462
463 /* reset counter */
464 cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET);
465 q->count = 1;
466
467 /* enable irqs */
8ddac9ee 468 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
e52e98a7
MCC		 469
470 /* Enables corresponding bits at PCI_INT_STAT:
471 bits 0 to 4: video, audio, transport stream, VIP, Host
472 bit 7: timer
473 bits 8 and 9: DMA complete for: SRC, DST
474 bits 10 and 11: BERR signal asserted for RISC: RD, WR
475 bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB
476 */
1da177e4
LT		 477 cx_set(MO_VID_INTMSK, 0x0f0011);
478
479 /* enable capture */
480 cx_set(VID_CAPTURE_CONTROL,0x06);
481
482 /* start dma */
483 cx_set(MO_DEV_CNTRL2, (1<<5));
e52e98a7 484 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */
1da177e4
LT		 485
486 return 0;
487}
488
17bc98a4 489#ifdef CONFIG_PM
1da177e4
LT		 490static int stop_video_dma(struct cx8800_dev *dev)
491{
492 struct cx88_core *core = dev->core;
493
494 /* stop dma */
495 cx_clear(MO_VID_DMACNTRL, 0x11);
496
497 /* disable capture */
498 cx_clear(VID_CAPTURE_CONTROL,0x06);
499
500 /* disable irqs */
8ddac9ee 501 cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
1da177e4
LT		 502 cx_clear(MO_VID_INTMSK, 0x0f0011);
503 return 0;
504}
17bc98a4 505#endif
1da177e4
LT		 506
507static int restart_video_queue(struct cx8800_dev *dev,
508 struct cx88_dmaqueue *q)
509{
e52e98a7 510 struct cx88_core *core = dev->core;
1da177e4 511 struct cx88_buffer *buf, *prev;
1da177e4
LT		 512
513 if (!list_empty(&q->active)) {
4ac97914 514 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1da177e4
LT		 515 dprintk(2,"restart_queue [%p/%d]: restart dma\n",
516 buf, buf->vb.i);
517 start_video_dma(dev, q, buf);
8bb629e2
TP		 518 list_for_each_entry(buf, &q->active, vb.queue)
519 buf->count = q->count++;
1da177e4
LT		 520 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
521 return 0;
522 }
523
524 prev = NULL;
525 for (;;) {
526 if (list_empty(&q->queued))
527 return 0;
4ac97914 528 buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue);
1da177e4 529 if (NULL == prev) {
179e0917 530 list_move_tail(&buf->vb.queue, &q->active);
1da177e4 531 start_video_dma(dev, q, buf);
0fc0686e 532 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 533 buf->count = q->count++;
534 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
535 dprintk(2,"[%p/%d] restart_queue - first active\n",
536 buf,buf->vb.i);
537
538 } else if (prev->vb.width == buf->vb.width &&
539 prev->vb.height == buf->vb.height &&
540 prev->fmt == buf->fmt) {
179e0917 541 list_move_tail(&buf->vb.queue, &q->active);
0fc0686e 542 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 543 buf->count = q->count++;
544 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
545 dprintk(2,"[%p/%d] restart_queue - move to active\n",
546 buf,buf->vb.i);
547 } else {
548 return 0;
549 }
550 prev = buf;
551 }
552}
553
554/* ------------------------------------------------------------------ */
555
556static int
557buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size)
558{
559 struct cx8800_fh *fh = q->priv_data;
560
561 *size = fh->fmt->depth*fh->width*fh->height >> 3;
562 if (0 == *count)
563 *count = 32;
dab7e310
AB		 564 if (*size * *count > vid_limit * 1024 * 1024)
565 *count = (vid_limit * 1024 * 1024) / *size;
1da177e4
LT		 566 return 0;
567}
568
569static int
570buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb,
571 enum v4l2_field field)
572{
573 struct cx8800_fh *fh = q->priv_data;
574 struct cx8800_dev *dev = fh->dev;
e52e98a7 575 struct cx88_core *core = dev->core;
1da177e4 576 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
c1accaa2 577 struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb);
1da177e4
LT		 578 int rc, init_buffer = 0;
579
580 BUG_ON(NULL == fh->fmt);
e52e98a7
MCC		 581 if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) ||
582 fh->height < 32 || fh->height > norm_maxh(core->tvnorm))
1da177e4
LT		 583 return -EINVAL;
584 buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3;
585 if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size)
586 return -EINVAL;
587
588 if (buf->fmt != fh->fmt ||
589 buf->vb.width != fh->width ||
590 buf->vb.height != fh->height ||
591 buf->vb.field != field) {
592 buf->fmt = fh->fmt;
593 buf->vb.width = fh->width;
594 buf->vb.height = fh->height;
595 buf->vb.field = field;
596 init_buffer = 1;
597 }
598
0fc0686e 599 if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
1da177e4 600 init_buffer = 1;
c7b0ac05 601 if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL)))
1da177e4
LT		 602 goto fail;
603 }
604
605 if (init_buffer) {
606 buf->bpl = buf->vb.width * buf->fmt->depth >> 3;
607 switch (buf->vb.field) {
608 case V4L2_FIELD_TOP:
609 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 610 dma->sglist, 0, UNSET,
1da177e4
LT		 611 buf->bpl, 0, buf->vb.height);
612 break;
613 case V4L2_FIELD_BOTTOM:
614 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 615 dma->sglist, UNSET, 0,
1da177e4
LT		 616 buf->bpl, 0, buf->vb.height);
617 break;
618 case V4L2_FIELD_INTERLACED:
619 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 620 dma->sglist, 0, buf->bpl,
1da177e4
LT		 621 buf->bpl, buf->bpl,
622 buf->vb.height >> 1);
623 break;
624 case V4L2_FIELD_SEQ_TB:
625 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 626 dma->sglist,
1da177e4
LT		 627 0, buf->bpl * (buf->vb.height >> 1),
628 buf->bpl, 0,
629 buf->vb.height >> 1);
630 break;
631 case V4L2_FIELD_SEQ_BT:
632 cx88_risc_buffer(dev->pci, &buf->risc,
c1accaa2 633 dma->sglist,
1da177e4
LT		 634 buf->bpl * (buf->vb.height >> 1), 0,
635 buf->bpl, 0,
636 buf->vb.height >> 1);
637 break;
638 default:
639 BUG();
640 }
641 }
642 dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n",
643 buf, buf->vb.i,
644 fh->width, fh->height, fh->fmt->depth, fh->fmt->name,
645 (unsigned long)buf->risc.dma);
646
0fc0686e 647 buf->vb.state = VIDEOBUF_PREPARED;
1da177e4
LT		 648 return 0;
649
650 fail:
c7b0ac05 651 cx88_free_buffer(q,buf);
1da177e4
LT		 652 return rc;
653}
654
655static void
656buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb)
657{
658 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
659 struct cx88_buffer *prev;
660 struct cx8800_fh *fh = vq->priv_data;
661 struct cx8800_dev *dev = fh->dev;
e52e98a7 662 struct cx88_core *core = dev->core;
1da177e4
LT		 663 struct cx88_dmaqueue *q = &dev->vidq;
664
665 /* add jump to stopper */
666 buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC);
667 buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma);
668
669 if (!list_empty(&q->queued)) {
670 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 671 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 672 dprintk(2,"[%p/%d] buffer_queue - append to queued\n",
673 buf, buf->vb.i);
674
675 } else if (list_empty(&q->active)) {
676 list_add_tail(&buf->vb.queue,&q->active);
677 start_video_dma(dev, q, buf);
0fc0686e 678 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 679 buf->count = q->count++;
680 mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT);
681 dprintk(2,"[%p/%d] buffer_queue - first active\n",
682 buf, buf->vb.i);
683
684 } else {
685 prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue);
686 if (prev->vb.width == buf->vb.width &&
687 prev->vb.height == buf->vb.height &&
688 prev->fmt == buf->fmt) {
689 list_add_tail(&buf->vb.queue,&q->active);
0fc0686e 690 buf->vb.state = VIDEOBUF_ACTIVE;
1da177e4
LT		 691 buf->count = q->count++;
692 prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
693 dprintk(2,"[%p/%d] buffer_queue - append to active\n",
694 buf, buf->vb.i);
695
696 } else {
697 list_add_tail(&buf->vb.queue,&q->queued);
0fc0686e 698 buf->vb.state = VIDEOBUF_QUEUED;
1da177e4
LT		 699 dprintk(2,"[%p/%d] buffer_queue - first queued\n",
700 buf, buf->vb.i);
701 }
702 }
703}
704
705static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb)
706{
707 struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb);
1da177e4 708
c7b0ac05 709 cx88_free_buffer(q,buf);
1da177e4
LT		 710}
711
2e4e98e7 712static const struct videobuf_queue_ops cx8800_video_qops = {
1da177e4
LT		 713 .buf_setup = buffer_setup,
714 .buf_prepare = buffer_prepare,
715 .buf_queue = buffer_queue,
716 .buf_release = buffer_release,
717};
718
719/* ------------------------------------------------------------------ */
720
1da177e4
LT		 721
722/* ------------------------------------------------------------------ */
723
724static struct videobuf_queue* get_queue(struct cx8800_fh *fh)
725{
726 switch (fh->type) {
727 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
728 return &fh->vidq;
729 case V4L2_BUF_TYPE_VBI_CAPTURE:
730 return &fh->vbiq;
731 default:
732 BUG();
733 return NULL;
734 }
735}
736
737static int get_ressource(struct cx8800_fh *fh)
738{
739 switch (fh->type) {
740 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
741 return RESOURCE_VIDEO;
742 case V4L2_BUF_TYPE_VBI_CAPTURE:
743 return RESOURCE_VBI;
744 default:
745 BUG();
746 return 0;
747 }
748}
749
bec43661 750static int video_open(struct file *file)
1da177e4 751{
63b0d5ad
LP		 752 struct video_device *vdev = video_devdata(file);
753 struct cx8800_dev *dev = video_drvdata(file);
5401c2db 754 struct cx88_core *core = dev->core;
1da177e4 755 struct cx8800_fh *fh;
1da177e4
LT		 756 enum v4l2_buf_type type = 0;
757 int radio = 0;
758
63b0d5ad
LP		 759 switch (vdev->vfl_type) {
760 case VFL_TYPE_GRABBER:
761 type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
762 break;
763 case VFL_TYPE_VBI:
764 type = V4L2_BUF_TYPE_VBI_CAPTURE;
765 break;
766 case VFL_TYPE_RADIO:
767 radio = 1;
768 break;
d56dc612 769 }
1da177e4 770
50462eb0
LP		 771 dprintk(1, "open dev=%s radio=%d type=%s\n",
772 video_device_node_name(vdev), radio, v4l2_type_names[type]);
1da177e4
LT		 773
774 /* allocate + initialize per filehandle data */
7408187d 775 fh = kzalloc(sizeof(*fh),GFP_KERNEL);
da497e30 776 if (unlikely(!fh))
1da177e4 777 return -ENOMEM;
da497e30 778
1da177e4
LT		 779 file->private_data = fh;
780 fh->dev = dev;
781 fh->radio = radio;
782 fh->type = type;
783 fh->width = 320;
784 fh->height = 240;
785 fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24);
786
da497e30 787 mutex_lock(&core->lock);
da497e30 788
0705135e
GL		 789 videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops,
790 &dev->pci->dev, &dev->slock,
1da177e4
LT		 791 V4L2_BUF_TYPE_VIDEO_CAPTURE,
792 V4L2_FIELD_INTERLACED,
793 sizeof(struct cx88_buffer),
08bff03e 794 fh, NULL);
0705135e
GL		 795 videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops,
796 &dev->pci->dev, &dev->slock,
1da177e4
LT		 797 V4L2_BUF_TYPE_VBI_CAPTURE,
798 V4L2_FIELD_SEQ_TB,
799 sizeof(struct cx88_buffer),
08bff03e 800 fh, NULL);
1da177e4
LT		 801
802 if (fh->radio) {
1da177e4 803 dprintk(1,"video_open: setting radio device\n");
6a59d64c
TP		 804 cx_write(MO_GP3_IO, core->board.radio.gpio3);
805 cx_write(MO_GP0_IO, core->board.radio.gpio0);
806 cx_write(MO_GP1_IO, core->board.radio.gpio1);
807 cx_write(MO_GP2_IO, core->board.radio.gpio2);
430189da
DB		 808 if (core->board.radio.audioroute) {
809 if(core->board.audio_chip &&
810 core->board.audio_chip == V4L2_IDENT_WM8775) {
5325b427
HV		 811 call_all(core, audio, s_routing,
812 core->board.radio.audioroute, 0, 0);
430189da
DB		 813 }
814 /* "I2S ADC mode" */
815 core->tvaudio = WW_I2SADC;
816 cx88_set_tvaudio(core);
817 } else {
818 /* FM Mode */
819 core->tvaudio = WW_FM;
820 cx88_set_tvaudio(core);
821 cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1);
822 }
b8341e1d 823 call_all(core, tuner, s_radio);
1da177e4
LT		 824 }
825
3e010845 826 atomic_inc(&core->users);
da497e30 827 mutex_unlock(&core->lock);
3e010845 828
4ac97914 829 return 0;
1da177e4
LT		 830}
831
832static ssize_t
f9e7a020 833video_read(struct file *file, char __user *data, size_t count, loff_t *ppos)
1da177e4
LT		 834{
835 struct cx8800_fh *fh = file->private_data;
836
837 switch (fh->type) {
838 case V4L2_BUF_TYPE_VIDEO_CAPTURE:
839 if (res_locked(fh->dev,RESOURCE_VIDEO))
840 return -EBUSY;
841 return videobuf_read_one(&fh->vidq, data, count, ppos,
842 file->f_flags & O_NONBLOCK);
843 case V4L2_BUF_TYPE_VBI_CAPTURE:
844 if (!res_get(fh->dev,fh,RESOURCE_VBI))
845 return -EBUSY;
846 return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1,
847 file->f_flags & O_NONBLOCK);
848 default:
849 BUG();
850 return 0;
851 }
852}
853
854static unsigned int
855video_poll(struct file *file, struct poll_table_struct *wait)
856{
857 struct cx8800_fh *fh = file->private_data;
858 struct cx88_buffer *buf;
9fd6418a 859 unsigned int rc = POLLERR;
1da177e4
LT		 860
861 if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) {
862 if (!res_get(fh->dev,fh,RESOURCE_VBI))
863 return POLLERR;
864 return videobuf_poll_stream(file, &fh->vbiq, wait);
865 }
866
9fd6418a 867 mutex_lock(&fh->vidq.vb_lock);
1da177e4
LT		 868 if (res_check(fh,RESOURCE_VIDEO)) {
869 /* streaming capture */
870 if (list_empty(&fh->vidq.stream))
9fd6418a 871 goto done;
1da177e4
LT		 872 buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream);
873 } else {
874 /* read() capture */
875 buf = (struct cx88_buffer*)fh->vidq.read_buf;
876 if (NULL == buf)
9fd6418a 877 goto done;
1da177e4
LT		 878 }
879 poll_wait(file, &buf->vb.done, wait);
0fc0686e
BP		 880 if (buf->vb.state == VIDEOBUF_DONE ||
881 buf->vb.state == VIDEOBUF_ERROR)
9fd6418a
F		 882 rc = POLLIN|POLLRDNORM;
883 else
884 rc = 0;
885done:
886 mutex_unlock(&fh->vidq.vb_lock);
887 return rc;
1da177e4
LT		 888}
889
bec43661 890static int video_release(struct file *file)
1da177e4
LT		 891{
892 struct cx8800_fh *fh = file->private_data;
893 struct cx8800_dev *dev = fh->dev;
894
895 /* turn off overlay */
896 if (res_check(fh, RESOURCE_OVERLAY)) {
897 /* FIXME */
898 res_free(dev,fh,RESOURCE_OVERLAY);
899 }
900
901 /* stop video capture */
902 if (res_check(fh, RESOURCE_VIDEO)) {
903 videobuf_queue_cancel(&fh->vidq);
904 res_free(dev,fh,RESOURCE_VIDEO);
905 }
906 if (fh->vidq.read_buf) {
907 buffer_release(&fh->vidq,fh->vidq.read_buf);
908 kfree(fh->vidq.read_buf);
909 }
910
911 /* stop vbi capture */
912 if (res_check(fh, RESOURCE_VBI)) {
053fcb60 913 videobuf_stop(&fh->vbiq);
1da177e4
LT		 914 res_free(dev,fh,RESOURCE_VBI);
915 }
916
917 videobuf_mmap_free(&fh->vidq);
918 videobuf_mmap_free(&fh->vbiq);
da497e30
MCC		 919
920 mutex_lock(&dev->core->lock);
1da177e4
LT		 921 file->private_data = NULL;
922 kfree(fh);
e52e98a7 923
3e010845 924 if(atomic_dec_and_test(&dev->core->users))
622b828a 925 call_all(dev->core, core, s_power, 0);
06f837ca 926 mutex_unlock(&dev->core->lock);
e52e98a7 927
1da177e4
LT		 928 return 0;
929}
930
931static int
932video_mmap(struct file *file, struct vm_area_struct * vma)
933{
934 struct cx8800_fh *fh = file->private_data;
935
936 return videobuf_mmap_mapper(get_queue(fh), vma);
937}
938
939/* ------------------------------------------------------------------ */
8d87cb9f 940/* VIDEO CTRL IOCTLS */
1da177e4 941
54da49f5 942int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 943{
2e4e98e7 944 const struct cx88_ctrl *c = NULL;
1da177e4
LT		 945 u32 value;
946 int i;
947
948 for (i = 0; i < CX8800_CTLS; i++)
949 if (cx8800_ctls[i].v.id == ctl->id)
950 c = &cx8800_ctls[i];
8d87cb9f 951 if (unlikely(NULL == c))
1da177e4
LT		 952 return -EINVAL;
953
954 value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg);
955 switch (ctl->id) {
956 case V4L2_CID_AUDIO_BALANCE:
9f9c907f
MR		 957 ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40)
958 : (0x7f - (value & 0x7f));
1da177e4
LT		 959 break;
960 case V4L2_CID_AUDIO_VOLUME:
961 ctl->value = 0x3f - (value & 0x3f);
962 break;
963 default:
964 ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift;
965 break;
966 }
6457af5f
IP		 967 dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
968 ctl->id, c->v.name, ctl->value, c->reg,
969 value,c->mask, c->sreg ? " [shadowed]" : "");
1da177e4
LT		 970 return 0;
971}
54da49f5 972EXPORT_SYMBOL(cx88_get_control);
1da177e4 973
54da49f5 974int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl)
1da177e4 975{
2e4e98e7 976 const struct cx88_ctrl *c = NULL;
70f00044 977 u32 value,mask;
1da177e4 978 int i;
8d87cb9f 979
70f00044
MCC		 980 for (i = 0; i < CX8800_CTLS; i++) {
981 if (cx8800_ctls[i].v.id == ctl->id) {
1da177e4 982 c = &cx8800_ctls[i];
70f00044
MCC		 983 }
984 }
8d87cb9f 985 if (unlikely(NULL == c))
1da177e4
LT		 986 return -EINVAL;
987
988 if (ctl->value < c->v.minimum)
e52e98a7 989 ctl->value = c->v.minimum;
1da177e4 990 if (ctl->value > c->v.maximum)
e52e98a7 991 ctl->value = c->v.maximum;
70f00044 992 mask=c->mask;
1da177e4
LT		 993 switch (ctl->id) {
994 case V4L2_CID_AUDIO_BALANCE:
9f9c907f 995 value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40);
1da177e4
LT		 996 break;
997 case V4L2_CID_AUDIO_VOLUME:
998 value = 0x3f - (ctl->value & 0x3f);
999 break;
1000 case V4L2_CID_SATURATION:
1001 /* special v_sat handling */
70f00044
MCC		 1002
1003 value = ((ctl->value - c->off) << c->shift) & c->mask;
1004
63ab1bdc 1005 if (core->tvnorm & V4L2_STD_SECAM) {
70f00044
MCC		 1006 /* For SECAM, both U and V sat should be equal */
1007 value=value<<8|value;
1008 } else {
1009 /* Keeps U Saturation proportional to V Sat */
1010 value=(value*0x5a)/0x7f<<8|value;
1011 }
1012 mask=0xffff;
1013 break;
6d04203c
FD		 1014 case V4L2_CID_CHROMA_AGC:
1015 /* Do not allow chroma AGC to be enabled for SECAM */
1016 value = ((ctl->value - c->off) << c->shift) & c->mask;
1017 if (core->tvnorm & V4L2_STD_SECAM && value)
1018 return -EINVAL;
1019 break;
1da177e4
LT		 1020 default:
1021 value = ((ctl->value - c->off) << c->shift) & c->mask;
1022 break;
1023 }
6457af5f
IP		 1024 dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n",
1025 ctl->id, c->v.name, ctl->value, c->reg, value,
1026 mask, c->sreg ? " [shadowed]" : "");
1da177e4 1027 if (c->sreg) {
70f00044 1028 cx_sandor(c->sreg, c->reg, mask, value);
1da177e4 1029 } else {
70f00044 1030 cx_andor(c->reg, mask, value);
1da177e4
LT		 1031 }
1032 return 0;
1033}
54da49f5 1034EXPORT_SYMBOL(cx88_set_control);
1da177e4 1035
e52e98a7 1036static void init_controls(struct cx88_core *core)
1da177e4 1037{
70f00044
MCC		 1038 struct v4l2_control ctrl;
1039 int i;
1da177e4 1040
70f00044
MCC		 1041 for (i = 0; i < CX8800_CTLS; i++) {
1042 ctrl.id=cx8800_ctls[i].v.id;
9f9c907f 1043 ctrl.value=cx8800_ctls[i].v.default_value;
8d87cb9f 1044
54da49f5 1045 cx88_set_control(core, &ctrl);
70f00044 1046 }
1da177e4
LT		 1047}
1048
1049/* ------------------------------------------------------------------ */
8d87cb9f 1050/* VIDEO IOCTLS */
1da177e4 1051
78b526a4 1052static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1053 struct v4l2_format *f)
1da177e4 1054{
8d87cb9f
MCC		 1055 struct cx8800_fh *fh = priv;
1056
1057 f->fmt.pix.width = fh->width;
1058 f->fmt.pix.height = fh->height;
1059 f->fmt.pix.field = fh->vidq.field;
1060 f->fmt.pix.pixelformat = fh->fmt->fourcc;
1061 f->fmt.pix.bytesperline =
1062 (f->fmt.pix.width * fh->fmt->depth) >> 3;
1063 f->fmt.pix.sizeimage =
1064 f->fmt.pix.height * f->fmt.pix.bytesperline;
1065 return 0;
1da177e4
LT		 1066}
1067
78b526a4 1068static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1069 struct v4l2_format *f)
1da177e4 1070{
8d87cb9f 1071 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
2e4e98e7 1072 const struct cx8800_fmt *fmt;
8d87cb9f
MCC		 1073 enum v4l2_field field;
1074 unsigned int maxw, maxh;
e52e98a7 1075
8d87cb9f
MCC		 1076 fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1077 if (NULL == fmt)
1078 return -EINVAL;
1da177e4 1079
8d87cb9f
MCC		 1080 field = f->fmt.pix.field;
1081 maxw = norm_maxw(core->tvnorm);
1082 maxh = norm_maxh(core->tvnorm);
1da177e4 1083
8d87cb9f
MCC		 1084 if (V4L2_FIELD_ANY == field) {
1085 field = (f->fmt.pix.height > maxh/2)
1086 ? V4L2_FIELD_INTERLACED
1087 : V4L2_FIELD_BOTTOM;
1da177e4 1088 }
8d87cb9f
MCC		 1089
1090 switch (field) {
1091 case V4L2_FIELD_TOP:
1092 case V4L2_FIELD_BOTTOM:
1093 maxh = maxh / 2;
1094 break;
1095 case V4L2_FIELD_INTERLACED:
1096 break;
1da177e4
LT		 1097 default:
1098 return -EINVAL;
1099 }
8d87cb9f
MCC		 1100
1101 f->fmt.pix.field = field;
4b89945e
TP		 1102 v4l_bound_align_image(&f->fmt.pix.width, 48, maxw, 2,
1103 &f->fmt.pix.height, 32, maxh, 0, 0);
8d87cb9f
MCC		 1104 f->fmt.pix.bytesperline =
1105 (f->fmt.pix.width * fmt->depth) >> 3;
1106 f->fmt.pix.sizeimage =
1107 f->fmt.pix.height * f->fmt.pix.bytesperline;
1108
1109 return 0;
1da177e4
LT		 1110}
1111
78b526a4 1112static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
8d87cb9f 1113 struct v4l2_format *f)
1da177e4 1114{
8d87cb9f 1115 struct cx8800_fh *fh = priv;
78b526a4 1116 int err = vidioc_try_fmt_vid_cap (file,priv,f);
8d87cb9f
MCC		 1117
1118 if (0 != err)
1119 return err;
1120 fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat);
1121 fh->width = f->fmt.pix.width;
1122 fh->height = f->fmt.pix.height;
1123 fh->vidq.field = f->fmt.pix.field;
1124 return 0;
1da177e4
LT		 1125}
1126
8d87cb9f
MCC		 1127static int vidioc_querycap (struct file *file, void *priv,
1128 struct v4l2_capability *cap)
1da177e4 1129{
8d87cb9f 1130 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4 1131 struct cx88_core *core = dev->core;
1da177e4 1132
8d87cb9f 1133 strcpy(cap->driver, "cx8800");
6a59d64c 1134 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1135 sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci));
1136 cap->version = CX88_VERSION_CODE;
1137 cap->capabilities =
1138 V4L2_CAP_VIDEO_CAPTURE |
1139 V4L2_CAP_READWRITE |
1140 V4L2_CAP_STREAMING |
1141 V4L2_CAP_VBI_CAPTURE;
6a59d64c 1142 if (UNSET != core->board.tuner_type)
8d87cb9f
MCC		 1143 cap->capabilities |= V4L2_CAP_TUNER;
1144 return 0;
1145}
e52e98a7 1146
78b526a4 1147static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv,
8d87cb9f
MCC		 1148 struct v4l2_fmtdesc *f)
1149{
1150 if (unlikely(f->index >= ARRAY_SIZE(formats)))
1151 return -EINVAL;
1152
1153 strlcpy(f->description,formats[f->index].name,sizeof(f->description));
1154 f->pixelformat = formats[f->index].fourcc;
1155
1156 return 0;
1157}
1da177e4 1158
8d87cb9f
MCC		 1159static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p)
1160{
1161 struct cx8800_fh *fh = priv;
1162 return (videobuf_reqbufs(get_queue(fh), p));
1163}
e52e98a7 1164
8d87cb9f
MCC		 1165static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p)
1166{
1167 struct cx8800_fh *fh = priv;
1168 return (videobuf_querybuf(get_queue(fh), p));
1169}
e52e98a7 1170
8d87cb9f
MCC		 1171static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1172{
1173 struct cx8800_fh *fh = priv;
1174 return (videobuf_qbuf(get_queue(fh), p));
1175}
e52e98a7 1176
8d87cb9f
MCC		 1177static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p)
1178{
1179 struct cx8800_fh *fh = priv;
1180 return (videobuf_dqbuf(get_queue(fh), p,
1181 file->f_flags & O_NONBLOCK));
1182}
e52e98a7 1183
8d87cb9f
MCC		 1184static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i)
1185{
1186 struct cx8800_fh *fh = priv;
1187 struct cx8800_dev *dev = fh->dev;
1188
b058e3f3
RD		 1189 /* We should remember that this driver also supports teletext, */
1190 /* so we have to test if the v4l2_buf_type is VBI capture data. */
1191 if (unlikely((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1192 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE)))
8d87cb9f 1193 return -EINVAL;
b058e3f3 1194
8d87cb9f
MCC		 1195 if (unlikely(i != fh->type))
1196 return -EINVAL;
1197
1198 if (unlikely(!res_get(dev,fh,get_ressource(fh))))
1199 return -EBUSY;
1200 return videobuf_streamon(get_queue(fh));
1201}
1202
1203static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i)
1204{
1205 struct cx8800_fh *fh = priv;
1206 struct cx8800_dev *dev = fh->dev;
1207 int err, res;
1208
b058e3f3
RD		 1209 if ((fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) &&
1210 (fh->type != V4L2_BUF_TYPE_VBI_CAPTURE))
8d87cb9f 1211 return -EINVAL;
b058e3f3 1212
8d87cb9f
MCC		 1213 if (i != fh->type)
1214 return -EINVAL;
1215
1216 res = get_ressource(fh);
1217 err = videobuf_streamoff(get_queue(fh));
1218 if (err < 0)
1219 return err;
1220 res_free(dev,fh,res);
e52e98a7
MCC		 1221 return 0;
1222}
1223
63ab1bdc 1224static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms)
e52e98a7 1225{
8d87cb9f 1226 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
e52e98a7 1227
8d87cb9f 1228 mutex_lock(&core->lock);
63ab1bdc 1229 cx88_set_tvnorm(core,*tvnorms);
8d87cb9f 1230 mutex_unlock(&core->lock);
63ab1bdc 1231
8d87cb9f
MCC		 1232 return 0;
1233}
1da177e4 1234
8d87cb9f 1235/* only one input in this sample driver */
54da49f5 1236int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i)
8d87cb9f 1237{
2e4e98e7 1238 static const char * const iname[] = {
8d87cb9f
MCC		 1239 [ CX88_VMUX_COMPOSITE1 ] = "Composite1",
1240 [ CX88_VMUX_COMPOSITE2 ] = "Composite2",
1241 [ CX88_VMUX_COMPOSITE3 ] = "Composite3",
1242 [ CX88_VMUX_COMPOSITE4 ] = "Composite4",
1243 [ CX88_VMUX_SVIDEO ] = "S-Video",
1244 [ CX88_VMUX_TELEVISION ] = "Television",
1245 [ CX88_VMUX_CABLE ] = "Cable TV",
1246 [ CX88_VMUX_DVB ] = "DVB",
1247 [ CX88_VMUX_DEBUG ] = "for debug only",
1248 };
f3334bcb 1249 unsigned int n = i->index;
1da177e4 1250
8d87cb9f
MCC		 1251 if (n >= 4)
1252 return -EINVAL;
6a59d64c 1253 if (0 == INPUT(n).type)
8d87cb9f 1254 return -EINVAL;
8d87cb9f 1255 i->type = V4L2_INPUT_TYPE_CAMERA;
6a59d64c
TP		 1256 strcpy(i->name,iname[INPUT(n).type]);
1257 if ((CX88_VMUX_TELEVISION == INPUT(n).type) ||
473d8024 1258 (CX88_VMUX_CABLE == INPUT(n).type)) {
8d87cb9f 1259 i->type = V4L2_INPUT_TYPE_TUNER;
63ab1bdc 1260 i->std = CX88_NORMS;
473d8024 1261 }
8d87cb9f
MCC		 1262 return 0;
1263}
54da49f5
MCC		 1264EXPORT_SYMBOL(cx88_enum_input);
1265
1266static int vidioc_enum_input (struct file *file, void *priv,
1267 struct v4l2_input *i)
1268{
1269 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1270 return cx88_enum_input (core,i);
1271}
1da177e4 1272
8d87cb9f
MCC		 1273static int vidioc_g_input (struct file *file, void *priv, unsigned int *i)
1274{
1275 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1276
8d87cb9f
MCC		 1277 *i = core->input;
1278 return 0;
1279}
1da177e4 1280
8d87cb9f
MCC		 1281static int vidioc_s_input (struct file *file, void *priv, unsigned int i)
1282{
1283 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1284
8d87cb9f
MCC		 1285 if (i >= 4)
1286 return -EINVAL;
1da177e4 1287
8d87cb9f
MCC		 1288 mutex_lock(&core->lock);
1289 cx88_newstation(core);
e90311a1 1290 cx88_video_mux(core,i);
8d87cb9f
MCC		 1291 mutex_unlock(&core->lock);
1292 return 0;
1293}
1da177e4 1294
1da177e4 1295
1da177e4 1296
8d87cb9f
MCC		 1297static int vidioc_queryctrl (struct file *file, void *priv,
1298 struct v4l2_queryctrl *qctrl)
1299{
6d04203c
FD		 1300 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1301
8d87cb9f
MCC		 1302 qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id);
1303 if (unlikely(qctrl->id == 0))
1304 return -EINVAL;
6d04203c 1305 return cx8800_ctrl_query(core, qctrl);
8d87cb9f 1306}
1da177e4 1307
54da49f5 1308static int vidioc_g_ctrl (struct file *file, void *priv,
8d87cb9f
MCC		 1309 struct v4l2_control *ctl)
1310{
1311 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
54da49f5
MCC		 1312 return
1313 cx88_get_control(core,ctl);
1314}
1da177e4 1315
54da49f5
MCC		 1316static int vidioc_s_ctrl (struct file *file, void *priv,
1317 struct v4l2_control *ctl)
1318{
1319 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
8d87cb9f 1320 return
54da49f5 1321 cx88_set_control(core,ctl);
8d87cb9f
MCC		 1322}
1323
1324static int vidioc_g_tuner (struct file *file, void *priv,
1325 struct v4l2_tuner *t)
1326{
1327 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1328 u32 reg;
1da177e4 1329
6a59d64c 1330 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f 1331 return -EINVAL;
243d8c0f
MCC		 1332 if (0 != t->index)
1333 return -EINVAL;
a82decf6 1334
8d87cb9f
MCC		 1335 strcpy(t->name, "Television");
1336 t->type = V4L2_TUNER_ANALOG_TV;
1337 t->capability = V4L2_TUNER_CAP_NORM;
1338 t->rangehigh = 0xffffffffUL;
a82decf6 1339
8d87cb9f
MCC		 1340 cx88_get_stereo(core ,t);
1341 reg = cx_read(MO_DEVICE_STATUS);
1342 t->signal = (reg & (1<<5)) ? 0xffff : 0x0000;
1343 return 0;
1344}
41ef7c1e 1345
8d87cb9f
MCC		 1346static int vidioc_s_tuner (struct file *file, void *priv,
1347 struct v4l2_tuner *t)
1348{
1349 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
41ef7c1e 1350
6a59d64c 1351 if (UNSET == core->board.tuner_type)
8d87cb9f
MCC		 1352 return -EINVAL;
1353 if (0 != t->index)
1354 return -EINVAL;
c5287ba1 1355
8d87cb9f
MCC		 1356 cx88_set_stereo(core, t->audmode, 1);
1357 return 0;
1358}
902fc997 1359
8d87cb9f
MCC		 1360static int vidioc_g_frequency (struct file *file, void *priv,
1361 struct v4l2_frequency *f)
1362{
1363 struct cx8800_fh *fh = priv;
1364 struct cx88_core *core = fh->dev->core;
902fc997 1365
6a59d64c 1366 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1367 return -EINVAL;
1368
1369 /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */
1370 f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV;
1371 f->frequency = core->freq;
1372
b8341e1d 1373 call_all(core, tuner, g_frequency, f);
1da177e4 1374
1da177e4
LT		 1375 return 0;
1376}
1377
54da49f5 1378int cx88_set_freq (struct cx88_core *core,
8d87cb9f 1379 struct v4l2_frequency *f)
1da177e4 1380{
6a59d64c 1381 if (unlikely(UNSET == core->board.tuner_type))
8d87cb9f
MCC		 1382 return -EINVAL;
1383 if (unlikely(f->tuner != 0))
1384 return -EINVAL;
54da49f5 1385
8d87cb9f
MCC		 1386 mutex_lock(&core->lock);
1387 core->freq = f->frequency;
1388 cx88_newstation(core);
b8341e1d 1389 call_all(core, tuner, s_frequency, f);
c7b0ac05 1390
8d87cb9f
MCC		 1391 /* When changing channels it is required to reset TVAUDIO */
1392 msleep (10);
1393 cx88_set_tvaudio(core);
c7b0ac05 1394
8d87cb9f 1395 mutex_unlock(&core->lock);
54da49f5 1396
8d87cb9f 1397 return 0;
1da177e4 1398}
54da49f5
MCC		 1399EXPORT_SYMBOL(cx88_set_freq);
1400
1401static int vidioc_s_frequency (struct file *file, void *priv,
1402 struct v4l2_frequency *f)
1403{
1404 struct cx8800_fh *fh = priv;
1405 struct cx88_core *core = fh->dev->core;
1406
1407 if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV))
1408 return -EINVAL;
1409 if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO))
1410 return -EINVAL;
1411
1412 return
1413 cx88_set_freq (core,f);
1414}
1da177e4 1415
dbbff48f
TP		 1416#ifdef CONFIG_VIDEO_ADV_DEBUG
1417static int vidioc_g_register (struct file *file, void *fh,
aecde8b5 1418 struct v4l2_dbg_register *reg)
dbbff48f
TP		 1419{
1420 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1421
aecde8b5 1422 if (!v4l2_chip_match_host(&reg->match))
dbbff48f
TP		 1423 return -EINVAL;
1424 /* cx2388x has a 24-bit register space */
aecde8b5
HV		 1425 reg->val = cx_read(reg->reg & 0xffffff);
1426 reg->size = 4;
dbbff48f
TP		 1427 return 0;
1428}
1429
1430static int vidioc_s_register (struct file *file, void *fh,
aecde8b5 1431 struct v4l2_dbg_register *reg)
dbbff48f
TP		 1432{
1433 struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core;
1434
aecde8b5 1435 if (!v4l2_chip_match_host(&reg->match))
dbbff48f 1436 return -EINVAL;
aecde8b5 1437 cx_write(reg->reg & 0xffffff, reg->val);
dbbff48f
TP		 1438 return 0;
1439}
1440#endif
8d87cb9f
MCC		 1441
1442/* ----------------------------------------------------------- */
1443/* RADIO ESPECIFIC IOCTLS */
1da177e4
LT		 1444/* ----------------------------------------------------------- */
1445
8d87cb9f
MCC		 1446static int radio_querycap (struct file *file, void *priv,
1447 struct v4l2_capability *cap)
1da177e4 1448{
8d87cb9f 1449 struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev;
1da177e4
LT		 1450 struct cx88_core *core = dev->core;
1451
8d87cb9f 1452 strcpy(cap->driver, "cx8800");
6a59d64c 1453 strlcpy(cap->card, core->board.name, sizeof(cap->card));
8d87cb9f
MCC		 1454 sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci));
1455 cap->version = CX88_VERSION_CODE;
1456 cap->capabilities = V4L2_CAP_TUNER;
1457 return 0;
1458}
1da177e4 1459
8d87cb9f
MCC		 1460static int radio_g_tuner (struct file *file, void *priv,
1461 struct v4l2_tuner *t)
1462{
1463 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
1da177e4 1464
8d87cb9f
MCC		 1465 if (unlikely(t->index > 0))
1466 return -EINVAL;
1da177e4 1467
8d87cb9f
MCC		 1468 strcpy(t->name, "Radio");
1469 t->type = V4L2_TUNER_RADIO;
1da177e4 1470
b8341e1d 1471 call_all(core, tuner, g_tuner, t);
8d87cb9f
MCC		 1472 return 0;
1473}
1da177e4 1474
8d87cb9f
MCC		 1475static int radio_enum_input (struct file *file, void *priv,
1476 struct v4l2_input *i)
1477{
1478 if (i->index != 0)
1479 return -EINVAL;
1480 strcpy(i->name,"Radio");
1481 i->type = V4L2_INPUT_TYPE_TUNER;
a82decf6 1482
8d87cb9f
MCC		 1483 return 0;
1484}
a82decf6 1485
8d87cb9f
MCC		 1486static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a)
1487{
1488 if (unlikely(a->index))
1489 return -EINVAL;
a82decf6 1490
8d87cb9f
MCC		 1491 strcpy(a->name,"Radio");
1492 return 0;
1493}
a82decf6 1494
8d87cb9f 1495/* FIXME: Should add a standard for radio */
a82decf6 1496
8d87cb9f
MCC		 1497static int radio_s_tuner (struct file *file, void *priv,
1498 struct v4l2_tuner *t)
1499{
1500 struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core;
a82decf6 1501
8d87cb9f
MCC		 1502 if (0 != t->index)
1503 return -EINVAL;
1da177e4 1504
b8341e1d 1505 call_all(core, tuner, s_tuner, t);
1da177e4 1506
8d87cb9f
MCC		 1507 return 0;
1508}
1da177e4 1509
8d87cb9f
MCC		 1510static int radio_s_audio (struct file *file, void *fh,
1511 struct v4l2_audio *a)
1512{
1513 return 0;
1514}
1da177e4 1515
8d87cb9f
MCC		 1516static int radio_s_input (struct file *file, void *fh, unsigned int i)
1517{
1da177e4 1518 return 0;
8d87cb9f 1519}
1da177e4 1520
8d87cb9f
MCC		 1521static int radio_queryctrl (struct file *file, void *priv,
1522 struct v4l2_queryctrl *c)
1da177e4 1523{
8d87cb9f
MCC		 1524 int i;
1525
1526 if (c->id < V4L2_CID_BASE ||
1527 c->id >= V4L2_CID_LASTP1)
1528 return -EINVAL;
46e67acd 1529 if (c->id == V4L2_CID_AUDIO_MUTE) {
a41b2ea7 1530 for (i = 0; i < CX8800_CTLS; i++) {
8d87cb9f
MCC		 1531 if (cx8800_ctls[i].v.id == c->id)
1532 break;
a41b2ea7
DC		 1533 }
1534 if (i == CX8800_CTLS)
1535 return -EINVAL;
8d87cb9f
MCC		 1536 *c = cx8800_ctls[i].v;
1537 } else
1538 *c = no_ctl;
1539 return 0;
1540}
1da177e4
LT		 1541
1542/* ----------------------------------------------------------- */
1543
1544static void cx8800_vid_timeout(unsigned long data)
1545{
1546 struct cx8800_dev *dev = (struct cx8800_dev*)data;
1547 struct cx88_core *core = dev->core;
1548 struct cx88_dmaqueue *q = &dev->vidq;
1549 struct cx88_buffer *buf;
1550 unsigned long flags;
1551
e52e98a7 1552 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1553
1554 cx_clear(MO_VID_DMACNTRL, 0x11);
1555 cx_clear(VID_CAPTURE_CONTROL, 0x06);
1556
1557 spin_lock_irqsave(&dev->slock,flags);
1558 while (!list_empty(&q->active)) {
1559 buf = list_entry(q->active.next, struct cx88_buffer, vb.queue);
1560 list_del(&buf->vb.queue);
0fc0686e 1561 buf->vb.state = VIDEOBUF_ERROR;
1da177e4
LT		 1562 wake_up(&buf->vb.done);
1563 printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name,
1564 buf, buf->vb.i, (unsigned long)buf->risc.dma);
1565 }
1566 restart_video_queue(dev,q);
1567 spin_unlock_irqrestore(&dev->slock,flags);
1568}
1569
2e4e98e7 1570static const char *cx88_vid_irqs[32] = {
41ef7c1e
MCC		 1571 "y_risci1", "u_risci1", "v_risci1", "vbi_risc1",
1572 "y_risci2", "u_risci2", "v_risci2", "vbi_risc2",
1573 "y_oflow", "u_oflow", "v_oflow", "vbi_oflow",
1574 "y_sync", "u_sync", "v_sync", "vbi_sync",
1575 "opc_err", "par_err", "rip_err", "pci_abort",
1576};
1577
1da177e4
LT		 1578static void cx8800_vid_irq(struct cx8800_dev *dev)
1579{
1580 struct cx88_core *core = dev->core;
1581 u32 status, mask, count;
1582
1583 status = cx_read(MO_VID_INTSTAT);
1584 mask = cx_read(MO_VID_INTMSK);
1585 if (0 == (status & mask))
1586 return;
1587 cx_write(MO_VID_INTSTAT, status);
1588 if (irq_debug || (status & mask & ~0xff))
1589 cx88_print_irqbits(core->name, "irq vid",
66623a04
MCC		 1590 cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs),
1591 status, mask);
1da177e4
LT		 1592
1593 /* risc op code error */
1594 if (status & (1 << 16)) {
1595 printk(KERN_WARNING "%s/0: video risc op code error\n",core->name);
1596 cx_clear(MO_VID_DMACNTRL, 0x11);
1597 cx_clear(VID_CAPTURE_CONTROL, 0x06);
e52e98a7 1598 cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]);
1da177e4
LT		 1599 }
1600
1601 /* risc1 y */
1602 if (status & 0x01) {
1603 spin_lock(&dev->slock);
1604 count = cx_read(MO_VIDY_GPCNT);
e52e98a7 1605 cx88_wakeup(core, &dev->vidq, count);
1da177e4
LT		 1606 spin_unlock(&dev->slock);
1607 }
1608
1609 /* risc1 vbi */
1610 if (status & 0x08) {
1611 spin_lock(&dev->slock);
1612 count = cx_read(MO_VBI_GPCNT);
e52e98a7 1613 cx88_wakeup(core, &dev->vbiq, count);
1da177e4
LT		 1614 spin_unlock(&dev->slock);
1615 }
1616
1617 /* risc2 y */
1618 if (status & 0x10) {
1619 dprintk(2,"stopper video\n");
1620 spin_lock(&dev->slock);
1621 restart_video_queue(dev,&dev->vidq);
1622 spin_unlock(&dev->slock);
1623 }
1624
1625 /* risc2 vbi */
1626 if (status & 0x80) {
1627 dprintk(2,"stopper vbi\n");
1628 spin_lock(&dev->slock);
1629 cx8800_restart_vbi_queue(dev,&dev->vbiq);
1630 spin_unlock(&dev->slock);
1631 }
1632}
1633
7d12e780 1634static irqreturn_t cx8800_irq(int irq, void *dev_id)
1da177e4
LT		 1635{
1636 struct cx8800_dev *dev = dev_id;
1637 struct cx88_core *core = dev->core;
1638 u32 status;
1639 int loop, handled = 0;
1640
1641 for (loop = 0; loop < 10; loop++) {
8ddac9ee
TP		 1642 status = cx_read(MO_PCI_INTSTAT) &
1643 (core->pci_irqmask | PCI_INT_VIDINT);
1da177e4
LT		 1644 if (0 == status)
1645 goto out;
1646 cx_write(MO_PCI_INTSTAT, status);
1647 handled = 1;
1648
1649 if (status & core->pci_irqmask)
1650 cx88_core_irq(core,status);
8ddac9ee 1651 if (status & PCI_INT_VIDINT)
1da177e4
LT		 1652 cx8800_vid_irq(dev);
1653 };
1654 if (10 == loop) {
1655 printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n",
1656 core->name);
1657 cx_write(MO_PCI_INTMSK,0);
1658 }
1659
1660 out:
1661 return IRQ_RETVAL(handled);
1662}
1663
1664/* ----------------------------------------------------------- */
1665/* exported stuff */
1666
bec43661 1667static const struct v4l2_file_operations video_fops =
1da177e4
LT		 1668{
1669 .owner = THIS_MODULE,
1670 .open = video_open,
1671 .release = video_release,
1672 .read = video_read,
1673 .poll = video_poll,
1674 .mmap = video_mmap,
8d87cb9f 1675 .ioctl = video_ioctl2,
1da177e4
LT		 1676};
1677
a399810c 1678static const struct v4l2_ioctl_ops video_ioctl_ops = {
8d87cb9f 1679 .vidioc_querycap = vidioc_querycap,
78b526a4
HV		 1680 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
1681 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
1682 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
1683 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
1684 .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt,
1685 .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt,
1686 .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt,
8d87cb9f
MCC		 1687 .vidioc_reqbufs = vidioc_reqbufs,
1688 .vidioc_querybuf = vidioc_querybuf,
1689 .vidioc_qbuf = vidioc_qbuf,
1690 .vidioc_dqbuf = vidioc_dqbuf,
1691 .vidioc_s_std = vidioc_s_std,
1692 .vidioc_enum_input = vidioc_enum_input,
1693 .vidioc_g_input = vidioc_g_input,
1694 .vidioc_s_input = vidioc_s_input,
1695 .vidioc_queryctrl = vidioc_queryctrl,
1696 .vidioc_g_ctrl = vidioc_g_ctrl,
1697 .vidioc_s_ctrl = vidioc_s_ctrl,
1698 .vidioc_streamon = vidioc_streamon,
1699 .vidioc_streamoff = vidioc_streamoff,
8d87cb9f
MCC		 1700 .vidioc_g_tuner = vidioc_g_tuner,
1701 .vidioc_s_tuner = vidioc_s_tuner,
1702 .vidioc_g_frequency = vidioc_g_frequency,
1703 .vidioc_s_frequency = vidioc_s_frequency,
dbbff48f
TP		 1704#ifdef CONFIG_VIDEO_ADV_DEBUG
1705 .vidioc_g_register = vidioc_g_register,
1706 .vidioc_s_register = vidioc_s_register,
1707#endif
a399810c
HV		 1708};
1709
1710static struct video_device cx8800_vbi_template;
1711
2e4e98e7 1712static const struct video_device cx8800_video_template = {
a399810c 1713 .name = "cx8800-video",
a399810c 1714 .fops = &video_fops,
a399810c 1715 .ioctl_ops = &video_ioctl_ops,
63ab1bdc 1716 .tvnorms = CX88_NORMS,
dbbff48f 1717 .current_norm = V4L2_STD_NTSC_M,
1da177e4
LT		 1718};
1719
bec43661 1720static const struct v4l2_file_operations radio_fops =
1da177e4
LT		 1721{
1722 .owner = THIS_MODULE,
1723 .open = video_open,
1724 .release = video_release,
8d87cb9f 1725 .ioctl = video_ioctl2,
1da177e4
LT		 1726};
1727
a399810c 1728static const struct v4l2_ioctl_ops radio_ioctl_ops = {
8d87cb9f
MCC		 1729 .vidioc_querycap = radio_querycap,
1730 .vidioc_g_tuner = radio_g_tuner,
1731 .vidioc_enum_input = radio_enum_input,
1732 .vidioc_g_audio = radio_g_audio,
1733 .vidioc_s_tuner = radio_s_tuner,
1734 .vidioc_s_audio = radio_s_audio,
1735 .vidioc_s_input = radio_s_input,
1736 .vidioc_queryctrl = radio_queryctrl,
1737 .vidioc_g_ctrl = vidioc_g_ctrl,
1738 .vidioc_s_ctrl = vidioc_s_ctrl,
1739 .vidioc_g_frequency = vidioc_g_frequency,
1740 .vidioc_s_frequency = vidioc_s_frequency,
a75d2048
TP		 1741#ifdef CONFIG_VIDEO_ADV_DEBUG
1742 .vidioc_g_register = vidioc_g_register,
1743 .vidioc_s_register = vidioc_s_register,
1744#endif
1da177e4
LT		 1745};
1746
2e4e98e7 1747static const struct video_device cx8800_radio_template = {
a399810c 1748 .name = "cx8800-radio",
a399810c 1749 .fops = &radio_fops,
a399810c
HV		 1750 .ioctl_ops = &radio_ioctl_ops,
1751};
1752
1da177e4
LT		 1753/* ----------------------------------------------------------- */
1754
1755static void cx8800_unregister_video(struct cx8800_dev *dev)
1756{
1757 if (dev->radio_dev) {
f0813b4c 1758 if (video_is_registered(dev->radio_dev))
1da177e4
LT		 1759 video_unregister_device(dev->radio_dev);
1760 else
1761 video_device_release(dev->radio_dev);
1762 dev->radio_dev = NULL;
1763 }
1764 if (dev->vbi_dev) {
f0813b4c 1765 if (video_is_registered(dev->vbi_dev))
1da177e4
LT		 1766 video_unregister_device(dev->vbi_dev);
1767 else
1768 video_device_release(dev->vbi_dev);
1769 dev->vbi_dev = NULL;
1770 }
1771 if (dev->video_dev) {
f0813b4c 1772 if (video_is_registered(dev->video_dev))
1da177e4
LT		 1773 video_unregister_device(dev->video_dev);
1774 else
1775 video_device_release(dev->video_dev);
1776 dev->video_dev = NULL;
1777 }
1778}
1779
1780static int __devinit cx8800_initdev(struct pci_dev *pci_dev,
1781 const struct pci_device_id *pci_id)
1782{
1783 struct cx8800_dev *dev;
1784 struct cx88_core *core;
8d87cb9f 1785
1da177e4
LT		 1786 int err;
1787
7408187d 1788 dev = kzalloc(sizeof(*dev),GFP_KERNEL);
1da177e4
LT		 1789 if (NULL == dev)
1790 return -ENOMEM;
1da177e4
LT		 1791
1792 /* pci init */
1793 dev->pci = pci_dev;
1794 if (pci_enable_device(pci_dev)) {
1795 err = -EIO;
1796 goto fail_free;
1797 }
1798 core = cx88_core_get(dev->pci);
1799 if (NULL == core) {
1800 err = -EINVAL;
1801 goto fail_free;
1802 }
1803 dev->core = core;
1804
1805 /* print pci info */
1806 pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev);
4ac97914
MCC		 1807 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat);
1808 printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
228aef63 1809 "latency: %d, mmio: 0x%llx\n", core->name,
1da177e4 1810 pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
228aef63 1811 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0));
1da177e4
LT		 1812
1813 pci_set_master(pci_dev);
284901a9 1814 if (!pci_dma_supported(pci_dev,DMA_BIT_MASK(32))) {
1da177e4
LT		 1815 printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name);
1816 err = -EIO;
1817 goto fail_core;
1818 }
1819
8d87cb9f
MCC		 1820 /* Initialize VBI template */
1821 memcpy( &cx8800_vbi_template, &cx8800_video_template,
1822 sizeof(cx8800_vbi_template) );
1823 strcpy(cx8800_vbi_template.name,"cx8800-vbi");
8d87cb9f 1824
1da177e4 1825 /* initialize driver struct */
1da177e4 1826 spin_lock_init(&dev->slock);
63ab1bdc 1827 core->tvnorm = cx8800_video_template.current_norm;
1da177e4
LT		 1828
1829 /* init video dma queues */
1830 INIT_LIST_HEAD(&dev->vidq.active);
1831 INIT_LIST_HEAD(&dev->vidq.queued);
1832 dev->vidq.timeout.function = cx8800_vid_timeout;
1833 dev->vidq.timeout.data = (unsigned long)dev;
1834 init_timer(&dev->vidq.timeout);
1835 cx88_risc_stopper(dev->pci,&dev->vidq.stopper,
1836 MO_VID_DMACNTRL,0x11,0x00);
1837
1838 /* init vbi dma queues */
1839 INIT_LIST_HEAD(&dev->vbiq.active);
1840 INIT_LIST_HEAD(&dev->vbiq.queued);
1841 dev->vbiq.timeout.function = cx8800_vbi_timeout;
1842 dev->vbiq.timeout.data = (unsigned long)dev;
1843 init_timer(&dev->vbiq.timeout);
1844 cx88_risc_stopper(dev->pci,&dev->vbiq.stopper,
1845 MO_VID_DMACNTRL,0x88,0x00);
1846
1847 /* get irq */
1848 err = request_irq(pci_dev->irq, cx8800_irq,
8076fe32 1849 IRQF_SHARED | IRQF_DISABLED, core->name, dev);
1da177e4 1850 if (err < 0) {
5772f813 1851 printk(KERN_ERR "%s/0: can't get IRQ %d\n",
1da177e4
LT		 1852 core->name,pci_dev->irq);
1853 goto fail_core;
1854 }
1855 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1856
1857 /* load and configure helper modules */
e52e98a7 1858
38f9d308 1859 if (core->board.audio_chip == V4L2_IDENT_WM8775)
e6574f2f 1860 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
9a1f8b34 1861 "wm8775", 0x36 >> 1, NULL);
b8341e1d
HV		 1862
1863 if (core->board.audio_chip == V4L2_IDENT_TVAUDIO) {
1864 /* This probes for a tda9874 as is used on some
1865 Pixelview Ultra boards. */
9a1f8b34
LP		 1866 v4l2_i2c_new_subdev(&core->v4l2_dev, &core->i2c_adap,
1867 "tvaudio", 0, I2C_ADDRS(0xb0 >> 1));
b8341e1d 1868 }
3057906d 1869
6fcecce7
MK		 1870 switch (core->boardnr) {
1871 case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
b8341e1d 1872 case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: {
2e4e98e7 1873 static const struct i2c_board_info rtc_info = {
b8341e1d
HV		 1874 I2C_BOARD_INFO("isl1208", 0x6f)
1875 };
1876
6fcecce7 1877 request_module("rtc-isl1208");
b8341e1d
HV		 1878 core->i2c_rtc = i2c_new_device(&core->i2c_adap, &rtc_info);
1879 }
8efd2e28
MK		 1880 /* break intentionally omitted */
1881 case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
1882 request_module("ir-kbd-i2c");
6fcecce7
MK		 1883 }
1884
1da177e4
LT		 1885 /* register v4l devices */
1886 dev->video_dev = cx88_vdev_init(core,dev->pci,
1887 &cx8800_video_template,"video");
63b0d5ad 1888 video_set_drvdata(dev->video_dev, dev);
1da177e4
LT		 1889 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER,
1890 video_nr[core->nr]);
1891 if (err < 0) {
5772f813 1892 printk(KERN_ERR "%s/0: can't register video device\n",
1da177e4
LT		 1893 core->name);
1894 goto fail_unreg;
1895 }
38c7c036
LP		 1896 printk(KERN_INFO "%s/0: registered device %s [v4l2]\n",
1897 core->name, video_device_node_name(dev->video_dev));
1da177e4
LT		 1898
1899 dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi");
63b0d5ad 1900 video_set_drvdata(dev->vbi_dev, dev);
1da177e4
LT		 1901 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI,
1902 vbi_nr[core->nr]);
1903 if (err < 0) {
5772f813 1904 printk(KERN_ERR "%s/0: can't register vbi device\n",
1da177e4
LT		 1905 core->name);
1906 goto fail_unreg;
1907 }
38c7c036
LP		 1908 printk(KERN_INFO "%s/0: registered device %s\n",
1909 core->name, video_device_node_name(dev->vbi_dev));
1da177e4 1910
6a59d64c 1911 if (core->board.radio.type == CX88_RADIO) {
1da177e4
LT		 1912 dev->radio_dev = cx88_vdev_init(core,dev->pci,
1913 &cx8800_radio_template,"radio");
63b0d5ad 1914 video_set_drvdata(dev->radio_dev, dev);
1da177e4
LT		 1915 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO,
1916 radio_nr[core->nr]);
1917 if (err < 0) {
5772f813 1918 printk(KERN_ERR "%s/0: can't register radio device\n",
1da177e4
LT		 1919 core->name);
1920 goto fail_unreg;
1921 }
38c7c036
LP		 1922 printk(KERN_INFO "%s/0: registered device %s\n",
1923 core->name, video_device_node_name(dev->radio_dev));
1da177e4
LT		 1924 }
1925
1926 /* everything worked */
1da177e4
LT		 1927 pci_set_drvdata(pci_dev,dev);
1928
1929 /* initial device configuration */
3593cab5 1930 mutex_lock(&core->lock);
63ab1bdc 1931 cx88_set_tvnorm(core,core->tvnorm);
70f00044 1932 init_controls(core);
e90311a1 1933 cx88_video_mux(core,0);
3593cab5 1934 mutex_unlock(&core->lock);
1da177e4
LT		 1935
1936 /* start tvaudio thread */
6a59d64c 1937 if (core->board.tuner_type != TUNER_ABSENT) {
1da177e4 1938 core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio");
32b78de7
CG		 1939 if (IS_ERR(core->kthread)) {
1940 err = PTR_ERR(core->kthread);
5772f813
TP		 1941 printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n",
1942 core->name, err);
32b78de7
CG		 1943 }
1944 }
1da177e4
LT		 1945 return 0;
1946
1947fail_unreg:
1948 cx8800_unregister_video(dev);
1949 free_irq(pci_dev->irq, dev);
1950fail_core:
1951 cx88_core_put(core,dev->pci);
1952fail_free:
1953 kfree(dev);
1954 return err;
1955}
1956
1957static void __devexit cx8800_finidev(struct pci_dev *pci_dev)
1958{
4ac97914 1959 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
e52e98a7 1960 struct cx88_core *core = dev->core;
1da177e4
LT		 1961
1962 /* stop thread */
e52e98a7
MCC		 1963 if (core->kthread) {
1964 kthread_stop(core->kthread);
1965 core->kthread = NULL;
1da177e4
LT		 1966 }
1967
b12203d2 1968 if (core->ir)
92f4fc10 1969 cx88_ir_stop(core);
b12203d2 1970
e52e98a7 1971 cx88_shutdown(core); /* FIXME */
1da177e4
LT		 1972 pci_disable_device(pci_dev);
1973
1974 /* unregister stuff */
1975
1976 free_irq(pci_dev->irq, dev);
1977 cx8800_unregister_video(dev);
1978 pci_set_drvdata(pci_dev, NULL);
1979
1980 /* free memory */
1981 btcx_riscmem_free(dev->pci,&dev->vidq.stopper);
e52e98a7 1982 cx88_core_put(core,dev->pci);
1da177e4
LT		 1983 kfree(dev);
1984}
1985
17bc98a4 1986#ifdef CONFIG_PM
1da177e4
LT		 1987static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state)
1988{
b45009b0 1989 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4
LT		 1990 struct cx88_core *core = dev->core;
1991
1992 /* stop video+vbi capture */
1993 spin_lock(&dev->slock);
1994 if (!list_empty(&dev->vidq.active)) {
5772f813 1995 printk("%s/0: suspend video\n", core->name);
1da177e4
LT		 1996 stop_video_dma(dev);
1997 del_timer(&dev->vidq.timeout);
1998 }
1999 if (!list_empty(&dev->vbiq.active)) {
5772f813 2000 printk("%s/0: suspend vbi\n", core->name);
1da177e4
LT		 2001 cx8800_stop_vbi_dma(dev);
2002 del_timer(&dev->vbiq.timeout);
2003 }
2004 spin_unlock(&dev->slock);
2005
13595a51 2006 if (core->ir)
92f4fc10 2007 cx88_ir_stop(core);
1da177e4 2008 /* FIXME -- shutdown device */
e52e98a7 2009 cx88_shutdown(core);
1da177e4
LT		 2010
2011 pci_save_state(pci_dev);
2012 if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) {
2013 pci_disable_device(pci_dev);
2014 dev->state.disabled = 1;
2015 }
2016 return 0;
2017}
2018
2019static int cx8800_resume(struct pci_dev *pci_dev)
2020{
b45009b0 2021 struct cx8800_dev *dev = pci_get_drvdata(pci_dev);
1da177e4 2022 struct cx88_core *core = dev->core;
08adb9e2 2023 int err;
1da177e4
LT		 2024
2025 if (dev->state.disabled) {
08adb9e2
MCC		 2026 err=pci_enable_device(pci_dev);
2027 if (err) {
5772f813
TP		 2028 printk(KERN_ERR "%s/0: can't enable device\n",
2029 core->name);
08adb9e2
MCC		 2030 return err;
2031 }
2032
1da177e4
LT		 2033 dev->state.disabled = 0;
2034 }
08adb9e2
MCC		 2035 err= pci_set_power_state(pci_dev, PCI_D0);
2036 if (err) {
5772f813 2037 printk(KERN_ERR "%s/0: can't set power state\n", core->name);
08adb9e2
MCC		 2038 pci_disable_device(pci_dev);
2039 dev->state.disabled = 1;
2040
2041 return err;
2042 }
1da177e4
LT		 2043 pci_restore_state(pci_dev);
2044
1da177e4 2045 /* FIXME: re-initialize hardware */
e52e98a7 2046 cx88_reset(core);
13595a51 2047 if (core->ir)
92f4fc10 2048 cx88_ir_start(core);
13595a51
MCC		 2049
2050 cx_set(MO_PCI_INTMSK, core->pci_irqmask);
1da177e4
LT		 2051
2052 /* restart video+vbi capture */
2053 spin_lock(&dev->slock);
2054 if (!list_empty(&dev->vidq.active)) {
5772f813 2055 printk("%s/0: resume video\n", core->name);
1da177e4
LT		 2056 restart_video_queue(dev,&dev->vidq);
2057 }
2058 if (!list_empty(&dev->vbiq.active)) {
5772f813 2059 printk("%s/0: resume vbi\n", core->name);
1da177e4
LT		 2060 cx8800_restart_vbi_queue(dev,&dev->vbiq);
2061 }
2062 spin_unlock(&dev->slock);
2063
2064 return 0;
2065}
17bc98a4 2066#endif
1da177e4
LT		 2067
2068/* ----------------------------------------------------------- */
2069
2e4e98e7 2070static const struct pci_device_id cx8800_pci_tbl[] = {
1da177e4
LT		 2071 {
2072 .vendor = 0x14f1,
2073 .device = 0x8800,
b45009b0
MCC		 2074 .subvendor = PCI_ANY_ID,
2075 .subdevice = PCI_ANY_ID,
1da177e4
LT		 2076 },{
2077 /* --- end of list --- */
2078 }
2079};
2080MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl);
2081
2082static struct pci_driver cx8800_pci_driver = {
b45009b0
MCC		 2083 .name = "cx8800",
2084 .id_table = cx8800_pci_tbl,
2085 .probe = cx8800_initdev,
2086 .remove = __devexit_p(cx8800_finidev),
17bc98a4 2087#ifdef CONFIG_PM
1da177e4
LT		 2088 .suspend = cx8800_suspend,
2089 .resume = cx8800_resume,
17bc98a4 2090#endif
1da177e4
LT		 2091};
2092
31d0f845 2093static int __init cx8800_init(void)
1da177e4 2094{
5772f813 2095 printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n",
1da177e4
LT		 2096 (CX88_VERSION_CODE >> 16) & 0xff,
2097 (CX88_VERSION_CODE >> 8) & 0xff,
2098 CX88_VERSION_CODE & 0xff);
2099#ifdef SNAPSHOT
2100 printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
2101 SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
2102#endif
2103 return pci_register_driver(&cx8800_pci_driver);
2104}
2105
31d0f845 2106static void __exit cx8800_fini(void)
1da177e4
LT		 2107{
2108 pci_unregister_driver(&cx8800_pci_driver);
2109}
2110
2111module_init(cx8800_init);
2112module_exit(cx8800_fini);
2113
2114/* ----------------------------------------------------------- */
2115/*
2116 * Local variables:
2117 * c-basic-offset: 8
2118 * End:
b45009b0 2119 * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
1da177e4 2120 */
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