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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * device driver for Conexant 2388x based TV cards | |
4 | * video4linux video interface | |
5 | * | |
6 | * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
7 | * | |
8d87cb9f MCC |
8 | * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org> |
9 | * - Multituner support | |
10 | * - video_ioctl2 conversion | |
11 | * - PAL/M fixes | |
12 | * | |
1da177e4 LT |
13 | * This program is free software; you can redistribute it and/or modify |
14 | * it under the terms of the GNU General Public License as published by | |
15 | * the Free Software Foundation; either version 2 of the License, or | |
16 | * (at your option) any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, write to the Free Software | |
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
26 | */ | |
27 | ||
28 | #include <linux/init.h> | |
29 | #include <linux/list.h> | |
30 | #include <linux/module.h> | |
1da177e4 LT |
31 | #include <linux/kmod.h> |
32 | #include <linux/kernel.h> | |
33 | #include <linux/slab.h> | |
34 | #include <linux/interrupt.h> | |
c24228da | 35 | #include <linux/dma-mapping.h> |
1da177e4 LT |
36 | #include <linux/delay.h> |
37 | #include <linux/kthread.h> | |
38 | #include <asm/div64.h> | |
39 | ||
40 | #include "cx88.h" | |
5e453dc7 | 41 | #include <media/v4l2-common.h> |
1da177e4 | 42 | |
cd41e28e | 43 | #ifdef CONFIG_VIDEO_V4L1_COMPAT |
79436633 MCC |
44 | /* Include V4L1 specific functions. Should be removed soon */ |
45 | #include <linux/videodev.h> | |
cd41e28e | 46 | #endif |
79436633 | 47 | |
1da177e4 LT |
48 | MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards"); |
49 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); | |
50 | MODULE_LICENSE("GPL"); | |
51 | ||
52 | /* ------------------------------------------------------------------ */ | |
53 | ||
54 | static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | |
55 | static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | |
56 | static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | |
57 | ||
58 | module_param_array(video_nr, int, NULL, 0444); | |
59 | module_param_array(vbi_nr, int, NULL, 0444); | |
60 | module_param_array(radio_nr, int, NULL, 0444); | |
61 | ||
62 | MODULE_PARM_DESC(video_nr,"video device numbers"); | |
63 | MODULE_PARM_DESC(vbi_nr,"vbi device numbers"); | |
64 | MODULE_PARM_DESC(radio_nr,"radio device numbers"); | |
65 | ||
66 | static unsigned int video_debug = 0; | |
67 | module_param(video_debug,int,0644); | |
68 | MODULE_PARM_DESC(video_debug,"enable debug messages [video]"); | |
69 | ||
70 | static unsigned int irq_debug = 0; | |
71 | module_param(irq_debug,int,0644); | |
72 | MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]"); | |
73 | ||
74 | static unsigned int vid_limit = 16; | |
75 | module_param(vid_limit,int,0644); | |
76 | MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes"); | |
77 | ||
78 | #define dprintk(level,fmt, arg...) if (video_debug >= level) \ | |
e52e98a7 | 79 | printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg) |
1da177e4 LT |
80 | |
81 | /* ------------------------------------------------------------------ */ | |
82 | ||
83 | static LIST_HEAD(cx8800_devlist); | |
84 | ||
85 | /* ------------------------------------------------------------------- */ | |
86 | /* static data */ | |
87 | ||
1da177e4 LT |
88 | static struct cx8800_fmt formats[] = { |
89 | { | |
90 | .name = "8 bpp, gray", | |
91 | .fourcc = V4L2_PIX_FMT_GREY, | |
92 | .cxformat = ColorFormatY8, | |
93 | .depth = 8, | |
94 | .flags = FORMAT_FLAGS_PACKED, | |
95 | },{ | |
96 | .name = "15 bpp RGB, le", | |
97 | .fourcc = V4L2_PIX_FMT_RGB555, | |
98 | .cxformat = ColorFormatRGB15, | |
99 | .depth = 16, | |
100 | .flags = FORMAT_FLAGS_PACKED, | |
101 | },{ | |
102 | .name = "15 bpp RGB, be", | |
103 | .fourcc = V4L2_PIX_FMT_RGB555X, | |
104 | .cxformat = ColorFormatRGB15 | ColorFormatBSWAP, | |
105 | .depth = 16, | |
106 | .flags = FORMAT_FLAGS_PACKED, | |
107 | },{ | |
108 | .name = "16 bpp RGB, le", | |
109 | .fourcc = V4L2_PIX_FMT_RGB565, | |
110 | .cxformat = ColorFormatRGB16, | |
111 | .depth = 16, | |
112 | .flags = FORMAT_FLAGS_PACKED, | |
113 | },{ | |
114 | .name = "16 bpp RGB, be", | |
115 | .fourcc = V4L2_PIX_FMT_RGB565X, | |
116 | .cxformat = ColorFormatRGB16 | ColorFormatBSWAP, | |
117 | .depth = 16, | |
118 | .flags = FORMAT_FLAGS_PACKED, | |
119 | },{ | |
120 | .name = "24 bpp RGB, le", | |
121 | .fourcc = V4L2_PIX_FMT_BGR24, | |
122 | .cxformat = ColorFormatRGB24, | |
123 | .depth = 24, | |
124 | .flags = FORMAT_FLAGS_PACKED, | |
125 | },{ | |
126 | .name = "32 bpp RGB, le", | |
127 | .fourcc = V4L2_PIX_FMT_BGR32, | |
128 | .cxformat = ColorFormatRGB32, | |
129 | .depth = 32, | |
130 | .flags = FORMAT_FLAGS_PACKED, | |
131 | },{ | |
132 | .name = "32 bpp RGB, be", | |
133 | .fourcc = V4L2_PIX_FMT_RGB32, | |
134 | .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP, | |
135 | .depth = 32, | |
136 | .flags = FORMAT_FLAGS_PACKED, | |
137 | },{ | |
138 | .name = "4:2:2, packed, YUYV", | |
139 | .fourcc = V4L2_PIX_FMT_YUYV, | |
140 | .cxformat = ColorFormatYUY2, | |
141 | .depth = 16, | |
142 | .flags = FORMAT_FLAGS_PACKED, | |
143 | },{ | |
144 | .name = "4:2:2, packed, UYVY", | |
145 | .fourcc = V4L2_PIX_FMT_UYVY, | |
146 | .cxformat = ColorFormatYUY2 | ColorFormatBSWAP, | |
147 | .depth = 16, | |
148 | .flags = FORMAT_FLAGS_PACKED, | |
149 | }, | |
150 | }; | |
151 | ||
152 | static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc) | |
153 | { | |
154 | unsigned int i; | |
155 | ||
156 | for (i = 0; i < ARRAY_SIZE(formats); i++) | |
157 | if (formats[i].fourcc == fourcc) | |
158 | return formats+i; | |
159 | return NULL; | |
160 | } | |
161 | ||
162 | /* ------------------------------------------------------------------- */ | |
163 | ||
164 | static const struct v4l2_queryctrl no_ctl = { | |
165 | .name = "42", | |
166 | .flags = V4L2_CTRL_FLAG_DISABLED, | |
167 | }; | |
168 | ||
169 | static struct cx88_ctrl cx8800_ctls[] = { | |
170 | /* --- video --- */ | |
171 | { | |
172 | .v = { | |
173 | .id = V4L2_CID_BRIGHTNESS, | |
174 | .name = "Brightness", | |
175 | .minimum = 0x00, | |
176 | .maximum = 0xff, | |
177 | .step = 1, | |
9f9c907f | 178 | .default_value = 0x7f, |
1da177e4 LT |
179 | .type = V4L2_CTRL_TYPE_INTEGER, |
180 | }, | |
181 | .off = 128, | |
182 | .reg = MO_CONTR_BRIGHT, | |
183 | .mask = 0x00ff, | |
184 | .shift = 0, | |
185 | },{ | |
186 | .v = { | |
187 | .id = V4L2_CID_CONTRAST, | |
188 | .name = "Contrast", | |
189 | .minimum = 0, | |
190 | .maximum = 0xff, | |
191 | .step = 1, | |
70f00044 | 192 | .default_value = 0x3f, |
1da177e4 LT |
193 | .type = V4L2_CTRL_TYPE_INTEGER, |
194 | }, | |
41ef7c1e | 195 | .off = 0, |
1da177e4 LT |
196 | .reg = MO_CONTR_BRIGHT, |
197 | .mask = 0xff00, | |
198 | .shift = 8, | |
199 | },{ | |
200 | .v = { | |
201 | .id = V4L2_CID_HUE, | |
202 | .name = "Hue", | |
203 | .minimum = 0, | |
204 | .maximum = 0xff, | |
205 | .step = 1, | |
9f9c907f | 206 | .default_value = 0x7f, |
1da177e4 LT |
207 | .type = V4L2_CTRL_TYPE_INTEGER, |
208 | }, | |
9ac4c158 | 209 | .off = 128, |
1da177e4 LT |
210 | .reg = MO_HUE, |
211 | .mask = 0x00ff, | |
212 | .shift = 0, | |
213 | },{ | |
214 | /* strictly, this only describes only U saturation. | |
215 | * V saturation is handled specially through code. | |
216 | */ | |
217 | .v = { | |
218 | .id = V4L2_CID_SATURATION, | |
219 | .name = "Saturation", | |
220 | .minimum = 0, | |
221 | .maximum = 0xff, | |
222 | .step = 1, | |
70f00044 | 223 | .default_value = 0x7f, |
1da177e4 LT |
224 | .type = V4L2_CTRL_TYPE_INTEGER, |
225 | }, | |
226 | .off = 0, | |
227 | .reg = MO_UV_SATURATION, | |
228 | .mask = 0x00ff, | |
229 | .shift = 0, | |
230 | },{ | |
231 | /* --- audio --- */ | |
232 | .v = { | |
233 | .id = V4L2_CID_AUDIO_MUTE, | |
234 | .name = "Mute", | |
235 | .minimum = 0, | |
236 | .maximum = 1, | |
70f00044 | 237 | .default_value = 1, |
1da177e4 LT |
238 | .type = V4L2_CTRL_TYPE_BOOLEAN, |
239 | }, | |
240 | .reg = AUD_VOL_CTL, | |
241 | .sreg = SHADOW_AUD_VOL_CTL, | |
242 | .mask = (1 << 6), | |
243 | .shift = 6, | |
244 | },{ | |
245 | .v = { | |
246 | .id = V4L2_CID_AUDIO_VOLUME, | |
247 | .name = "Volume", | |
248 | .minimum = 0, | |
249 | .maximum = 0x3f, | |
250 | .step = 1, | |
9f9c907f | 251 | .default_value = 0x3f, |
1da177e4 LT |
252 | .type = V4L2_CTRL_TYPE_INTEGER, |
253 | }, | |
254 | .reg = AUD_VOL_CTL, | |
255 | .sreg = SHADOW_AUD_VOL_CTL, | |
256 | .mask = 0x3f, | |
257 | .shift = 0, | |
258 | },{ | |
259 | .v = { | |
260 | .id = V4L2_CID_AUDIO_BALANCE, | |
261 | .name = "Balance", | |
262 | .minimum = 0, | |
263 | .maximum = 0x7f, | |
264 | .step = 1, | |
265 | .default_value = 0x40, | |
266 | .type = V4L2_CTRL_TYPE_INTEGER, | |
267 | }, | |
268 | .reg = AUD_BAL_CTL, | |
269 | .sreg = SHADOW_AUD_BAL_CTL, | |
270 | .mask = 0x7f, | |
271 | .shift = 0, | |
272 | } | |
273 | }; | |
408b664a | 274 | static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls); |
1da177e4 | 275 | |
38a2713a MK |
276 | const u32 cx88_user_ctrls[] = { |
277 | V4L2_CID_USER_CLASS, | |
278 | V4L2_CID_BRIGHTNESS, | |
279 | V4L2_CID_CONTRAST, | |
280 | V4L2_CID_SATURATION, | |
281 | V4L2_CID_HUE, | |
282 | V4L2_CID_AUDIO_VOLUME, | |
283 | V4L2_CID_AUDIO_BALANCE, | |
284 | V4L2_CID_AUDIO_MUTE, | |
285 | 0 | |
286 | }; | |
287 | EXPORT_SYMBOL(cx88_user_ctrls); | |
288 | ||
289 | static const u32 *ctrl_classes[] = { | |
290 | cx88_user_ctrls, | |
291 | NULL | |
292 | }; | |
293 | ||
294 | int cx8800_ctrl_query(struct v4l2_queryctrl *qctrl) | |
295 | { | |
296 | int i; | |
297 | ||
298 | if (qctrl->id < V4L2_CID_BASE || | |
299 | qctrl->id >= V4L2_CID_LASTP1) | |
300 | return -EINVAL; | |
301 | for (i = 0; i < CX8800_CTLS; i++) | |
302 | if (cx8800_ctls[i].v.id == qctrl->id) | |
303 | break; | |
304 | if (i == CX8800_CTLS) { | |
305 | *qctrl = no_ctl; | |
306 | return 0; | |
307 | } | |
308 | *qctrl = cx8800_ctls[i].v; | |
309 | return 0; | |
310 | } | |
311 | EXPORT_SYMBOL(cx8800_ctrl_query); | |
312 | ||
1da177e4 LT |
313 | /* ------------------------------------------------------------------- */ |
314 | /* resource management */ | |
315 | ||
316 | static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit) | |
317 | { | |
e52e98a7 | 318 | struct cx88_core *core = dev->core; |
1da177e4 LT |
319 | if (fh->resources & bit) |
320 | /* have it already allocated */ | |
321 | return 1; | |
322 | ||
323 | /* is it free? */ | |
3593cab5 | 324 | mutex_lock(&core->lock); |
1da177e4 LT |
325 | if (dev->resources & bit) { |
326 | /* no, someone else uses it */ | |
3593cab5 | 327 | mutex_unlock(&core->lock); |
1da177e4 LT |
328 | return 0; |
329 | } | |
330 | /* it's free, grab it */ | |
331 | fh->resources |= bit; | |
332 | dev->resources |= bit; | |
333 | dprintk(1,"res: get %d\n",bit); | |
3593cab5 | 334 | mutex_unlock(&core->lock); |
1da177e4 LT |
335 | return 1; |
336 | } | |
337 | ||
338 | static | |
339 | int res_check(struct cx8800_fh *fh, unsigned int bit) | |
340 | { | |
341 | return (fh->resources & bit); | |
342 | } | |
343 | ||
344 | static | |
345 | int res_locked(struct cx8800_dev *dev, unsigned int bit) | |
346 | { | |
347 | return (dev->resources & bit); | |
348 | } | |
349 | ||
350 | static | |
351 | void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits) | |
352 | { | |
e52e98a7 | 353 | struct cx88_core *core = dev->core; |
ae24601b | 354 | BUG_ON((fh->resources & bits) != bits); |
1da177e4 | 355 | |
3593cab5 | 356 | mutex_lock(&core->lock); |
1da177e4 LT |
357 | fh->resources &= ~bits; |
358 | dev->resources &= ~bits; | |
359 | dprintk(1,"res: put %d\n",bits); | |
3593cab5 | 360 | mutex_unlock(&core->lock); |
1da177e4 LT |
361 | } |
362 | ||
363 | /* ------------------------------------------------------------------ */ | |
364 | ||
e90311a1 | 365 | int cx88_video_mux(struct cx88_core *core, unsigned int input) |
1da177e4 | 366 | { |
e52e98a7 | 367 | /* struct cx88_core *core = dev->core; */ |
1da177e4 LT |
368 | |
369 | dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n", | |
6a59d64c TP |
370 | input, INPUT(input).vmux, |
371 | INPUT(input).gpio0,INPUT(input).gpio1, | |
372 | INPUT(input).gpio2,INPUT(input).gpio3); | |
e52e98a7 | 373 | core->input = input; |
6a59d64c TP |
374 | cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14); |
375 | cx_write(MO_GP3_IO, INPUT(input).gpio3); | |
376 | cx_write(MO_GP0_IO, INPUT(input).gpio0); | |
377 | cx_write(MO_GP1_IO, INPUT(input).gpio1); | |
378 | cx_write(MO_GP2_IO, INPUT(input).gpio2); | |
1da177e4 | 379 | |
6a59d64c | 380 | switch (INPUT(input).type) { |
1da177e4 LT |
381 | case CX88_VMUX_SVIDEO: |
382 | cx_set(MO_AFECFG_IO, 0x00000001); | |
383 | cx_set(MO_INPUT_FORMAT, 0x00010010); | |
384 | cx_set(MO_FILTER_EVEN, 0x00002020); | |
385 | cx_set(MO_FILTER_ODD, 0x00002020); | |
386 | break; | |
387 | default: | |
388 | cx_clear(MO_AFECFG_IO, 0x00000001); | |
389 | cx_clear(MO_INPUT_FORMAT, 0x00010010); | |
390 | cx_clear(MO_FILTER_EVEN, 0x00002020); | |
391 | cx_clear(MO_FILTER_ODD, 0x00002020); | |
392 | break; | |
393 | } | |
f24546a9 | 394 | |
6a59d64c | 395 | if (core->board.mpeg & CX88_MPEG_BLACKBIRD) { |
f24546a9 | 396 | /* sets sound input from external adc */ |
6a59d64c | 397 | if (INPUT(input).extadc) |
f24546a9 MK |
398 | cx_set(AUD_CTL, EN_I2SIN_ENABLE); |
399 | else | |
400 | cx_clear(AUD_CTL, EN_I2SIN_ENABLE); | |
401 | } | |
1da177e4 LT |
402 | return 0; |
403 | } | |
e90311a1 | 404 | EXPORT_SYMBOL(cx88_video_mux); |
1da177e4 LT |
405 | |
406 | /* ------------------------------------------------------------------ */ | |
407 | ||
408 | static int start_video_dma(struct cx8800_dev *dev, | |
409 | struct cx88_dmaqueue *q, | |
410 | struct cx88_buffer *buf) | |
411 | { | |
412 | struct cx88_core *core = dev->core; | |
413 | ||
414 | /* setup fifo + format */ | |
e52e98a7 | 415 | cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21], |
1da177e4 | 416 | buf->bpl, buf->risc.dma); |
e52e98a7 | 417 | cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field); |
1da177e4 LT |
418 | cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma); |
419 | ||
420 | /* reset counter */ | |
421 | cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET); | |
422 | q->count = 1; | |
423 | ||
424 | /* enable irqs */ | |
8ddac9ee | 425 | cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT); |
e52e98a7 MCC |
426 | |
427 | /* Enables corresponding bits at PCI_INT_STAT: | |
428 | bits 0 to 4: video, audio, transport stream, VIP, Host | |
429 | bit 7: timer | |
430 | bits 8 and 9: DMA complete for: SRC, DST | |
431 | bits 10 and 11: BERR signal asserted for RISC: RD, WR | |
432 | bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB | |
433 | */ | |
1da177e4 LT |
434 | cx_set(MO_VID_INTMSK, 0x0f0011); |
435 | ||
436 | /* enable capture */ | |
437 | cx_set(VID_CAPTURE_CONTROL,0x06); | |
438 | ||
439 | /* start dma */ | |
440 | cx_set(MO_DEV_CNTRL2, (1<<5)); | |
e52e98a7 | 441 | cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */ |
1da177e4 LT |
442 | |
443 | return 0; | |
444 | } | |
445 | ||
17bc98a4 | 446 | #ifdef CONFIG_PM |
1da177e4 LT |
447 | static int stop_video_dma(struct cx8800_dev *dev) |
448 | { | |
449 | struct cx88_core *core = dev->core; | |
450 | ||
451 | /* stop dma */ | |
452 | cx_clear(MO_VID_DMACNTRL, 0x11); | |
453 | ||
454 | /* disable capture */ | |
455 | cx_clear(VID_CAPTURE_CONTROL,0x06); | |
456 | ||
457 | /* disable irqs */ | |
8ddac9ee | 458 | cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT); |
1da177e4 LT |
459 | cx_clear(MO_VID_INTMSK, 0x0f0011); |
460 | return 0; | |
461 | } | |
17bc98a4 | 462 | #endif |
1da177e4 LT |
463 | |
464 | static int restart_video_queue(struct cx8800_dev *dev, | |
465 | struct cx88_dmaqueue *q) | |
466 | { | |
e52e98a7 | 467 | struct cx88_core *core = dev->core; |
1da177e4 LT |
468 | struct cx88_buffer *buf, *prev; |
469 | struct list_head *item; | |
470 | ||
471 | if (!list_empty(&q->active)) { | |
4ac97914 | 472 | buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); |
1da177e4 LT |
473 | dprintk(2,"restart_queue [%p/%d]: restart dma\n", |
474 | buf, buf->vb.i); | |
475 | start_video_dma(dev, q, buf); | |
476 | list_for_each(item,&q->active) { | |
477 | buf = list_entry(item, struct cx88_buffer, vb.queue); | |
478 | buf->count = q->count++; | |
479 | } | |
480 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); | |
481 | return 0; | |
482 | } | |
483 | ||
484 | prev = NULL; | |
485 | for (;;) { | |
486 | if (list_empty(&q->queued)) | |
487 | return 0; | |
4ac97914 | 488 | buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue); |
1da177e4 | 489 | if (NULL == prev) { |
179e0917 | 490 | list_move_tail(&buf->vb.queue, &q->active); |
1da177e4 LT |
491 | start_video_dma(dev, q, buf); |
492 | buf->vb.state = STATE_ACTIVE; | |
493 | buf->count = q->count++; | |
494 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); | |
495 | dprintk(2,"[%p/%d] restart_queue - first active\n", | |
496 | buf,buf->vb.i); | |
497 | ||
498 | } else if (prev->vb.width == buf->vb.width && | |
499 | prev->vb.height == buf->vb.height && | |
500 | prev->fmt == buf->fmt) { | |
179e0917 | 501 | list_move_tail(&buf->vb.queue, &q->active); |
1da177e4 LT |
502 | buf->vb.state = STATE_ACTIVE; |
503 | buf->count = q->count++; | |
504 | prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); | |
505 | dprintk(2,"[%p/%d] restart_queue - move to active\n", | |
506 | buf,buf->vb.i); | |
507 | } else { | |
508 | return 0; | |
509 | } | |
510 | prev = buf; | |
511 | } | |
512 | } | |
513 | ||
514 | /* ------------------------------------------------------------------ */ | |
515 | ||
516 | static int | |
517 | buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size) | |
518 | { | |
519 | struct cx8800_fh *fh = q->priv_data; | |
520 | ||
521 | *size = fh->fmt->depth*fh->width*fh->height >> 3; | |
522 | if (0 == *count) | |
523 | *count = 32; | |
524 | while (*size * *count > vid_limit * 1024 * 1024) | |
525 | (*count)--; | |
526 | return 0; | |
527 | } | |
528 | ||
529 | static int | |
530 | buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb, | |
531 | enum v4l2_field field) | |
532 | { | |
533 | struct cx8800_fh *fh = q->priv_data; | |
534 | struct cx8800_dev *dev = fh->dev; | |
e52e98a7 | 535 | struct cx88_core *core = dev->core; |
1da177e4 LT |
536 | struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb); |
537 | int rc, init_buffer = 0; | |
538 | ||
539 | BUG_ON(NULL == fh->fmt); | |
e52e98a7 MCC |
540 | if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) || |
541 | fh->height < 32 || fh->height > norm_maxh(core->tvnorm)) | |
1da177e4 LT |
542 | return -EINVAL; |
543 | buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3; | |
544 | if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size) | |
545 | return -EINVAL; | |
546 | ||
547 | if (buf->fmt != fh->fmt || | |
548 | buf->vb.width != fh->width || | |
549 | buf->vb.height != fh->height || | |
550 | buf->vb.field != field) { | |
551 | buf->fmt = fh->fmt; | |
552 | buf->vb.width = fh->width; | |
553 | buf->vb.height = fh->height; | |
554 | buf->vb.field = field; | |
555 | init_buffer = 1; | |
556 | } | |
557 | ||
558 | if (STATE_NEEDS_INIT == buf->vb.state) { | |
559 | init_buffer = 1; | |
c7b0ac05 | 560 | if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL))) |
1da177e4 LT |
561 | goto fail; |
562 | } | |
563 | ||
564 | if (init_buffer) { | |
565 | buf->bpl = buf->vb.width * buf->fmt->depth >> 3; | |
566 | switch (buf->vb.field) { | |
567 | case V4L2_FIELD_TOP: | |
568 | cx88_risc_buffer(dev->pci, &buf->risc, | |
569 | buf->vb.dma.sglist, 0, UNSET, | |
570 | buf->bpl, 0, buf->vb.height); | |
571 | break; | |
572 | case V4L2_FIELD_BOTTOM: | |
573 | cx88_risc_buffer(dev->pci, &buf->risc, | |
574 | buf->vb.dma.sglist, UNSET, 0, | |
575 | buf->bpl, 0, buf->vb.height); | |
576 | break; | |
577 | case V4L2_FIELD_INTERLACED: | |
578 | cx88_risc_buffer(dev->pci, &buf->risc, | |
579 | buf->vb.dma.sglist, 0, buf->bpl, | |
580 | buf->bpl, buf->bpl, | |
581 | buf->vb.height >> 1); | |
582 | break; | |
583 | case V4L2_FIELD_SEQ_TB: | |
584 | cx88_risc_buffer(dev->pci, &buf->risc, | |
585 | buf->vb.dma.sglist, | |
586 | 0, buf->bpl * (buf->vb.height >> 1), | |
587 | buf->bpl, 0, | |
588 | buf->vb.height >> 1); | |
589 | break; | |
590 | case V4L2_FIELD_SEQ_BT: | |
591 | cx88_risc_buffer(dev->pci, &buf->risc, | |
592 | buf->vb.dma.sglist, | |
593 | buf->bpl * (buf->vb.height >> 1), 0, | |
594 | buf->bpl, 0, | |
595 | buf->vb.height >> 1); | |
596 | break; | |
597 | default: | |
598 | BUG(); | |
599 | } | |
600 | } | |
601 | dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n", | |
602 | buf, buf->vb.i, | |
603 | fh->width, fh->height, fh->fmt->depth, fh->fmt->name, | |
604 | (unsigned long)buf->risc.dma); | |
605 | ||
606 | buf->vb.state = STATE_PREPARED; | |
607 | return 0; | |
608 | ||
609 | fail: | |
c7b0ac05 | 610 | cx88_free_buffer(q,buf); |
1da177e4 LT |
611 | return rc; |
612 | } | |
613 | ||
614 | static void | |
615 | buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb) | |
616 | { | |
617 | struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb); | |
618 | struct cx88_buffer *prev; | |
619 | struct cx8800_fh *fh = vq->priv_data; | |
620 | struct cx8800_dev *dev = fh->dev; | |
e52e98a7 | 621 | struct cx88_core *core = dev->core; |
1da177e4 LT |
622 | struct cx88_dmaqueue *q = &dev->vidq; |
623 | ||
624 | /* add jump to stopper */ | |
625 | buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC); | |
626 | buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma); | |
627 | ||
628 | if (!list_empty(&q->queued)) { | |
629 | list_add_tail(&buf->vb.queue,&q->queued); | |
630 | buf->vb.state = STATE_QUEUED; | |
631 | dprintk(2,"[%p/%d] buffer_queue - append to queued\n", | |
632 | buf, buf->vb.i); | |
633 | ||
634 | } else if (list_empty(&q->active)) { | |
635 | list_add_tail(&buf->vb.queue,&q->active); | |
636 | start_video_dma(dev, q, buf); | |
637 | buf->vb.state = STATE_ACTIVE; | |
638 | buf->count = q->count++; | |
639 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); | |
640 | dprintk(2,"[%p/%d] buffer_queue - first active\n", | |
641 | buf, buf->vb.i); | |
642 | ||
643 | } else { | |
644 | prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue); | |
645 | if (prev->vb.width == buf->vb.width && | |
646 | prev->vb.height == buf->vb.height && | |
647 | prev->fmt == buf->fmt) { | |
648 | list_add_tail(&buf->vb.queue,&q->active); | |
649 | buf->vb.state = STATE_ACTIVE; | |
650 | buf->count = q->count++; | |
651 | prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); | |
652 | dprintk(2,"[%p/%d] buffer_queue - append to active\n", | |
653 | buf, buf->vb.i); | |
654 | ||
655 | } else { | |
656 | list_add_tail(&buf->vb.queue,&q->queued); | |
657 | buf->vb.state = STATE_QUEUED; | |
658 | dprintk(2,"[%p/%d] buffer_queue - first queued\n", | |
659 | buf, buf->vb.i); | |
660 | } | |
661 | } | |
662 | } | |
663 | ||
664 | static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
665 | { | |
666 | struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb); | |
1da177e4 | 667 | |
c7b0ac05 | 668 | cx88_free_buffer(q,buf); |
1da177e4 LT |
669 | } |
670 | ||
408b664a | 671 | static struct videobuf_queue_ops cx8800_video_qops = { |
1da177e4 LT |
672 | .buf_setup = buffer_setup, |
673 | .buf_prepare = buffer_prepare, | |
674 | .buf_queue = buffer_queue, | |
675 | .buf_release = buffer_release, | |
676 | }; | |
677 | ||
678 | /* ------------------------------------------------------------------ */ | |
679 | ||
1da177e4 LT |
680 | |
681 | /* ------------------------------------------------------------------ */ | |
682 | ||
683 | static struct videobuf_queue* get_queue(struct cx8800_fh *fh) | |
684 | { | |
685 | switch (fh->type) { | |
686 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
687 | return &fh->vidq; | |
688 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
689 | return &fh->vbiq; | |
690 | default: | |
691 | BUG(); | |
692 | return NULL; | |
693 | } | |
694 | } | |
695 | ||
696 | static int get_ressource(struct cx8800_fh *fh) | |
697 | { | |
698 | switch (fh->type) { | |
699 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
700 | return RESOURCE_VIDEO; | |
701 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
702 | return RESOURCE_VBI; | |
703 | default: | |
704 | BUG(); | |
705 | return 0; | |
706 | } | |
707 | } | |
708 | ||
709 | static int video_open(struct inode *inode, struct file *file) | |
710 | { | |
711 | int minor = iminor(inode); | |
712 | struct cx8800_dev *h,*dev = NULL; | |
e52e98a7 | 713 | struct cx88_core *core; |
1da177e4 LT |
714 | struct cx8800_fh *fh; |
715 | struct list_head *list; | |
716 | enum v4l2_buf_type type = 0; | |
717 | int radio = 0; | |
718 | ||
719 | list_for_each(list,&cx8800_devlist) { | |
720 | h = list_entry(list, struct cx8800_dev, devlist); | |
721 | if (h->video_dev->minor == minor) { | |
722 | dev = h; | |
723 | type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
724 | } | |
725 | if (h->vbi_dev->minor == minor) { | |
726 | dev = h; | |
727 | type = V4L2_BUF_TYPE_VBI_CAPTURE; | |
728 | } | |
729 | if (h->radio_dev && | |
730 | h->radio_dev->minor == minor) { | |
731 | radio = 1; | |
732 | dev = h; | |
733 | } | |
734 | } | |
735 | if (NULL == dev) | |
736 | return -ENODEV; | |
737 | ||
e52e98a7 MCC |
738 | core = dev->core; |
739 | ||
1da177e4 LT |
740 | dprintk(1,"open minor=%d radio=%d type=%s\n", |
741 | minor,radio,v4l2_type_names[type]); | |
742 | ||
743 | /* allocate + initialize per filehandle data */ | |
7408187d | 744 | fh = kzalloc(sizeof(*fh),GFP_KERNEL); |
1da177e4 LT |
745 | if (NULL == fh) |
746 | return -ENOMEM; | |
1da177e4 LT |
747 | file->private_data = fh; |
748 | fh->dev = dev; | |
749 | fh->radio = radio; | |
750 | fh->type = type; | |
751 | fh->width = 320; | |
752 | fh->height = 240; | |
753 | fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24); | |
754 | ||
755 | videobuf_queue_init(&fh->vidq, &cx8800_video_qops, | |
756 | dev->pci, &dev->slock, | |
757 | V4L2_BUF_TYPE_VIDEO_CAPTURE, | |
758 | V4L2_FIELD_INTERLACED, | |
759 | sizeof(struct cx88_buffer), | |
760 | fh); | |
761 | videobuf_queue_init(&fh->vbiq, &cx8800_vbi_qops, | |
762 | dev->pci, &dev->slock, | |
763 | V4L2_BUF_TYPE_VBI_CAPTURE, | |
764 | V4L2_FIELD_SEQ_TB, | |
765 | sizeof(struct cx88_buffer), | |
766 | fh); | |
767 | ||
768 | if (fh->radio) { | |
1da177e4 | 769 | dprintk(1,"video_open: setting radio device\n"); |
6a59d64c TP |
770 | cx_write(MO_GP3_IO, core->board.radio.gpio3); |
771 | cx_write(MO_GP0_IO, core->board.radio.gpio0); | |
772 | cx_write(MO_GP1_IO, core->board.radio.gpio1); | |
773 | cx_write(MO_GP2_IO, core->board.radio.gpio2); | |
e52e98a7 | 774 | core->tvaudio = WW_FM; |
1da177e4 LT |
775 | cx88_set_tvaudio(core); |
776 | cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1); | |
e52e98a7 | 777 | cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL); |
1da177e4 LT |
778 | } |
779 | ||
4ac97914 | 780 | return 0; |
1da177e4 LT |
781 | } |
782 | ||
783 | static ssize_t | |
f9e7a020 | 784 | video_read(struct file *file, char __user *data, size_t count, loff_t *ppos) |
1da177e4 LT |
785 | { |
786 | struct cx8800_fh *fh = file->private_data; | |
787 | ||
788 | switch (fh->type) { | |
789 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
790 | if (res_locked(fh->dev,RESOURCE_VIDEO)) | |
791 | return -EBUSY; | |
792 | return videobuf_read_one(&fh->vidq, data, count, ppos, | |
793 | file->f_flags & O_NONBLOCK); | |
794 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
795 | if (!res_get(fh->dev,fh,RESOURCE_VBI)) | |
796 | return -EBUSY; | |
797 | return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1, | |
798 | file->f_flags & O_NONBLOCK); | |
799 | default: | |
800 | BUG(); | |
801 | return 0; | |
802 | } | |
803 | } | |
804 | ||
805 | static unsigned int | |
806 | video_poll(struct file *file, struct poll_table_struct *wait) | |
807 | { | |
808 | struct cx8800_fh *fh = file->private_data; | |
809 | struct cx88_buffer *buf; | |
810 | ||
811 | if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) { | |
812 | if (!res_get(fh->dev,fh,RESOURCE_VBI)) | |
813 | return POLLERR; | |
814 | return videobuf_poll_stream(file, &fh->vbiq, wait); | |
815 | } | |
816 | ||
817 | if (res_check(fh,RESOURCE_VIDEO)) { | |
818 | /* streaming capture */ | |
819 | if (list_empty(&fh->vidq.stream)) | |
820 | return POLLERR; | |
821 | buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream); | |
822 | } else { | |
823 | /* read() capture */ | |
824 | buf = (struct cx88_buffer*)fh->vidq.read_buf; | |
825 | if (NULL == buf) | |
826 | return POLLERR; | |
827 | } | |
828 | poll_wait(file, &buf->vb.done, wait); | |
829 | if (buf->vb.state == STATE_DONE || | |
830 | buf->vb.state == STATE_ERROR) | |
831 | return POLLIN|POLLRDNORM; | |
832 | return 0; | |
833 | } | |
834 | ||
835 | static int video_release(struct inode *inode, struct file *file) | |
836 | { | |
837 | struct cx8800_fh *fh = file->private_data; | |
838 | struct cx8800_dev *dev = fh->dev; | |
839 | ||
840 | /* turn off overlay */ | |
841 | if (res_check(fh, RESOURCE_OVERLAY)) { | |
842 | /* FIXME */ | |
843 | res_free(dev,fh,RESOURCE_OVERLAY); | |
844 | } | |
845 | ||
846 | /* stop video capture */ | |
847 | if (res_check(fh, RESOURCE_VIDEO)) { | |
848 | videobuf_queue_cancel(&fh->vidq); | |
849 | res_free(dev,fh,RESOURCE_VIDEO); | |
850 | } | |
851 | if (fh->vidq.read_buf) { | |
852 | buffer_release(&fh->vidq,fh->vidq.read_buf); | |
853 | kfree(fh->vidq.read_buf); | |
854 | } | |
855 | ||
856 | /* stop vbi capture */ | |
857 | if (res_check(fh, RESOURCE_VBI)) { | |
858 | if (fh->vbiq.streaming) | |
859 | videobuf_streamoff(&fh->vbiq); | |
860 | if (fh->vbiq.reading) | |
861 | videobuf_read_stop(&fh->vbiq); | |
862 | res_free(dev,fh,RESOURCE_VBI); | |
863 | } | |
864 | ||
865 | videobuf_mmap_free(&fh->vidq); | |
866 | videobuf_mmap_free(&fh->vbiq); | |
867 | file->private_data = NULL; | |
868 | kfree(fh); | |
e52e98a7 MCC |
869 | |
870 | cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL); | |
871 | ||
1da177e4 LT |
872 | return 0; |
873 | } | |
874 | ||
875 | static int | |
876 | video_mmap(struct file *file, struct vm_area_struct * vma) | |
877 | { | |
878 | struct cx8800_fh *fh = file->private_data; | |
879 | ||
880 | return videobuf_mmap_mapper(get_queue(fh), vma); | |
881 | } | |
882 | ||
883 | /* ------------------------------------------------------------------ */ | |
8d87cb9f | 884 | /* VIDEO CTRL IOCTLS */ |
1da177e4 | 885 | |
54da49f5 | 886 | int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl) |
1da177e4 | 887 | { |
8d87cb9f | 888 | struct cx88_ctrl *c = NULL; |
1da177e4 LT |
889 | u32 value; |
890 | int i; | |
891 | ||
892 | for (i = 0; i < CX8800_CTLS; i++) | |
893 | if (cx8800_ctls[i].v.id == ctl->id) | |
894 | c = &cx8800_ctls[i]; | |
8d87cb9f | 895 | if (unlikely(NULL == c)) |
1da177e4 LT |
896 | return -EINVAL; |
897 | ||
898 | value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg); | |
899 | switch (ctl->id) { | |
900 | case V4L2_CID_AUDIO_BALANCE: | |
9f9c907f MR |
901 | ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40) |
902 | : (0x7f - (value & 0x7f)); | |
1da177e4 LT |
903 | break; |
904 | case V4L2_CID_AUDIO_VOLUME: | |
905 | ctl->value = 0x3f - (value & 0x3f); | |
906 | break; | |
907 | default: | |
908 | ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift; | |
909 | break; | |
910 | } | |
6457af5f IP |
911 | dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n", |
912 | ctl->id, c->v.name, ctl->value, c->reg, | |
913 | value,c->mask, c->sreg ? " [shadowed]" : ""); | |
1da177e4 LT |
914 | return 0; |
915 | } | |
54da49f5 | 916 | EXPORT_SYMBOL(cx88_get_control); |
1da177e4 | 917 | |
54da49f5 | 918 | int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl) |
1da177e4 | 919 | { |
1da177e4 | 920 | struct cx88_ctrl *c = NULL; |
70f00044 | 921 | u32 value,mask; |
1da177e4 | 922 | int i; |
8d87cb9f | 923 | |
70f00044 MCC |
924 | for (i = 0; i < CX8800_CTLS; i++) { |
925 | if (cx8800_ctls[i].v.id == ctl->id) { | |
1da177e4 | 926 | c = &cx8800_ctls[i]; |
70f00044 MCC |
927 | } |
928 | } | |
8d87cb9f | 929 | if (unlikely(NULL == c)) |
1da177e4 LT |
930 | return -EINVAL; |
931 | ||
932 | if (ctl->value < c->v.minimum) | |
e52e98a7 | 933 | ctl->value = c->v.minimum; |
1da177e4 | 934 | if (ctl->value > c->v.maximum) |
e52e98a7 | 935 | ctl->value = c->v.maximum; |
70f00044 | 936 | mask=c->mask; |
1da177e4 LT |
937 | switch (ctl->id) { |
938 | case V4L2_CID_AUDIO_BALANCE: | |
9f9c907f | 939 | value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40); |
1da177e4 LT |
940 | break; |
941 | case V4L2_CID_AUDIO_VOLUME: | |
942 | value = 0x3f - (ctl->value & 0x3f); | |
943 | break; | |
944 | case V4L2_CID_SATURATION: | |
945 | /* special v_sat handling */ | |
70f00044 MCC |
946 | |
947 | value = ((ctl->value - c->off) << c->shift) & c->mask; | |
948 | ||
63ab1bdc | 949 | if (core->tvnorm & V4L2_STD_SECAM) { |
70f00044 MCC |
950 | /* For SECAM, both U and V sat should be equal */ |
951 | value=value<<8|value; | |
952 | } else { | |
953 | /* Keeps U Saturation proportional to V Sat */ | |
954 | value=(value*0x5a)/0x7f<<8|value; | |
955 | } | |
956 | mask=0xffff; | |
957 | break; | |
1da177e4 LT |
958 | default: |
959 | value = ((ctl->value - c->off) << c->shift) & c->mask; | |
960 | break; | |
961 | } | |
6457af5f IP |
962 | dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n", |
963 | ctl->id, c->v.name, ctl->value, c->reg, value, | |
964 | mask, c->sreg ? " [shadowed]" : ""); | |
1da177e4 | 965 | if (c->sreg) { |
70f00044 | 966 | cx_sandor(c->sreg, c->reg, mask, value); |
1da177e4 | 967 | } else { |
70f00044 | 968 | cx_andor(c->reg, mask, value); |
1da177e4 LT |
969 | } |
970 | return 0; | |
971 | } | |
54da49f5 | 972 | EXPORT_SYMBOL(cx88_set_control); |
1da177e4 | 973 | |
e52e98a7 | 974 | static void init_controls(struct cx88_core *core) |
1da177e4 | 975 | { |
70f00044 MCC |
976 | struct v4l2_control ctrl; |
977 | int i; | |
1da177e4 | 978 | |
70f00044 MCC |
979 | for (i = 0; i < CX8800_CTLS; i++) { |
980 | ctrl.id=cx8800_ctls[i].v.id; | |
9f9c907f | 981 | ctrl.value=cx8800_ctls[i].v.default_value; |
8d87cb9f | 982 | |
54da49f5 | 983 | cx88_set_control(core, &ctrl); |
70f00044 | 984 | } |
1da177e4 LT |
985 | } |
986 | ||
987 | /* ------------------------------------------------------------------ */ | |
8d87cb9f | 988 | /* VIDEO IOCTLS */ |
1da177e4 | 989 | |
8d87cb9f MCC |
990 | static int vidioc_g_fmt_cap (struct file *file, void *priv, |
991 | struct v4l2_format *f) | |
1da177e4 | 992 | { |
8d87cb9f MCC |
993 | struct cx8800_fh *fh = priv; |
994 | ||
995 | f->fmt.pix.width = fh->width; | |
996 | f->fmt.pix.height = fh->height; | |
997 | f->fmt.pix.field = fh->vidq.field; | |
998 | f->fmt.pix.pixelformat = fh->fmt->fourcc; | |
999 | f->fmt.pix.bytesperline = | |
1000 | (f->fmt.pix.width * fh->fmt->depth) >> 3; | |
1001 | f->fmt.pix.sizeimage = | |
1002 | f->fmt.pix.height * f->fmt.pix.bytesperline; | |
1003 | return 0; | |
1da177e4 LT |
1004 | } |
1005 | ||
8d87cb9f MCC |
1006 | static int vidioc_try_fmt_cap (struct file *file, void *priv, |
1007 | struct v4l2_format *f) | |
1da177e4 | 1008 | { |
8d87cb9f MCC |
1009 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; |
1010 | struct cx8800_fmt *fmt; | |
1011 | enum v4l2_field field; | |
1012 | unsigned int maxw, maxh; | |
e52e98a7 | 1013 | |
8d87cb9f MCC |
1014 | fmt = format_by_fourcc(f->fmt.pix.pixelformat); |
1015 | if (NULL == fmt) | |
1016 | return -EINVAL; | |
1da177e4 | 1017 | |
8d87cb9f MCC |
1018 | field = f->fmt.pix.field; |
1019 | maxw = norm_maxw(core->tvnorm); | |
1020 | maxh = norm_maxh(core->tvnorm); | |
1da177e4 | 1021 | |
8d87cb9f MCC |
1022 | if (V4L2_FIELD_ANY == field) { |
1023 | field = (f->fmt.pix.height > maxh/2) | |
1024 | ? V4L2_FIELD_INTERLACED | |
1025 | : V4L2_FIELD_BOTTOM; | |
1da177e4 | 1026 | } |
8d87cb9f MCC |
1027 | |
1028 | switch (field) { | |
1029 | case V4L2_FIELD_TOP: | |
1030 | case V4L2_FIELD_BOTTOM: | |
1031 | maxh = maxh / 2; | |
1032 | break; | |
1033 | case V4L2_FIELD_INTERLACED: | |
1034 | break; | |
1da177e4 LT |
1035 | default: |
1036 | return -EINVAL; | |
1037 | } | |
8d87cb9f MCC |
1038 | |
1039 | f->fmt.pix.field = field; | |
1040 | if (f->fmt.pix.height < 32) | |
1041 | f->fmt.pix.height = 32; | |
1042 | if (f->fmt.pix.height > maxh) | |
1043 | f->fmt.pix.height = maxh; | |
1044 | if (f->fmt.pix.width < 48) | |
1045 | f->fmt.pix.width = 48; | |
1046 | if (f->fmt.pix.width > maxw) | |
1047 | f->fmt.pix.width = maxw; | |
1048 | f->fmt.pix.width &= ~0x03; | |
1049 | f->fmt.pix.bytesperline = | |
1050 | (f->fmt.pix.width * fmt->depth) >> 3; | |
1051 | f->fmt.pix.sizeimage = | |
1052 | f->fmt.pix.height * f->fmt.pix.bytesperline; | |
1053 | ||
1054 | return 0; | |
1da177e4 LT |
1055 | } |
1056 | ||
8d87cb9f MCC |
1057 | static int vidioc_s_fmt_cap (struct file *file, void *priv, |
1058 | struct v4l2_format *f) | |
1da177e4 | 1059 | { |
8d87cb9f MCC |
1060 | struct cx8800_fh *fh = priv; |
1061 | int err = vidioc_try_fmt_cap (file,priv,f); | |
1062 | ||
1063 | if (0 != err) | |
1064 | return err; | |
1065 | fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat); | |
1066 | fh->width = f->fmt.pix.width; | |
1067 | fh->height = f->fmt.pix.height; | |
1068 | fh->vidq.field = f->fmt.pix.field; | |
1069 | return 0; | |
1da177e4 LT |
1070 | } |
1071 | ||
8d87cb9f MCC |
1072 | static int vidioc_querycap (struct file *file, void *priv, |
1073 | struct v4l2_capability *cap) | |
1da177e4 | 1074 | { |
8d87cb9f | 1075 | struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev; |
1da177e4 | 1076 | struct cx88_core *core = dev->core; |
1da177e4 | 1077 | |
8d87cb9f | 1078 | strcpy(cap->driver, "cx8800"); |
6a59d64c | 1079 | strlcpy(cap->card, core->board.name, sizeof(cap->card)); |
8d87cb9f MCC |
1080 | sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci)); |
1081 | cap->version = CX88_VERSION_CODE; | |
1082 | cap->capabilities = | |
1083 | V4L2_CAP_VIDEO_CAPTURE | | |
1084 | V4L2_CAP_READWRITE | | |
1085 | V4L2_CAP_STREAMING | | |
1086 | V4L2_CAP_VBI_CAPTURE; | |
6a59d64c | 1087 | if (UNSET != core->board.tuner_type) |
8d87cb9f MCC |
1088 | cap->capabilities |= V4L2_CAP_TUNER; |
1089 | return 0; | |
1090 | } | |
e52e98a7 | 1091 | |
8d87cb9f MCC |
1092 | static int vidioc_enum_fmt_cap (struct file *file, void *priv, |
1093 | struct v4l2_fmtdesc *f) | |
1094 | { | |
1095 | if (unlikely(f->index >= ARRAY_SIZE(formats))) | |
1096 | return -EINVAL; | |
1097 | ||
1098 | strlcpy(f->description,formats[f->index].name,sizeof(f->description)); | |
1099 | f->pixelformat = formats[f->index].fourcc; | |
1100 | ||
1101 | return 0; | |
1102 | } | |
1da177e4 | 1103 | |
0dfa9abd | 1104 | #ifdef CONFIG_VIDEO_V4L1_COMPAT |
8d87cb9f MCC |
1105 | static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf) |
1106 | { | |
1107 | struct cx8800_fh *fh = priv; | |
1108 | struct videobuf_queue *q; | |
1109 | struct v4l2_requestbuffers req; | |
1110 | unsigned int i; | |
1111 | int err; | |
1112 | ||
1113 | q = get_queue(fh); | |
1114 | memset(&req,0,sizeof(req)); | |
1115 | req.type = q->type; | |
1116 | req.count = 8; | |
1117 | req.memory = V4L2_MEMORY_MMAP; | |
1118 | err = videobuf_reqbufs(q,&req); | |
1119 | if (err < 0) | |
1120 | return err; | |
1121 | ||
1122 | mbuf->frames = req.count; | |
1123 | mbuf->size = 0; | |
1124 | for (i = 0; i < mbuf->frames; i++) { | |
1125 | mbuf->offsets[i] = q->bufs[i]->boff; | |
1126 | mbuf->size += q->bufs[i]->bsize; | |
e52e98a7 | 1127 | } |
8d87cb9f MCC |
1128 | return 0; |
1129 | } | |
79436633 | 1130 | #endif |
e52e98a7 | 1131 | |
8d87cb9f MCC |
1132 | static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p) |
1133 | { | |
1134 | struct cx8800_fh *fh = priv; | |
1135 | return (videobuf_reqbufs(get_queue(fh), p)); | |
1136 | } | |
e52e98a7 | 1137 | |
8d87cb9f MCC |
1138 | static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p) |
1139 | { | |
1140 | struct cx8800_fh *fh = priv; | |
1141 | return (videobuf_querybuf(get_queue(fh), p)); | |
1142 | } | |
e52e98a7 | 1143 | |
8d87cb9f MCC |
1144 | static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p) |
1145 | { | |
1146 | struct cx8800_fh *fh = priv; | |
1147 | return (videobuf_qbuf(get_queue(fh), p)); | |
1148 | } | |
e52e98a7 | 1149 | |
8d87cb9f MCC |
1150 | static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p) |
1151 | { | |
1152 | struct cx8800_fh *fh = priv; | |
1153 | return (videobuf_dqbuf(get_queue(fh), p, | |
1154 | file->f_flags & O_NONBLOCK)); | |
1155 | } | |
e52e98a7 | 1156 | |
8d87cb9f MCC |
1157 | static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i) |
1158 | { | |
1159 | struct cx8800_fh *fh = priv; | |
1160 | struct cx8800_dev *dev = fh->dev; | |
1161 | ||
1162 | if (unlikely(fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)) | |
1163 | return -EINVAL; | |
1164 | if (unlikely(i != fh->type)) | |
1165 | return -EINVAL; | |
1166 | ||
1167 | if (unlikely(!res_get(dev,fh,get_ressource(fh)))) | |
1168 | return -EBUSY; | |
1169 | return videobuf_streamon(get_queue(fh)); | |
1170 | } | |
1171 | ||
1172 | static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i) | |
1173 | { | |
1174 | struct cx8800_fh *fh = priv; | |
1175 | struct cx8800_dev *dev = fh->dev; | |
1176 | int err, res; | |
1177 | ||
1178 | if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
1179 | return -EINVAL; | |
1180 | if (i != fh->type) | |
1181 | return -EINVAL; | |
1182 | ||
1183 | res = get_ressource(fh); | |
1184 | err = videobuf_streamoff(get_queue(fh)); | |
1185 | if (err < 0) | |
1186 | return err; | |
1187 | res_free(dev,fh,res); | |
e52e98a7 MCC |
1188 | return 0; |
1189 | } | |
1190 | ||
63ab1bdc | 1191 | static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms) |
e52e98a7 | 1192 | { |
8d87cb9f | 1193 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; |
e52e98a7 | 1194 | |
8d87cb9f | 1195 | mutex_lock(&core->lock); |
63ab1bdc | 1196 | cx88_set_tvnorm(core,*tvnorms); |
8d87cb9f | 1197 | mutex_unlock(&core->lock); |
63ab1bdc | 1198 | |
8d87cb9f MCC |
1199 | return 0; |
1200 | } | |
1da177e4 | 1201 | |
8d87cb9f | 1202 | /* only one input in this sample driver */ |
54da49f5 | 1203 | int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i) |
8d87cb9f | 1204 | { |
8d87cb9f MCC |
1205 | static const char *iname[] = { |
1206 | [ CX88_VMUX_COMPOSITE1 ] = "Composite1", | |
1207 | [ CX88_VMUX_COMPOSITE2 ] = "Composite2", | |
1208 | [ CX88_VMUX_COMPOSITE3 ] = "Composite3", | |
1209 | [ CX88_VMUX_COMPOSITE4 ] = "Composite4", | |
1210 | [ CX88_VMUX_SVIDEO ] = "S-Video", | |
1211 | [ CX88_VMUX_TELEVISION ] = "Television", | |
1212 | [ CX88_VMUX_CABLE ] = "Cable TV", | |
1213 | [ CX88_VMUX_DVB ] = "DVB", | |
1214 | [ CX88_VMUX_DEBUG ] = "for debug only", | |
1215 | }; | |
1216 | unsigned int n; | |
1da177e4 | 1217 | |
8d87cb9f MCC |
1218 | n = i->index; |
1219 | if (n >= 4) | |
1220 | return -EINVAL; | |
6a59d64c | 1221 | if (0 == INPUT(n).type) |
8d87cb9f MCC |
1222 | return -EINVAL; |
1223 | memset(i,0,sizeof(*i)); | |
1224 | i->index = n; | |
1225 | i->type = V4L2_INPUT_TYPE_CAMERA; | |
6a59d64c TP |
1226 | strcpy(i->name,iname[INPUT(n).type]); |
1227 | if ((CX88_VMUX_TELEVISION == INPUT(n).type) || | |
1228 | (CX88_VMUX_CABLE == INPUT(n).type)) | |
8d87cb9f | 1229 | i->type = V4L2_INPUT_TYPE_TUNER; |
63ab1bdc | 1230 | i->std = CX88_NORMS; |
8d87cb9f MCC |
1231 | return 0; |
1232 | } | |
54da49f5 MCC |
1233 | EXPORT_SYMBOL(cx88_enum_input); |
1234 | ||
1235 | static int vidioc_enum_input (struct file *file, void *priv, | |
1236 | struct v4l2_input *i) | |
1237 | { | |
1238 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1239 | return cx88_enum_input (core,i); | |
1240 | } | |
1da177e4 | 1241 | |
8d87cb9f MCC |
1242 | static int vidioc_g_input (struct file *file, void *priv, unsigned int *i) |
1243 | { | |
1244 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1da177e4 | 1245 | |
8d87cb9f MCC |
1246 | *i = core->input; |
1247 | return 0; | |
1248 | } | |
1da177e4 | 1249 | |
8d87cb9f MCC |
1250 | static int vidioc_s_input (struct file *file, void *priv, unsigned int i) |
1251 | { | |
1252 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1da177e4 | 1253 | |
8d87cb9f MCC |
1254 | if (i >= 4) |
1255 | return -EINVAL; | |
1da177e4 | 1256 | |
8d87cb9f MCC |
1257 | mutex_lock(&core->lock); |
1258 | cx88_newstation(core); | |
e90311a1 | 1259 | cx88_video_mux(core,i); |
8d87cb9f MCC |
1260 | mutex_unlock(&core->lock); |
1261 | return 0; | |
1262 | } | |
1da177e4 | 1263 | |
1da177e4 | 1264 | |
1da177e4 | 1265 | |
8d87cb9f MCC |
1266 | static int vidioc_queryctrl (struct file *file, void *priv, |
1267 | struct v4l2_queryctrl *qctrl) | |
1268 | { | |
1269 | qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id); | |
1270 | if (unlikely(qctrl->id == 0)) | |
1271 | return -EINVAL; | |
1272 | return cx8800_ctrl_query(qctrl); | |
1273 | } | |
1da177e4 | 1274 | |
54da49f5 | 1275 | static int vidioc_g_ctrl (struct file *file, void *priv, |
8d87cb9f MCC |
1276 | struct v4l2_control *ctl) |
1277 | { | |
1278 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
54da49f5 MCC |
1279 | return |
1280 | cx88_get_control(core,ctl); | |
1281 | } | |
1da177e4 | 1282 | |
54da49f5 MCC |
1283 | static int vidioc_s_ctrl (struct file *file, void *priv, |
1284 | struct v4l2_control *ctl) | |
1285 | { | |
1286 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
8d87cb9f | 1287 | return |
54da49f5 | 1288 | cx88_set_control(core,ctl); |
8d87cb9f MCC |
1289 | } |
1290 | ||
1291 | static int vidioc_g_tuner (struct file *file, void *priv, | |
1292 | struct v4l2_tuner *t) | |
1293 | { | |
1294 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1295 | u32 reg; | |
1da177e4 | 1296 | |
6a59d64c | 1297 | if (unlikely(UNSET == core->board.tuner_type)) |
8d87cb9f | 1298 | return -EINVAL; |
243d8c0f MCC |
1299 | if (0 != t->index) |
1300 | return -EINVAL; | |
a82decf6 | 1301 | |
8d87cb9f MCC |
1302 | strcpy(t->name, "Television"); |
1303 | t->type = V4L2_TUNER_ANALOG_TV; | |
1304 | t->capability = V4L2_TUNER_CAP_NORM; | |
1305 | t->rangehigh = 0xffffffffUL; | |
a82decf6 | 1306 | |
8d87cb9f MCC |
1307 | cx88_get_stereo(core ,t); |
1308 | reg = cx_read(MO_DEVICE_STATUS); | |
1309 | t->signal = (reg & (1<<5)) ? 0xffff : 0x0000; | |
1310 | return 0; | |
1311 | } | |
41ef7c1e | 1312 | |
8d87cb9f MCC |
1313 | static int vidioc_s_tuner (struct file *file, void *priv, |
1314 | struct v4l2_tuner *t) | |
1315 | { | |
1316 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
41ef7c1e | 1317 | |
6a59d64c | 1318 | if (UNSET == core->board.tuner_type) |
8d87cb9f MCC |
1319 | return -EINVAL; |
1320 | if (0 != t->index) | |
1321 | return -EINVAL; | |
c5287ba1 | 1322 | |
8d87cb9f MCC |
1323 | cx88_set_stereo(core, t->audmode, 1); |
1324 | return 0; | |
1325 | } | |
902fc997 | 1326 | |
8d87cb9f MCC |
1327 | static int vidioc_g_frequency (struct file *file, void *priv, |
1328 | struct v4l2_frequency *f) | |
1329 | { | |
1330 | struct cx8800_fh *fh = priv; | |
1331 | struct cx88_core *core = fh->dev->core; | |
902fc997 | 1332 | |
6a59d64c | 1333 | if (unlikely(UNSET == core->board.tuner_type)) |
8d87cb9f MCC |
1334 | return -EINVAL; |
1335 | ||
1336 | /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */ | |
1337 | f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; | |
1338 | f->frequency = core->freq; | |
1339 | ||
1340 | cx88_call_i2c_clients(core,VIDIOC_G_FREQUENCY,f); | |
1da177e4 | 1341 | |
1da177e4 LT |
1342 | return 0; |
1343 | } | |
1344 | ||
54da49f5 | 1345 | int cx88_set_freq (struct cx88_core *core, |
8d87cb9f | 1346 | struct v4l2_frequency *f) |
1da177e4 | 1347 | { |
6a59d64c | 1348 | if (unlikely(UNSET == core->board.tuner_type)) |
8d87cb9f MCC |
1349 | return -EINVAL; |
1350 | if (unlikely(f->tuner != 0)) | |
1351 | return -EINVAL; | |
54da49f5 | 1352 | |
8d87cb9f MCC |
1353 | mutex_lock(&core->lock); |
1354 | core->freq = f->frequency; | |
1355 | cx88_newstation(core); | |
1356 | cx88_call_i2c_clients(core,VIDIOC_S_FREQUENCY,f); | |
c7b0ac05 | 1357 | |
8d87cb9f MCC |
1358 | /* When changing channels it is required to reset TVAUDIO */ |
1359 | msleep (10); | |
1360 | cx88_set_tvaudio(core); | |
c7b0ac05 | 1361 | |
8d87cb9f | 1362 | mutex_unlock(&core->lock); |
54da49f5 | 1363 | |
8d87cb9f | 1364 | return 0; |
1da177e4 | 1365 | } |
54da49f5 MCC |
1366 | EXPORT_SYMBOL(cx88_set_freq); |
1367 | ||
1368 | static int vidioc_s_frequency (struct file *file, void *priv, | |
1369 | struct v4l2_frequency *f) | |
1370 | { | |
1371 | struct cx8800_fh *fh = priv; | |
1372 | struct cx88_core *core = fh->dev->core; | |
1373 | ||
1374 | if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV)) | |
1375 | return -EINVAL; | |
1376 | if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO)) | |
1377 | return -EINVAL; | |
1378 | ||
1379 | return | |
1380 | cx88_set_freq (core,f); | |
1381 | } | |
1da177e4 | 1382 | |
dbbff48f TP |
1383 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1384 | static int vidioc_g_register (struct file *file, void *fh, | |
1385 | struct v4l2_register *reg) | |
1386 | { | |
1387 | struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core; | |
1388 | ||
f3d092b8 | 1389 | if (!v4l2_chip_match_host(reg->match_type, reg->match_chip)) |
dbbff48f TP |
1390 | return -EINVAL; |
1391 | /* cx2388x has a 24-bit register space */ | |
1392 | reg->val = cx_read(reg->reg&0xffffff); | |
1393 | return 0; | |
1394 | } | |
1395 | ||
1396 | static int vidioc_s_register (struct file *file, void *fh, | |
1397 | struct v4l2_register *reg) | |
1398 | { | |
1399 | struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core; | |
1400 | ||
f3d092b8 | 1401 | if (!v4l2_chip_match_host(reg->match_type, reg->match_chip)) |
dbbff48f | 1402 | return -EINVAL; |
dbbff48f TP |
1403 | cx_write(reg->reg&0xffffff, reg->val); |
1404 | return 0; | |
1405 | } | |
1406 | #endif | |
8d87cb9f MCC |
1407 | |
1408 | /* ----------------------------------------------------------- */ | |
1409 | /* RADIO ESPECIFIC IOCTLS */ | |
1da177e4 LT |
1410 | /* ----------------------------------------------------------- */ |
1411 | ||
8d87cb9f MCC |
1412 | static int radio_querycap (struct file *file, void *priv, |
1413 | struct v4l2_capability *cap) | |
1da177e4 | 1414 | { |
8d87cb9f | 1415 | struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev; |
1da177e4 LT |
1416 | struct cx88_core *core = dev->core; |
1417 | ||
8d87cb9f | 1418 | strcpy(cap->driver, "cx8800"); |
6a59d64c | 1419 | strlcpy(cap->card, core->board.name, sizeof(cap->card)); |
8d87cb9f MCC |
1420 | sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci)); |
1421 | cap->version = CX88_VERSION_CODE; | |
1422 | cap->capabilities = V4L2_CAP_TUNER; | |
1423 | return 0; | |
1424 | } | |
1da177e4 | 1425 | |
8d87cb9f MCC |
1426 | static int radio_g_tuner (struct file *file, void *priv, |
1427 | struct v4l2_tuner *t) | |
1428 | { | |
1429 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1da177e4 | 1430 | |
8d87cb9f MCC |
1431 | if (unlikely(t->index > 0)) |
1432 | return -EINVAL; | |
1da177e4 | 1433 | |
8d87cb9f MCC |
1434 | strcpy(t->name, "Radio"); |
1435 | t->type = V4L2_TUNER_RADIO; | |
1da177e4 | 1436 | |
8d87cb9f MCC |
1437 | cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t); |
1438 | return 0; | |
1439 | } | |
1da177e4 | 1440 | |
8d87cb9f MCC |
1441 | static int radio_enum_input (struct file *file, void *priv, |
1442 | struct v4l2_input *i) | |
1443 | { | |
1444 | if (i->index != 0) | |
1445 | return -EINVAL; | |
1446 | strcpy(i->name,"Radio"); | |
1447 | i->type = V4L2_INPUT_TYPE_TUNER; | |
a82decf6 | 1448 | |
8d87cb9f MCC |
1449 | return 0; |
1450 | } | |
a82decf6 | 1451 | |
8d87cb9f MCC |
1452 | static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a) |
1453 | { | |
1454 | if (unlikely(a->index)) | |
1455 | return -EINVAL; | |
a82decf6 | 1456 | |
8d87cb9f MCC |
1457 | memset(a,0,sizeof(*a)); |
1458 | strcpy(a->name,"Radio"); | |
1459 | return 0; | |
1460 | } | |
a82decf6 | 1461 | |
8d87cb9f | 1462 | /* FIXME: Should add a standard for radio */ |
a82decf6 | 1463 | |
8d87cb9f MCC |
1464 | static int radio_s_tuner (struct file *file, void *priv, |
1465 | struct v4l2_tuner *t) | |
1466 | { | |
1467 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
a82decf6 | 1468 | |
8d87cb9f MCC |
1469 | if (0 != t->index) |
1470 | return -EINVAL; | |
1da177e4 | 1471 | |
8d87cb9f | 1472 | cx88_call_i2c_clients(core,VIDIOC_S_TUNER,t); |
1da177e4 | 1473 | |
8d87cb9f MCC |
1474 | return 0; |
1475 | } | |
1da177e4 | 1476 | |
8d87cb9f MCC |
1477 | static int radio_s_audio (struct file *file, void *fh, |
1478 | struct v4l2_audio *a) | |
1479 | { | |
1480 | return 0; | |
1481 | } | |
1da177e4 | 1482 | |
8d87cb9f MCC |
1483 | static int radio_s_input (struct file *file, void *fh, unsigned int i) |
1484 | { | |
1da177e4 | 1485 | return 0; |
8d87cb9f | 1486 | } |
1da177e4 | 1487 | |
8d87cb9f MCC |
1488 | static int radio_queryctrl (struct file *file, void *priv, |
1489 | struct v4l2_queryctrl *c) | |
1da177e4 | 1490 | { |
8d87cb9f MCC |
1491 | int i; |
1492 | ||
1493 | if (c->id < V4L2_CID_BASE || | |
1494 | c->id >= V4L2_CID_LASTP1) | |
1495 | return -EINVAL; | |
1496 | if (c->id == V4L2_CID_AUDIO_MUTE) { | |
1497 | for (i = 0; i < CX8800_CTLS; i++) | |
1498 | if (cx8800_ctls[i].v.id == c->id) | |
1499 | break; | |
1500 | *c = cx8800_ctls[i].v; | |
1501 | } else | |
1502 | *c = no_ctl; | |
1503 | return 0; | |
1504 | } | |
1da177e4 LT |
1505 | |
1506 | /* ----------------------------------------------------------- */ | |
1507 | ||
1508 | static void cx8800_vid_timeout(unsigned long data) | |
1509 | { | |
1510 | struct cx8800_dev *dev = (struct cx8800_dev*)data; | |
1511 | struct cx88_core *core = dev->core; | |
1512 | struct cx88_dmaqueue *q = &dev->vidq; | |
1513 | struct cx88_buffer *buf; | |
1514 | unsigned long flags; | |
1515 | ||
e52e98a7 | 1516 | cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]); |
1da177e4 LT |
1517 | |
1518 | cx_clear(MO_VID_DMACNTRL, 0x11); | |
1519 | cx_clear(VID_CAPTURE_CONTROL, 0x06); | |
1520 | ||
1521 | spin_lock_irqsave(&dev->slock,flags); | |
1522 | while (!list_empty(&q->active)) { | |
1523 | buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); | |
1524 | list_del(&buf->vb.queue); | |
1525 | buf->vb.state = STATE_ERROR; | |
1526 | wake_up(&buf->vb.done); | |
1527 | printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name, | |
1528 | buf, buf->vb.i, (unsigned long)buf->risc.dma); | |
1529 | } | |
1530 | restart_video_queue(dev,q); | |
1531 | spin_unlock_irqrestore(&dev->slock,flags); | |
1532 | } | |
1533 | ||
41ef7c1e MCC |
1534 | static char *cx88_vid_irqs[32] = { |
1535 | "y_risci1", "u_risci1", "v_risci1", "vbi_risc1", | |
1536 | "y_risci2", "u_risci2", "v_risci2", "vbi_risc2", | |
1537 | "y_oflow", "u_oflow", "v_oflow", "vbi_oflow", | |
1538 | "y_sync", "u_sync", "v_sync", "vbi_sync", | |
1539 | "opc_err", "par_err", "rip_err", "pci_abort", | |
1540 | }; | |
1541 | ||
1da177e4 LT |
1542 | static void cx8800_vid_irq(struct cx8800_dev *dev) |
1543 | { | |
1544 | struct cx88_core *core = dev->core; | |
1545 | u32 status, mask, count; | |
1546 | ||
1547 | status = cx_read(MO_VID_INTSTAT); | |
1548 | mask = cx_read(MO_VID_INTMSK); | |
1549 | if (0 == (status & mask)) | |
1550 | return; | |
1551 | cx_write(MO_VID_INTSTAT, status); | |
1552 | if (irq_debug || (status & mask & ~0xff)) | |
1553 | cx88_print_irqbits(core->name, "irq vid", | |
66623a04 MCC |
1554 | cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs), |
1555 | status, mask); | |
1da177e4 LT |
1556 | |
1557 | /* risc op code error */ | |
1558 | if (status & (1 << 16)) { | |
1559 | printk(KERN_WARNING "%s/0: video risc op code error\n",core->name); | |
1560 | cx_clear(MO_VID_DMACNTRL, 0x11); | |
1561 | cx_clear(VID_CAPTURE_CONTROL, 0x06); | |
e52e98a7 | 1562 | cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]); |
1da177e4 LT |
1563 | } |
1564 | ||
1565 | /* risc1 y */ | |
1566 | if (status & 0x01) { | |
1567 | spin_lock(&dev->slock); | |
1568 | count = cx_read(MO_VIDY_GPCNT); | |
e52e98a7 | 1569 | cx88_wakeup(core, &dev->vidq, count); |
1da177e4 LT |
1570 | spin_unlock(&dev->slock); |
1571 | } | |
1572 | ||
1573 | /* risc1 vbi */ | |
1574 | if (status & 0x08) { | |
1575 | spin_lock(&dev->slock); | |
1576 | count = cx_read(MO_VBI_GPCNT); | |
e52e98a7 | 1577 | cx88_wakeup(core, &dev->vbiq, count); |
1da177e4 LT |
1578 | spin_unlock(&dev->slock); |
1579 | } | |
1580 | ||
1581 | /* risc2 y */ | |
1582 | if (status & 0x10) { | |
1583 | dprintk(2,"stopper video\n"); | |
1584 | spin_lock(&dev->slock); | |
1585 | restart_video_queue(dev,&dev->vidq); | |
1586 | spin_unlock(&dev->slock); | |
1587 | } | |
1588 | ||
1589 | /* risc2 vbi */ | |
1590 | if (status & 0x80) { | |
1591 | dprintk(2,"stopper vbi\n"); | |
1592 | spin_lock(&dev->slock); | |
1593 | cx8800_restart_vbi_queue(dev,&dev->vbiq); | |
1594 | spin_unlock(&dev->slock); | |
1595 | } | |
1596 | } | |
1597 | ||
7d12e780 | 1598 | static irqreturn_t cx8800_irq(int irq, void *dev_id) |
1da177e4 LT |
1599 | { |
1600 | struct cx8800_dev *dev = dev_id; | |
1601 | struct cx88_core *core = dev->core; | |
1602 | u32 status; | |
1603 | int loop, handled = 0; | |
1604 | ||
1605 | for (loop = 0; loop < 10; loop++) { | |
8ddac9ee TP |
1606 | status = cx_read(MO_PCI_INTSTAT) & |
1607 | (core->pci_irqmask | PCI_INT_VIDINT); | |
1da177e4 LT |
1608 | if (0 == status) |
1609 | goto out; | |
1610 | cx_write(MO_PCI_INTSTAT, status); | |
1611 | handled = 1; | |
1612 | ||
1613 | if (status & core->pci_irqmask) | |
1614 | cx88_core_irq(core,status); | |
8ddac9ee | 1615 | if (status & PCI_INT_VIDINT) |
1da177e4 LT |
1616 | cx8800_vid_irq(dev); |
1617 | }; | |
1618 | if (10 == loop) { | |
1619 | printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n", | |
1620 | core->name); | |
1621 | cx_write(MO_PCI_INTMSK,0); | |
1622 | } | |
1623 | ||
1624 | out: | |
1625 | return IRQ_RETVAL(handled); | |
1626 | } | |
1627 | ||
1628 | /* ----------------------------------------------------------- */ | |
1629 | /* exported stuff */ | |
1630 | ||
fa027c2a | 1631 | static const struct file_operations video_fops = |
1da177e4 LT |
1632 | { |
1633 | .owner = THIS_MODULE, | |
1634 | .open = video_open, | |
1635 | .release = video_release, | |
1636 | .read = video_read, | |
1637 | .poll = video_poll, | |
1638 | .mmap = video_mmap, | |
8d87cb9f | 1639 | .ioctl = video_ioctl2, |
0d0fbf81 | 1640 | .compat_ioctl = v4l_compat_ioctl32, |
1da177e4 LT |
1641 | .llseek = no_llseek, |
1642 | }; | |
1643 | ||
8d87cb9f | 1644 | static struct video_device cx8800_vbi_template; |
408b664a | 1645 | static struct video_device cx8800_video_template = |
1da177e4 | 1646 | { |
8d87cb9f MCC |
1647 | .name = "cx8800-video", |
1648 | .type = VID_TYPE_CAPTURE|VID_TYPE_TUNER|VID_TYPE_SCALES, | |
1649 | .fops = &video_fops, | |
1650 | .minor = -1, | |
1651 | .vidioc_querycap = vidioc_querycap, | |
1652 | .vidioc_enum_fmt_cap = vidioc_enum_fmt_cap, | |
1653 | .vidioc_g_fmt_cap = vidioc_g_fmt_cap, | |
1654 | .vidioc_try_fmt_cap = vidioc_try_fmt_cap, | |
1655 | .vidioc_s_fmt_cap = vidioc_s_fmt_cap, | |
1656 | .vidioc_g_fmt_vbi = cx8800_vbi_fmt, | |
1657 | .vidioc_try_fmt_vbi = cx8800_vbi_fmt, | |
1658 | .vidioc_s_fmt_vbi = cx8800_vbi_fmt, | |
1659 | .vidioc_reqbufs = vidioc_reqbufs, | |
1660 | .vidioc_querybuf = vidioc_querybuf, | |
1661 | .vidioc_qbuf = vidioc_qbuf, | |
1662 | .vidioc_dqbuf = vidioc_dqbuf, | |
1663 | .vidioc_s_std = vidioc_s_std, | |
1664 | .vidioc_enum_input = vidioc_enum_input, | |
1665 | .vidioc_g_input = vidioc_g_input, | |
1666 | .vidioc_s_input = vidioc_s_input, | |
1667 | .vidioc_queryctrl = vidioc_queryctrl, | |
1668 | .vidioc_g_ctrl = vidioc_g_ctrl, | |
1669 | .vidioc_s_ctrl = vidioc_s_ctrl, | |
1670 | .vidioc_streamon = vidioc_streamon, | |
1671 | .vidioc_streamoff = vidioc_streamoff, | |
1672 | #ifdef CONFIG_VIDEO_V4L1_COMPAT | |
1673 | .vidiocgmbuf = vidiocgmbuf, | |
1674 | #endif | |
1675 | .vidioc_g_tuner = vidioc_g_tuner, | |
1676 | .vidioc_s_tuner = vidioc_s_tuner, | |
1677 | .vidioc_g_frequency = vidioc_g_frequency, | |
1678 | .vidioc_s_frequency = vidioc_s_frequency, | |
dbbff48f TP |
1679 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1680 | .vidioc_g_register = vidioc_g_register, | |
1681 | .vidioc_s_register = vidioc_s_register, | |
1682 | #endif | |
63ab1bdc | 1683 | .tvnorms = CX88_NORMS, |
dbbff48f | 1684 | .current_norm = V4L2_STD_NTSC_M, |
1da177e4 LT |
1685 | }; |
1686 | ||
fa027c2a | 1687 | static const struct file_operations radio_fops = |
1da177e4 LT |
1688 | { |
1689 | .owner = THIS_MODULE, | |
1690 | .open = video_open, | |
1691 | .release = video_release, | |
8d87cb9f | 1692 | .ioctl = video_ioctl2, |
0d0fbf81 | 1693 | .compat_ioctl = v4l_compat_ioctl32, |
1da177e4 LT |
1694 | .llseek = no_llseek, |
1695 | }; | |
1696 | ||
408b664a | 1697 | static struct video_device cx8800_radio_template = |
1da177e4 | 1698 | { |
8d87cb9f MCC |
1699 | .name = "cx8800-radio", |
1700 | .type = VID_TYPE_TUNER, | |
1701 | .hardware = 0, | |
1702 | .fops = &radio_fops, | |
1703 | .minor = -1, | |
1704 | .vidioc_querycap = radio_querycap, | |
1705 | .vidioc_g_tuner = radio_g_tuner, | |
1706 | .vidioc_enum_input = radio_enum_input, | |
1707 | .vidioc_g_audio = radio_g_audio, | |
1708 | .vidioc_s_tuner = radio_s_tuner, | |
1709 | .vidioc_s_audio = radio_s_audio, | |
1710 | .vidioc_s_input = radio_s_input, | |
1711 | .vidioc_queryctrl = radio_queryctrl, | |
1712 | .vidioc_g_ctrl = vidioc_g_ctrl, | |
1713 | .vidioc_s_ctrl = vidioc_s_ctrl, | |
1714 | .vidioc_g_frequency = vidioc_g_frequency, | |
1715 | .vidioc_s_frequency = vidioc_s_frequency, | |
a75d2048 TP |
1716 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1717 | .vidioc_g_register = vidioc_g_register, | |
1718 | .vidioc_s_register = vidioc_s_register, | |
1719 | #endif | |
1da177e4 LT |
1720 | }; |
1721 | ||
1722 | /* ----------------------------------------------------------- */ | |
1723 | ||
1724 | static void cx8800_unregister_video(struct cx8800_dev *dev) | |
1725 | { | |
1726 | if (dev->radio_dev) { | |
1727 | if (-1 != dev->radio_dev->minor) | |
1728 | video_unregister_device(dev->radio_dev); | |
1729 | else | |
1730 | video_device_release(dev->radio_dev); | |
1731 | dev->radio_dev = NULL; | |
1732 | } | |
1733 | if (dev->vbi_dev) { | |
1734 | if (-1 != dev->vbi_dev->minor) | |
1735 | video_unregister_device(dev->vbi_dev); | |
1736 | else | |
1737 | video_device_release(dev->vbi_dev); | |
1738 | dev->vbi_dev = NULL; | |
1739 | } | |
1740 | if (dev->video_dev) { | |
1741 | if (-1 != dev->video_dev->minor) | |
1742 | video_unregister_device(dev->video_dev); | |
1743 | else | |
1744 | video_device_release(dev->video_dev); | |
1745 | dev->video_dev = NULL; | |
1746 | } | |
1747 | } | |
1748 | ||
1749 | static int __devinit cx8800_initdev(struct pci_dev *pci_dev, | |
1750 | const struct pci_device_id *pci_id) | |
1751 | { | |
1752 | struct cx8800_dev *dev; | |
1753 | struct cx88_core *core; | |
8d87cb9f | 1754 | |
1da177e4 LT |
1755 | int err; |
1756 | ||
7408187d | 1757 | dev = kzalloc(sizeof(*dev),GFP_KERNEL); |
1da177e4 LT |
1758 | if (NULL == dev) |
1759 | return -ENOMEM; | |
1da177e4 LT |
1760 | |
1761 | /* pci init */ | |
1762 | dev->pci = pci_dev; | |
1763 | if (pci_enable_device(pci_dev)) { | |
1764 | err = -EIO; | |
1765 | goto fail_free; | |
1766 | } | |
1767 | core = cx88_core_get(dev->pci); | |
1768 | if (NULL == core) { | |
1769 | err = -EINVAL; | |
1770 | goto fail_free; | |
1771 | } | |
1772 | dev->core = core; | |
1773 | ||
1774 | /* print pci info */ | |
1775 | pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev); | |
4ac97914 MCC |
1776 | pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat); |
1777 | printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, " | |
228aef63 | 1778 | "latency: %d, mmio: 0x%llx\n", core->name, |
1da177e4 | 1779 | pci_name(pci_dev), dev->pci_rev, pci_dev->irq, |
228aef63 | 1780 | dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0)); |
1da177e4 LT |
1781 | |
1782 | pci_set_master(pci_dev); | |
aaa40cb8 | 1783 | if (!pci_dma_supported(pci_dev,DMA_32BIT_MASK)) { |
1da177e4 LT |
1784 | printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name); |
1785 | err = -EIO; | |
1786 | goto fail_core; | |
1787 | } | |
1788 | ||
8d87cb9f MCC |
1789 | /* Initialize VBI template */ |
1790 | memcpy( &cx8800_vbi_template, &cx8800_video_template, | |
1791 | sizeof(cx8800_vbi_template) ); | |
1792 | strcpy(cx8800_vbi_template.name,"cx8800-vbi"); | |
1793 | cx8800_vbi_template.type = VID_TYPE_TELETEXT|VID_TYPE_TUNER; | |
1794 | ||
1da177e4 | 1795 | /* initialize driver struct */ |
1da177e4 | 1796 | spin_lock_init(&dev->slock); |
63ab1bdc | 1797 | core->tvnorm = cx8800_video_template.current_norm; |
1da177e4 LT |
1798 | |
1799 | /* init video dma queues */ | |
1800 | INIT_LIST_HEAD(&dev->vidq.active); | |
1801 | INIT_LIST_HEAD(&dev->vidq.queued); | |
1802 | dev->vidq.timeout.function = cx8800_vid_timeout; | |
1803 | dev->vidq.timeout.data = (unsigned long)dev; | |
1804 | init_timer(&dev->vidq.timeout); | |
1805 | cx88_risc_stopper(dev->pci,&dev->vidq.stopper, | |
1806 | MO_VID_DMACNTRL,0x11,0x00); | |
1807 | ||
1808 | /* init vbi dma queues */ | |
1809 | INIT_LIST_HEAD(&dev->vbiq.active); | |
1810 | INIT_LIST_HEAD(&dev->vbiq.queued); | |
1811 | dev->vbiq.timeout.function = cx8800_vbi_timeout; | |
1812 | dev->vbiq.timeout.data = (unsigned long)dev; | |
1813 | init_timer(&dev->vbiq.timeout); | |
1814 | cx88_risc_stopper(dev->pci,&dev->vbiq.stopper, | |
1815 | MO_VID_DMACNTRL,0x88,0x00); | |
1816 | ||
1817 | /* get irq */ | |
1818 | err = request_irq(pci_dev->irq, cx8800_irq, | |
8076fe32 | 1819 | IRQF_SHARED | IRQF_DISABLED, core->name, dev); |
1da177e4 | 1820 | if (err < 0) { |
5772f813 | 1821 | printk(KERN_ERR "%s/0: can't get IRQ %d\n", |
1da177e4 LT |
1822 | core->name,pci_dev->irq); |
1823 | goto fail_core; | |
1824 | } | |
1825 | cx_set(MO_PCI_INTMSK, core->pci_irqmask); | |
1826 | ||
1827 | /* load and configure helper modules */ | |
6a59d64c | 1828 | if (TUNER_ABSENT != core->board.tuner_type) |
1da177e4 | 1829 | request_module("tuner"); |
e52e98a7 | 1830 | |
6a59d64c | 1831 | if (core->board.audio_chip == AUDIO_CHIP_WM8775) |
3057906d ST |
1832 | request_module("wm8775"); |
1833 | ||
1da177e4 LT |
1834 | /* register v4l devices */ |
1835 | dev->video_dev = cx88_vdev_init(core,dev->pci, | |
1836 | &cx8800_video_template,"video"); | |
1837 | err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER, | |
1838 | video_nr[core->nr]); | |
1839 | if (err < 0) { | |
5772f813 | 1840 | printk(KERN_ERR "%s/0: can't register video device\n", |
1da177e4 LT |
1841 | core->name); |
1842 | goto fail_unreg; | |
1843 | } | |
1844 | printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n", | |
1845 | core->name,dev->video_dev->minor & 0x1f); | |
1846 | ||
1847 | dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi"); | |
1848 | err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI, | |
1849 | vbi_nr[core->nr]); | |
1850 | if (err < 0) { | |
5772f813 | 1851 | printk(KERN_ERR "%s/0: can't register vbi device\n", |
1da177e4 LT |
1852 | core->name); |
1853 | goto fail_unreg; | |
1854 | } | |
1855 | printk(KERN_INFO "%s/0: registered device vbi%d\n", | |
1856 | core->name,dev->vbi_dev->minor & 0x1f); | |
1857 | ||
6a59d64c | 1858 | if (core->board.radio.type == CX88_RADIO) { |
1da177e4 LT |
1859 | dev->radio_dev = cx88_vdev_init(core,dev->pci, |
1860 | &cx8800_radio_template,"radio"); | |
1861 | err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO, | |
1862 | radio_nr[core->nr]); | |
1863 | if (err < 0) { | |
5772f813 | 1864 | printk(KERN_ERR "%s/0: can't register radio device\n", |
1da177e4 LT |
1865 | core->name); |
1866 | goto fail_unreg; | |
1867 | } | |
1868 | printk(KERN_INFO "%s/0: registered device radio%d\n", | |
1869 | core->name,dev->radio_dev->minor & 0x1f); | |
1870 | } | |
1871 | ||
1872 | /* everything worked */ | |
1873 | list_add_tail(&dev->devlist,&cx8800_devlist); | |
1874 | pci_set_drvdata(pci_dev,dev); | |
1875 | ||
1876 | /* initial device configuration */ | |
3593cab5 | 1877 | mutex_lock(&core->lock); |
63ab1bdc | 1878 | cx88_set_tvnorm(core,core->tvnorm); |
70f00044 | 1879 | init_controls(core); |
e90311a1 | 1880 | cx88_video_mux(core,0); |
3593cab5 | 1881 | mutex_unlock(&core->lock); |
1da177e4 LT |
1882 | |
1883 | /* start tvaudio thread */ | |
6a59d64c | 1884 | if (core->board.tuner_type != TUNER_ABSENT) { |
1da177e4 | 1885 | core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio"); |
32b78de7 CG |
1886 | if (IS_ERR(core->kthread)) { |
1887 | err = PTR_ERR(core->kthread); | |
5772f813 TP |
1888 | printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n", |
1889 | core->name, err); | |
32b78de7 CG |
1890 | } |
1891 | } | |
1da177e4 LT |
1892 | return 0; |
1893 | ||
1894 | fail_unreg: | |
1895 | cx8800_unregister_video(dev); | |
1896 | free_irq(pci_dev->irq, dev); | |
1897 | fail_core: | |
1898 | cx88_core_put(core,dev->pci); | |
1899 | fail_free: | |
1900 | kfree(dev); | |
1901 | return err; | |
1902 | } | |
1903 | ||
1904 | static void __devexit cx8800_finidev(struct pci_dev *pci_dev) | |
1905 | { | |
4ac97914 | 1906 | struct cx8800_dev *dev = pci_get_drvdata(pci_dev); |
e52e98a7 | 1907 | struct cx88_core *core = dev->core; |
1da177e4 LT |
1908 | |
1909 | /* stop thread */ | |
e52e98a7 MCC |
1910 | if (core->kthread) { |
1911 | kthread_stop(core->kthread); | |
1912 | core->kthread = NULL; | |
1da177e4 LT |
1913 | } |
1914 | ||
e52e98a7 | 1915 | cx88_shutdown(core); /* FIXME */ |
1da177e4 LT |
1916 | pci_disable_device(pci_dev); |
1917 | ||
1918 | /* unregister stuff */ | |
1919 | ||
1920 | free_irq(pci_dev->irq, dev); | |
1921 | cx8800_unregister_video(dev); | |
1922 | pci_set_drvdata(pci_dev, NULL); | |
1923 | ||
1924 | /* free memory */ | |
1925 | btcx_riscmem_free(dev->pci,&dev->vidq.stopper); | |
1926 | list_del(&dev->devlist); | |
e52e98a7 | 1927 | cx88_core_put(core,dev->pci); |
1da177e4 LT |
1928 | kfree(dev); |
1929 | } | |
1930 | ||
17bc98a4 | 1931 | #ifdef CONFIG_PM |
1da177e4 LT |
1932 | static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state) |
1933 | { | |
b45009b0 | 1934 | struct cx8800_dev *dev = pci_get_drvdata(pci_dev); |
1da177e4 LT |
1935 | struct cx88_core *core = dev->core; |
1936 | ||
1937 | /* stop video+vbi capture */ | |
1938 | spin_lock(&dev->slock); | |
1939 | if (!list_empty(&dev->vidq.active)) { | |
5772f813 | 1940 | printk("%s/0: suspend video\n", core->name); |
1da177e4 LT |
1941 | stop_video_dma(dev); |
1942 | del_timer(&dev->vidq.timeout); | |
1943 | } | |
1944 | if (!list_empty(&dev->vbiq.active)) { | |
5772f813 | 1945 | printk("%s/0: suspend vbi\n", core->name); |
1da177e4 LT |
1946 | cx8800_stop_vbi_dma(dev); |
1947 | del_timer(&dev->vbiq.timeout); | |
1948 | } | |
1949 | spin_unlock(&dev->slock); | |
1950 | ||
1da177e4 | 1951 | /* FIXME -- shutdown device */ |
e52e98a7 | 1952 | cx88_shutdown(core); |
1da177e4 LT |
1953 | |
1954 | pci_save_state(pci_dev); | |
1955 | if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) { | |
1956 | pci_disable_device(pci_dev); | |
1957 | dev->state.disabled = 1; | |
1958 | } | |
1959 | return 0; | |
1960 | } | |
1961 | ||
1962 | static int cx8800_resume(struct pci_dev *pci_dev) | |
1963 | { | |
b45009b0 | 1964 | struct cx8800_dev *dev = pci_get_drvdata(pci_dev); |
1da177e4 | 1965 | struct cx88_core *core = dev->core; |
08adb9e2 | 1966 | int err; |
1da177e4 LT |
1967 | |
1968 | if (dev->state.disabled) { | |
08adb9e2 MCC |
1969 | err=pci_enable_device(pci_dev); |
1970 | if (err) { | |
5772f813 TP |
1971 | printk(KERN_ERR "%s/0: can't enable device\n", |
1972 | core->name); | |
08adb9e2 MCC |
1973 | return err; |
1974 | } | |
1975 | ||
1da177e4 LT |
1976 | dev->state.disabled = 0; |
1977 | } | |
08adb9e2 MCC |
1978 | err= pci_set_power_state(pci_dev, PCI_D0); |
1979 | if (err) { | |
5772f813 | 1980 | printk(KERN_ERR "%s/0: can't set power state\n", core->name); |
08adb9e2 MCC |
1981 | pci_disable_device(pci_dev); |
1982 | dev->state.disabled = 1; | |
1983 | ||
1984 | return err; | |
1985 | } | |
1da177e4 LT |
1986 | pci_restore_state(pci_dev); |
1987 | ||
1da177e4 | 1988 | /* FIXME: re-initialize hardware */ |
e52e98a7 | 1989 | cx88_reset(core); |
1da177e4 LT |
1990 | |
1991 | /* restart video+vbi capture */ | |
1992 | spin_lock(&dev->slock); | |
1993 | if (!list_empty(&dev->vidq.active)) { | |
5772f813 | 1994 | printk("%s/0: resume video\n", core->name); |
1da177e4 LT |
1995 | restart_video_queue(dev,&dev->vidq); |
1996 | } | |
1997 | if (!list_empty(&dev->vbiq.active)) { | |
5772f813 | 1998 | printk("%s/0: resume vbi\n", core->name); |
1da177e4 LT |
1999 | cx8800_restart_vbi_queue(dev,&dev->vbiq); |
2000 | } | |
2001 | spin_unlock(&dev->slock); | |
2002 | ||
2003 | return 0; | |
2004 | } | |
17bc98a4 | 2005 | #endif |
1da177e4 LT |
2006 | |
2007 | /* ----------------------------------------------------------- */ | |
2008 | ||
408b664a | 2009 | static struct pci_device_id cx8800_pci_tbl[] = { |
1da177e4 LT |
2010 | { |
2011 | .vendor = 0x14f1, | |
2012 | .device = 0x8800, | |
b45009b0 MCC |
2013 | .subvendor = PCI_ANY_ID, |
2014 | .subdevice = PCI_ANY_ID, | |
1da177e4 LT |
2015 | },{ |
2016 | /* --- end of list --- */ | |
2017 | } | |
2018 | }; | |
2019 | MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl); | |
2020 | ||
2021 | static struct pci_driver cx8800_pci_driver = { | |
b45009b0 MCC |
2022 | .name = "cx8800", |
2023 | .id_table = cx8800_pci_tbl, | |
2024 | .probe = cx8800_initdev, | |
2025 | .remove = __devexit_p(cx8800_finidev), | |
17bc98a4 | 2026 | #ifdef CONFIG_PM |
1da177e4 LT |
2027 | .suspend = cx8800_suspend, |
2028 | .resume = cx8800_resume, | |
17bc98a4 | 2029 | #endif |
1da177e4 LT |
2030 | }; |
2031 | ||
2032 | static int cx8800_init(void) | |
2033 | { | |
5772f813 | 2034 | printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n", |
1da177e4 LT |
2035 | (CX88_VERSION_CODE >> 16) & 0xff, |
2036 | (CX88_VERSION_CODE >> 8) & 0xff, | |
2037 | CX88_VERSION_CODE & 0xff); | |
2038 | #ifdef SNAPSHOT | |
2039 | printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n", | |
2040 | SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100); | |
2041 | #endif | |
2042 | return pci_register_driver(&cx8800_pci_driver); | |
2043 | } | |
2044 | ||
2045 | static void cx8800_fini(void) | |
2046 | { | |
2047 | pci_unregister_driver(&cx8800_pci_driver); | |
2048 | } | |
2049 | ||
2050 | module_init(cx8800_init); | |
2051 | module_exit(cx8800_fini); | |
2052 | ||
2053 | /* ----------------------------------------------------------- */ | |
2054 | /* | |
2055 | * Local variables: | |
2056 | * c-basic-offset: 8 | |
2057 | * End: | |
b45009b0 | 2058 | * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off |
1da177e4 | 2059 | */ |