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Commit | Line | Data |
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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * device driver for Conexant 2388x based TV cards | |
4 | * video4linux video interface | |
5 | * | |
6 | * (c) 2003-04 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
7 | * | |
8d87cb9f MCC |
8 | * (c) 2005-2006 Mauro Carvalho Chehab <mchehab@infradead.org> |
9 | * - Multituner support | |
10 | * - video_ioctl2 conversion | |
11 | * - PAL/M fixes | |
12 | * | |
1da177e4 LT |
13 | * This program is free software; you can redistribute it and/or modify |
14 | * it under the terms of the GNU General Public License as published by | |
15 | * the Free Software Foundation; either version 2 of the License, or | |
16 | * (at your option) any later version. | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, write to the Free Software | |
25 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
26 | */ | |
27 | ||
28 | #include <linux/init.h> | |
29 | #include <linux/list.h> | |
30 | #include <linux/module.h> | |
1da177e4 LT |
31 | #include <linux/kmod.h> |
32 | #include <linux/kernel.h> | |
33 | #include <linux/slab.h> | |
34 | #include <linux/interrupt.h> | |
c24228da | 35 | #include <linux/dma-mapping.h> |
1da177e4 LT |
36 | #include <linux/delay.h> |
37 | #include <linux/kthread.h> | |
38 | #include <asm/div64.h> | |
39 | ||
40 | #include "cx88.h" | |
5e453dc7 | 41 | #include <media/v4l2-common.h> |
35ea11ff | 42 | #include <media/v4l2-ioctl.h> |
1da177e4 | 43 | |
cd41e28e | 44 | #ifdef CONFIG_VIDEO_V4L1_COMPAT |
79436633 MCC |
45 | /* Include V4L1 specific functions. Should be removed soon */ |
46 | #include <linux/videodev.h> | |
cd41e28e | 47 | #endif |
79436633 | 48 | |
1da177e4 LT |
49 | MODULE_DESCRIPTION("v4l2 driver module for cx2388x based TV cards"); |
50 | MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]"); | |
51 | MODULE_LICENSE("GPL"); | |
52 | ||
53 | /* ------------------------------------------------------------------ */ | |
54 | ||
55 | static unsigned int video_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | |
56 | static unsigned int vbi_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | |
57 | static unsigned int radio_nr[] = {[0 ... (CX88_MAXBOARDS - 1)] = UNSET }; | |
58 | ||
59 | module_param_array(video_nr, int, NULL, 0444); | |
60 | module_param_array(vbi_nr, int, NULL, 0444); | |
61 | module_param_array(radio_nr, int, NULL, 0444); | |
62 | ||
63 | MODULE_PARM_DESC(video_nr,"video device numbers"); | |
64 | MODULE_PARM_DESC(vbi_nr,"vbi device numbers"); | |
65 | MODULE_PARM_DESC(radio_nr,"radio device numbers"); | |
66 | ||
ff699e6b | 67 | static unsigned int video_debug; |
1da177e4 LT |
68 | module_param(video_debug,int,0644); |
69 | MODULE_PARM_DESC(video_debug,"enable debug messages [video]"); | |
70 | ||
ff699e6b | 71 | static unsigned int irq_debug; |
1da177e4 LT |
72 | module_param(irq_debug,int,0644); |
73 | MODULE_PARM_DESC(irq_debug,"enable debug messages [IRQ handler]"); | |
74 | ||
75 | static unsigned int vid_limit = 16; | |
76 | module_param(vid_limit,int,0644); | |
77 | MODULE_PARM_DESC(vid_limit,"capture memory limit in megabytes"); | |
78 | ||
79 | #define dprintk(level,fmt, arg...) if (video_debug >= level) \ | |
e52e98a7 | 80 | printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg) |
1da177e4 LT |
81 | |
82 | /* ------------------------------------------------------------------ */ | |
83 | ||
84 | static LIST_HEAD(cx8800_devlist); | |
85 | ||
86 | /* ------------------------------------------------------------------- */ | |
87 | /* static data */ | |
88 | ||
1da177e4 LT |
89 | static struct cx8800_fmt formats[] = { |
90 | { | |
91 | .name = "8 bpp, gray", | |
92 | .fourcc = V4L2_PIX_FMT_GREY, | |
93 | .cxformat = ColorFormatY8, | |
94 | .depth = 8, | |
95 | .flags = FORMAT_FLAGS_PACKED, | |
96 | },{ | |
97 | .name = "15 bpp RGB, le", | |
98 | .fourcc = V4L2_PIX_FMT_RGB555, | |
99 | .cxformat = ColorFormatRGB15, | |
100 | .depth = 16, | |
101 | .flags = FORMAT_FLAGS_PACKED, | |
102 | },{ | |
103 | .name = "15 bpp RGB, be", | |
104 | .fourcc = V4L2_PIX_FMT_RGB555X, | |
105 | .cxformat = ColorFormatRGB15 | ColorFormatBSWAP, | |
106 | .depth = 16, | |
107 | .flags = FORMAT_FLAGS_PACKED, | |
108 | },{ | |
109 | .name = "16 bpp RGB, le", | |
110 | .fourcc = V4L2_PIX_FMT_RGB565, | |
111 | .cxformat = ColorFormatRGB16, | |
112 | .depth = 16, | |
113 | .flags = FORMAT_FLAGS_PACKED, | |
114 | },{ | |
115 | .name = "16 bpp RGB, be", | |
116 | .fourcc = V4L2_PIX_FMT_RGB565X, | |
117 | .cxformat = ColorFormatRGB16 | ColorFormatBSWAP, | |
118 | .depth = 16, | |
119 | .flags = FORMAT_FLAGS_PACKED, | |
120 | },{ | |
121 | .name = "24 bpp RGB, le", | |
122 | .fourcc = V4L2_PIX_FMT_BGR24, | |
123 | .cxformat = ColorFormatRGB24, | |
124 | .depth = 24, | |
125 | .flags = FORMAT_FLAGS_PACKED, | |
126 | },{ | |
127 | .name = "32 bpp RGB, le", | |
128 | .fourcc = V4L2_PIX_FMT_BGR32, | |
129 | .cxformat = ColorFormatRGB32, | |
130 | .depth = 32, | |
131 | .flags = FORMAT_FLAGS_PACKED, | |
132 | },{ | |
133 | .name = "32 bpp RGB, be", | |
134 | .fourcc = V4L2_PIX_FMT_RGB32, | |
135 | .cxformat = ColorFormatRGB32 | ColorFormatBSWAP | ColorFormatWSWAP, | |
136 | .depth = 32, | |
137 | .flags = FORMAT_FLAGS_PACKED, | |
138 | },{ | |
139 | .name = "4:2:2, packed, YUYV", | |
140 | .fourcc = V4L2_PIX_FMT_YUYV, | |
141 | .cxformat = ColorFormatYUY2, | |
142 | .depth = 16, | |
143 | .flags = FORMAT_FLAGS_PACKED, | |
144 | },{ | |
145 | .name = "4:2:2, packed, UYVY", | |
146 | .fourcc = V4L2_PIX_FMT_UYVY, | |
147 | .cxformat = ColorFormatYUY2 | ColorFormatBSWAP, | |
148 | .depth = 16, | |
149 | .flags = FORMAT_FLAGS_PACKED, | |
150 | }, | |
151 | }; | |
152 | ||
153 | static struct cx8800_fmt* format_by_fourcc(unsigned int fourcc) | |
154 | { | |
155 | unsigned int i; | |
156 | ||
157 | for (i = 0; i < ARRAY_SIZE(formats); i++) | |
158 | if (formats[i].fourcc == fourcc) | |
159 | return formats+i; | |
160 | return NULL; | |
161 | } | |
162 | ||
163 | /* ------------------------------------------------------------------- */ | |
164 | ||
165 | static const struct v4l2_queryctrl no_ctl = { | |
166 | .name = "42", | |
167 | .flags = V4L2_CTRL_FLAG_DISABLED, | |
168 | }; | |
169 | ||
170 | static struct cx88_ctrl cx8800_ctls[] = { | |
171 | /* --- video --- */ | |
172 | { | |
173 | .v = { | |
174 | .id = V4L2_CID_BRIGHTNESS, | |
175 | .name = "Brightness", | |
176 | .minimum = 0x00, | |
177 | .maximum = 0xff, | |
178 | .step = 1, | |
9f9c907f | 179 | .default_value = 0x7f, |
1da177e4 LT |
180 | .type = V4L2_CTRL_TYPE_INTEGER, |
181 | }, | |
182 | .off = 128, | |
183 | .reg = MO_CONTR_BRIGHT, | |
184 | .mask = 0x00ff, | |
185 | .shift = 0, | |
186 | },{ | |
187 | .v = { | |
188 | .id = V4L2_CID_CONTRAST, | |
189 | .name = "Contrast", | |
190 | .minimum = 0, | |
191 | .maximum = 0xff, | |
192 | .step = 1, | |
70f00044 | 193 | .default_value = 0x3f, |
1da177e4 LT |
194 | .type = V4L2_CTRL_TYPE_INTEGER, |
195 | }, | |
41ef7c1e | 196 | .off = 0, |
1da177e4 LT |
197 | .reg = MO_CONTR_BRIGHT, |
198 | .mask = 0xff00, | |
199 | .shift = 8, | |
200 | },{ | |
201 | .v = { | |
202 | .id = V4L2_CID_HUE, | |
203 | .name = "Hue", | |
204 | .minimum = 0, | |
205 | .maximum = 0xff, | |
206 | .step = 1, | |
9f9c907f | 207 | .default_value = 0x7f, |
1da177e4 LT |
208 | .type = V4L2_CTRL_TYPE_INTEGER, |
209 | }, | |
9ac4c158 | 210 | .off = 128, |
1da177e4 LT |
211 | .reg = MO_HUE, |
212 | .mask = 0x00ff, | |
213 | .shift = 0, | |
214 | },{ | |
215 | /* strictly, this only describes only U saturation. | |
216 | * V saturation is handled specially through code. | |
217 | */ | |
218 | .v = { | |
219 | .id = V4L2_CID_SATURATION, | |
220 | .name = "Saturation", | |
221 | .minimum = 0, | |
222 | .maximum = 0xff, | |
223 | .step = 1, | |
70f00044 | 224 | .default_value = 0x7f, |
1da177e4 LT |
225 | .type = V4L2_CTRL_TYPE_INTEGER, |
226 | }, | |
227 | .off = 0, | |
228 | .reg = MO_UV_SATURATION, | |
229 | .mask = 0x00ff, | |
230 | .shift = 0, | |
231 | },{ | |
6d04203c FD |
232 | .v = { |
233 | .id = V4L2_CID_CHROMA_AGC, | |
234 | .name = "Chroma AGC", | |
235 | .minimum = 0, | |
236 | .maximum = 1, | |
87a17389 | 237 | .default_value = 0x1, |
6d04203c FD |
238 | .type = V4L2_CTRL_TYPE_BOOLEAN, |
239 | }, | |
240 | .reg = MO_INPUT_FORMAT, | |
241 | .mask = 1 << 10, | |
242 | .shift = 10, | |
1b879c43 FD |
243 | }, { |
244 | .v = { | |
245 | .id = V4L2_CID_COLOR_KILLER, | |
246 | .name = "Color killer", | |
247 | .minimum = 0, | |
248 | .maximum = 1, | |
0b5afdd2 | 249 | .default_value = 0x1, |
1b879c43 FD |
250 | .type = V4L2_CTRL_TYPE_BOOLEAN, |
251 | }, | |
252 | .reg = MO_INPUT_FORMAT, | |
253 | .mask = 1 << 9, | |
254 | .shift = 9, | |
6d04203c | 255 | }, { |
1da177e4 LT |
256 | /* --- audio --- */ |
257 | .v = { | |
258 | .id = V4L2_CID_AUDIO_MUTE, | |
259 | .name = "Mute", | |
260 | .minimum = 0, | |
261 | .maximum = 1, | |
70f00044 | 262 | .default_value = 1, |
1da177e4 LT |
263 | .type = V4L2_CTRL_TYPE_BOOLEAN, |
264 | }, | |
265 | .reg = AUD_VOL_CTL, | |
266 | .sreg = SHADOW_AUD_VOL_CTL, | |
267 | .mask = (1 << 6), | |
268 | .shift = 6, | |
269 | },{ | |
270 | .v = { | |
271 | .id = V4L2_CID_AUDIO_VOLUME, | |
272 | .name = "Volume", | |
273 | .minimum = 0, | |
274 | .maximum = 0x3f, | |
275 | .step = 1, | |
9f9c907f | 276 | .default_value = 0x3f, |
1da177e4 LT |
277 | .type = V4L2_CTRL_TYPE_INTEGER, |
278 | }, | |
279 | .reg = AUD_VOL_CTL, | |
280 | .sreg = SHADOW_AUD_VOL_CTL, | |
281 | .mask = 0x3f, | |
282 | .shift = 0, | |
283 | },{ | |
284 | .v = { | |
285 | .id = V4L2_CID_AUDIO_BALANCE, | |
286 | .name = "Balance", | |
287 | .minimum = 0, | |
288 | .maximum = 0x7f, | |
289 | .step = 1, | |
290 | .default_value = 0x40, | |
291 | .type = V4L2_CTRL_TYPE_INTEGER, | |
292 | }, | |
293 | .reg = AUD_BAL_CTL, | |
294 | .sreg = SHADOW_AUD_BAL_CTL, | |
295 | .mask = 0x7f, | |
296 | .shift = 0, | |
297 | } | |
298 | }; | |
408b664a | 299 | static const int CX8800_CTLS = ARRAY_SIZE(cx8800_ctls); |
1da177e4 | 300 | |
38a2713a MK |
301 | const u32 cx88_user_ctrls[] = { |
302 | V4L2_CID_USER_CLASS, | |
303 | V4L2_CID_BRIGHTNESS, | |
304 | V4L2_CID_CONTRAST, | |
305 | V4L2_CID_SATURATION, | |
306 | V4L2_CID_HUE, | |
307 | V4L2_CID_AUDIO_VOLUME, | |
308 | V4L2_CID_AUDIO_BALANCE, | |
309 | V4L2_CID_AUDIO_MUTE, | |
6d04203c | 310 | V4L2_CID_CHROMA_AGC, |
1b879c43 | 311 | V4L2_CID_COLOR_KILLER, |
38a2713a MK |
312 | 0 |
313 | }; | |
314 | EXPORT_SYMBOL(cx88_user_ctrls); | |
315 | ||
316 | static const u32 *ctrl_classes[] = { | |
317 | cx88_user_ctrls, | |
318 | NULL | |
319 | }; | |
320 | ||
6d04203c | 321 | int cx8800_ctrl_query(struct cx88_core *core, struct v4l2_queryctrl *qctrl) |
38a2713a MK |
322 | { |
323 | int i; | |
324 | ||
325 | if (qctrl->id < V4L2_CID_BASE || | |
326 | qctrl->id >= V4L2_CID_LASTP1) | |
327 | return -EINVAL; | |
328 | for (i = 0; i < CX8800_CTLS; i++) | |
329 | if (cx8800_ctls[i].v.id == qctrl->id) | |
330 | break; | |
331 | if (i == CX8800_CTLS) { | |
332 | *qctrl = no_ctl; | |
333 | return 0; | |
334 | } | |
335 | *qctrl = cx8800_ctls[i].v; | |
6d04203c FD |
336 | /* Report chroma AGC as inactive when SECAM is selected */ |
337 | if (cx8800_ctls[i].v.id == V4L2_CID_CHROMA_AGC && | |
338 | core->tvnorm & V4L2_STD_SECAM) | |
339 | qctrl->flags |= V4L2_CTRL_FLAG_INACTIVE; | |
340 | ||
38a2713a MK |
341 | return 0; |
342 | } | |
343 | EXPORT_SYMBOL(cx8800_ctrl_query); | |
344 | ||
1da177e4 LT |
345 | /* ------------------------------------------------------------------- */ |
346 | /* resource management */ | |
347 | ||
348 | static int res_get(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bit) | |
349 | { | |
e52e98a7 | 350 | struct cx88_core *core = dev->core; |
1da177e4 LT |
351 | if (fh->resources & bit) |
352 | /* have it already allocated */ | |
353 | return 1; | |
354 | ||
355 | /* is it free? */ | |
3593cab5 | 356 | mutex_lock(&core->lock); |
1da177e4 LT |
357 | if (dev->resources & bit) { |
358 | /* no, someone else uses it */ | |
3593cab5 | 359 | mutex_unlock(&core->lock); |
1da177e4 LT |
360 | return 0; |
361 | } | |
362 | /* it's free, grab it */ | |
363 | fh->resources |= bit; | |
364 | dev->resources |= bit; | |
365 | dprintk(1,"res: get %d\n",bit); | |
3593cab5 | 366 | mutex_unlock(&core->lock); |
1da177e4 LT |
367 | return 1; |
368 | } | |
369 | ||
370 | static | |
371 | int res_check(struct cx8800_fh *fh, unsigned int bit) | |
372 | { | |
373 | return (fh->resources & bit); | |
374 | } | |
375 | ||
376 | static | |
377 | int res_locked(struct cx8800_dev *dev, unsigned int bit) | |
378 | { | |
379 | return (dev->resources & bit); | |
380 | } | |
381 | ||
382 | static | |
383 | void res_free(struct cx8800_dev *dev, struct cx8800_fh *fh, unsigned int bits) | |
384 | { | |
e52e98a7 | 385 | struct cx88_core *core = dev->core; |
ae24601b | 386 | BUG_ON((fh->resources & bits) != bits); |
1da177e4 | 387 | |
3593cab5 | 388 | mutex_lock(&core->lock); |
1da177e4 LT |
389 | fh->resources &= ~bits; |
390 | dev->resources &= ~bits; | |
391 | dprintk(1,"res: put %d\n",bits); | |
3593cab5 | 392 | mutex_unlock(&core->lock); |
1da177e4 LT |
393 | } |
394 | ||
395 | /* ------------------------------------------------------------------ */ | |
396 | ||
e90311a1 | 397 | int cx88_video_mux(struct cx88_core *core, unsigned int input) |
1da177e4 | 398 | { |
e52e98a7 | 399 | /* struct cx88_core *core = dev->core; */ |
1da177e4 LT |
400 | |
401 | dprintk(1,"video_mux: %d [vmux=%d,gpio=0x%x,0x%x,0x%x,0x%x]\n", | |
6a59d64c TP |
402 | input, INPUT(input).vmux, |
403 | INPUT(input).gpio0,INPUT(input).gpio1, | |
404 | INPUT(input).gpio2,INPUT(input).gpio3); | |
e52e98a7 | 405 | core->input = input; |
6a59d64c TP |
406 | cx_andor(MO_INPUT_FORMAT, 0x03 << 14, INPUT(input).vmux << 14); |
407 | cx_write(MO_GP3_IO, INPUT(input).gpio3); | |
408 | cx_write(MO_GP0_IO, INPUT(input).gpio0); | |
409 | cx_write(MO_GP1_IO, INPUT(input).gpio1); | |
410 | cx_write(MO_GP2_IO, INPUT(input).gpio2); | |
1da177e4 | 411 | |
6a59d64c | 412 | switch (INPUT(input).type) { |
1da177e4 LT |
413 | case CX88_VMUX_SVIDEO: |
414 | cx_set(MO_AFECFG_IO, 0x00000001); | |
415 | cx_set(MO_INPUT_FORMAT, 0x00010010); | |
416 | cx_set(MO_FILTER_EVEN, 0x00002020); | |
417 | cx_set(MO_FILTER_ODD, 0x00002020); | |
418 | break; | |
419 | default: | |
420 | cx_clear(MO_AFECFG_IO, 0x00000001); | |
421 | cx_clear(MO_INPUT_FORMAT, 0x00010010); | |
422 | cx_clear(MO_FILTER_EVEN, 0x00002020); | |
423 | cx_clear(MO_FILTER_ODD, 0x00002020); | |
424 | break; | |
425 | } | |
f24546a9 | 426 | |
66e6fbdf RC |
427 | /* if there are audioroutes defined, we have an external |
428 | ADC to deal with audio */ | |
7b27d45b | 429 | |
66e6fbdf RC |
430 | if (INPUT(input).audioroute) { |
431 | ||
432 | /* cx2388's C-ADC is connected to the tuner only. | |
433 | When used with S-Video, that ADC is busy dealing with | |
434 | chroma, so an external must be used for baseband audio */ | |
435 | ||
436 | if (INPUT(input).type != CX88_VMUX_TELEVISION && | |
437 | INPUT(input).type != CX88_RADIO) { | |
438 | /* "ADC mode" */ | |
439 | cx_write(AUD_I2SCNTL, 0x1); | |
f24546a9 | 440 | cx_set(AUD_CTL, EN_I2SIN_ENABLE); |
66e6fbdf RC |
441 | } else { |
442 | /* Normal mode */ | |
443 | cx_write(AUD_I2SCNTL, 0x0); | |
f24546a9 | 444 | cx_clear(AUD_CTL, EN_I2SIN_ENABLE); |
66e6fbdf RC |
445 | } |
446 | ||
447 | /* The wm8775 module has the "2" route hardwired into | |
448 | the initialization. Some boards may use different | |
449 | routes for different inputs. HVR-1300 surely does */ | |
450 | if (core->board.audio_chip && | |
38f9d308 | 451 | core->board.audio_chip == V4L2_IDENT_WM8775) { |
66e6fbdf RC |
452 | struct v4l2_routing route; |
453 | ||
454 | route.input = INPUT(input).audioroute; | |
455 | cx88_call_i2c_clients(core, | |
d8f69971 | 456 | VIDIOC_INT_S_AUDIO_ROUTING, &route); |
66e6fbdf RC |
457 | |
458 | } | |
459 | ||
f24546a9 | 460 | } |
66e6fbdf | 461 | |
1da177e4 LT |
462 | return 0; |
463 | } | |
e90311a1 | 464 | EXPORT_SYMBOL(cx88_video_mux); |
1da177e4 LT |
465 | |
466 | /* ------------------------------------------------------------------ */ | |
467 | ||
468 | static int start_video_dma(struct cx8800_dev *dev, | |
469 | struct cx88_dmaqueue *q, | |
470 | struct cx88_buffer *buf) | |
471 | { | |
472 | struct cx88_core *core = dev->core; | |
473 | ||
474 | /* setup fifo + format */ | |
e52e98a7 | 475 | cx88_sram_channel_setup(core, &cx88_sram_channels[SRAM_CH21], |
1da177e4 | 476 | buf->bpl, buf->risc.dma); |
e52e98a7 | 477 | cx88_set_scale(core, buf->vb.width, buf->vb.height, buf->vb.field); |
1da177e4 LT |
478 | cx_write(MO_COLOR_CTRL, buf->fmt->cxformat | ColorFormatGamma); |
479 | ||
480 | /* reset counter */ | |
481 | cx_write(MO_VIDY_GPCNTRL,GP_COUNT_CONTROL_RESET); | |
482 | q->count = 1; | |
483 | ||
484 | /* enable irqs */ | |
8ddac9ee | 485 | cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT); |
e52e98a7 MCC |
486 | |
487 | /* Enables corresponding bits at PCI_INT_STAT: | |
488 | bits 0 to 4: video, audio, transport stream, VIP, Host | |
489 | bit 7: timer | |
490 | bits 8 and 9: DMA complete for: SRC, DST | |
491 | bits 10 and 11: BERR signal asserted for RISC: RD, WR | |
492 | bits 12 to 15: BERR signal asserted for: BRDG, SRC, DST, IPB | |
493 | */ | |
1da177e4 LT |
494 | cx_set(MO_VID_INTMSK, 0x0f0011); |
495 | ||
496 | /* enable capture */ | |
497 | cx_set(VID_CAPTURE_CONTROL,0x06); | |
498 | ||
499 | /* start dma */ | |
500 | cx_set(MO_DEV_CNTRL2, (1<<5)); | |
e52e98a7 | 501 | cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */ |
1da177e4 LT |
502 | |
503 | return 0; | |
504 | } | |
505 | ||
17bc98a4 | 506 | #ifdef CONFIG_PM |
1da177e4 LT |
507 | static int stop_video_dma(struct cx8800_dev *dev) |
508 | { | |
509 | struct cx88_core *core = dev->core; | |
510 | ||
511 | /* stop dma */ | |
512 | cx_clear(MO_VID_DMACNTRL, 0x11); | |
513 | ||
514 | /* disable capture */ | |
515 | cx_clear(VID_CAPTURE_CONTROL,0x06); | |
516 | ||
517 | /* disable irqs */ | |
8ddac9ee | 518 | cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT); |
1da177e4 LT |
519 | cx_clear(MO_VID_INTMSK, 0x0f0011); |
520 | return 0; | |
521 | } | |
17bc98a4 | 522 | #endif |
1da177e4 LT |
523 | |
524 | static int restart_video_queue(struct cx8800_dev *dev, | |
525 | struct cx88_dmaqueue *q) | |
526 | { | |
e52e98a7 | 527 | struct cx88_core *core = dev->core; |
1da177e4 | 528 | struct cx88_buffer *buf, *prev; |
1da177e4 LT |
529 | |
530 | if (!list_empty(&q->active)) { | |
4ac97914 | 531 | buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); |
1da177e4 LT |
532 | dprintk(2,"restart_queue [%p/%d]: restart dma\n", |
533 | buf, buf->vb.i); | |
534 | start_video_dma(dev, q, buf); | |
8bb629e2 TP |
535 | list_for_each_entry(buf, &q->active, vb.queue) |
536 | buf->count = q->count++; | |
1da177e4 LT |
537 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); |
538 | return 0; | |
539 | } | |
540 | ||
541 | prev = NULL; | |
542 | for (;;) { | |
543 | if (list_empty(&q->queued)) | |
544 | return 0; | |
4ac97914 | 545 | buf = list_entry(q->queued.next, struct cx88_buffer, vb.queue); |
1da177e4 | 546 | if (NULL == prev) { |
179e0917 | 547 | list_move_tail(&buf->vb.queue, &q->active); |
1da177e4 | 548 | start_video_dma(dev, q, buf); |
0fc0686e | 549 | buf->vb.state = VIDEOBUF_ACTIVE; |
1da177e4 LT |
550 | buf->count = q->count++; |
551 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); | |
552 | dprintk(2,"[%p/%d] restart_queue - first active\n", | |
553 | buf,buf->vb.i); | |
554 | ||
555 | } else if (prev->vb.width == buf->vb.width && | |
556 | prev->vb.height == buf->vb.height && | |
557 | prev->fmt == buf->fmt) { | |
179e0917 | 558 | list_move_tail(&buf->vb.queue, &q->active); |
0fc0686e | 559 | buf->vb.state = VIDEOBUF_ACTIVE; |
1da177e4 LT |
560 | buf->count = q->count++; |
561 | prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); | |
562 | dprintk(2,"[%p/%d] restart_queue - move to active\n", | |
563 | buf,buf->vb.i); | |
564 | } else { | |
565 | return 0; | |
566 | } | |
567 | prev = buf; | |
568 | } | |
569 | } | |
570 | ||
571 | /* ------------------------------------------------------------------ */ | |
572 | ||
573 | static int | |
574 | buffer_setup(struct videobuf_queue *q, unsigned int *count, unsigned int *size) | |
575 | { | |
576 | struct cx8800_fh *fh = q->priv_data; | |
577 | ||
578 | *size = fh->fmt->depth*fh->width*fh->height >> 3; | |
579 | if (0 == *count) | |
580 | *count = 32; | |
581 | while (*size * *count > vid_limit * 1024 * 1024) | |
582 | (*count)--; | |
583 | return 0; | |
584 | } | |
585 | ||
586 | static int | |
587 | buffer_prepare(struct videobuf_queue *q, struct videobuf_buffer *vb, | |
588 | enum v4l2_field field) | |
589 | { | |
590 | struct cx8800_fh *fh = q->priv_data; | |
591 | struct cx8800_dev *dev = fh->dev; | |
e52e98a7 | 592 | struct cx88_core *core = dev->core; |
1da177e4 | 593 | struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb); |
c1accaa2 | 594 | struct videobuf_dmabuf *dma=videobuf_to_dma(&buf->vb); |
1da177e4 LT |
595 | int rc, init_buffer = 0; |
596 | ||
597 | BUG_ON(NULL == fh->fmt); | |
e52e98a7 MCC |
598 | if (fh->width < 48 || fh->width > norm_maxw(core->tvnorm) || |
599 | fh->height < 32 || fh->height > norm_maxh(core->tvnorm)) | |
1da177e4 LT |
600 | return -EINVAL; |
601 | buf->vb.size = (fh->width * fh->height * fh->fmt->depth) >> 3; | |
602 | if (0 != buf->vb.baddr && buf->vb.bsize < buf->vb.size) | |
603 | return -EINVAL; | |
604 | ||
605 | if (buf->fmt != fh->fmt || | |
606 | buf->vb.width != fh->width || | |
607 | buf->vb.height != fh->height || | |
608 | buf->vb.field != field) { | |
609 | buf->fmt = fh->fmt; | |
610 | buf->vb.width = fh->width; | |
611 | buf->vb.height = fh->height; | |
612 | buf->vb.field = field; | |
613 | init_buffer = 1; | |
614 | } | |
615 | ||
0fc0686e | 616 | if (VIDEOBUF_NEEDS_INIT == buf->vb.state) { |
1da177e4 | 617 | init_buffer = 1; |
c7b0ac05 | 618 | if (0 != (rc = videobuf_iolock(q,&buf->vb,NULL))) |
1da177e4 LT |
619 | goto fail; |
620 | } | |
621 | ||
622 | if (init_buffer) { | |
623 | buf->bpl = buf->vb.width * buf->fmt->depth >> 3; | |
624 | switch (buf->vb.field) { | |
625 | case V4L2_FIELD_TOP: | |
626 | cx88_risc_buffer(dev->pci, &buf->risc, | |
c1accaa2 | 627 | dma->sglist, 0, UNSET, |
1da177e4 LT |
628 | buf->bpl, 0, buf->vb.height); |
629 | break; | |
630 | case V4L2_FIELD_BOTTOM: | |
631 | cx88_risc_buffer(dev->pci, &buf->risc, | |
c1accaa2 | 632 | dma->sglist, UNSET, 0, |
1da177e4 LT |
633 | buf->bpl, 0, buf->vb.height); |
634 | break; | |
635 | case V4L2_FIELD_INTERLACED: | |
636 | cx88_risc_buffer(dev->pci, &buf->risc, | |
c1accaa2 | 637 | dma->sglist, 0, buf->bpl, |
1da177e4 LT |
638 | buf->bpl, buf->bpl, |
639 | buf->vb.height >> 1); | |
640 | break; | |
641 | case V4L2_FIELD_SEQ_TB: | |
642 | cx88_risc_buffer(dev->pci, &buf->risc, | |
c1accaa2 | 643 | dma->sglist, |
1da177e4 LT |
644 | 0, buf->bpl * (buf->vb.height >> 1), |
645 | buf->bpl, 0, | |
646 | buf->vb.height >> 1); | |
647 | break; | |
648 | case V4L2_FIELD_SEQ_BT: | |
649 | cx88_risc_buffer(dev->pci, &buf->risc, | |
c1accaa2 | 650 | dma->sglist, |
1da177e4 LT |
651 | buf->bpl * (buf->vb.height >> 1), 0, |
652 | buf->bpl, 0, | |
653 | buf->vb.height >> 1); | |
654 | break; | |
655 | default: | |
656 | BUG(); | |
657 | } | |
658 | } | |
659 | dprintk(2,"[%p/%d] buffer_prepare - %dx%d %dbpp \"%s\" - dma=0x%08lx\n", | |
660 | buf, buf->vb.i, | |
661 | fh->width, fh->height, fh->fmt->depth, fh->fmt->name, | |
662 | (unsigned long)buf->risc.dma); | |
663 | ||
0fc0686e | 664 | buf->vb.state = VIDEOBUF_PREPARED; |
1da177e4 LT |
665 | return 0; |
666 | ||
667 | fail: | |
c7b0ac05 | 668 | cx88_free_buffer(q,buf); |
1da177e4 LT |
669 | return rc; |
670 | } | |
671 | ||
672 | static void | |
673 | buffer_queue(struct videobuf_queue *vq, struct videobuf_buffer *vb) | |
674 | { | |
675 | struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb); | |
676 | struct cx88_buffer *prev; | |
677 | struct cx8800_fh *fh = vq->priv_data; | |
678 | struct cx8800_dev *dev = fh->dev; | |
e52e98a7 | 679 | struct cx88_core *core = dev->core; |
1da177e4 LT |
680 | struct cx88_dmaqueue *q = &dev->vidq; |
681 | ||
682 | /* add jump to stopper */ | |
683 | buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_IRQ1 | RISC_CNT_INC); | |
684 | buf->risc.jmp[1] = cpu_to_le32(q->stopper.dma); | |
685 | ||
686 | if (!list_empty(&q->queued)) { | |
687 | list_add_tail(&buf->vb.queue,&q->queued); | |
0fc0686e | 688 | buf->vb.state = VIDEOBUF_QUEUED; |
1da177e4 LT |
689 | dprintk(2,"[%p/%d] buffer_queue - append to queued\n", |
690 | buf, buf->vb.i); | |
691 | ||
692 | } else if (list_empty(&q->active)) { | |
693 | list_add_tail(&buf->vb.queue,&q->active); | |
694 | start_video_dma(dev, q, buf); | |
0fc0686e | 695 | buf->vb.state = VIDEOBUF_ACTIVE; |
1da177e4 LT |
696 | buf->count = q->count++; |
697 | mod_timer(&q->timeout, jiffies+BUFFER_TIMEOUT); | |
698 | dprintk(2,"[%p/%d] buffer_queue - first active\n", | |
699 | buf, buf->vb.i); | |
700 | ||
701 | } else { | |
702 | prev = list_entry(q->active.prev, struct cx88_buffer, vb.queue); | |
703 | if (prev->vb.width == buf->vb.width && | |
704 | prev->vb.height == buf->vb.height && | |
705 | prev->fmt == buf->fmt) { | |
706 | list_add_tail(&buf->vb.queue,&q->active); | |
0fc0686e | 707 | buf->vb.state = VIDEOBUF_ACTIVE; |
1da177e4 LT |
708 | buf->count = q->count++; |
709 | prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma); | |
710 | dprintk(2,"[%p/%d] buffer_queue - append to active\n", | |
711 | buf, buf->vb.i); | |
712 | ||
713 | } else { | |
714 | list_add_tail(&buf->vb.queue,&q->queued); | |
0fc0686e | 715 | buf->vb.state = VIDEOBUF_QUEUED; |
1da177e4 LT |
716 | dprintk(2,"[%p/%d] buffer_queue - first queued\n", |
717 | buf, buf->vb.i); | |
718 | } | |
719 | } | |
720 | } | |
721 | ||
722 | static void buffer_release(struct videobuf_queue *q, struct videobuf_buffer *vb) | |
723 | { | |
724 | struct cx88_buffer *buf = container_of(vb,struct cx88_buffer,vb); | |
1da177e4 | 725 | |
c7b0ac05 | 726 | cx88_free_buffer(q,buf); |
1da177e4 LT |
727 | } |
728 | ||
408b664a | 729 | static struct videobuf_queue_ops cx8800_video_qops = { |
1da177e4 LT |
730 | .buf_setup = buffer_setup, |
731 | .buf_prepare = buffer_prepare, | |
732 | .buf_queue = buffer_queue, | |
733 | .buf_release = buffer_release, | |
734 | }; | |
735 | ||
736 | /* ------------------------------------------------------------------ */ | |
737 | ||
1da177e4 LT |
738 | |
739 | /* ------------------------------------------------------------------ */ | |
740 | ||
741 | static struct videobuf_queue* get_queue(struct cx8800_fh *fh) | |
742 | { | |
743 | switch (fh->type) { | |
744 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
745 | return &fh->vidq; | |
746 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
747 | return &fh->vbiq; | |
748 | default: | |
749 | BUG(); | |
750 | return NULL; | |
751 | } | |
752 | } | |
753 | ||
754 | static int get_ressource(struct cx8800_fh *fh) | |
755 | { | |
756 | switch (fh->type) { | |
757 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
758 | return RESOURCE_VIDEO; | |
759 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
760 | return RESOURCE_VBI; | |
761 | default: | |
762 | BUG(); | |
763 | return 0; | |
764 | } | |
765 | } | |
766 | ||
767 | static int video_open(struct inode *inode, struct file *file) | |
768 | { | |
769 | int minor = iminor(inode); | |
770 | struct cx8800_dev *h,*dev = NULL; | |
e52e98a7 | 771 | struct cx88_core *core; |
1da177e4 | 772 | struct cx8800_fh *fh; |
1da177e4 LT |
773 | enum v4l2_buf_type type = 0; |
774 | int radio = 0; | |
775 | ||
d56dc612 | 776 | lock_kernel(); |
8bb629e2 | 777 | list_for_each_entry(h, &cx8800_devlist, devlist) { |
1da177e4 LT |
778 | if (h->video_dev->minor == minor) { |
779 | dev = h; | |
780 | type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
781 | } | |
782 | if (h->vbi_dev->minor == minor) { | |
783 | dev = h; | |
784 | type = V4L2_BUF_TYPE_VBI_CAPTURE; | |
785 | } | |
786 | if (h->radio_dev && | |
787 | h->radio_dev->minor == minor) { | |
788 | radio = 1; | |
789 | dev = h; | |
790 | } | |
791 | } | |
d56dc612 HV |
792 | if (NULL == dev) { |
793 | unlock_kernel(); | |
1da177e4 | 794 | return -ENODEV; |
d56dc612 | 795 | } |
1da177e4 | 796 | |
e52e98a7 MCC |
797 | core = dev->core; |
798 | ||
1da177e4 LT |
799 | dprintk(1,"open minor=%d radio=%d type=%s\n", |
800 | minor,radio,v4l2_type_names[type]); | |
801 | ||
802 | /* allocate + initialize per filehandle data */ | |
7408187d | 803 | fh = kzalloc(sizeof(*fh),GFP_KERNEL); |
d56dc612 HV |
804 | if (NULL == fh) { |
805 | unlock_kernel(); | |
1da177e4 | 806 | return -ENOMEM; |
d56dc612 | 807 | } |
1da177e4 LT |
808 | file->private_data = fh; |
809 | fh->dev = dev; | |
810 | fh->radio = radio; | |
811 | fh->type = type; | |
812 | fh->width = 320; | |
813 | fh->height = 240; | |
814 | fh->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24); | |
815 | ||
0705135e GL |
816 | videobuf_queue_sg_init(&fh->vidq, &cx8800_video_qops, |
817 | &dev->pci->dev, &dev->slock, | |
1da177e4 LT |
818 | V4L2_BUF_TYPE_VIDEO_CAPTURE, |
819 | V4L2_FIELD_INTERLACED, | |
820 | sizeof(struct cx88_buffer), | |
821 | fh); | |
0705135e GL |
822 | videobuf_queue_sg_init(&fh->vbiq, &cx8800_vbi_qops, |
823 | &dev->pci->dev, &dev->slock, | |
1da177e4 LT |
824 | V4L2_BUF_TYPE_VBI_CAPTURE, |
825 | V4L2_FIELD_SEQ_TB, | |
826 | sizeof(struct cx88_buffer), | |
827 | fh); | |
828 | ||
829 | if (fh->radio) { | |
1da177e4 | 830 | dprintk(1,"video_open: setting radio device\n"); |
6a59d64c TP |
831 | cx_write(MO_GP3_IO, core->board.radio.gpio3); |
832 | cx_write(MO_GP0_IO, core->board.radio.gpio0); | |
833 | cx_write(MO_GP1_IO, core->board.radio.gpio1); | |
834 | cx_write(MO_GP2_IO, core->board.radio.gpio2); | |
e52e98a7 | 835 | core->tvaudio = WW_FM; |
1da177e4 LT |
836 | cx88_set_tvaudio(core); |
837 | cx88_set_stereo(core,V4L2_TUNER_MODE_STEREO,1); | |
e52e98a7 | 838 | cx88_call_i2c_clients(core,AUDC_SET_RADIO,NULL); |
1da177e4 | 839 | } |
d56dc612 | 840 | unlock_kernel(); |
1da177e4 | 841 | |
4ac97914 | 842 | return 0; |
1da177e4 LT |
843 | } |
844 | ||
845 | static ssize_t | |
f9e7a020 | 846 | video_read(struct file *file, char __user *data, size_t count, loff_t *ppos) |
1da177e4 LT |
847 | { |
848 | struct cx8800_fh *fh = file->private_data; | |
849 | ||
850 | switch (fh->type) { | |
851 | case V4L2_BUF_TYPE_VIDEO_CAPTURE: | |
852 | if (res_locked(fh->dev,RESOURCE_VIDEO)) | |
853 | return -EBUSY; | |
854 | return videobuf_read_one(&fh->vidq, data, count, ppos, | |
855 | file->f_flags & O_NONBLOCK); | |
856 | case V4L2_BUF_TYPE_VBI_CAPTURE: | |
857 | if (!res_get(fh->dev,fh,RESOURCE_VBI)) | |
858 | return -EBUSY; | |
859 | return videobuf_read_stream(&fh->vbiq, data, count, ppos, 1, | |
860 | file->f_flags & O_NONBLOCK); | |
861 | default: | |
862 | BUG(); | |
863 | return 0; | |
864 | } | |
865 | } | |
866 | ||
867 | static unsigned int | |
868 | video_poll(struct file *file, struct poll_table_struct *wait) | |
869 | { | |
870 | struct cx8800_fh *fh = file->private_data; | |
871 | struct cx88_buffer *buf; | |
872 | ||
873 | if (V4L2_BUF_TYPE_VBI_CAPTURE == fh->type) { | |
874 | if (!res_get(fh->dev,fh,RESOURCE_VBI)) | |
875 | return POLLERR; | |
876 | return videobuf_poll_stream(file, &fh->vbiq, wait); | |
877 | } | |
878 | ||
879 | if (res_check(fh,RESOURCE_VIDEO)) { | |
880 | /* streaming capture */ | |
881 | if (list_empty(&fh->vidq.stream)) | |
882 | return POLLERR; | |
883 | buf = list_entry(fh->vidq.stream.next,struct cx88_buffer,vb.stream); | |
884 | } else { | |
885 | /* read() capture */ | |
886 | buf = (struct cx88_buffer*)fh->vidq.read_buf; | |
887 | if (NULL == buf) | |
888 | return POLLERR; | |
889 | } | |
890 | poll_wait(file, &buf->vb.done, wait); | |
0fc0686e BP |
891 | if (buf->vb.state == VIDEOBUF_DONE || |
892 | buf->vb.state == VIDEOBUF_ERROR) | |
1da177e4 LT |
893 | return POLLIN|POLLRDNORM; |
894 | return 0; | |
895 | } | |
896 | ||
897 | static int video_release(struct inode *inode, struct file *file) | |
898 | { | |
899 | struct cx8800_fh *fh = file->private_data; | |
900 | struct cx8800_dev *dev = fh->dev; | |
901 | ||
902 | /* turn off overlay */ | |
903 | if (res_check(fh, RESOURCE_OVERLAY)) { | |
904 | /* FIXME */ | |
905 | res_free(dev,fh,RESOURCE_OVERLAY); | |
906 | } | |
907 | ||
908 | /* stop video capture */ | |
909 | if (res_check(fh, RESOURCE_VIDEO)) { | |
910 | videobuf_queue_cancel(&fh->vidq); | |
911 | res_free(dev,fh,RESOURCE_VIDEO); | |
912 | } | |
913 | if (fh->vidq.read_buf) { | |
914 | buffer_release(&fh->vidq,fh->vidq.read_buf); | |
915 | kfree(fh->vidq.read_buf); | |
916 | } | |
917 | ||
918 | /* stop vbi capture */ | |
919 | if (res_check(fh, RESOURCE_VBI)) { | |
053fcb60 | 920 | videobuf_stop(&fh->vbiq); |
1da177e4 LT |
921 | res_free(dev,fh,RESOURCE_VBI); |
922 | } | |
923 | ||
924 | videobuf_mmap_free(&fh->vidq); | |
925 | videobuf_mmap_free(&fh->vbiq); | |
926 | file->private_data = NULL; | |
927 | kfree(fh); | |
e52e98a7 MCC |
928 | |
929 | cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL); | |
930 | ||
1da177e4 LT |
931 | return 0; |
932 | } | |
933 | ||
934 | static int | |
935 | video_mmap(struct file *file, struct vm_area_struct * vma) | |
936 | { | |
937 | struct cx8800_fh *fh = file->private_data; | |
938 | ||
939 | return videobuf_mmap_mapper(get_queue(fh), vma); | |
940 | } | |
941 | ||
942 | /* ------------------------------------------------------------------ */ | |
8d87cb9f | 943 | /* VIDEO CTRL IOCTLS */ |
1da177e4 | 944 | |
54da49f5 | 945 | int cx88_get_control (struct cx88_core *core, struct v4l2_control *ctl) |
1da177e4 | 946 | { |
8d87cb9f | 947 | struct cx88_ctrl *c = NULL; |
1da177e4 LT |
948 | u32 value; |
949 | int i; | |
950 | ||
951 | for (i = 0; i < CX8800_CTLS; i++) | |
952 | if (cx8800_ctls[i].v.id == ctl->id) | |
953 | c = &cx8800_ctls[i]; | |
8d87cb9f | 954 | if (unlikely(NULL == c)) |
1da177e4 LT |
955 | return -EINVAL; |
956 | ||
957 | value = c->sreg ? cx_sread(c->sreg) : cx_read(c->reg); | |
958 | switch (ctl->id) { | |
959 | case V4L2_CID_AUDIO_BALANCE: | |
9f9c907f MR |
960 | ctl->value = ((value & 0x7f) < 0x40) ? ((value & 0x7f) + 0x40) |
961 | : (0x7f - (value & 0x7f)); | |
1da177e4 LT |
962 | break; |
963 | case V4L2_CID_AUDIO_VOLUME: | |
964 | ctl->value = 0x3f - (value & 0x3f); | |
965 | break; | |
966 | default: | |
967 | ctl->value = ((value + (c->off << c->shift)) & c->mask) >> c->shift; | |
968 | break; | |
969 | } | |
6457af5f IP |
970 | dprintk(1,"get_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n", |
971 | ctl->id, c->v.name, ctl->value, c->reg, | |
972 | value,c->mask, c->sreg ? " [shadowed]" : ""); | |
1da177e4 LT |
973 | return 0; |
974 | } | |
54da49f5 | 975 | EXPORT_SYMBOL(cx88_get_control); |
1da177e4 | 976 | |
54da49f5 | 977 | int cx88_set_control(struct cx88_core *core, struct v4l2_control *ctl) |
1da177e4 | 978 | { |
1da177e4 | 979 | struct cx88_ctrl *c = NULL; |
70f00044 | 980 | u32 value,mask; |
1da177e4 | 981 | int i; |
8d87cb9f | 982 | |
70f00044 MCC |
983 | for (i = 0; i < CX8800_CTLS; i++) { |
984 | if (cx8800_ctls[i].v.id == ctl->id) { | |
1da177e4 | 985 | c = &cx8800_ctls[i]; |
70f00044 MCC |
986 | } |
987 | } | |
8d87cb9f | 988 | if (unlikely(NULL == c)) |
1da177e4 LT |
989 | return -EINVAL; |
990 | ||
991 | if (ctl->value < c->v.minimum) | |
e52e98a7 | 992 | ctl->value = c->v.minimum; |
1da177e4 | 993 | if (ctl->value > c->v.maximum) |
e52e98a7 | 994 | ctl->value = c->v.maximum; |
70f00044 | 995 | mask=c->mask; |
1da177e4 LT |
996 | switch (ctl->id) { |
997 | case V4L2_CID_AUDIO_BALANCE: | |
9f9c907f | 998 | value = (ctl->value < 0x40) ? (0x7f - ctl->value) : (ctl->value - 0x40); |
1da177e4 LT |
999 | break; |
1000 | case V4L2_CID_AUDIO_VOLUME: | |
1001 | value = 0x3f - (ctl->value & 0x3f); | |
1002 | break; | |
1003 | case V4L2_CID_SATURATION: | |
1004 | /* special v_sat handling */ | |
70f00044 MCC |
1005 | |
1006 | value = ((ctl->value - c->off) << c->shift) & c->mask; | |
1007 | ||
63ab1bdc | 1008 | if (core->tvnorm & V4L2_STD_SECAM) { |
70f00044 MCC |
1009 | /* For SECAM, both U and V sat should be equal */ |
1010 | value=value<<8|value; | |
1011 | } else { | |
1012 | /* Keeps U Saturation proportional to V Sat */ | |
1013 | value=(value*0x5a)/0x7f<<8|value; | |
1014 | } | |
1015 | mask=0xffff; | |
1016 | break; | |
6d04203c FD |
1017 | case V4L2_CID_CHROMA_AGC: |
1018 | /* Do not allow chroma AGC to be enabled for SECAM */ | |
1019 | value = ((ctl->value - c->off) << c->shift) & c->mask; | |
1020 | if (core->tvnorm & V4L2_STD_SECAM && value) | |
1021 | return -EINVAL; | |
1022 | break; | |
1da177e4 LT |
1023 | default: |
1024 | value = ((ctl->value - c->off) << c->shift) & c->mask; | |
1025 | break; | |
1026 | } | |
6457af5f IP |
1027 | dprintk(1,"set_control id=0x%X(%s) ctrl=0x%02x, reg=0x%02x val=0x%02x (mask 0x%02x)%s\n", |
1028 | ctl->id, c->v.name, ctl->value, c->reg, value, | |
1029 | mask, c->sreg ? " [shadowed]" : ""); | |
1da177e4 | 1030 | if (c->sreg) { |
70f00044 | 1031 | cx_sandor(c->sreg, c->reg, mask, value); |
1da177e4 | 1032 | } else { |
70f00044 | 1033 | cx_andor(c->reg, mask, value); |
1da177e4 LT |
1034 | } |
1035 | return 0; | |
1036 | } | |
54da49f5 | 1037 | EXPORT_SYMBOL(cx88_set_control); |
1da177e4 | 1038 | |
e52e98a7 | 1039 | static void init_controls(struct cx88_core *core) |
1da177e4 | 1040 | { |
70f00044 MCC |
1041 | struct v4l2_control ctrl; |
1042 | int i; | |
1da177e4 | 1043 | |
70f00044 MCC |
1044 | for (i = 0; i < CX8800_CTLS; i++) { |
1045 | ctrl.id=cx8800_ctls[i].v.id; | |
9f9c907f | 1046 | ctrl.value=cx8800_ctls[i].v.default_value; |
8d87cb9f | 1047 | |
54da49f5 | 1048 | cx88_set_control(core, &ctrl); |
70f00044 | 1049 | } |
1da177e4 LT |
1050 | } |
1051 | ||
1052 | /* ------------------------------------------------------------------ */ | |
8d87cb9f | 1053 | /* VIDEO IOCTLS */ |
1da177e4 | 1054 | |
78b526a4 | 1055 | static int vidioc_g_fmt_vid_cap(struct file *file, void *priv, |
8d87cb9f | 1056 | struct v4l2_format *f) |
1da177e4 | 1057 | { |
8d87cb9f MCC |
1058 | struct cx8800_fh *fh = priv; |
1059 | ||
1060 | f->fmt.pix.width = fh->width; | |
1061 | f->fmt.pix.height = fh->height; | |
1062 | f->fmt.pix.field = fh->vidq.field; | |
1063 | f->fmt.pix.pixelformat = fh->fmt->fourcc; | |
1064 | f->fmt.pix.bytesperline = | |
1065 | (f->fmt.pix.width * fh->fmt->depth) >> 3; | |
1066 | f->fmt.pix.sizeimage = | |
1067 | f->fmt.pix.height * f->fmt.pix.bytesperline; | |
1068 | return 0; | |
1da177e4 LT |
1069 | } |
1070 | ||
78b526a4 | 1071 | static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, |
8d87cb9f | 1072 | struct v4l2_format *f) |
1da177e4 | 1073 | { |
8d87cb9f MCC |
1074 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; |
1075 | struct cx8800_fmt *fmt; | |
1076 | enum v4l2_field field; | |
1077 | unsigned int maxw, maxh; | |
e52e98a7 | 1078 | |
8d87cb9f MCC |
1079 | fmt = format_by_fourcc(f->fmt.pix.pixelformat); |
1080 | if (NULL == fmt) | |
1081 | return -EINVAL; | |
1da177e4 | 1082 | |
8d87cb9f MCC |
1083 | field = f->fmt.pix.field; |
1084 | maxw = norm_maxw(core->tvnorm); | |
1085 | maxh = norm_maxh(core->tvnorm); | |
1da177e4 | 1086 | |
8d87cb9f MCC |
1087 | if (V4L2_FIELD_ANY == field) { |
1088 | field = (f->fmt.pix.height > maxh/2) | |
1089 | ? V4L2_FIELD_INTERLACED | |
1090 | : V4L2_FIELD_BOTTOM; | |
1da177e4 | 1091 | } |
8d87cb9f MCC |
1092 | |
1093 | switch (field) { | |
1094 | case V4L2_FIELD_TOP: | |
1095 | case V4L2_FIELD_BOTTOM: | |
1096 | maxh = maxh / 2; | |
1097 | break; | |
1098 | case V4L2_FIELD_INTERLACED: | |
1099 | break; | |
1da177e4 LT |
1100 | default: |
1101 | return -EINVAL; | |
1102 | } | |
8d87cb9f MCC |
1103 | |
1104 | f->fmt.pix.field = field; | |
1105 | if (f->fmt.pix.height < 32) | |
1106 | f->fmt.pix.height = 32; | |
1107 | if (f->fmt.pix.height > maxh) | |
1108 | f->fmt.pix.height = maxh; | |
1109 | if (f->fmt.pix.width < 48) | |
1110 | f->fmt.pix.width = 48; | |
1111 | if (f->fmt.pix.width > maxw) | |
1112 | f->fmt.pix.width = maxw; | |
1113 | f->fmt.pix.width &= ~0x03; | |
1114 | f->fmt.pix.bytesperline = | |
1115 | (f->fmt.pix.width * fmt->depth) >> 3; | |
1116 | f->fmt.pix.sizeimage = | |
1117 | f->fmt.pix.height * f->fmt.pix.bytesperline; | |
1118 | ||
1119 | return 0; | |
1da177e4 LT |
1120 | } |
1121 | ||
78b526a4 | 1122 | static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, |
8d87cb9f | 1123 | struct v4l2_format *f) |
1da177e4 | 1124 | { |
8d87cb9f | 1125 | struct cx8800_fh *fh = priv; |
78b526a4 | 1126 | int err = vidioc_try_fmt_vid_cap (file,priv,f); |
8d87cb9f MCC |
1127 | |
1128 | if (0 != err) | |
1129 | return err; | |
1130 | fh->fmt = format_by_fourcc(f->fmt.pix.pixelformat); | |
1131 | fh->width = f->fmt.pix.width; | |
1132 | fh->height = f->fmt.pix.height; | |
1133 | fh->vidq.field = f->fmt.pix.field; | |
1134 | return 0; | |
1da177e4 LT |
1135 | } |
1136 | ||
8d87cb9f MCC |
1137 | static int vidioc_querycap (struct file *file, void *priv, |
1138 | struct v4l2_capability *cap) | |
1da177e4 | 1139 | { |
8d87cb9f | 1140 | struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev; |
1da177e4 | 1141 | struct cx88_core *core = dev->core; |
1da177e4 | 1142 | |
8d87cb9f | 1143 | strcpy(cap->driver, "cx8800"); |
6a59d64c | 1144 | strlcpy(cap->card, core->board.name, sizeof(cap->card)); |
8d87cb9f MCC |
1145 | sprintf(cap->bus_info,"PCI:%s",pci_name(dev->pci)); |
1146 | cap->version = CX88_VERSION_CODE; | |
1147 | cap->capabilities = | |
1148 | V4L2_CAP_VIDEO_CAPTURE | | |
1149 | V4L2_CAP_READWRITE | | |
1150 | V4L2_CAP_STREAMING | | |
1151 | V4L2_CAP_VBI_CAPTURE; | |
6a59d64c | 1152 | if (UNSET != core->board.tuner_type) |
8d87cb9f MCC |
1153 | cap->capabilities |= V4L2_CAP_TUNER; |
1154 | return 0; | |
1155 | } | |
e52e98a7 | 1156 | |
78b526a4 | 1157 | static int vidioc_enum_fmt_vid_cap (struct file *file, void *priv, |
8d87cb9f MCC |
1158 | struct v4l2_fmtdesc *f) |
1159 | { | |
1160 | if (unlikely(f->index >= ARRAY_SIZE(formats))) | |
1161 | return -EINVAL; | |
1162 | ||
1163 | strlcpy(f->description,formats[f->index].name,sizeof(f->description)); | |
1164 | f->pixelformat = formats[f->index].fourcc; | |
1165 | ||
1166 | return 0; | |
1167 | } | |
1da177e4 | 1168 | |
0dfa9abd | 1169 | #ifdef CONFIG_VIDEO_V4L1_COMPAT |
8d87cb9f MCC |
1170 | static int vidiocgmbuf (struct file *file, void *priv, struct video_mbuf *mbuf) |
1171 | { | |
c1accaa2 | 1172 | struct cx8800_fh *fh = priv; |
8d87cb9f | 1173 | |
c1accaa2 | 1174 | return videobuf_cgmbuf (get_queue(fh), mbuf, 8); |
8d87cb9f | 1175 | } |
79436633 | 1176 | #endif |
e52e98a7 | 1177 | |
8d87cb9f MCC |
1178 | static int vidioc_reqbufs (struct file *file, void *priv, struct v4l2_requestbuffers *p) |
1179 | { | |
1180 | struct cx8800_fh *fh = priv; | |
1181 | return (videobuf_reqbufs(get_queue(fh), p)); | |
1182 | } | |
e52e98a7 | 1183 | |
8d87cb9f MCC |
1184 | static int vidioc_querybuf (struct file *file, void *priv, struct v4l2_buffer *p) |
1185 | { | |
1186 | struct cx8800_fh *fh = priv; | |
1187 | return (videobuf_querybuf(get_queue(fh), p)); | |
1188 | } | |
e52e98a7 | 1189 | |
8d87cb9f MCC |
1190 | static int vidioc_qbuf (struct file *file, void *priv, struct v4l2_buffer *p) |
1191 | { | |
1192 | struct cx8800_fh *fh = priv; | |
1193 | return (videobuf_qbuf(get_queue(fh), p)); | |
1194 | } | |
e52e98a7 | 1195 | |
8d87cb9f MCC |
1196 | static int vidioc_dqbuf (struct file *file, void *priv, struct v4l2_buffer *p) |
1197 | { | |
1198 | struct cx8800_fh *fh = priv; | |
1199 | return (videobuf_dqbuf(get_queue(fh), p, | |
1200 | file->f_flags & O_NONBLOCK)); | |
1201 | } | |
e52e98a7 | 1202 | |
8d87cb9f MCC |
1203 | static int vidioc_streamon(struct file *file, void *priv, enum v4l2_buf_type i) |
1204 | { | |
1205 | struct cx8800_fh *fh = priv; | |
1206 | struct cx8800_dev *dev = fh->dev; | |
1207 | ||
1208 | if (unlikely(fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)) | |
1209 | return -EINVAL; | |
1210 | if (unlikely(i != fh->type)) | |
1211 | return -EINVAL; | |
1212 | ||
1213 | if (unlikely(!res_get(dev,fh,get_ressource(fh)))) | |
1214 | return -EBUSY; | |
1215 | return videobuf_streamon(get_queue(fh)); | |
1216 | } | |
1217 | ||
1218 | static int vidioc_streamoff(struct file *file, void *priv, enum v4l2_buf_type i) | |
1219 | { | |
1220 | struct cx8800_fh *fh = priv; | |
1221 | struct cx8800_dev *dev = fh->dev; | |
1222 | int err, res; | |
1223 | ||
1224 | if (fh->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) | |
1225 | return -EINVAL; | |
1226 | if (i != fh->type) | |
1227 | return -EINVAL; | |
1228 | ||
1229 | res = get_ressource(fh); | |
1230 | err = videobuf_streamoff(get_queue(fh)); | |
1231 | if (err < 0) | |
1232 | return err; | |
1233 | res_free(dev,fh,res); | |
e52e98a7 MCC |
1234 | return 0; |
1235 | } | |
1236 | ||
63ab1bdc | 1237 | static int vidioc_s_std (struct file *file, void *priv, v4l2_std_id *tvnorms) |
e52e98a7 | 1238 | { |
8d87cb9f | 1239 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; |
e52e98a7 | 1240 | |
8d87cb9f | 1241 | mutex_lock(&core->lock); |
63ab1bdc | 1242 | cx88_set_tvnorm(core,*tvnorms); |
8d87cb9f | 1243 | mutex_unlock(&core->lock); |
63ab1bdc | 1244 | |
8d87cb9f MCC |
1245 | return 0; |
1246 | } | |
1da177e4 | 1247 | |
8d87cb9f | 1248 | /* only one input in this sample driver */ |
54da49f5 | 1249 | int cx88_enum_input (struct cx88_core *core,struct v4l2_input *i) |
8d87cb9f | 1250 | { |
8d87cb9f MCC |
1251 | static const char *iname[] = { |
1252 | [ CX88_VMUX_COMPOSITE1 ] = "Composite1", | |
1253 | [ CX88_VMUX_COMPOSITE2 ] = "Composite2", | |
1254 | [ CX88_VMUX_COMPOSITE3 ] = "Composite3", | |
1255 | [ CX88_VMUX_COMPOSITE4 ] = "Composite4", | |
1256 | [ CX88_VMUX_SVIDEO ] = "S-Video", | |
1257 | [ CX88_VMUX_TELEVISION ] = "Television", | |
1258 | [ CX88_VMUX_CABLE ] = "Cable TV", | |
1259 | [ CX88_VMUX_DVB ] = "DVB", | |
1260 | [ CX88_VMUX_DEBUG ] = "for debug only", | |
1261 | }; | |
1262 | unsigned int n; | |
1da177e4 | 1263 | |
8d87cb9f MCC |
1264 | n = i->index; |
1265 | if (n >= 4) | |
1266 | return -EINVAL; | |
6a59d64c | 1267 | if (0 == INPUT(n).type) |
8d87cb9f MCC |
1268 | return -EINVAL; |
1269 | memset(i,0,sizeof(*i)); | |
1270 | i->index = n; | |
1271 | i->type = V4L2_INPUT_TYPE_CAMERA; | |
6a59d64c TP |
1272 | strcpy(i->name,iname[INPUT(n).type]); |
1273 | if ((CX88_VMUX_TELEVISION == INPUT(n).type) || | |
1274 | (CX88_VMUX_CABLE == INPUT(n).type)) | |
8d87cb9f | 1275 | i->type = V4L2_INPUT_TYPE_TUNER; |
63ab1bdc | 1276 | i->std = CX88_NORMS; |
8d87cb9f MCC |
1277 | return 0; |
1278 | } | |
54da49f5 MCC |
1279 | EXPORT_SYMBOL(cx88_enum_input); |
1280 | ||
1281 | static int vidioc_enum_input (struct file *file, void *priv, | |
1282 | struct v4l2_input *i) | |
1283 | { | |
1284 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1285 | return cx88_enum_input (core,i); | |
1286 | } | |
1da177e4 | 1287 | |
8d87cb9f MCC |
1288 | static int vidioc_g_input (struct file *file, void *priv, unsigned int *i) |
1289 | { | |
1290 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1da177e4 | 1291 | |
8d87cb9f MCC |
1292 | *i = core->input; |
1293 | return 0; | |
1294 | } | |
1da177e4 | 1295 | |
8d87cb9f MCC |
1296 | static int vidioc_s_input (struct file *file, void *priv, unsigned int i) |
1297 | { | |
1298 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1da177e4 | 1299 | |
8d87cb9f MCC |
1300 | if (i >= 4) |
1301 | return -EINVAL; | |
1da177e4 | 1302 | |
8d87cb9f MCC |
1303 | mutex_lock(&core->lock); |
1304 | cx88_newstation(core); | |
e90311a1 | 1305 | cx88_video_mux(core,i); |
8d87cb9f MCC |
1306 | mutex_unlock(&core->lock); |
1307 | return 0; | |
1308 | } | |
1da177e4 | 1309 | |
1da177e4 | 1310 | |
1da177e4 | 1311 | |
8d87cb9f MCC |
1312 | static int vidioc_queryctrl (struct file *file, void *priv, |
1313 | struct v4l2_queryctrl *qctrl) | |
1314 | { | |
6d04203c FD |
1315 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; |
1316 | ||
8d87cb9f MCC |
1317 | qctrl->id = v4l2_ctrl_next(ctrl_classes, qctrl->id); |
1318 | if (unlikely(qctrl->id == 0)) | |
1319 | return -EINVAL; | |
6d04203c | 1320 | return cx8800_ctrl_query(core, qctrl); |
8d87cb9f | 1321 | } |
1da177e4 | 1322 | |
54da49f5 | 1323 | static int vidioc_g_ctrl (struct file *file, void *priv, |
8d87cb9f MCC |
1324 | struct v4l2_control *ctl) |
1325 | { | |
1326 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
54da49f5 MCC |
1327 | return |
1328 | cx88_get_control(core,ctl); | |
1329 | } | |
1da177e4 | 1330 | |
54da49f5 MCC |
1331 | static int vidioc_s_ctrl (struct file *file, void *priv, |
1332 | struct v4l2_control *ctl) | |
1333 | { | |
1334 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
8d87cb9f | 1335 | return |
54da49f5 | 1336 | cx88_set_control(core,ctl); |
8d87cb9f MCC |
1337 | } |
1338 | ||
1339 | static int vidioc_g_tuner (struct file *file, void *priv, | |
1340 | struct v4l2_tuner *t) | |
1341 | { | |
1342 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1343 | u32 reg; | |
1da177e4 | 1344 | |
6a59d64c | 1345 | if (unlikely(UNSET == core->board.tuner_type)) |
8d87cb9f | 1346 | return -EINVAL; |
243d8c0f MCC |
1347 | if (0 != t->index) |
1348 | return -EINVAL; | |
a82decf6 | 1349 | |
8d87cb9f MCC |
1350 | strcpy(t->name, "Television"); |
1351 | t->type = V4L2_TUNER_ANALOG_TV; | |
1352 | t->capability = V4L2_TUNER_CAP_NORM; | |
1353 | t->rangehigh = 0xffffffffUL; | |
a82decf6 | 1354 | |
8d87cb9f MCC |
1355 | cx88_get_stereo(core ,t); |
1356 | reg = cx_read(MO_DEVICE_STATUS); | |
1357 | t->signal = (reg & (1<<5)) ? 0xffff : 0x0000; | |
1358 | return 0; | |
1359 | } | |
41ef7c1e | 1360 | |
8d87cb9f MCC |
1361 | static int vidioc_s_tuner (struct file *file, void *priv, |
1362 | struct v4l2_tuner *t) | |
1363 | { | |
1364 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
41ef7c1e | 1365 | |
6a59d64c | 1366 | if (UNSET == core->board.tuner_type) |
8d87cb9f MCC |
1367 | return -EINVAL; |
1368 | if (0 != t->index) | |
1369 | return -EINVAL; | |
c5287ba1 | 1370 | |
8d87cb9f MCC |
1371 | cx88_set_stereo(core, t->audmode, 1); |
1372 | return 0; | |
1373 | } | |
902fc997 | 1374 | |
8d87cb9f MCC |
1375 | static int vidioc_g_frequency (struct file *file, void *priv, |
1376 | struct v4l2_frequency *f) | |
1377 | { | |
1378 | struct cx8800_fh *fh = priv; | |
1379 | struct cx88_core *core = fh->dev->core; | |
902fc997 | 1380 | |
6a59d64c | 1381 | if (unlikely(UNSET == core->board.tuner_type)) |
8d87cb9f MCC |
1382 | return -EINVAL; |
1383 | ||
1384 | /* f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; */ | |
1385 | f->type = fh->radio ? V4L2_TUNER_RADIO : V4L2_TUNER_ANALOG_TV; | |
1386 | f->frequency = core->freq; | |
1387 | ||
1388 | cx88_call_i2c_clients(core,VIDIOC_G_FREQUENCY,f); | |
1da177e4 | 1389 | |
1da177e4 LT |
1390 | return 0; |
1391 | } | |
1392 | ||
54da49f5 | 1393 | int cx88_set_freq (struct cx88_core *core, |
8d87cb9f | 1394 | struct v4l2_frequency *f) |
1da177e4 | 1395 | { |
6a59d64c | 1396 | if (unlikely(UNSET == core->board.tuner_type)) |
8d87cb9f MCC |
1397 | return -EINVAL; |
1398 | if (unlikely(f->tuner != 0)) | |
1399 | return -EINVAL; | |
54da49f5 | 1400 | |
8d87cb9f MCC |
1401 | mutex_lock(&core->lock); |
1402 | core->freq = f->frequency; | |
1403 | cx88_newstation(core); | |
1404 | cx88_call_i2c_clients(core,VIDIOC_S_FREQUENCY,f); | |
c7b0ac05 | 1405 | |
8d87cb9f MCC |
1406 | /* When changing channels it is required to reset TVAUDIO */ |
1407 | msleep (10); | |
1408 | cx88_set_tvaudio(core); | |
c7b0ac05 | 1409 | |
8d87cb9f | 1410 | mutex_unlock(&core->lock); |
54da49f5 | 1411 | |
8d87cb9f | 1412 | return 0; |
1da177e4 | 1413 | } |
54da49f5 MCC |
1414 | EXPORT_SYMBOL(cx88_set_freq); |
1415 | ||
1416 | static int vidioc_s_frequency (struct file *file, void *priv, | |
1417 | struct v4l2_frequency *f) | |
1418 | { | |
1419 | struct cx8800_fh *fh = priv; | |
1420 | struct cx88_core *core = fh->dev->core; | |
1421 | ||
1422 | if (unlikely(0 == fh->radio && f->type != V4L2_TUNER_ANALOG_TV)) | |
1423 | return -EINVAL; | |
1424 | if (unlikely(1 == fh->radio && f->type != V4L2_TUNER_RADIO)) | |
1425 | return -EINVAL; | |
1426 | ||
1427 | return | |
1428 | cx88_set_freq (core,f); | |
1429 | } | |
1da177e4 | 1430 | |
dbbff48f TP |
1431 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1432 | static int vidioc_g_register (struct file *file, void *fh, | |
1433 | struct v4l2_register *reg) | |
1434 | { | |
1435 | struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core; | |
1436 | ||
f3d092b8 | 1437 | if (!v4l2_chip_match_host(reg->match_type, reg->match_chip)) |
dbbff48f TP |
1438 | return -EINVAL; |
1439 | /* cx2388x has a 24-bit register space */ | |
1440 | reg->val = cx_read(reg->reg&0xffffff); | |
1441 | return 0; | |
1442 | } | |
1443 | ||
1444 | static int vidioc_s_register (struct file *file, void *fh, | |
1445 | struct v4l2_register *reg) | |
1446 | { | |
1447 | struct cx88_core *core = ((struct cx8800_fh*)fh)->dev->core; | |
1448 | ||
f3d092b8 | 1449 | if (!v4l2_chip_match_host(reg->match_type, reg->match_chip)) |
dbbff48f | 1450 | return -EINVAL; |
dbbff48f TP |
1451 | cx_write(reg->reg&0xffffff, reg->val); |
1452 | return 0; | |
1453 | } | |
1454 | #endif | |
8d87cb9f MCC |
1455 | |
1456 | /* ----------------------------------------------------------- */ | |
1457 | /* RADIO ESPECIFIC IOCTLS */ | |
1da177e4 LT |
1458 | /* ----------------------------------------------------------- */ |
1459 | ||
8d87cb9f MCC |
1460 | static int radio_querycap (struct file *file, void *priv, |
1461 | struct v4l2_capability *cap) | |
1da177e4 | 1462 | { |
8d87cb9f | 1463 | struct cx8800_dev *dev = ((struct cx8800_fh *)priv)->dev; |
1da177e4 LT |
1464 | struct cx88_core *core = dev->core; |
1465 | ||
8d87cb9f | 1466 | strcpy(cap->driver, "cx8800"); |
6a59d64c | 1467 | strlcpy(cap->card, core->board.name, sizeof(cap->card)); |
8d87cb9f MCC |
1468 | sprintf(cap->bus_info,"PCI:%s", pci_name(dev->pci)); |
1469 | cap->version = CX88_VERSION_CODE; | |
1470 | cap->capabilities = V4L2_CAP_TUNER; | |
1471 | return 0; | |
1472 | } | |
1da177e4 | 1473 | |
8d87cb9f MCC |
1474 | static int radio_g_tuner (struct file *file, void *priv, |
1475 | struct v4l2_tuner *t) | |
1476 | { | |
1477 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
1da177e4 | 1478 | |
8d87cb9f MCC |
1479 | if (unlikely(t->index > 0)) |
1480 | return -EINVAL; | |
1da177e4 | 1481 | |
8d87cb9f MCC |
1482 | strcpy(t->name, "Radio"); |
1483 | t->type = V4L2_TUNER_RADIO; | |
1da177e4 | 1484 | |
8d87cb9f MCC |
1485 | cx88_call_i2c_clients(core,VIDIOC_G_TUNER,t); |
1486 | return 0; | |
1487 | } | |
1da177e4 | 1488 | |
8d87cb9f MCC |
1489 | static int radio_enum_input (struct file *file, void *priv, |
1490 | struct v4l2_input *i) | |
1491 | { | |
1492 | if (i->index != 0) | |
1493 | return -EINVAL; | |
1494 | strcpy(i->name,"Radio"); | |
1495 | i->type = V4L2_INPUT_TYPE_TUNER; | |
a82decf6 | 1496 | |
8d87cb9f MCC |
1497 | return 0; |
1498 | } | |
a82decf6 | 1499 | |
8d87cb9f MCC |
1500 | static int radio_g_audio (struct file *file, void *priv, struct v4l2_audio *a) |
1501 | { | |
1502 | if (unlikely(a->index)) | |
1503 | return -EINVAL; | |
a82decf6 | 1504 | |
8d87cb9f MCC |
1505 | memset(a,0,sizeof(*a)); |
1506 | strcpy(a->name,"Radio"); | |
1507 | return 0; | |
1508 | } | |
a82decf6 | 1509 | |
8d87cb9f | 1510 | /* FIXME: Should add a standard for radio */ |
a82decf6 | 1511 | |
8d87cb9f MCC |
1512 | static int radio_s_tuner (struct file *file, void *priv, |
1513 | struct v4l2_tuner *t) | |
1514 | { | |
1515 | struct cx88_core *core = ((struct cx8800_fh *)priv)->dev->core; | |
a82decf6 | 1516 | |
8d87cb9f MCC |
1517 | if (0 != t->index) |
1518 | return -EINVAL; | |
1da177e4 | 1519 | |
8d87cb9f | 1520 | cx88_call_i2c_clients(core,VIDIOC_S_TUNER,t); |
1da177e4 | 1521 | |
8d87cb9f MCC |
1522 | return 0; |
1523 | } | |
1da177e4 | 1524 | |
8d87cb9f MCC |
1525 | static int radio_s_audio (struct file *file, void *fh, |
1526 | struct v4l2_audio *a) | |
1527 | { | |
1528 | return 0; | |
1529 | } | |
1da177e4 | 1530 | |
8d87cb9f MCC |
1531 | static int radio_s_input (struct file *file, void *fh, unsigned int i) |
1532 | { | |
1da177e4 | 1533 | return 0; |
8d87cb9f | 1534 | } |
1da177e4 | 1535 | |
8d87cb9f MCC |
1536 | static int radio_queryctrl (struct file *file, void *priv, |
1537 | struct v4l2_queryctrl *c) | |
1da177e4 | 1538 | { |
8d87cb9f MCC |
1539 | int i; |
1540 | ||
1541 | if (c->id < V4L2_CID_BASE || | |
1542 | c->id >= V4L2_CID_LASTP1) | |
1543 | return -EINVAL; | |
1544 | if (c->id == V4L2_CID_AUDIO_MUTE) { | |
1545 | for (i = 0; i < CX8800_CTLS; i++) | |
1546 | if (cx8800_ctls[i].v.id == c->id) | |
1547 | break; | |
1548 | *c = cx8800_ctls[i].v; | |
1549 | } else | |
1550 | *c = no_ctl; | |
1551 | return 0; | |
1552 | } | |
1da177e4 LT |
1553 | |
1554 | /* ----------------------------------------------------------- */ | |
1555 | ||
1556 | static void cx8800_vid_timeout(unsigned long data) | |
1557 | { | |
1558 | struct cx8800_dev *dev = (struct cx8800_dev*)data; | |
1559 | struct cx88_core *core = dev->core; | |
1560 | struct cx88_dmaqueue *q = &dev->vidq; | |
1561 | struct cx88_buffer *buf; | |
1562 | unsigned long flags; | |
1563 | ||
e52e98a7 | 1564 | cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]); |
1da177e4 LT |
1565 | |
1566 | cx_clear(MO_VID_DMACNTRL, 0x11); | |
1567 | cx_clear(VID_CAPTURE_CONTROL, 0x06); | |
1568 | ||
1569 | spin_lock_irqsave(&dev->slock,flags); | |
1570 | while (!list_empty(&q->active)) { | |
1571 | buf = list_entry(q->active.next, struct cx88_buffer, vb.queue); | |
1572 | list_del(&buf->vb.queue); | |
0fc0686e | 1573 | buf->vb.state = VIDEOBUF_ERROR; |
1da177e4 LT |
1574 | wake_up(&buf->vb.done); |
1575 | printk("%s/0: [%p/%d] timeout - dma=0x%08lx\n", core->name, | |
1576 | buf, buf->vb.i, (unsigned long)buf->risc.dma); | |
1577 | } | |
1578 | restart_video_queue(dev,q); | |
1579 | spin_unlock_irqrestore(&dev->slock,flags); | |
1580 | } | |
1581 | ||
41ef7c1e MCC |
1582 | static char *cx88_vid_irqs[32] = { |
1583 | "y_risci1", "u_risci1", "v_risci1", "vbi_risc1", | |
1584 | "y_risci2", "u_risci2", "v_risci2", "vbi_risc2", | |
1585 | "y_oflow", "u_oflow", "v_oflow", "vbi_oflow", | |
1586 | "y_sync", "u_sync", "v_sync", "vbi_sync", | |
1587 | "opc_err", "par_err", "rip_err", "pci_abort", | |
1588 | }; | |
1589 | ||
1da177e4 LT |
1590 | static void cx8800_vid_irq(struct cx8800_dev *dev) |
1591 | { | |
1592 | struct cx88_core *core = dev->core; | |
1593 | u32 status, mask, count; | |
1594 | ||
1595 | status = cx_read(MO_VID_INTSTAT); | |
1596 | mask = cx_read(MO_VID_INTMSK); | |
1597 | if (0 == (status & mask)) | |
1598 | return; | |
1599 | cx_write(MO_VID_INTSTAT, status); | |
1600 | if (irq_debug || (status & mask & ~0xff)) | |
1601 | cx88_print_irqbits(core->name, "irq vid", | |
66623a04 MCC |
1602 | cx88_vid_irqs, ARRAY_SIZE(cx88_vid_irqs), |
1603 | status, mask); | |
1da177e4 LT |
1604 | |
1605 | /* risc op code error */ | |
1606 | if (status & (1 << 16)) { | |
1607 | printk(KERN_WARNING "%s/0: video risc op code error\n",core->name); | |
1608 | cx_clear(MO_VID_DMACNTRL, 0x11); | |
1609 | cx_clear(VID_CAPTURE_CONTROL, 0x06); | |
e52e98a7 | 1610 | cx88_sram_channel_dump(core, &cx88_sram_channels[SRAM_CH21]); |
1da177e4 LT |
1611 | } |
1612 | ||
1613 | /* risc1 y */ | |
1614 | if (status & 0x01) { | |
1615 | spin_lock(&dev->slock); | |
1616 | count = cx_read(MO_VIDY_GPCNT); | |
e52e98a7 | 1617 | cx88_wakeup(core, &dev->vidq, count); |
1da177e4 LT |
1618 | spin_unlock(&dev->slock); |
1619 | } | |
1620 | ||
1621 | /* risc1 vbi */ | |
1622 | if (status & 0x08) { | |
1623 | spin_lock(&dev->slock); | |
1624 | count = cx_read(MO_VBI_GPCNT); | |
e52e98a7 | 1625 | cx88_wakeup(core, &dev->vbiq, count); |
1da177e4 LT |
1626 | spin_unlock(&dev->slock); |
1627 | } | |
1628 | ||
1629 | /* risc2 y */ | |
1630 | if (status & 0x10) { | |
1631 | dprintk(2,"stopper video\n"); | |
1632 | spin_lock(&dev->slock); | |
1633 | restart_video_queue(dev,&dev->vidq); | |
1634 | spin_unlock(&dev->slock); | |
1635 | } | |
1636 | ||
1637 | /* risc2 vbi */ | |
1638 | if (status & 0x80) { | |
1639 | dprintk(2,"stopper vbi\n"); | |
1640 | spin_lock(&dev->slock); | |
1641 | cx8800_restart_vbi_queue(dev,&dev->vbiq); | |
1642 | spin_unlock(&dev->slock); | |
1643 | } | |
1644 | } | |
1645 | ||
7d12e780 | 1646 | static irqreturn_t cx8800_irq(int irq, void *dev_id) |
1da177e4 LT |
1647 | { |
1648 | struct cx8800_dev *dev = dev_id; | |
1649 | struct cx88_core *core = dev->core; | |
1650 | u32 status; | |
1651 | int loop, handled = 0; | |
1652 | ||
1653 | for (loop = 0; loop < 10; loop++) { | |
8ddac9ee TP |
1654 | status = cx_read(MO_PCI_INTSTAT) & |
1655 | (core->pci_irqmask | PCI_INT_VIDINT); | |
1da177e4 LT |
1656 | if (0 == status) |
1657 | goto out; | |
1658 | cx_write(MO_PCI_INTSTAT, status); | |
1659 | handled = 1; | |
1660 | ||
1661 | if (status & core->pci_irqmask) | |
1662 | cx88_core_irq(core,status); | |
8ddac9ee | 1663 | if (status & PCI_INT_VIDINT) |
1da177e4 LT |
1664 | cx8800_vid_irq(dev); |
1665 | }; | |
1666 | if (10 == loop) { | |
1667 | printk(KERN_WARNING "%s/0: irq loop -- clearing mask\n", | |
1668 | core->name); | |
1669 | cx_write(MO_PCI_INTMSK,0); | |
1670 | } | |
1671 | ||
1672 | out: | |
1673 | return IRQ_RETVAL(handled); | |
1674 | } | |
1675 | ||
1676 | /* ----------------------------------------------------------- */ | |
1677 | /* exported stuff */ | |
1678 | ||
fa027c2a | 1679 | static const struct file_operations video_fops = |
1da177e4 LT |
1680 | { |
1681 | .owner = THIS_MODULE, | |
1682 | .open = video_open, | |
1683 | .release = video_release, | |
1684 | .read = video_read, | |
1685 | .poll = video_poll, | |
1686 | .mmap = video_mmap, | |
8d87cb9f | 1687 | .ioctl = video_ioctl2, |
0d0fbf81 | 1688 | .compat_ioctl = v4l_compat_ioctl32, |
1da177e4 LT |
1689 | .llseek = no_llseek, |
1690 | }; | |
1691 | ||
a399810c | 1692 | static const struct v4l2_ioctl_ops video_ioctl_ops = { |
8d87cb9f | 1693 | .vidioc_querycap = vidioc_querycap, |
78b526a4 HV |
1694 | .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap, |
1695 | .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap, | |
1696 | .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap, | |
1697 | .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap, | |
1698 | .vidioc_g_fmt_vbi_cap = cx8800_vbi_fmt, | |
1699 | .vidioc_try_fmt_vbi_cap = cx8800_vbi_fmt, | |
1700 | .vidioc_s_fmt_vbi_cap = cx8800_vbi_fmt, | |
8d87cb9f MCC |
1701 | .vidioc_reqbufs = vidioc_reqbufs, |
1702 | .vidioc_querybuf = vidioc_querybuf, | |
1703 | .vidioc_qbuf = vidioc_qbuf, | |
1704 | .vidioc_dqbuf = vidioc_dqbuf, | |
1705 | .vidioc_s_std = vidioc_s_std, | |
1706 | .vidioc_enum_input = vidioc_enum_input, | |
1707 | .vidioc_g_input = vidioc_g_input, | |
1708 | .vidioc_s_input = vidioc_s_input, | |
1709 | .vidioc_queryctrl = vidioc_queryctrl, | |
1710 | .vidioc_g_ctrl = vidioc_g_ctrl, | |
1711 | .vidioc_s_ctrl = vidioc_s_ctrl, | |
1712 | .vidioc_streamon = vidioc_streamon, | |
1713 | .vidioc_streamoff = vidioc_streamoff, | |
1714 | #ifdef CONFIG_VIDEO_V4L1_COMPAT | |
1715 | .vidiocgmbuf = vidiocgmbuf, | |
1716 | #endif | |
1717 | .vidioc_g_tuner = vidioc_g_tuner, | |
1718 | .vidioc_s_tuner = vidioc_s_tuner, | |
1719 | .vidioc_g_frequency = vidioc_g_frequency, | |
1720 | .vidioc_s_frequency = vidioc_s_frequency, | |
dbbff48f TP |
1721 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1722 | .vidioc_g_register = vidioc_g_register, | |
1723 | .vidioc_s_register = vidioc_s_register, | |
1724 | #endif | |
a399810c HV |
1725 | }; |
1726 | ||
1727 | static struct video_device cx8800_vbi_template; | |
1728 | ||
1729 | static struct video_device cx8800_video_template = { | |
1730 | .name = "cx8800-video", | |
a399810c HV |
1731 | .fops = &video_fops, |
1732 | .minor = -1, | |
1733 | .ioctl_ops = &video_ioctl_ops, | |
63ab1bdc | 1734 | .tvnorms = CX88_NORMS, |
dbbff48f | 1735 | .current_norm = V4L2_STD_NTSC_M, |
1da177e4 LT |
1736 | }; |
1737 | ||
fa027c2a | 1738 | static const struct file_operations radio_fops = |
1da177e4 LT |
1739 | { |
1740 | .owner = THIS_MODULE, | |
1741 | .open = video_open, | |
1742 | .release = video_release, | |
8d87cb9f | 1743 | .ioctl = video_ioctl2, |
0d0fbf81 | 1744 | .compat_ioctl = v4l_compat_ioctl32, |
1da177e4 LT |
1745 | .llseek = no_llseek, |
1746 | }; | |
1747 | ||
a399810c | 1748 | static const struct v4l2_ioctl_ops radio_ioctl_ops = { |
8d87cb9f MCC |
1749 | .vidioc_querycap = radio_querycap, |
1750 | .vidioc_g_tuner = radio_g_tuner, | |
1751 | .vidioc_enum_input = radio_enum_input, | |
1752 | .vidioc_g_audio = radio_g_audio, | |
1753 | .vidioc_s_tuner = radio_s_tuner, | |
1754 | .vidioc_s_audio = radio_s_audio, | |
1755 | .vidioc_s_input = radio_s_input, | |
1756 | .vidioc_queryctrl = radio_queryctrl, | |
1757 | .vidioc_g_ctrl = vidioc_g_ctrl, | |
1758 | .vidioc_s_ctrl = vidioc_s_ctrl, | |
1759 | .vidioc_g_frequency = vidioc_g_frequency, | |
1760 | .vidioc_s_frequency = vidioc_s_frequency, | |
a75d2048 TP |
1761 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1762 | .vidioc_g_register = vidioc_g_register, | |
1763 | .vidioc_s_register = vidioc_s_register, | |
1764 | #endif | |
1da177e4 LT |
1765 | }; |
1766 | ||
a399810c HV |
1767 | static struct video_device cx8800_radio_template = { |
1768 | .name = "cx8800-radio", | |
a399810c HV |
1769 | .fops = &radio_fops, |
1770 | .minor = -1, | |
1771 | .ioctl_ops = &radio_ioctl_ops, | |
1772 | }; | |
1773 | ||
1da177e4 LT |
1774 | /* ----------------------------------------------------------- */ |
1775 | ||
1776 | static void cx8800_unregister_video(struct cx8800_dev *dev) | |
1777 | { | |
1778 | if (dev->radio_dev) { | |
1779 | if (-1 != dev->radio_dev->minor) | |
1780 | video_unregister_device(dev->radio_dev); | |
1781 | else | |
1782 | video_device_release(dev->radio_dev); | |
1783 | dev->radio_dev = NULL; | |
1784 | } | |
1785 | if (dev->vbi_dev) { | |
1786 | if (-1 != dev->vbi_dev->minor) | |
1787 | video_unregister_device(dev->vbi_dev); | |
1788 | else | |
1789 | video_device_release(dev->vbi_dev); | |
1790 | dev->vbi_dev = NULL; | |
1791 | } | |
1792 | if (dev->video_dev) { | |
1793 | if (-1 != dev->video_dev->minor) | |
1794 | video_unregister_device(dev->video_dev); | |
1795 | else | |
1796 | video_device_release(dev->video_dev); | |
1797 | dev->video_dev = NULL; | |
1798 | } | |
1799 | } | |
1800 | ||
1801 | static int __devinit cx8800_initdev(struct pci_dev *pci_dev, | |
1802 | const struct pci_device_id *pci_id) | |
1803 | { | |
1804 | struct cx8800_dev *dev; | |
1805 | struct cx88_core *core; | |
8d87cb9f | 1806 | |
1da177e4 LT |
1807 | int err; |
1808 | ||
7408187d | 1809 | dev = kzalloc(sizeof(*dev),GFP_KERNEL); |
1da177e4 LT |
1810 | if (NULL == dev) |
1811 | return -ENOMEM; | |
1da177e4 LT |
1812 | |
1813 | /* pci init */ | |
1814 | dev->pci = pci_dev; | |
1815 | if (pci_enable_device(pci_dev)) { | |
1816 | err = -EIO; | |
1817 | goto fail_free; | |
1818 | } | |
1819 | core = cx88_core_get(dev->pci); | |
1820 | if (NULL == core) { | |
1821 | err = -EINVAL; | |
1822 | goto fail_free; | |
1823 | } | |
1824 | dev->core = core; | |
1825 | ||
1826 | /* print pci info */ | |
1827 | pci_read_config_byte(pci_dev, PCI_CLASS_REVISION, &dev->pci_rev); | |
4ac97914 MCC |
1828 | pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat); |
1829 | printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, " | |
228aef63 | 1830 | "latency: %d, mmio: 0x%llx\n", core->name, |
1da177e4 | 1831 | pci_name(pci_dev), dev->pci_rev, pci_dev->irq, |
228aef63 | 1832 | dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0)); |
1da177e4 LT |
1833 | |
1834 | pci_set_master(pci_dev); | |
aaa40cb8 | 1835 | if (!pci_dma_supported(pci_dev,DMA_32BIT_MASK)) { |
1da177e4 LT |
1836 | printk("%s/0: Oops: no 32bit PCI DMA ???\n",core->name); |
1837 | err = -EIO; | |
1838 | goto fail_core; | |
1839 | } | |
1840 | ||
8d87cb9f MCC |
1841 | /* Initialize VBI template */ |
1842 | memcpy( &cx8800_vbi_template, &cx8800_video_template, | |
1843 | sizeof(cx8800_vbi_template) ); | |
1844 | strcpy(cx8800_vbi_template.name,"cx8800-vbi"); | |
8d87cb9f | 1845 | |
1da177e4 | 1846 | /* initialize driver struct */ |
1da177e4 | 1847 | spin_lock_init(&dev->slock); |
63ab1bdc | 1848 | core->tvnorm = cx8800_video_template.current_norm; |
1da177e4 LT |
1849 | |
1850 | /* init video dma queues */ | |
1851 | INIT_LIST_HEAD(&dev->vidq.active); | |
1852 | INIT_LIST_HEAD(&dev->vidq.queued); | |
1853 | dev->vidq.timeout.function = cx8800_vid_timeout; | |
1854 | dev->vidq.timeout.data = (unsigned long)dev; | |
1855 | init_timer(&dev->vidq.timeout); | |
1856 | cx88_risc_stopper(dev->pci,&dev->vidq.stopper, | |
1857 | MO_VID_DMACNTRL,0x11,0x00); | |
1858 | ||
1859 | /* init vbi dma queues */ | |
1860 | INIT_LIST_HEAD(&dev->vbiq.active); | |
1861 | INIT_LIST_HEAD(&dev->vbiq.queued); | |
1862 | dev->vbiq.timeout.function = cx8800_vbi_timeout; | |
1863 | dev->vbiq.timeout.data = (unsigned long)dev; | |
1864 | init_timer(&dev->vbiq.timeout); | |
1865 | cx88_risc_stopper(dev->pci,&dev->vbiq.stopper, | |
1866 | MO_VID_DMACNTRL,0x88,0x00); | |
1867 | ||
1868 | /* get irq */ | |
1869 | err = request_irq(pci_dev->irq, cx8800_irq, | |
8076fe32 | 1870 | IRQF_SHARED | IRQF_DISABLED, core->name, dev); |
1da177e4 | 1871 | if (err < 0) { |
5772f813 | 1872 | printk(KERN_ERR "%s/0: can't get IRQ %d\n", |
1da177e4 LT |
1873 | core->name,pci_dev->irq); |
1874 | goto fail_core; | |
1875 | } | |
1876 | cx_set(MO_PCI_INTMSK, core->pci_irqmask); | |
1877 | ||
1878 | /* load and configure helper modules */ | |
e52e98a7 | 1879 | |
38f9d308 | 1880 | if (core->board.audio_chip == V4L2_IDENT_WM8775) |
3057906d ST |
1881 | request_module("wm8775"); |
1882 | ||
6fcecce7 MK |
1883 | switch (core->boardnr) { |
1884 | case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD: | |
3c66e4e1 | 1885 | case CX88_BOARD_DVICO_FUSIONHDTV_7_GOLD: |
6fcecce7 | 1886 | request_module("rtc-isl1208"); |
8efd2e28 MK |
1887 | /* break intentionally omitted */ |
1888 | case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO: | |
1889 | request_module("ir-kbd-i2c"); | |
6fcecce7 MK |
1890 | } |
1891 | ||
1da177e4 LT |
1892 | /* register v4l devices */ |
1893 | dev->video_dev = cx88_vdev_init(core,dev->pci, | |
1894 | &cx8800_video_template,"video"); | |
1895 | err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER, | |
1896 | video_nr[core->nr]); | |
1897 | if (err < 0) { | |
5772f813 | 1898 | printk(KERN_ERR "%s/0: can't register video device\n", |
1da177e4 LT |
1899 | core->name); |
1900 | goto fail_unreg; | |
1901 | } | |
1902 | printk(KERN_INFO "%s/0: registered device video%d [v4l2]\n", | |
1903 | core->name,dev->video_dev->minor & 0x1f); | |
1904 | ||
1905 | dev->vbi_dev = cx88_vdev_init(core,dev->pci,&cx8800_vbi_template,"vbi"); | |
1906 | err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI, | |
1907 | vbi_nr[core->nr]); | |
1908 | if (err < 0) { | |
5772f813 | 1909 | printk(KERN_ERR "%s/0: can't register vbi device\n", |
1da177e4 LT |
1910 | core->name); |
1911 | goto fail_unreg; | |
1912 | } | |
1913 | printk(KERN_INFO "%s/0: registered device vbi%d\n", | |
1914 | core->name,dev->vbi_dev->minor & 0x1f); | |
1915 | ||
6a59d64c | 1916 | if (core->board.radio.type == CX88_RADIO) { |
1da177e4 LT |
1917 | dev->radio_dev = cx88_vdev_init(core,dev->pci, |
1918 | &cx8800_radio_template,"radio"); | |
1919 | err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO, | |
1920 | radio_nr[core->nr]); | |
1921 | if (err < 0) { | |
5772f813 | 1922 | printk(KERN_ERR "%s/0: can't register radio device\n", |
1da177e4 LT |
1923 | core->name); |
1924 | goto fail_unreg; | |
1925 | } | |
1926 | printk(KERN_INFO "%s/0: registered device radio%d\n", | |
1927 | core->name,dev->radio_dev->minor & 0x1f); | |
1928 | } | |
1929 | ||
1930 | /* everything worked */ | |
1931 | list_add_tail(&dev->devlist,&cx8800_devlist); | |
1932 | pci_set_drvdata(pci_dev,dev); | |
1933 | ||
1934 | /* initial device configuration */ | |
3593cab5 | 1935 | mutex_lock(&core->lock); |
63ab1bdc | 1936 | cx88_set_tvnorm(core,core->tvnorm); |
70f00044 | 1937 | init_controls(core); |
e90311a1 | 1938 | cx88_video_mux(core,0); |
3593cab5 | 1939 | mutex_unlock(&core->lock); |
1da177e4 LT |
1940 | |
1941 | /* start tvaudio thread */ | |
6a59d64c | 1942 | if (core->board.tuner_type != TUNER_ABSENT) { |
1da177e4 | 1943 | core->kthread = kthread_run(cx88_audio_thread, core, "cx88 tvaudio"); |
32b78de7 CG |
1944 | if (IS_ERR(core->kthread)) { |
1945 | err = PTR_ERR(core->kthread); | |
5772f813 TP |
1946 | printk(KERN_ERR "%s/0: failed to create cx88 audio thread, err=%d\n", |
1947 | core->name, err); | |
32b78de7 CG |
1948 | } |
1949 | } | |
1da177e4 LT |
1950 | return 0; |
1951 | ||
1952 | fail_unreg: | |
1953 | cx8800_unregister_video(dev); | |
1954 | free_irq(pci_dev->irq, dev); | |
1955 | fail_core: | |
1956 | cx88_core_put(core,dev->pci); | |
1957 | fail_free: | |
1958 | kfree(dev); | |
1959 | return err; | |
1960 | } | |
1961 | ||
1962 | static void __devexit cx8800_finidev(struct pci_dev *pci_dev) | |
1963 | { | |
4ac97914 | 1964 | struct cx8800_dev *dev = pci_get_drvdata(pci_dev); |
e52e98a7 | 1965 | struct cx88_core *core = dev->core; |
1da177e4 LT |
1966 | |
1967 | /* stop thread */ | |
e52e98a7 MCC |
1968 | if (core->kthread) { |
1969 | kthread_stop(core->kthread); | |
1970 | core->kthread = NULL; | |
1da177e4 LT |
1971 | } |
1972 | ||
b12203d2 MB |
1973 | if (core->ir) |
1974 | cx88_ir_stop(core, core->ir); | |
1975 | ||
e52e98a7 | 1976 | cx88_shutdown(core); /* FIXME */ |
1da177e4 LT |
1977 | pci_disable_device(pci_dev); |
1978 | ||
1979 | /* unregister stuff */ | |
1980 | ||
1981 | free_irq(pci_dev->irq, dev); | |
1982 | cx8800_unregister_video(dev); | |
1983 | pci_set_drvdata(pci_dev, NULL); | |
1984 | ||
1985 | /* free memory */ | |
1986 | btcx_riscmem_free(dev->pci,&dev->vidq.stopper); | |
1987 | list_del(&dev->devlist); | |
e52e98a7 | 1988 | cx88_core_put(core,dev->pci); |
1da177e4 LT |
1989 | kfree(dev); |
1990 | } | |
1991 | ||
17bc98a4 | 1992 | #ifdef CONFIG_PM |
1da177e4 LT |
1993 | static int cx8800_suspend(struct pci_dev *pci_dev, pm_message_t state) |
1994 | { | |
b45009b0 | 1995 | struct cx8800_dev *dev = pci_get_drvdata(pci_dev); |
1da177e4 LT |
1996 | struct cx88_core *core = dev->core; |
1997 | ||
1998 | /* stop video+vbi capture */ | |
1999 | spin_lock(&dev->slock); | |
2000 | if (!list_empty(&dev->vidq.active)) { | |
5772f813 | 2001 | printk("%s/0: suspend video\n", core->name); |
1da177e4 LT |
2002 | stop_video_dma(dev); |
2003 | del_timer(&dev->vidq.timeout); | |
2004 | } | |
2005 | if (!list_empty(&dev->vbiq.active)) { | |
5772f813 | 2006 | printk("%s/0: suspend vbi\n", core->name); |
1da177e4 LT |
2007 | cx8800_stop_vbi_dma(dev); |
2008 | del_timer(&dev->vbiq.timeout); | |
2009 | } | |
2010 | spin_unlock(&dev->slock); | |
2011 | ||
13595a51 MCC |
2012 | if (core->ir) |
2013 | cx88_ir_stop(core, core->ir); | |
1da177e4 | 2014 | /* FIXME -- shutdown device */ |
e52e98a7 | 2015 | cx88_shutdown(core); |
1da177e4 LT |
2016 | |
2017 | pci_save_state(pci_dev); | |
2018 | if (0 != pci_set_power_state(pci_dev, pci_choose_state(pci_dev, state))) { | |
2019 | pci_disable_device(pci_dev); | |
2020 | dev->state.disabled = 1; | |
2021 | } | |
2022 | return 0; | |
2023 | } | |
2024 | ||
2025 | static int cx8800_resume(struct pci_dev *pci_dev) | |
2026 | { | |
b45009b0 | 2027 | struct cx8800_dev *dev = pci_get_drvdata(pci_dev); |
1da177e4 | 2028 | struct cx88_core *core = dev->core; |
08adb9e2 | 2029 | int err; |
1da177e4 LT |
2030 | |
2031 | if (dev->state.disabled) { | |
08adb9e2 MCC |
2032 | err=pci_enable_device(pci_dev); |
2033 | if (err) { | |
5772f813 TP |
2034 | printk(KERN_ERR "%s/0: can't enable device\n", |
2035 | core->name); | |
08adb9e2 MCC |
2036 | return err; |
2037 | } | |
2038 | ||
1da177e4 LT |
2039 | dev->state.disabled = 0; |
2040 | } | |
08adb9e2 MCC |
2041 | err= pci_set_power_state(pci_dev, PCI_D0); |
2042 | if (err) { | |
5772f813 | 2043 | printk(KERN_ERR "%s/0: can't set power state\n", core->name); |
08adb9e2 MCC |
2044 | pci_disable_device(pci_dev); |
2045 | dev->state.disabled = 1; | |
2046 | ||
2047 | return err; | |
2048 | } | |
1da177e4 LT |
2049 | pci_restore_state(pci_dev); |
2050 | ||
1da177e4 | 2051 | /* FIXME: re-initialize hardware */ |
e52e98a7 | 2052 | cx88_reset(core); |
13595a51 MCC |
2053 | if (core->ir) |
2054 | cx88_ir_start(core, core->ir); | |
2055 | ||
2056 | cx_set(MO_PCI_INTMSK, core->pci_irqmask); | |
1da177e4 LT |
2057 | |
2058 | /* restart video+vbi capture */ | |
2059 | spin_lock(&dev->slock); | |
2060 | if (!list_empty(&dev->vidq.active)) { | |
5772f813 | 2061 | printk("%s/0: resume video\n", core->name); |
1da177e4 LT |
2062 | restart_video_queue(dev,&dev->vidq); |
2063 | } | |
2064 | if (!list_empty(&dev->vbiq.active)) { | |
5772f813 | 2065 | printk("%s/0: resume vbi\n", core->name); |
1da177e4 LT |
2066 | cx8800_restart_vbi_queue(dev,&dev->vbiq); |
2067 | } | |
2068 | spin_unlock(&dev->slock); | |
2069 | ||
2070 | return 0; | |
2071 | } | |
17bc98a4 | 2072 | #endif |
1da177e4 LT |
2073 | |
2074 | /* ----------------------------------------------------------- */ | |
2075 | ||
408b664a | 2076 | static struct pci_device_id cx8800_pci_tbl[] = { |
1da177e4 LT |
2077 | { |
2078 | .vendor = 0x14f1, | |
2079 | .device = 0x8800, | |
b45009b0 MCC |
2080 | .subvendor = PCI_ANY_ID, |
2081 | .subdevice = PCI_ANY_ID, | |
1da177e4 LT |
2082 | },{ |
2083 | /* --- end of list --- */ | |
2084 | } | |
2085 | }; | |
2086 | MODULE_DEVICE_TABLE(pci, cx8800_pci_tbl); | |
2087 | ||
2088 | static struct pci_driver cx8800_pci_driver = { | |
b45009b0 MCC |
2089 | .name = "cx8800", |
2090 | .id_table = cx8800_pci_tbl, | |
2091 | .probe = cx8800_initdev, | |
2092 | .remove = __devexit_p(cx8800_finidev), | |
17bc98a4 | 2093 | #ifdef CONFIG_PM |
1da177e4 LT |
2094 | .suspend = cx8800_suspend, |
2095 | .resume = cx8800_resume, | |
17bc98a4 | 2096 | #endif |
1da177e4 LT |
2097 | }; |
2098 | ||
2099 | static int cx8800_init(void) | |
2100 | { | |
5772f813 | 2101 | printk(KERN_INFO "cx88/0: cx2388x v4l2 driver version %d.%d.%d loaded\n", |
1da177e4 LT |
2102 | (CX88_VERSION_CODE >> 16) & 0xff, |
2103 | (CX88_VERSION_CODE >> 8) & 0xff, | |
2104 | CX88_VERSION_CODE & 0xff); | |
2105 | #ifdef SNAPSHOT | |
2106 | printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n", | |
2107 | SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100); | |
2108 | #endif | |
2109 | return pci_register_driver(&cx8800_pci_driver); | |
2110 | } | |
2111 | ||
2112 | static void cx8800_fini(void) | |
2113 | { | |
2114 | pci_unregister_driver(&cx8800_pci_driver); | |
2115 | } | |
2116 | ||
2117 | module_init(cx8800_init); | |
2118 | module_exit(cx8800_fini); | |
2119 | ||
2120 | /* ----------------------------------------------------------- */ | |
2121 | /* | |
2122 | * Local variables: | |
2123 | * c-basic-offset: 8 | |
2124 | * End: | |
b45009b0 | 2125 | * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off |
1da177e4 | 2126 | */ |