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Commit | Line | Data |
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a6c2ba28 | 1 | /* |
3acf2809 | 2 | em28xx-core.c - driver for Empia EM2800/EM2820/2840 USB video capture devices |
a6c2ba28 | 3 | |
f7abcd38 MCC |
4 | Copyright (C) 2005 Ludovico Cavedon <cavedon@sssup.it> |
5 | Markus Rechberger <mrechberger@gmail.com> | |
2e7c6dc3 | 6 | Mauro Carvalho Chehab <mchehab@infradead.org> |
f7abcd38 | 7 | Sascha Sommer <saschasommer@freenet.de> |
a6c2ba28 | 8 | |
9 | This program is free software; you can redistribute it and/or modify | |
10 | it under the terms of the GNU General Public License as published by | |
11 | the Free Software Foundation; either version 2 of the License, or | |
12 | (at your option) any later version. | |
13 | ||
14 | This program is distributed in the hope that it will be useful, | |
15 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | GNU General Public License for more details. | |
18 | ||
19 | You should have received a copy of the GNU General Public License | |
20 | along with this program; if not, write to the Free Software | |
21 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | */ | |
23 | ||
24 | #include <linux/init.h> | |
25 | #include <linux/list.h> | |
26 | #include <linux/module.h> | |
a6c2ba28 | 27 | #include <linux/usb.h> |
28 | #include <linux/vmalloc.h> | |
29 | ||
f7abcd38 | 30 | #include "em28xx.h" |
a6c2ba28 | 31 | |
32 | /* #define ENABLE_DEBUG_ISOC_FRAMES */ | |
33 | ||
ff699e6b | 34 | static unsigned int core_debug; |
a6c2ba28 | 35 | module_param(core_debug,int,0644); |
36 | MODULE_PARM_DESC(core_debug,"enable debug messages [core]"); | |
37 | ||
3acf2809 | 38 | #define em28xx_coredbg(fmt, arg...) do {\ |
4ac97914 MCC |
39 | if (core_debug) \ |
40 | printk(KERN_INFO "%s %s :"fmt, \ | |
f85c657f | 41 | dev->name, __FUNCTION__ , ##arg); } while (0) |
a6c2ba28 | 42 | |
ff699e6b | 43 | static unsigned int reg_debug; |
a6c2ba28 | 44 | module_param(reg_debug,int,0644); |
45 | MODULE_PARM_DESC(reg_debug,"enable debug messages [URB reg]"); | |
46 | ||
3acf2809 | 47 | #define em28xx_regdbg(fmt, arg...) do {\ |
4ac97914 MCC |
48 | if (reg_debug) \ |
49 | printk(KERN_INFO "%s %s :"fmt, \ | |
f85c657f | 50 | dev->name, __FUNCTION__ , ##arg); } while (0) |
a6c2ba28 | 51 | |
ff699e6b | 52 | static unsigned int isoc_debug; |
a6c2ba28 | 53 | module_param(isoc_debug,int,0644); |
55b8b2d1 | 54 | MODULE_PARM_DESC(isoc_debug,"enable debug messages [isoc transfers]"); |
a6c2ba28 | 55 | |
3acf2809 | 56 | #define em28xx_isocdbg(fmt, arg...) do {\ |
4ac97914 MCC |
57 | if (isoc_debug) \ |
58 | printk(KERN_INFO "%s %s :"fmt, \ | |
f85c657f | 59 | dev->name, __FUNCTION__ , ##arg); } while (0) |
a6c2ba28 | 60 | |
3acf2809 | 61 | static int alt = EM28XX_PINOUT; |
a6c2ba28 | 62 | module_param(alt, int, 0644); |
63 | MODULE_PARM_DESC(alt, "alternate setting to use for video endpoint"); | |
64 | ||
674434c6 | 65 | |
a6c2ba28 | 66 | /* |
3acf2809 | 67 | * em28xx_request_buffers() |
a6c2ba28 | 68 | * allocate a number of buffers |
69 | */ | |
3acf2809 | 70 | u32 em28xx_request_buffers(struct em28xx *dev, u32 count) |
a6c2ba28 | 71 | { |
72 | const size_t imagesize = PAGE_ALIGN(dev->frame_size); /*needs to be page aligned cause the buffers can be mapped individually! */ | |
73 | void *buff = NULL; | |
74 | u32 i; | |
3687e1e6 MCC |
75 | em28xx_coredbg("requested %i buffers with size %zi\n", |
76 | count, imagesize); | |
3acf2809 MCC |
77 | if (count > EM28XX_NUM_FRAMES) |
78 | count = EM28XX_NUM_FRAMES; | |
a6c2ba28 | 79 | |
80 | dev->num_frames = count; | |
81 | while (dev->num_frames > 0) { | |
3639c861 SS |
82 | if ((buff = vmalloc_32(dev->num_frames * imagesize))) { |
83 | memset(buff, 0, dev->num_frames * imagesize); | |
a6c2ba28 | 84 | break; |
3639c861 | 85 | } |
a6c2ba28 | 86 | dev->num_frames--; |
87 | } | |
88 | ||
89 | for (i = 0; i < dev->num_frames; i++) { | |
90 | dev->frame[i].bufmem = buff + i * imagesize; | |
91 | dev->frame[i].buf.index = i; | |
92 | dev->frame[i].buf.m.offset = i * imagesize; | |
93 | dev->frame[i].buf.length = dev->frame_size; | |
94 | dev->frame[i].buf.type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
95 | dev->frame[i].buf.sequence = 0; | |
96 | dev->frame[i].buf.field = V4L2_FIELD_NONE; | |
97 | dev->frame[i].buf.memory = V4L2_MEMORY_MMAP; | |
98 | dev->frame[i].buf.flags = 0; | |
99 | } | |
100 | return dev->num_frames; | |
101 | } | |
102 | ||
103 | /* | |
3acf2809 | 104 | * em28xx_queue_unusedframes() |
a6c2ba28 | 105 | * add all frames that are not currently in use to the inbuffer queue |
106 | */ | |
3acf2809 | 107 | void em28xx_queue_unusedframes(struct em28xx *dev) |
a6c2ba28 | 108 | { |
109 | unsigned long lock_flags; | |
110 | u32 i; | |
111 | ||
112 | for (i = 0; i < dev->num_frames; i++) | |
113 | if (dev->frame[i].state == F_UNUSED) { | |
114 | dev->frame[i].state = F_QUEUED; | |
115 | spin_lock_irqsave(&dev->queue_lock, lock_flags); | |
116 | list_add_tail(&dev->frame[i].frame, &dev->inqueue); | |
117 | spin_unlock_irqrestore(&dev->queue_lock, lock_flags); | |
118 | } | |
119 | } | |
120 | ||
121 | /* | |
3acf2809 | 122 | * em28xx_release_buffers() |
a6c2ba28 | 123 | * free frame buffers |
124 | */ | |
3acf2809 | 125 | void em28xx_release_buffers(struct em28xx *dev) |
a6c2ba28 | 126 | { |
127 | if (dev->num_frames) { | |
3639c861 | 128 | vfree(dev->frame[0].bufmem); |
a6c2ba28 | 129 | dev->num_frames = 0; |
130 | } | |
131 | } | |
132 | ||
133 | /* | |
3acf2809 | 134 | * em28xx_read_reg_req() |
a6c2ba28 | 135 | * reads data from the usb device specifying bRequest |
136 | */ | |
3acf2809 | 137 | int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, |
a6c2ba28 | 138 | char *buf, int len) |
139 | { | |
140 | int ret, byte; | |
141 | ||
9f38724a MR |
142 | if (dev->state & DEV_DISCONNECTED) |
143 | return(-ENODEV); | |
144 | ||
3acf2809 | 145 | em28xx_regdbg("req=%02x, reg=%02x ", req, reg); |
a6c2ba28 | 146 | |
147 | ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req, | |
148 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
149 | 0x0000, reg, buf, len, HZ); | |
150 | ||
151 | if (reg_debug){ | |
152 | printk(ret < 0 ? " failed!\n" : "%02x values: ", ret); | |
153 | for (byte = 0; byte < len; byte++) { | |
0da5176f | 154 | printk(" %02x", (unsigned char)buf[byte]); |
a6c2ba28 | 155 | } |
156 | printk("\n"); | |
157 | } | |
158 | ||
159 | return ret; | |
160 | } | |
161 | ||
162 | /* | |
3acf2809 | 163 | * em28xx_read_reg_req() |
a6c2ba28 | 164 | * reads data from the usb device specifying bRequest |
165 | */ | |
3acf2809 | 166 | int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg) |
a6c2ba28 | 167 | { |
168 | u8 val; | |
169 | int ret; | |
170 | ||
9f38724a MR |
171 | if (dev->state & DEV_DISCONNECTED) |
172 | return(-ENODEV); | |
173 | ||
3acf2809 | 174 | em28xx_regdbg("req=%02x, reg=%02x:", req, reg); |
a6c2ba28 | 175 | |
176 | ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), req, | |
177 | USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
178 | 0x0000, reg, &val, 1, HZ); | |
179 | ||
180 | if (reg_debug) | |
0da5176f MCC |
181 | printk(ret < 0 ? " failed!\n" : |
182 | "%02x\n", (unsigned char) val); | |
a6c2ba28 | 183 | |
184 | if (ret < 0) | |
185 | return ret; | |
186 | ||
187 | return val; | |
188 | } | |
189 | ||
3acf2809 | 190 | int em28xx_read_reg(struct em28xx *dev, u16 reg) |
a6c2ba28 | 191 | { |
3acf2809 | 192 | return em28xx_read_reg_req(dev, USB_REQ_GET_STATUS, reg); |
a6c2ba28 | 193 | } |
194 | ||
195 | /* | |
3acf2809 | 196 | * em28xx_write_regs_req() |
a6c2ba28 | 197 | * sends data to the usb device, specifying bRequest |
198 | */ | |
3acf2809 | 199 | int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, |
a6c2ba28 | 200 | int len) |
201 | { | |
202 | int ret; | |
203 | ||
204 | /*usb_control_msg seems to expect a kmalloced buffer */ | |
9f38724a MR |
205 | unsigned char *bufs; |
206 | ||
207 | if (dev->state & DEV_DISCONNECTED) | |
208 | return(-ENODEV); | |
209 | ||
210 | bufs = kmalloc(len, GFP_KERNEL); | |
a6c2ba28 | 211 | |
3acf2809 | 212 | em28xx_regdbg("req=%02x reg=%02x:", req, reg); |
a6c2ba28 | 213 | |
214 | if (reg_debug) { | |
215 | int i; | |
216 | for (i = 0; i < len; ++i) | |
217 | printk (" %02x", (unsigned char)buf[i]); | |
218 | printk ("\n"); | |
219 | } | |
220 | ||
221 | if (!bufs) | |
222 | return -ENOMEM; | |
223 | memcpy(bufs, buf, len); | |
224 | ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), req, | |
225 | USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, | |
226 | 0x0000, reg, bufs, len, HZ); | |
9f38724a | 227 | msleep(5); /* FIXME: magic number */ |
a6c2ba28 | 228 | kfree(bufs); |
229 | return ret; | |
230 | } | |
231 | ||
3acf2809 | 232 | int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len) |
a6c2ba28 | 233 | { |
3acf2809 | 234 | return em28xx_write_regs_req(dev, USB_REQ_GET_STATUS, reg, buf, len); |
a6c2ba28 | 235 | } |
236 | ||
237 | /* | |
3acf2809 | 238 | * em28xx_write_reg_bits() |
a6c2ba28 | 239 | * sets only some bits (specified by bitmask) of a register, by first reading |
240 | * the actual value | |
241 | */ | |
532fe652 | 242 | static int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val, |
a6c2ba28 | 243 | u8 bitmask) |
244 | { | |
245 | int oldval; | |
246 | u8 newval; | |
3acf2809 | 247 | if ((oldval = em28xx_read_reg(dev, reg)) < 0) |
a6c2ba28 | 248 | return oldval; |
249 | newval = (((u8) oldval) & ~bitmask) | (val & bitmask); | |
3acf2809 | 250 | return em28xx_write_regs(dev, reg, &newval, 1); |
a6c2ba28 | 251 | } |
252 | ||
253 | /* | |
3acf2809 | 254 | * em28xx_write_ac97() |
a6c2ba28 | 255 | * write a 16 bit value to the specified AC97 address (LSB first!) |
256 | */ | |
539c96d0 | 257 | static int em28xx_write_ac97(struct em28xx *dev, u8 reg, u8 *val) |
a6c2ba28 | 258 | { |
00b8730f | 259 | int ret, i; |
a6c2ba28 | 260 | u8 addr = reg & 0x7f; |
3acf2809 | 261 | if ((ret = em28xx_write_regs(dev, AC97LSB_REG, val, 2)) < 0) |
a6c2ba28 | 262 | return ret; |
3acf2809 | 263 | if ((ret = em28xx_write_regs(dev, AC97ADDR_REG, &addr, 1)) < 0) |
a6c2ba28 | 264 | return ret; |
00b8730f MCC |
265 | |
266 | /* Wait up to 50 ms for AC97 command to complete */ | |
267 | for (i = 0; i < 10; i++) { | |
268 | if ((ret = em28xx_read_reg(dev, AC97BUSY_REG)) < 0) | |
269 | return ret; | |
46cb57e6 | 270 | if (!(ret & 0x01)) |
00b8730f MCC |
271 | return 0; |
272 | msleep(5); | |
a6c2ba28 | 273 | } |
00b8730f | 274 | em28xx_warn ("AC97 command still being executed: not handled properly!\n"); |
a6c2ba28 | 275 | return 0; |
276 | } | |
277 | ||
00b8730f | 278 | static int em28xx_set_audio_source(struct em28xx *dev) |
539c96d0 MCC |
279 | { |
280 | static char *enable = "\x08\x08"; | |
281 | static char *disable = "\x08\x88"; | |
282 | char *video = enable, *line = disable; | |
1685a6fe | 283 | int ret; |
539c96d0 MCC |
284 | u8 input; |
285 | ||
286 | if (dev->is_em2800) { | |
287 | if (dev->ctl_ainput) | |
288 | input = EM2800_AUDIO_SRC_LINE; | |
289 | else | |
290 | input = EM2800_AUDIO_SRC_TUNER; | |
291 | ||
292 | ret = em28xx_write_regs(dev, EM2800_AUDIOSRC_REG, &input, 1); | |
293 | if (ret < 0) | |
294 | return ret; | |
295 | } | |
296 | ||
297 | if (dev->has_msp34xx) | |
298 | input = EM28XX_AUDIO_SRC_TUNER; | |
299 | else { | |
300 | switch (dev->ctl_ainput) { | |
301 | case EM28XX_AMUX_VIDEO: | |
302 | input = EM28XX_AUDIO_SRC_TUNER; | |
539c96d0 MCC |
303 | break; |
304 | case EM28XX_AMUX_LINE_IN: | |
305 | input = EM28XX_AUDIO_SRC_LINE; | |
539c96d0 MCC |
306 | break; |
307 | case EM28XX_AMUX_AC97_VIDEO: | |
308 | input = EM28XX_AUDIO_SRC_LINE; | |
309 | break; | |
310 | case EM28XX_AMUX_AC97_LINE_IN: | |
311 | input = EM28XX_AUDIO_SRC_LINE; | |
312 | video = disable; | |
313 | line = enable; | |
314 | break; | |
315 | } | |
316 | } | |
317 | ||
318 | ret = em28xx_write_reg_bits(dev, AUDIOSRC_REG, input, 0xc0); | |
319 | if (ret < 0) | |
320 | return ret; | |
00b8730f | 321 | msleep(5); |
539c96d0 | 322 | |
7463dda2 MCC |
323 | /* Sets AC97 mixer registers |
324 | This is seems to be needed, even for non-ac97 configs | |
325 | */ | |
539c96d0 MCC |
326 | ret = em28xx_write_ac97(dev, VIDEO_AC97, video); |
327 | if (ret < 0) | |
328 | return ret; | |
329 | ||
330 | ret = em28xx_write_ac97(dev, LINE_IN_AC97, line); | |
331 | ||
332 | return ret; | |
333 | } | |
334 | ||
3acf2809 | 335 | int em28xx_audio_analog_set(struct em28xx *dev) |
a6c2ba28 | 336 | { |
539c96d0 | 337 | int ret; |
a6c2ba28 | 338 | char s[2] = { 0x00, 0x00 }; |
3abee53e | 339 | u8 xclk = 0x07; |
539c96d0 | 340 | |
a6c2ba28 | 341 | s[0] |= 0x1f - dev->volume; |
342 | s[1] |= 0x1f - dev->volume; | |
539c96d0 | 343 | |
00b8730f MCC |
344 | /* Mute */ |
345 | s[1] |= 0x80; | |
539c96d0 | 346 | ret = em28xx_write_ac97(dev, MASTER_AC97, s); |
00b8730f | 347 | |
539c96d0 MCC |
348 | if (ret < 0) |
349 | return ret; | |
350 | ||
3abee53e MCC |
351 | if (dev->has_12mhz_i2s) |
352 | xclk |= 0x20; | |
353 | ||
354 | if (!dev->mute) | |
355 | xclk |= 0x80; | |
356 | ||
357 | ret = em28xx_write_reg_bits(dev, XCLK_REG, xclk, 0xa7); | |
539c96d0 MCC |
358 | if (ret < 0) |
359 | return ret; | |
3abee53e | 360 | msleep(10); |
539c96d0 MCC |
361 | |
362 | /* Selects the proper audio input */ | |
363 | ret = em28xx_set_audio_source(dev); | |
a6c2ba28 | 364 | |
00b8730f MCC |
365 | /* Unmute device */ |
366 | if (!dev->mute) | |
367 | s[1] &= ~0x80; | |
368 | ret = em28xx_write_ac97(dev, MASTER_AC97, s); | |
369 | ||
539c96d0 MCC |
370 | return ret; |
371 | } | |
372 | EXPORT_SYMBOL_GPL(em28xx_audio_analog_set); | |
a6c2ba28 | 373 | |
3acf2809 | 374 | int em28xx_colorlevels_set_default(struct em28xx *dev) |
a6c2ba28 | 375 | { |
3acf2809 MCC |
376 | em28xx_write_regs(dev, YGAIN_REG, "\x10", 1); /* contrast */ |
377 | em28xx_write_regs(dev, YOFFSET_REG, "\x00", 1); /* brightness */ | |
378 | em28xx_write_regs(dev, UVGAIN_REG, "\x10", 1); /* saturation */ | |
379 | em28xx_write_regs(dev, UOFFSET_REG, "\x00", 1); | |
380 | em28xx_write_regs(dev, VOFFSET_REG, "\x00", 1); | |
381 | em28xx_write_regs(dev, SHARPNESS_REG, "\x00", 1); | |
382 | ||
383 | em28xx_write_regs(dev, GAMMA_REG, "\x20", 1); | |
384 | em28xx_write_regs(dev, RGAIN_REG, "\x20", 1); | |
385 | em28xx_write_regs(dev, GGAIN_REG, "\x20", 1); | |
386 | em28xx_write_regs(dev, BGAIN_REG, "\x20", 1); | |
387 | em28xx_write_regs(dev, ROFFSET_REG, "\x00", 1); | |
388 | em28xx_write_regs(dev, GOFFSET_REG, "\x00", 1); | |
389 | return em28xx_write_regs(dev, BOFFSET_REG, "\x00", 1); | |
a6c2ba28 | 390 | } |
391 | ||
3acf2809 | 392 | int em28xx_capture_start(struct em28xx *dev, int start) |
a6c2ba28 | 393 | { |
394 | int ret; | |
395 | /* FIXME: which is the best order? */ | |
396 | /* video registers are sampled by VREF */ | |
3acf2809 | 397 | if ((ret = em28xx_write_reg_bits(dev, USBSUSP_REG, start ? 0x10 : 0x00, |
a6c2ba28 | 398 | 0x10)) < 0) |
399 | return ret; | |
400 | /* enable video capture */ | |
3acf2809 | 401 | return em28xx_write_regs(dev, VINENABLE_REG, start ? "\x67" : "\x27", 1); |
a6c2ba28 | 402 | } |
403 | ||
3acf2809 | 404 | int em28xx_outfmt_set_yuv422(struct em28xx *dev) |
a6c2ba28 | 405 | { |
3acf2809 MCC |
406 | em28xx_write_regs(dev, OUTFMT_REG, "\x34", 1); |
407 | em28xx_write_regs(dev, VINMODE_REG, "\x10", 1); | |
408 | return em28xx_write_regs(dev, VINCTRL_REG, "\x11", 1); | |
a6c2ba28 | 409 | } |
410 | ||
adcb0fa2 AB |
411 | static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax, |
412 | u8 ymin, u8 ymax) | |
a6c2ba28 | 413 | { |
3acf2809 | 414 | em28xx_coredbg("em28xx Scale: (%d,%d)-(%d,%d)\n", xmin, ymin, xmax, ymax); |
a6c2ba28 | 415 | |
3acf2809 MCC |
416 | em28xx_write_regs(dev, XMIN_REG, &xmin, 1); |
417 | em28xx_write_regs(dev, XMAX_REG, &xmax, 1); | |
418 | em28xx_write_regs(dev, YMIN_REG, &ymin, 1); | |
419 | return em28xx_write_regs(dev, YMAX_REG, &ymax, 1); | |
a6c2ba28 | 420 | } |
421 | ||
adcb0fa2 | 422 | static int em28xx_capture_area_set(struct em28xx *dev, u8 hstart, u8 vstart, |
a6c2ba28 | 423 | u16 width, u16 height) |
424 | { | |
425 | u8 cwidth = width; | |
426 | u8 cheight = height; | |
427 | u8 overflow = (height >> 7 & 0x02) | (width >> 8 & 0x01); | |
428 | ||
3acf2809 | 429 | em28xx_coredbg("em28xx Area Set: (%d,%d)\n", (width | (overflow & 2) << 7), |
a6c2ba28 | 430 | (height | (overflow & 1) << 8)); |
431 | ||
3acf2809 MCC |
432 | em28xx_write_regs(dev, HSTART_REG, &hstart, 1); |
433 | em28xx_write_regs(dev, VSTART_REG, &vstart, 1); | |
434 | em28xx_write_regs(dev, CWIDTH_REG, &cwidth, 1); | |
435 | em28xx_write_regs(dev, CHEIGHT_REG, &cheight, 1); | |
436 | return em28xx_write_regs(dev, OFLOW_REG, &overflow, 1); | |
a6c2ba28 | 437 | } |
438 | ||
adcb0fa2 | 439 | static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v) |
a6c2ba28 | 440 | { |
52c02fcd SS |
441 | u8 mode; |
442 | /* the em2800 scaler only supports scaling down to 50% */ | |
443 | if(dev->is_em2800) | |
444 | mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00); | |
445 | else { | |
446 | u8 buf[2]; | |
447 | buf[0] = h; | |
448 | buf[1] = h >> 8; | |
3acf2809 | 449 | em28xx_write_regs(dev, HSCALELOW_REG, (char *)buf, 2); |
52c02fcd SS |
450 | buf[0] = v; |
451 | buf[1] = v >> 8; | |
3acf2809 | 452 | em28xx_write_regs(dev, VSCALELOW_REG, (char *)buf, 2); |
52c02fcd SS |
453 | /* it seems that both H and V scalers must be active to work correctly */ |
454 | mode = (h || v)? 0x30: 0x00; | |
74458e6c | 455 | } |
3acf2809 | 456 | return em28xx_write_reg_bits(dev, COMPR_REG, mode, 0x30); |
a6c2ba28 | 457 | } |
458 | ||
459 | /* FIXME: this only function read values from dev */ | |
3acf2809 | 460 | int em28xx_resolution_set(struct em28xx *dev) |
a6c2ba28 | 461 | { |
462 | int width, height; | |
463 | width = norm_maxw(dev); | |
464 | height = norm_maxh(dev) >> 1; | |
465 | ||
3acf2809 MCC |
466 | em28xx_outfmt_set_yuv422(dev); |
467 | em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2); | |
468 | em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2); | |
469 | return em28xx_scaler_set(dev, dev->hscale, dev->vscale); | |
a6c2ba28 | 470 | } |
471 | ||
472 | ||
473 | /******************* isoc transfer handling ****************************/ | |
474 | ||
475 | #ifdef ENABLE_DEBUG_ISOC_FRAMES | |
7d12e780 | 476 | static void em28xx_isoc_dump(struct urb *urb) |
a6c2ba28 | 477 | { |
478 | int len = 0; | |
479 | int ntrans = 0; | |
480 | int i; | |
481 | ||
482 | printk(KERN_DEBUG "isocIrq: sf=%d np=%d ec=%x\n", | |
483 | urb->start_frame, urb->number_of_packets, | |
484 | urb->error_count); | |
485 | for (i = 0; i < urb->number_of_packets; i++) { | |
486 | unsigned char *buf = | |
487 | urb->transfer_buffer + | |
488 | urb->iso_frame_desc[i].offset; | |
489 | int alen = urb->iso_frame_desc[i].actual_length; | |
490 | if (alen > 0) { | |
491 | if (buf[0] == 0x88) { | |
492 | ntrans++; | |
493 | len += alen; | |
494 | } else if (buf[0] == 0x22) { | |
495 | printk(KERN_DEBUG | |
496 | "= l=%d nt=%d bpp=%d\n", | |
497 | len - 4 * ntrans, ntrans, | |
498 | ntrans == 0 ? 0 : len / ntrans); | |
499 | ntrans = 1; | |
500 | len = alen; | |
501 | } else | |
502 | printk(KERN_DEBUG "!\n"); | |
503 | } | |
504 | printk(KERN_DEBUG " n=%d s=%d al=%d %x\n", i, | |
505 | urb->iso_frame_desc[i].status, | |
506 | urb->iso_frame_desc[i].actual_length, | |
507 | (unsigned int) | |
508 | *((unsigned char *)(urb->transfer_buffer + | |
509 | urb->iso_frame_desc[i]. | |
510 | offset))); | |
511 | } | |
512 | } | |
513 | #endif | |
514 | ||
3acf2809 | 515 | static inline int em28xx_isoc_video(struct em28xx *dev,struct em28xx_frame_t **f, |
a6c2ba28 | 516 | unsigned long *lock_flags, unsigned char buf) |
517 | { | |
518 | if (!(buf & 0x01)) { | |
519 | if ((*f)->state == F_GRABBING) { | |
520 | /*previous frame is incomplete */ | |
521 | if ((*f)->fieldbytesused < dev->field_size) { | |
522 | (*f)->state = F_ERROR; | |
3acf2809 | 523 | em28xx_isocdbg ("dropping incomplete bottom field (%i missing bytes)", |
a6c2ba28 | 524 | dev->field_size-(*f)->fieldbytesused); |
525 | } else { | |
526 | (*f)->state = F_DONE; | |
527 | (*f)->buf.bytesused = dev->frame_size; | |
528 | } | |
529 | } | |
530 | if ((*f)->state == F_DONE || (*f)->state == F_ERROR) { | |
531 | /* move current frame to outqueue and get next free buffer from inqueue */ | |
532 | spin_lock_irqsave(&dev-> queue_lock, *lock_flags); | |
533 | list_move_tail(&(*f)->frame, &dev->outqueue); | |
534 | if (!list_empty(&dev->inqueue)) | |
535 | (*f) = list_entry(dev-> inqueue.next, | |
3acf2809 | 536 | struct em28xx_frame_t,frame); |
a6c2ba28 | 537 | else |
538 | (*f) = NULL; | |
539 | spin_unlock_irqrestore(&dev->queue_lock,*lock_flags); | |
540 | } | |
541 | if (!(*f)) { | |
3acf2809 | 542 | em28xx_isocdbg ("new frame but no buffer is free"); |
a6c2ba28 | 543 | return -1; |
544 | } | |
545 | do_gettimeofday(&(*f)->buf.timestamp); | |
546 | (*f)->buf.sequence = ++dev->frame_count; | |
547 | (*f)->buf.field = V4L2_FIELD_INTERLACED; | |
548 | (*f)->state = F_GRABBING; | |
549 | (*f)->buf.bytesused = 0; | |
550 | (*f)->top_field = 1; | |
551 | (*f)->fieldbytesused = 0; | |
552 | } else { | |
553 | /* acquiring bottom field */ | |
554 | if ((*f)->state == F_GRABBING) { | |
555 | if (!(*f)->top_field) { | |
556 | (*f)->state = F_ERROR; | |
3acf2809 | 557 | em28xx_isocdbg ("unexpected begin of bottom field; discarding it"); |
a6c2ba28 | 558 | } else if ((*f)-> fieldbytesused < dev->field_size - 172) { |
559 | (*f)->state = F_ERROR; | |
3acf2809 | 560 | em28xx_isocdbg ("dropping incomplete top field (%i missing bytes)", |
a6c2ba28 | 561 | dev->field_size-(*f)->fieldbytesused); |
562 | } else { | |
563 | (*f)->top_field = 0; | |
564 | (*f)->fieldbytesused = 0; | |
565 | } | |
566 | } | |
567 | } | |
568 | return (0); | |
569 | } | |
570 | ||
3acf2809 MCC |
571 | static inline void em28xx_isoc_video_copy(struct em28xx *dev, |
572 | struct em28xx_frame_t **f, unsigned char *buf, int len) | |
a6c2ba28 | 573 | { |
574 | void *fieldstart, *startwrite, *startread; | |
575 | int linesdone, currlinedone, offset, lencopy,remain; | |
576 | ||
596d92d5 | 577 | if(dev->frame_size != (*f)->buf.length){ |
3acf2809 | 578 | em28xx_err("frame_size %i and buf.length %i are different!!!\n",dev->frame_size,(*f)->buf.length); |
596d92d5 MCC |
579 | return; |
580 | } | |
581 | ||
a6c2ba28 | 582 | if ((*f)->fieldbytesused + len > dev->field_size) |
583 | len =dev->field_size - (*f)->fieldbytesused; | |
feff0485 MCC |
584 | |
585 | if (buf[0] != 0x88 && buf[0] != 0x22) { | |
3acf2809 | 586 | em28xx_isocdbg("frame is not complete\n"); |
feff0485 MCC |
587 | startread = buf; |
588 | len+=4; | |
589 | } else | |
590 | startread = buf + 4; | |
591 | ||
a6c2ba28 | 592 | remain = len; |
feff0485 | 593 | |
a6c2ba28 | 594 | if ((*f)->top_field) |
595 | fieldstart = (*f)->bufmem; | |
596 | else | |
597 | fieldstart = (*f)->bufmem + dev->bytesperline; | |
598 | ||
599 | linesdone = (*f)->fieldbytesused / dev->bytesperline; | |
600 | currlinedone = (*f)->fieldbytesused % dev->bytesperline; | |
601 | offset = linesdone * dev->bytesperline * 2 + currlinedone; | |
602 | startwrite = fieldstart + offset; | |
603 | lencopy = dev->bytesperline - currlinedone; | |
604 | lencopy = lencopy > remain ? remain : lencopy; | |
605 | ||
606 | memcpy(startwrite, startread, lencopy); | |
607 | remain -= lencopy; | |
608 | ||
609 | while (remain > 0) { | |
610 | startwrite += lencopy + dev->bytesperline; | |
611 | startread += lencopy; | |
612 | if (dev->bytesperline > remain) | |
613 | lencopy = remain; | |
614 | else | |
615 | lencopy = dev->bytesperline; | |
616 | ||
617 | memcpy(startwrite, startread, lencopy); | |
618 | remain -= lencopy; | |
619 | } | |
620 | ||
621 | (*f)->fieldbytesused += len; | |
622 | } | |
623 | ||
624 | /* | |
3acf2809 | 625 | * em28xx_isoIrq() |
a6c2ba28 | 626 | * handles the incoming isoc urbs and fills the frames from our inqueue |
627 | */ | |
7d12e780 | 628 | static void em28xx_isocIrq(struct urb *urb) |
a6c2ba28 | 629 | { |
3acf2809 | 630 | struct em28xx *dev = urb->context; |
a6c2ba28 | 631 | int i, status; |
3acf2809 | 632 | struct em28xx_frame_t **f; |
a6c2ba28 | 633 | unsigned long lock_flags; |
634 | ||
635 | if (!dev) | |
636 | return; | |
637 | #ifdef ENABLE_DEBUG_ISOC_FRAMES | |
638 | if (isoc_debug>1) | |
7d12e780 | 639 | em28xx_isoc_dump(urb); |
a6c2ba28 | 640 | #endif |
641 | ||
642 | if (urb->status == -ENOENT) | |
643 | return; | |
644 | ||
645 | f = &dev->frame_current; | |
646 | ||
647 | if (dev->stream == STREAM_INTERRUPT) { | |
648 | dev->stream = STREAM_OFF; | |
649 | if ((*f)) | |
650 | (*f)->state = F_QUEUED; | |
3acf2809 | 651 | em28xx_isocdbg("stream interrupted"); |
a6c2ba28 | 652 | wake_up_interruptible(&dev->wait_stream); |
653 | } | |
654 | ||
655 | if ((dev->state & DEV_DISCONNECTED) || (dev->state & DEV_MISCONFIGURED)) | |
656 | return; | |
657 | ||
658 | if (dev->stream == STREAM_ON && !list_empty(&dev->inqueue)) { | |
659 | if (!(*f)) | |
660 | (*f) = list_entry(dev->inqueue.next, | |
3acf2809 | 661 | struct em28xx_frame_t, frame); |
a6c2ba28 | 662 | |
663 | for (i = 0; i < urb->number_of_packets; i++) { | |
664 | unsigned char *buf = urb->transfer_buffer + | |
665 | urb->iso_frame_desc[i].offset; | |
666 | int len = urb->iso_frame_desc[i].actual_length - 4; | |
667 | ||
668 | if (urb->iso_frame_desc[i].status) { | |
3acf2809 | 669 | em28xx_isocdbg("data error: [%d] len=%d, status=%d", i, |
a6c2ba28 | 670 | urb->iso_frame_desc[i].actual_length, |
671 | urb->iso_frame_desc[i].status); | |
feff0485 MCC |
672 | if (urb->iso_frame_desc[i].status != -EPROTO) |
673 | continue; | |
a6c2ba28 | 674 | } |
675 | if (urb->iso_frame_desc[i].actual_length <= 0) { | |
3acf2809 | 676 | em28xx_isocdbg("packet %d is empty",i); |
a6c2ba28 | 677 | continue; |
678 | } | |
679 | if (urb->iso_frame_desc[i].actual_length > | |
3687e1e6 | 680 | urb->iso_frame_desc[i].length) { |
3acf2809 | 681 | em28xx_isocdbg("packet bigger than packet size"); |
a6c2ba28 | 682 | continue; |
683 | } | |
684 | /*new frame */ | |
685 | if (buf[0] == 0x22 && buf[1] == 0x5a) { | |
3acf2809 | 686 | em28xx_isocdbg("Video frame, length=%i!",len); |
a6c2ba28 | 687 | |
3acf2809 | 688 | if (em28xx_isoc_video(dev,f,&lock_flags,buf[2])) |
a6c2ba28 | 689 | break; |
690 | } else if (buf[0]==0x33 && buf[1]==0x95 && buf[2]==0x00) { | |
3acf2809 | 691 | em28xx_isocdbg("VBI HEADER!!!"); |
a6c2ba28 | 692 | } |
693 | ||
694 | /* actual copying */ | |
695 | if ((*f)->state == F_GRABBING) { | |
3acf2809 | 696 | em28xx_isoc_video_copy(dev,f,buf, len); |
a6c2ba28 | 697 | } |
698 | } | |
699 | } | |
700 | ||
701 | for (i = 0; i < urb->number_of_packets; i++) { | |
702 | urb->iso_frame_desc[i].status = 0; | |
703 | urb->iso_frame_desc[i].actual_length = 0; | |
704 | } | |
705 | ||
706 | urb->status = 0; | |
707 | if ((status = usb_submit_urb(urb, GFP_ATOMIC))) { | |
3acf2809 | 708 | em28xx_errdev("resubmit of urb failed (error=%i)\n", status); |
a6c2ba28 | 709 | dev->state |= DEV_MISCONFIGURED; |
710 | } | |
711 | wake_up_interruptible(&dev->wait_frame); | |
712 | return; | |
713 | } | |
714 | ||
715 | /* | |
3acf2809 MCC |
716 | * em28xx_uninit_isoc() |
717 | * deallocates the buffers and urbs allocated during em28xx_init_iosc() | |
a6c2ba28 | 718 | */ |
3acf2809 | 719 | void em28xx_uninit_isoc(struct em28xx *dev) |
a6c2ba28 | 720 | { |
721 | int i; | |
722 | ||
3acf2809 | 723 | for (i = 0; i < EM28XX_NUM_BUFS; i++) { |
a6c2ba28 | 724 | if (dev->urb[i]) { |
725 | usb_kill_urb(dev->urb[i]); | |
3687e1e6 MCC |
726 | if (dev->transfer_buffer[i]) { |
727 | usb_buffer_free(dev->udev, | |
728 | dev->urb[i]->transfer_buffer_length, | |
729 | dev->transfer_buffer[i], | |
730 | dev->urb[i]->transfer_dma); | |
02f74273 | 731 | } |
a6c2ba28 | 732 | usb_free_urb(dev->urb[i]); |
733 | } | |
734 | dev->urb[i] = NULL; | |
a6c2ba28 | 735 | dev->transfer_buffer[i] = NULL; |
736 | } | |
3acf2809 | 737 | em28xx_capture_start(dev, 0); |
a6c2ba28 | 738 | } |
739 | ||
740 | /* | |
3acf2809 | 741 | * em28xx_init_isoc() |
a6c2ba28 | 742 | * allocates transfer buffers and submits the urbs for isoc transfer |
743 | */ | |
3acf2809 | 744 | int em28xx_init_isoc(struct em28xx *dev) |
a6c2ba28 | 745 | { |
e7222ca9 | 746 | /* change interface to 3 which allows the biggest packet sizes */ |
a6c2ba28 | 747 | int i, errCode; |
3687e1e6 MCC |
748 | int sb_size; |
749 | ||
750 | em28xx_set_alternate(dev); | |
751 | sb_size = EM28XX_NUM_PACKETS * dev->max_pkt_size; | |
a6c2ba28 | 752 | |
753 | /* reset streaming vars */ | |
754 | dev->frame_current = NULL; | |
755 | dev->frame_count = 0; | |
756 | ||
757 | /* allocate urbs */ | |
3acf2809 | 758 | for (i = 0; i < EM28XX_NUM_BUFS; i++) { |
a6c2ba28 | 759 | struct urb *urb; |
3687e1e6 | 760 | int j; |
a6c2ba28 | 761 | /* allocate transfer buffer */ |
3acf2809 | 762 | urb = usb_alloc_urb(EM28XX_NUM_PACKETS, GFP_KERNEL); |
02f74273 | 763 | if (!urb){ |
3acf2809 MCC |
764 | em28xx_errdev("cannot alloc urb %i\n", i); |
765 | em28xx_uninit_isoc(dev); | |
02f74273 MR |
766 | return -ENOMEM; |
767 | } | |
3687e1e6 MCC |
768 | dev->transfer_buffer[i] = usb_buffer_alloc(dev->udev, sb_size, |
769 | GFP_KERNEL, | |
770 | &urb->transfer_dma); | |
a6c2ba28 | 771 | if (!dev->transfer_buffer[i]) { |
3acf2809 | 772 | em28xx_errdev |
a6c2ba28 | 773 | ("unable to allocate %i bytes for transfer buffer %i\n", |
774 | sb_size, i); | |
3acf2809 | 775 | em28xx_uninit_isoc(dev); |
e7222ca9 | 776 | usb_free_urb(urb); |
a6c2ba28 | 777 | return -ENOMEM; |
778 | } | |
779 | memset(dev->transfer_buffer[i], 0, sb_size); | |
02f74273 MR |
780 | urb->dev = dev->udev; |
781 | urb->context = dev; | |
782 | urb->pipe = usb_rcvisocpipe(dev->udev, 0x82); | |
61b080d2 | 783 | urb->transfer_flags = URB_ISO_ASAP | URB_NO_TRANSFER_DMA_MAP; |
02f74273 MR |
784 | urb->interval = 1; |
785 | urb->transfer_buffer = dev->transfer_buffer[i]; | |
3acf2809 MCC |
786 | urb->complete = em28xx_isocIrq; |
787 | urb->number_of_packets = EM28XX_NUM_PACKETS; | |
02f74273 | 788 | urb->transfer_buffer_length = sb_size; |
3687e1e6 MCC |
789 | for (j = 0; j < EM28XX_NUM_PACKETS; j++) { |
790 | urb->iso_frame_desc[j].offset = j * dev->max_pkt_size; | |
791 | urb->iso_frame_desc[j].length = dev->max_pkt_size; | |
a6c2ba28 | 792 | } |
02f74273 | 793 | dev->urb[i] = urb; |
a6c2ba28 | 794 | } |
795 | ||
796 | /* submit urbs */ | |
3687e1e6 MCC |
797 | em28xx_coredbg("Submitting %d urbs of %d packets (%d each)\n", |
798 | EM28XX_NUM_BUFS, EM28XX_NUM_PACKETS, dev->max_pkt_size); | |
3acf2809 | 799 | for (i = 0; i < EM28XX_NUM_BUFS; i++) { |
a6c2ba28 | 800 | errCode = usb_submit_urb(dev->urb[i], GFP_KERNEL); |
801 | if (errCode) { | |
3acf2809 | 802 | em28xx_errdev("submit of urb %i failed (error=%i)\n", i, |
a6c2ba28 | 803 | errCode); |
3acf2809 | 804 | em28xx_uninit_isoc(dev); |
a6c2ba28 | 805 | return errCode; |
806 | } | |
807 | } | |
808 | ||
809 | return 0; | |
810 | } | |
811 | ||
3acf2809 | 812 | int em28xx_set_alternate(struct em28xx *dev) |
a6c2ba28 | 813 | { |
814 | int errCode, prev_alt = dev->alt; | |
3687e1e6 | 815 | int i; |
2c4a07b2 | 816 | unsigned int min_pkt_size = dev->bytesperline + 4; |
3687e1e6 | 817 | |
2c4a07b2 | 818 | /* When image size is bigger than a certain value, |
3687e1e6 MCC |
819 | the frame size should be increased, otherwise, only |
820 | green screen will be received. | |
821 | */ | |
822 | if (dev->frame_size > 720*240*2) | |
823 | min_pkt_size *= 2; | |
824 | ||
2c4a07b2 SS |
825 | for (i = 0; i < dev->num_alt; i++) { |
826 | /* stop when the selected alt setting offers enough bandwidth */ | |
827 | if (dev->alt_max_pkt_size[i] >= min_pkt_size) { | |
828 | dev->alt = i; | |
3687e1e6 | 829 | break; |
2c4a07b2 SS |
830 | /* otherwise make sure that we end up with the maximum bandwidth |
831 | because the min_pkt_size equation might be wrong... | |
832 | */ | |
833 | } else if (dev->alt_max_pkt_size[i] > | |
834 | dev->alt_max_pkt_size[dev->alt]) | |
835 | dev->alt = i; | |
836 | } | |
a6c2ba28 | 837 | |
838 | if (dev->alt != prev_alt) { | |
3687e1e6 MCC |
839 | em28xx_coredbg("minimum isoc packet size: %u (alt=%d)\n", |
840 | min_pkt_size, dev->alt); | |
a6c2ba28 | 841 | dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt]; |
3687e1e6 MCC |
842 | em28xx_coredbg("setting alternate %d with wMaxPacketSize=%u\n", |
843 | dev->alt, dev->max_pkt_size); | |
a6c2ba28 | 844 | errCode = usb_set_interface(dev->udev, 0, dev->alt); |
845 | if (errCode < 0) { | |
9d4d9c05 | 846 | em28xx_errdev ("cannot change alternate number to %d (error=%i)\n", |
3687e1e6 | 847 | dev->alt, errCode); |
a6c2ba28 | 848 | return errCode; |
849 | } | |
850 | } | |
851 | return 0; | |
852 | } |