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Commit | Line | Data |
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a6c2ba28 | 1 | /* |
0e7072ef | 2 | em28xx.h - driver for Empia EM2800/EM2820/2840 USB video capture devices |
a6c2ba28 | 3 | |
4 | Copyright (C) 2005 Markus Rechberger <mrechberger@gmail.com> | |
4ac97914 | 5 | Ludovico Cavedon <cavedon@sssup.it> |
2e7c6dc3 | 6 | Mauro Carvalho Chehab <mchehab@infradead.org> |
a6c2ba28 | 7 | |
8 | Based on the em2800 driver from Sascha Sommer <saschasommer@freenet.de> | |
9 | ||
10 | This program is free software; you can redistribute it and/or modify | |
11 | it under the terms of the GNU General Public License as published by | |
12 | the Free Software Foundation; either version 2 of the License, or | |
13 | (at your option) any later version. | |
14 | ||
15 | This program is distributed in the hope that it will be useful, | |
16 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | GNU General Public License for more details. | |
19 | ||
20 | You should have received a copy of the GNU General Public License | |
21 | along with this program; if not, write to the Free Software | |
22 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
23 | */ | |
24 | ||
3acf2809 MCC |
25 | #ifndef _EM28XX_H |
26 | #define _EM28XX_H | |
a6c2ba28 | 27 | |
cb77d010 | 28 | #include <linux/videodev2.h> |
a6c2ba28 | 29 | #include <linux/i2c.h> |
3593cab5 | 30 | #include <linux/mutex.h> |
d5e52653 | 31 | #include <media/ir-kbd-i2c.h> |
a6c2ba28 | 32 | |
596d92d5 MCC |
33 | /* Boards supported by driver */ |
34 | ||
35 | #define EM2800_BOARD_UNKNOWN 0 | |
36 | #define EM2820_BOARD_UNKNOWN 1 | |
37 | #define EM2820_BOARD_TERRATEC_CINERGY_250 2 | |
38 | #define EM2820_BOARD_PINNACLE_USB_2 3 | |
39 | #define EM2820_BOARD_HAUPPAUGE_WINTV_USB_2 4 | |
40 | #define EM2820_BOARD_MSI_VOX_USB_2 5 | |
41 | #define EM2800_BOARD_TERRATEC_CINERGY_200 6 | |
42 | #define EM2800_BOARD_LEADTEK_WINFAST_USBII 7 | |
43 | #define EM2800_BOARD_KWORLD_USB2800 8 | |
45632c4f | 44 | #define EM2820_BOARD_PINNACLE_DVC_90 9 |
4d17d083 MR |
45 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900 10 |
46 | #define EM2880_BOARD_TERRATEC_HYBRID_XS 11 | |
47 | #define EM2820_BOARD_KWORLD_PVRTV2800RF 12 | |
282b7cb3 | 48 | #define EM2880_BOARD_TERRATEC_PRODIGY_XS 13 |
ea4fd567 | 49 | #define EM2820_BOARD_PROLINK_PLAYTV_USB2 14 |
4362559d | 50 | #define EM2800_BOARD_VGEAR_POCKETTV 15 |
122d1588 | 51 | #define EM2880_BOARD_HAUPPAUGE_WINTV_HVR_950 16 |
596d92d5 MCC |
52 | |
53 | #define UNSET -1 | |
54 | ||
55 | /* maximum number of em28xx boards */ | |
3acf2809 | 56 | #define EM28XX_MAXBOARDS 1 /*FIXME: should be bigger */ |
596d92d5 | 57 | |
a6c2ba28 | 58 | /* maximum number of frames that can be queued */ |
3acf2809 | 59 | #define EM28XX_NUM_FRAMES 5 |
a6c2ba28 | 60 | /* number of frames that get used for v4l2_read() */ |
3acf2809 | 61 | #define EM28XX_NUM_READ_FRAMES 2 |
a6c2ba28 | 62 | |
63 | /* number of buffers for isoc transfers */ | |
3acf2809 | 64 | #define EM28XX_NUM_BUFS 5 |
a6c2ba28 | 65 | |
d5e52653 MCC |
66 | /* number of packets for each buffer |
67 | windows requests only 40 packets .. so we better do the same | |
68 | this is what I found out for all alternate numbers there! | |
69 | */ | |
3acf2809 | 70 | #define EM28XX_NUM_PACKETS 40 |
a6c2ba28 | 71 | |
a6c2ba28 | 72 | /* default alternate; 0 means choose the best */ |
3acf2809 | 73 | #define EM28XX_PINOUT 0 |
a6c2ba28 | 74 | |
3acf2809 | 75 | #define EM28XX_INTERLACED_DEFAULT 1 |
a6c2ba28 | 76 | |
77 | /* | |
78 | #define (use usbview if you want to get the other alternate number infos) | |
79 | #define | |
80 | #define alternate number 2 | |
81 | #define Endpoint Address: 82 | |
82 | Direction: in | |
83 | Attribute: 1 | |
84 | Type: Isoc | |
85 | Max Packet Size: 1448 | |
86 | Interval: 125us | |
87 | ||
88 | alternate number 7 | |
89 | ||
90 | Endpoint Address: 82 | |
91 | Direction: in | |
92 | Attribute: 1 | |
93 | Type: Isoc | |
94 | Max Packet Size: 3072 | |
95 | Interval: 125us | |
96 | */ | |
97 | ||
98 | /* time to wait when stopping the isoc transfer */ | |
3acf2809 | 99 | #define EM28XX_URB_TIMEOUT msecs_to_jiffies(EM28XX_NUM_BUFS * EM28XX_NUM_PACKETS) |
a6c2ba28 | 100 | |
596d92d5 MCC |
101 | /* time in msecs to wait for i2c writes to finish */ |
102 | #define EM2800_I2C_WRITE_TIMEOUT 20 | |
103 | ||
a6c2ba28 | 104 | /* the various frame states */ |
3acf2809 | 105 | enum em28xx_frame_state { |
a6c2ba28 | 106 | F_UNUSED = 0, |
107 | F_QUEUED, | |
108 | F_GRABBING, | |
109 | F_DONE, | |
110 | F_ERROR, | |
111 | }; | |
112 | ||
113 | /* stream states */ | |
3acf2809 | 114 | enum em28xx_stream_state { |
a6c2ba28 | 115 | STREAM_OFF, |
116 | STREAM_INTERRUPT, | |
117 | STREAM_ON, | |
118 | }; | |
119 | ||
120 | /* frames */ | |
3acf2809 | 121 | struct em28xx_frame_t { |
a6c2ba28 | 122 | void *bufmem; |
123 | struct v4l2_buffer buf; | |
3acf2809 | 124 | enum em28xx_frame_state state; |
a6c2ba28 | 125 | struct list_head frame; |
126 | unsigned long vma_use_count; | |
127 | int top_field; | |
128 | int fieldbytesused; | |
129 | }; | |
130 | ||
131 | /* io methods */ | |
3acf2809 | 132 | enum em28xx_io_method { |
a6c2ba28 | 133 | IO_NONE, |
134 | IO_READ, | |
135 | IO_MMAP, | |
136 | }; | |
137 | ||
138 | /* inputs */ | |
139 | ||
3acf2809 MCC |
140 | #define MAX_EM28XX_INPUT 4 |
141 | enum enum28xx_itype { | |
142 | EM28XX_VMUX_COMPOSITE1 = 1, | |
143 | EM28XX_VMUX_COMPOSITE2, | |
144 | EM28XX_VMUX_COMPOSITE3, | |
145 | EM28XX_VMUX_COMPOSITE4, | |
146 | EM28XX_VMUX_SVIDEO, | |
147 | EM28XX_VMUX_TELEVISION, | |
148 | EM28XX_VMUX_CABLE, | |
149 | EM28XX_VMUX_DVB, | |
150 | EM28XX_VMUX_DEBUG, | |
151 | EM28XX_RADIO, | |
a6c2ba28 | 152 | }; |
153 | ||
539c96d0 MCC |
154 | enum em28xx_amux { |
155 | EM28XX_AMUX_VIDEO, | |
156 | EM28XX_AMUX_LINE_IN, | |
157 | EM28XX_AMUX_AC97_VIDEO, | |
158 | EM28XX_AMUX_AC97_LINE_IN, | |
159 | }; | |
160 | ||
3acf2809 MCC |
161 | struct em28xx_input { |
162 | enum enum28xx_itype type; | |
a6c2ba28 | 163 | unsigned int vmux; |
539c96d0 | 164 | enum em28xx_amux amux; |
a6c2ba28 | 165 | }; |
166 | ||
3acf2809 | 167 | #define INPUT(nr) (&em28xx_boards[dev->model].input[nr]) |
a6c2ba28 | 168 | |
3acf2809 MCC |
169 | enum em28xx_decoder { |
170 | EM28XX_TVP5150, | |
171 | EM28XX_SAA7113, | |
172 | EM28XX_SAA7114 | |
a6c2ba28 | 173 | }; |
174 | ||
3acf2809 | 175 | struct em28xx_board { |
a6c2ba28 | 176 | char *name; |
a6c2ba28 | 177 | int vchannels; |
a6c2ba28 | 178 | int tuner_type; |
179 | ||
180 | /* i2c flags */ | |
181 | unsigned int tda9887_conf; | |
182 | ||
74f38a82 | 183 | unsigned int is_em2800:1; |
a6c2ba28 | 184 | unsigned int has_tuner:1; |
185 | unsigned int has_msp34xx:1; | |
5add9a6f | 186 | unsigned int mts_firmware:1; |
3abee53e MCC |
187 | unsigned int has_12mhz_i2s:1; |
188 | ||
74f38a82 | 189 | unsigned int analog_gpio; |
a6c2ba28 | 190 | |
3acf2809 | 191 | enum em28xx_decoder decoder; |
a6c2ba28 | 192 | |
3acf2809 | 193 | struct em28xx_input input[MAX_EM28XX_INPUT]; |
0be43754 | 194 | struct em28xx_input radio; |
a6c2ba28 | 195 | }; |
196 | ||
3acf2809 | 197 | struct em28xx_eeprom { |
a6c2ba28 | 198 | u32 id; /* 0x9567eb1a */ |
199 | u16 vendor_ID; | |
200 | u16 product_ID; | |
201 | ||
202 | u16 chip_conf; | |
203 | ||
204 | u16 board_conf; | |
205 | ||
206 | u16 string1, string2, string3; | |
207 | ||
208 | u8 string_idx_table; | |
209 | }; | |
210 | ||
211 | /* device states */ | |
3acf2809 | 212 | enum em28xx_dev_state { |
a6c2ba28 | 213 | DEV_INITIALIZED = 0x01, |
214 | DEV_DISCONNECTED = 0x02, | |
215 | DEV_MISCONFIGURED = 0x04, | |
216 | }; | |
217 | ||
6d79468d MCC |
218 | #define EM28XX_AUDIO_BUFS 5 |
219 | #define EM28XX_NUM_AUDIO_PACKETS 64 | |
220 | #define EM28XX_AUDIO_MAX_PACKET_SIZE 196 /* static value */ | |
221 | #define EM28XX_CAPTURE_STREAM_EN 1 | |
222 | #define EM28XX_AUDIO 0x10 | |
223 | ||
224 | struct em28xx_audio { | |
225 | char name[50]; | |
226 | char *transfer_buffer[EM28XX_AUDIO_BUFS]; | |
227 | struct urb *urb[EM28XX_AUDIO_BUFS]; | |
228 | struct usb_device *udev; | |
229 | unsigned int capture_transfer_done; | |
230 | struct snd_pcm_substream *capture_pcm_substream; | |
231 | ||
232 | unsigned int hwptr_done_capture; | |
233 | struct snd_card *sndcard; | |
234 | ||
235 | int users, shutdown; | |
236 | enum em28xx_stream_state capture_stream; | |
237 | spinlock_t slock; | |
238 | }; | |
239 | ||
a6c2ba28 | 240 | /* main device struct */ |
3acf2809 | 241 | struct em28xx { |
a6c2ba28 | 242 | /* generic device properties */ |
243 | char name[30]; /* name (including minor) of the device */ | |
244 | int model; /* index in the device_data struct */ | |
e5589bef | 245 | int devno; /* marks the number of this device */ |
74f38a82 MCC |
246 | unsigned int analog_gpio; |
247 | unsigned int is_em2800:1; | |
a6c2ba28 | 248 | unsigned int has_tuner:1; |
249 | unsigned int has_msp34xx:1; | |
250 | unsigned int has_tda9887:1; | |
a225452e | 251 | unsigned int stream_on:1; /* Locks streams */ |
d7448a8d | 252 | unsigned int has_audio_class:1; |
3abee53e | 253 | unsigned int has_12mhz_i2s:1; |
a225452e | 254 | |
74f38a82 MCC |
255 | int video_inputs; /* number of video inputs */ |
256 | struct list_head devlist; | |
257 | ||
9bb13a6d MCC |
258 | u32 i2s_speed; /* I2S speed for audio digital stream */ |
259 | ||
3acf2809 | 260 | enum em28xx_decoder decoder; |
a6c2ba28 | 261 | |
262 | int tuner_type; /* type of the tuner */ | |
263 | int tuner_addr; /* tuner address */ | |
264 | int tda9887_conf; | |
265 | /* i2c i/o */ | |
266 | struct i2c_adapter i2c_adap; | |
267 | struct i2c_client i2c_client; | |
268 | /* video for linux */ | |
269 | int users; /* user count for exclusive use */ | |
270 | struct video_device *vdev; /* video for linux device struct */ | |
7d497f8a | 271 | v4l2_std_id norm; /* selected tv norm */ |
a6c2ba28 | 272 | int ctl_freq; /* selected frequency */ |
273 | unsigned int ctl_input; /* selected input */ | |
274 | unsigned int ctl_ainput; /* slected audio input */ | |
275 | int mute; | |
276 | int volume; | |
277 | /* frame properties */ | |
3acf2809 | 278 | struct em28xx_frame_t frame[EM28XX_NUM_FRAMES]; /* list of frames */ |
a6c2ba28 | 279 | int num_frames; /* number of frames currently in use */ |
280 | unsigned int frame_count; /* total number of transfered frames */ | |
3acf2809 | 281 | struct em28xx_frame_t *frame_current; /* the frame that is being filled */ |
a6c2ba28 | 282 | int width; /* current frame width */ |
283 | int height; /* current frame height */ | |
284 | int frame_size; /* current frame size */ | |
285 | int field_size; /* current field size */ | |
286 | int bytesperline; | |
287 | int hscale; /* horizontal scale factor (see datasheet) */ | |
288 | int vscale; /* vertical scale factor (see datasheet) */ | |
289 | int interlaced; /* 1=interlace fileds, 0=just top fileds */ | |
290 | int type; | |
9e31ced8 | 291 | unsigned int video_bytesread; /* Number of bytes read */ |
a6c2ba28 | 292 | |
03910cc3 | 293 | unsigned long hash; /* eeprom hash - for boards with generic ID */ |
fad7b958 | 294 | unsigned long i2c_hash; /* i2c devicelist hash - for boards with generic ID */ |
03910cc3 | 295 | |
6d79468d MCC |
296 | struct em28xx_audio *adev; |
297 | ||
a6c2ba28 | 298 | /* states */ |
3acf2809 MCC |
299 | enum em28xx_dev_state state; |
300 | enum em28xx_stream_state stream; | |
301 | enum em28xx_io_method io; | |
9e31ced8 | 302 | |
d7448a8d MCC |
303 | struct work_struct request_module_wk; |
304 | ||
a6c2ba28 | 305 | /* locks */ |
5a80415b | 306 | struct mutex lock; |
a6c2ba28 | 307 | spinlock_t queue_lock; |
308 | struct list_head inqueue, outqueue; | |
309 | wait_queue_head_t open, wait_frame, wait_stream; | |
310 | struct video_device *vbi_dev; | |
0be43754 | 311 | struct video_device *radio_dev; |
a6c2ba28 | 312 | |
313 | unsigned char eedata[256]; | |
314 | ||
315 | /* usb transfer */ | |
316 | struct usb_device *udev; /* the usb device */ | |
317 | int alt; /* alternate */ | |
318 | int max_pkt_size; /* max packet size of isoc transaction */ | |
9d4d9c05 MCC |
319 | int num_alt; /* Number of alternative settings */ |
320 | unsigned int *alt_max_pkt_size; /* array of wMaxPacketSize */ | |
3acf2809 MCC |
321 | struct urb *urb[EM28XX_NUM_BUFS]; /* urb for isoc transfers */ |
322 | char *transfer_buffer[EM28XX_NUM_BUFS]; /* transfer buffers for isoc transfer */ | |
a6c2ba28 | 323 | /* helper funcs that call usb_control_msg */ |
3acf2809 | 324 | int (*em28xx_write_regs) (struct em28xx * dev, u16 reg, char *buf, |
a6c2ba28 | 325 | int len); |
3acf2809 MCC |
326 | int (*em28xx_read_reg) (struct em28xx * dev, u16 reg); |
327 | int (*em28xx_read_reg_req_len) (struct em28xx * dev, u8 req, u16 reg, | |
a6c2ba28 | 328 | char *buf, int len); |
3acf2809 | 329 | int (*em28xx_write_regs_req) (struct em28xx * dev, u8 req, u16 reg, |
a6c2ba28 | 330 | char *buf, int len); |
3acf2809 | 331 | int (*em28xx_read_reg_req) (struct em28xx * dev, u8 req, u16 reg); |
a6c2ba28 | 332 | }; |
333 | ||
a3a048ce MCC |
334 | struct em28xx_fh { |
335 | struct em28xx *dev; | |
a225452e | 336 | unsigned int stream_on:1; /* Locks streams */ |
6d79468d MCC |
337 | int radio; |
338 | }; | |
339 | ||
340 | struct em28xx_ops { | |
341 | struct list_head next; | |
342 | char *name; | |
343 | int id; | |
344 | int (*init)(struct em28xx *); | |
345 | int (*fini)(struct em28xx *); | |
a3a048ce MCC |
346 | }; |
347 | ||
3acf2809 | 348 | /* Provided by em28xx-i2c.c */ |
a6c2ba28 | 349 | |
3acf2809 | 350 | void em28xx_i2c_call_clients(struct em28xx *dev, unsigned int cmd, void *arg); |
fad7b958 | 351 | void em28xx_do_i2c_scan(struct em28xx *dev); |
3acf2809 MCC |
352 | int em28xx_i2c_register(struct em28xx *dev); |
353 | int em28xx_i2c_unregister(struct em28xx *dev); | |
a6c2ba28 | 354 | |
3acf2809 | 355 | /* Provided by em28xx-input.c */ |
d5e52653 | 356 | |
3acf2809 | 357 | void em28xx_set_ir(struct em28xx * dev,struct IR_i2c *ir); |
d5e52653 | 358 | |
3acf2809 | 359 | /* Provided by em28xx-core.c */ |
a6c2ba28 | 360 | |
3acf2809 MCC |
361 | u32 em28xx_request_buffers(struct em28xx *dev, u32 count); |
362 | void em28xx_queue_unusedframes(struct em28xx *dev); | |
363 | void em28xx_release_buffers(struct em28xx *dev); | |
a6c2ba28 | 364 | |
3acf2809 | 365 | int em28xx_read_reg_req_len(struct em28xx *dev, u8 req, u16 reg, |
a6c2ba28 | 366 | char *buf, int len); |
3acf2809 MCC |
367 | int em28xx_read_reg_req(struct em28xx *dev, u8 req, u16 reg); |
368 | int em28xx_read_reg(struct em28xx *dev, u16 reg); | |
369 | int em28xx_write_regs_req(struct em28xx *dev, u8 req, u16 reg, char *buf, | |
a6c2ba28 | 370 | int len); |
3acf2809 MCC |
371 | int em28xx_write_regs(struct em28xx *dev, u16 reg, char *buf, int len); |
372 | int em28xx_write_reg_bits(struct em28xx *dev, u16 reg, u8 val, | |
a6c2ba28 | 373 | u8 bitmask); |
539c96d0 | 374 | int em28xx_set_audio_source(struct em28xx *dev); |
3acf2809 | 375 | int em28xx_audio_analog_set(struct em28xx *dev); |
539c96d0 | 376 | |
3acf2809 MCC |
377 | int em28xx_colorlevels_set_default(struct em28xx *dev); |
378 | int em28xx_capture_start(struct em28xx *dev, int start); | |
379 | int em28xx_outfmt_set_yuv422(struct em28xx *dev); | |
3acf2809 | 380 | int em28xx_resolution_set(struct em28xx *dev); |
3acf2809 MCC |
381 | int em28xx_init_isoc(struct em28xx *dev); |
382 | void em28xx_uninit_isoc(struct em28xx *dev); | |
383 | int em28xx_set_alternate(struct em28xx *dev); | |
384 | ||
6d79468d MCC |
385 | /* Provided by em28xx-video.c */ |
386 | int em28xx_register_extension(struct em28xx_ops *dev); | |
387 | void em28xx_unregister_extension(struct em28xx_ops *dev); | |
388 | ||
3acf2809 | 389 | /* Provided by em28xx-cards.c */ |
596d92d5 | 390 | extern int em2800_variant_detect(struct usb_device* udev,int model); |
a94e95b4 | 391 | extern void em28xx_pre_card_setup(struct em28xx *dev); |
3acf2809 MCC |
392 | extern void em28xx_card_setup(struct em28xx *dev); |
393 | extern struct em28xx_board em28xx_boards[]; | |
394 | extern struct usb_device_id em28xx_id_table[]; | |
395 | extern const unsigned int em28xx_bcount; | |
a6c2ba28 | 396 | |
4362559d SS |
397 | /* em2800 registers */ |
398 | #define EM2800_AUDIOSRC_REG 0x08 | |
399 | ||
3acf2809 | 400 | /* em28xx registers */ |
74f38a82 | 401 | #define I2C_CLK_REG 0x06 |
596d92d5 | 402 | #define CHIPID_REG 0x0a |
a6c2ba28 | 403 | #define USBSUSP_REG 0x0c /* */ |
404 | ||
405 | #define AUDIOSRC_REG 0x0e | |
406 | #define XCLK_REG 0x0f | |
407 | ||
408 | #define VINMODE_REG 0x10 | |
409 | #define VINCTRL_REG 0x11 | |
410 | #define VINENABLE_REG 0x12 /* */ | |
411 | ||
412 | #define GAMMA_REG 0x14 | |
413 | #define RGAIN_REG 0x15 | |
414 | #define GGAIN_REG 0x16 | |
415 | #define BGAIN_REG 0x17 | |
416 | #define ROFFSET_REG 0x18 | |
417 | #define GOFFSET_REG 0x19 | |
418 | #define BOFFSET_REG 0x1a | |
419 | ||
420 | #define OFLOW_REG 0x1b | |
421 | #define HSTART_REG 0x1c | |
422 | #define VSTART_REG 0x1d | |
423 | #define CWIDTH_REG 0x1e | |
424 | #define CHEIGHT_REG 0x1f | |
425 | ||
426 | #define YGAIN_REG 0x20 | |
427 | #define YOFFSET_REG 0x21 | |
428 | #define UVGAIN_REG 0x22 | |
429 | #define UOFFSET_REG 0x23 | |
430 | #define VOFFSET_REG 0x24 | |
431 | #define SHARPNESS_REG 0x25 | |
432 | ||
433 | #define COMPR_REG 0x26 | |
434 | #define OUTFMT_REG 0x27 | |
435 | ||
436 | #define XMIN_REG 0x28 | |
437 | #define XMAX_REG 0x29 | |
438 | #define YMIN_REG 0x2a | |
439 | #define YMAX_REG 0x2b | |
440 | ||
441 | #define HSCALELOW_REG 0x30 | |
442 | #define HSCALEHIGH_REG 0x31 | |
443 | #define VSCALELOW_REG 0x32 | |
444 | #define VSCALEHIGH_REG 0x33 | |
445 | ||
446 | #define AC97LSB_REG 0x40 | |
447 | #define AC97MSB_REG 0x41 | |
448 | #define AC97ADDR_REG 0x42 | |
449 | #define AC97BUSY_REG 0x43 | |
450 | ||
451 | /* em202 registers */ | |
452 | #define MASTER_AC97 0x02 | |
539c96d0 | 453 | #define LINE_IN_AC97 0x10 |
a6c2ba28 | 454 | #define VIDEO_AC97 0x14 |
455 | ||
456 | /* register settings */ | |
4362559d SS |
457 | #define EM2800_AUDIO_SRC_TUNER 0x0d |
458 | #define EM2800_AUDIO_SRC_LINE 0x0c | |
3acf2809 MCC |
459 | #define EM28XX_AUDIO_SRC_TUNER 0xc0 |
460 | #define EM28XX_AUDIO_SRC_LINE 0x80 | |
a6c2ba28 | 461 | |
462 | /* printk macros */ | |
463 | ||
3acf2809 | 464 | #define em28xx_err(fmt, arg...) do {\ |
f85c657f | 465 | printk(KERN_ERR fmt , ##arg); } while (0) |
a6c2ba28 | 466 | |
3acf2809 | 467 | #define em28xx_errdev(fmt, arg...) do {\ |
4ac97914 | 468 | printk(KERN_ERR "%s: "fmt,\ |
f85c657f | 469 | dev->name , ##arg); } while (0) |
a6c2ba28 | 470 | |
3acf2809 | 471 | #define em28xx_info(fmt, arg...) do {\ |
4ac97914 | 472 | printk(KERN_INFO "%s: "fmt,\ |
f85c657f | 473 | dev->name , ##arg); } while (0) |
3acf2809 | 474 | #define em28xx_warn(fmt, arg...) do {\ |
4ac97914 | 475 | printk(KERN_WARNING "%s: "fmt,\ |
f85c657f | 476 | dev->name , ##arg); } while (0) |
a6c2ba28 | 477 | |
3acf2809 | 478 | inline static int em28xx_compression_disable(struct em28xx *dev) |
a6c2ba28 | 479 | { |
480 | /* side effect of disabling scaler and mixer */ | |
3acf2809 | 481 | return em28xx_write_regs(dev, COMPR_REG, "\x00", 1); |
a6c2ba28 | 482 | } |
483 | ||
3acf2809 | 484 | inline static int em28xx_contrast_get(struct em28xx *dev) |
a6c2ba28 | 485 | { |
3acf2809 | 486 | return em28xx_read_reg(dev, YGAIN_REG) & 0x1f; |
a6c2ba28 | 487 | } |
488 | ||
3acf2809 | 489 | inline static int em28xx_brightness_get(struct em28xx *dev) |
a6c2ba28 | 490 | { |
3acf2809 | 491 | return em28xx_read_reg(dev, YOFFSET_REG); |
a6c2ba28 | 492 | } |
493 | ||
3acf2809 | 494 | inline static int em28xx_saturation_get(struct em28xx *dev) |
a6c2ba28 | 495 | { |
3acf2809 | 496 | return em28xx_read_reg(dev, UVGAIN_REG) & 0x1f; |
a6c2ba28 | 497 | } |
498 | ||
3acf2809 | 499 | inline static int em28xx_u_balance_get(struct em28xx *dev) |
a6c2ba28 | 500 | { |
3acf2809 | 501 | return em28xx_read_reg(dev, UOFFSET_REG); |
a6c2ba28 | 502 | } |
503 | ||
3acf2809 | 504 | inline static int em28xx_v_balance_get(struct em28xx *dev) |
a6c2ba28 | 505 | { |
3acf2809 | 506 | return em28xx_read_reg(dev, VOFFSET_REG); |
a6c2ba28 | 507 | } |
508 | ||
3acf2809 | 509 | inline static int em28xx_gamma_get(struct em28xx *dev) |
a6c2ba28 | 510 | { |
3acf2809 | 511 | return em28xx_read_reg(dev, GAMMA_REG) & 0x3f; |
a6c2ba28 | 512 | } |
513 | ||
3acf2809 | 514 | inline static int em28xx_contrast_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 515 | { |
516 | u8 tmp = (u8) val; | |
3acf2809 | 517 | return em28xx_write_regs(dev, YGAIN_REG, &tmp, 1); |
a6c2ba28 | 518 | } |
519 | ||
3acf2809 | 520 | inline static int em28xx_brightness_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 521 | { |
522 | u8 tmp = (u8) val; | |
3acf2809 | 523 | return em28xx_write_regs(dev, YOFFSET_REG, &tmp, 1); |
a6c2ba28 | 524 | } |
525 | ||
3acf2809 | 526 | inline static int em28xx_saturation_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 527 | { |
528 | u8 tmp = (u8) val; | |
3acf2809 | 529 | return em28xx_write_regs(dev, UVGAIN_REG, &tmp, 1); |
a6c2ba28 | 530 | } |
531 | ||
3acf2809 | 532 | inline static int em28xx_u_balance_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 533 | { |
534 | u8 tmp = (u8) val; | |
3acf2809 | 535 | return em28xx_write_regs(dev, UOFFSET_REG, &tmp, 1); |
a6c2ba28 | 536 | } |
537 | ||
3acf2809 | 538 | inline static int em28xx_v_balance_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 539 | { |
540 | u8 tmp = (u8) val; | |
3acf2809 | 541 | return em28xx_write_regs(dev, VOFFSET_REG, &tmp, 1); |
a6c2ba28 | 542 | } |
543 | ||
3acf2809 | 544 | inline static int em28xx_gamma_set(struct em28xx *dev, s32 val) |
a6c2ba28 | 545 | { |
546 | u8 tmp = (u8) val; | |
3acf2809 | 547 | return em28xx_write_regs(dev, GAMMA_REG, &tmp, 1); |
a6c2ba28 | 548 | } |
549 | ||
550 | /*FIXME: maxw should be dependent of alt mode */ | |
3acf2809 | 551 | inline static unsigned int norm_maxw(struct em28xx *dev) |
30556b23 | 552 | { |
7d497f8a MCC |
553 | switch (dev->model) { |
554 | case EM2820_BOARD_MSI_VOX_USB_2: | |
555 | return 640; | |
556 | default: | |
557 | return 720; | |
30556b23 MR |
558 | } |
559 | } | |
560 | ||
3acf2809 | 561 | inline static unsigned int norm_maxh(struct em28xx *dev) |
a6c2ba28 | 562 | { |
7d497f8a MCC |
563 | switch (dev->model) { |
564 | case EM2820_BOARD_MSI_VOX_USB_2: | |
565 | return 480; | |
566 | default: | |
567 | return (dev->norm & V4L2_STD_625_50) ? 576 : 480; | |
30556b23 | 568 | } |
a6c2ba28 | 569 | } |
a6c2ba28 | 570 | #endif |